Emma Anholt
|
fd6489c026
|
tu: Drop emitting of deprecated packing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:12 +00:00 |
|
Emma Anholt
|
ab6b2e4663
|
freedreno/registers: Restore reg definitions required by kernel.
Fixes missing bitset defines, introduced by bfdccc7563
("freedreno/registers: Mark functions as constexpr where possible").
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:12 +00:00 |
|
Emma Anholt
|
a001867e45
|
freedreno/registers: Simplify a bit of reg printing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:11 +00:00 |
|
Emma Anholt
|
b69f53816c
|
freedreno/registers: Apply autopep8 to gen_header.py.
Nonstandard indentation was making my editor furious. No changes needed
to be brought over from kernel 6.18 before I did.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:11 +00:00 |
|
Emma Anholt
|
09e758bcd0
|
tu: Convert remaining tu_cs_emit_pkt4()s to avoid deprecated reg definitions.
We can just pack a dummy value and pull the reg out of it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:10 +00:00 |
|
Emma Anholt
|
54652a4c39
|
tu: Use non-deprecated reg packing for RB_CLEAR_TARGET().
It only has the one variant, so no need to template the function yet.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:10 +00:00 |
|
Emma Anholt
|
c8abe7f3db
|
tu: Pass around the new packing struct for GRAS_LRZ_CNTL.
This way we can use non-deprecated reg packing, and get the proper 8xx
register offset.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:10 +00:00 |
|
Emma Anholt
|
a3740003c2
|
tu: Use appropriate variant for HLSQ regs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:10 +00:00 |
|
Emma Anholt
|
7e027d5672
|
tu: Use proper reg packing in another place.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:10 +00:00 |
|
Emma Anholt
|
dae582ecc1
|
tu: Use appropriate variants for SP regs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:09 +00:00 |
|
Emma Anholt
|
298237b362
|
tu: Use appropriate variants for other GRAS regs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:09 +00:00 |
|
Emma Anholt
|
69cf144144
|
tu: use non-deprecated packing for GRAS_CL_ARRAY_SIZE.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:08 +00:00 |
|
Emma Anholt
|
c5bb86c8df
|
tu: Use non-deprecated packing for SP_DITHER_CNTL.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:07 +00:00 |
|
Emma Anholt
|
08e17ff222
|
tu: Use a register pack for VPC_VARYING_LM_TRANSFER_CNTL_DISABLE[].
Prep for dropping deprecated pack support.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:07 +00:00 |
|
Emma Anholt
|
6d8f08a678
|
tu: Use appropriate variants for GRAS_SU regs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:07 +00:00 |
|
Emma Anholt
|
7eb24634c3
|
tu: Only emit GRAS_SU_RENDER_CNTL and SP_RENDER_CNTL on >=a7xx.
These leaked into a6xx in c166c5100b ("tu/a750: Basic a750 support"),
and were caught by moving to the modern reg packing. Emits the right GRAS
register for 8xx now, too.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:06 +00:00 |
|
Emma Anholt
|
4aec44ea91
|
tu: Use appropriate chip variants for RB regs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:06 +00:00 |
|
Emma Anholt
|
247a0389d6
|
tu: Use appropriate chip variants for A2D reg packing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:05 +00:00 |
|
Emma Anholt
|
5d4598199e
|
tu: Use appropriate chip variants for CONSERVATIVE_RAS_CNTL.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:05 +00:00 |
|
Emma Anholt
|
907dfeb732
|
tu: Use appropriate chip variants in PS setup.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:04 +00:00 |
|
Emma Anholt
|
b38bd7f868
|
tu: Use appopriate chip variants in SC scissor/viewport reg packing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:04 +00:00 |
|
Emma Anholt
|
249680b508
|
tu: Use appropriate chip variants for SP_CS reg packing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:03 +00:00 |
|
Emma Anholt
|
002fc56a0c
|
tu: Use appropriate chip variants for VPC/PC reg packing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:03 +00:00 |
|
Emma Anholt
|
8ed98f7429
|
tu: Use appropriate chip variants for SC_BIN_CNTL reg packing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:02 +00:00 |
|
Emma Anholt
|
d335232fe5
|
tu: Use appropriate chip variants for VRS reg packing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:01 +00:00 |
|
Emma Anholt
|
08782fbdc3
|
tu: Use appropriate chip variants for LRZ reg packing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:01 +00:00 |
|
Emma Anholt
|
1f016974fa
|
tu: Use appropriate chip variants for FOVEAT regs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:00 +00:00 |
|
Emma Anholt
|
5a6bfc1614
|
tu: Use non-deprecated names for scratch regs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:18:00 +00:00 |
|
Emma Anholt
|
f12a9b91c9
|
tu: Explicitly use 6XX scratch reg packing in perfcntrs_pass_cs_entries.
It looks like this will change in 8xx, but for now this gets us off of
deprecated reg packing.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:58 +00:00 |
|
Emma Anholt
|
454c665552
|
tu: Move tu6_emit_gs() to use reg packing.
Gets us the right regs on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:58 +00:00 |
|
Emma Anholt
|
56e63dc5ed
|
tu: Move VPC_SO_FLUSH_BASE to use reg packing.
Gets us the right reg on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:58 +00:00 |
|
Emma Anholt
|
4bc21cd77d
|
tu: Convert tu_init_cmdbuf_start_a725_quirk() to non-deprecated packing.
We can just pass 7xx as the CHIP, rather than templating.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:58 +00:00 |
|
Emma Anholt
|
a7ffdd31c5
|
tu: Template tu_pipeline_builder_parse_rasterization_order() by CHIP.
This gets us the right reg on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:57 +00:00 |
|
Emma Anholt
|
fbcc32e990
|
tu: Template tu6_emit_vpc_varying_modes() by CHIP.
This gets us the right regs on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:57 +00:00 |
|
Emma Anholt
|
436f6059b4
|
tu: Template tu7_emit_subpass_shading_rate by CHIP.
This gets us the right regs on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:56 +00:00 |
|
Emma Anholt
|
99f31785a2
|
tu: Template tu6_emit_msaa() by CHIP.
This gets us the right regs on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:56 +00:00 |
|
Emma Anholt
|
22a8475151
|
tu: Template update_vsc_pipe by CHIP.
This lets us use non-deprecated reg packing, and fixes incorrect emitting
of 0D08 on 6xx that was introduced in 0cf27a7236 ("tu: Clear
`VSC_UNKNOWN_0D08` on A7XX")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:55 +00:00 |
|
Emma Anholt
|
17e47f4dff
|
tu: Template fdm_apply_store_coords() by CHIP.
Gets the right regs on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:55 +00:00 |
|
Emma Anholt
|
339c3c7970
|
tu: Use non-deprecated reg packing in tu6_setup_streamout()'s CRBs.
This gets us the right registers on a8xx. We can clean this up later with
the CRB builder.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:54 +00:00 |
|
Emma Anholt
|
7555600cc8
|
tu: Template tu_CmdBindIndexBuffer2KHR by CHIP.
This gets us the right reg on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:54 +00:00 |
|
Emma Anholt
|
2f3ebc4f46
|
tu: Template tu_CmdBindTransformFeedbackBuffersEXT by CHIP.
Gets the right regs for reg packing on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:54 +00:00 |
|
Emma Anholt
|
bfbc625f79
|
tu: Template tu_CmdBeginTransformFeedbackEXT() by CHIP.
Gets the right regs for reg packing on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:53 +00:00 |
|
Emma Anholt
|
b69aa77456
|
tu: Template r2d_coords by CHIP.
Gets us the right regs on 8xx
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:53 +00:00 |
|
Emma Anholt
|
b1a2757097
|
tu: Template tu7_emit_tile_render_begin_regs by CHIP.
Gets us the right reg on 8xx
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:52 +00:00 |
|
Emma Anholt
|
e6a3699bf3
|
tu: Template tu6_build_depth_plane_z_mode by CHIP.
Gets us the right reg on 8xx for GRAS_SU_DPETH_PLANE_CNTL. I used a reg
pack function on the RB reg too, for consistency.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:52 +00:00 |
|
Emma Anholt
|
00bf0907e4
|
tu: Use tu_cs_emit_regs() for SU_POLY_OFFSET setup.
This gets us the right regs on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:51 +00:00 |
|
Emma Anholt
|
35e5be2bed
|
tu: Template tu6_emit_rt_workaround() by CHIP.
This lets us set the right registers on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:51 +00:00 |
|
Emma Anholt
|
4439101dd3
|
tu: Template tu6_emit_window_scissor by CHIP.
This lets us set the right registers on 8xx.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:50 +00:00 |
|
Emma Anholt
|
21e6c68bd1
|
tu: Use a register pack for VPC_PS_CNTL.
Prep for dropping deprecated pack support.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
|
2025-12-04 22:17:50 +00:00 |
|
Yiwei Zhang
|
b42d7c3809
|
ci: uprev virglrenderer
This brings in latest virglrenderer that supports recently added venus
extensions.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38800>
|
2025-12-04 21:38:54 +00:00 |
|