Commit graph

211218 commits

Author SHA1 Message Date
Yiwei Zhang
6b3e719b83 mailmap: add Yiwei Zhang
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37074>
2025-08-28 23:15:16 +00:00
Yonggang Luo
f74d0a8c18 dzn: -DVK_USE_PLATFORM_WIN32_KHR is already comes from idep_vulkan_wsi_defines that depends by idep_vulkan_wsi
Avoid define it repeatedly.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37049>
2025-08-28 22:55:03 +00:00
Faith Ekstrand
9c5c11535c vulkan/wsi: Don't dma-buf sync import/export on success
Logging on success just generates unnecessary spam.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37033>
2025-08-28 22:27:05 +00:00
Faith Ekstrand
e4d9650e21 vulkan/wsi: Move a couple of dma-buf sync checks
In 14b4160792 ("vulkan/wsi: Only test for dma-buf sync file support
once"), I moved the dma-buf sync file import/export check earlier.  This
is fine for hardware implementations where we have real dma-buf
import/export but it broke lavapipe because the check itself ignored
whether or not we actually have dma-buf import/export.  Add a couple
more checks to wsi_drm_check_dma_buf_sync_file_import_export() so it's
safe even for SW drivers.  Also, in wsi_create_sync_for_dma_buf_wait(),
check if we actually have a dma-buf.

Fixes: 14b4160792 ("vulkan/wsi: Only test for dma-buf sync file support once")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37033>
2025-08-28 22:27:05 +00:00
Ian Romanick
49141ad5f2 brw: Strategically place flags initialization to help cmod prop
v2: Rebase on ac2b072312 ("brw: Add more specific brw_builder
helpers"), and fix a bug that caused the new instruction to possibly be
put in the wrong place.

No shader-db changes on any Intel platform.

fossil-db:

All Intel platforms had similar results. (Lunar Lake shown)
Totals:
Instrs: 233675305 -> 233641585 (-0.01%)
Cycle count: 32593658094 -> 32591467794 (-0.01%); split: -0.01%, +0.00%

Totals from 33513 (4.25% of 789264) affected shaders:
Instrs: 5200332 -> 5166612 (-0.65%)
Cycle count: 1499831128 -> 1497640828 (-0.15%); split: -0.15%, +0.00%

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35444>
2025-08-28 22:08:20 +00:00
Ian Romanick
3018849535 brw: Don't emit redundant flags initialization for subgroup op lowering
No shader-db changes on any Intel platform.

fossil-db:

All Intel platforms had similar results. (Lunar Lake shown)
Totals:
Instrs: 233676039 -> 233675305 (-0.00%)
Cycle count: 32594097814 -> 32593658094 (-0.00%); split: -0.00%, +0.00%

Totals from 325 (0.04% of 789264) affected shaders:
Instrs: 104491 -> 103757 (-0.70%)
Cycle count: 1183870034 -> 1183430314 (-0.04%); split: -0.04%, +0.00%

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35444>
2025-08-28 22:08:20 +00:00
Ian Romanick
4a238f461d brw: Do cmod prop again after brw_lower_subgroup_ops
shader-db:

All Intel platforms had similar results. (Lunar Lake shown)
total instructions in shared programs: 17114300 -> 17114294 (<.01%)
instructions in affected programs: 3617 -> 3611 (-0.17%)
helped: 6 / HURT: 0

total cycles in shared programs: 886397556 -> 886397454 (<.01%)
cycles in affected programs: 511400 -> 511298 (-0.02%)
helped: 6 / HURT: 0

fossil-db:

Lunar Lake
Totals:
Instrs: 233683694 -> 233676039 (-0.00%); split: -0.00%, +0.00%
Cycle count: 32602038466 -> 32594097814 (-0.02%); split: -0.03%, +0.01%
Spill count: 540908 -> 540704 (-0.04%)
Fill count: 700935 -> 700258 (-0.10%)

Totals from 2200 (0.28% of 789264) affected shaders:
Instrs: 2062360 -> 2054705 (-0.37%); split: -0.37%, +0.00%
Cycle count: 2506073282 -> 2498132630 (-0.32%); split: -0.41%, +0.09%
Spill count: 14423 -> 14219 (-1.41%)
Fill count: 34219 -> 33542 (-1.98%)

Meteor Lake and DG2 had similar results. (Meteor Lake shown)
Totals:
Instrs: 263545171 -> 263543341 (-0.00%); split: -0.00%, +0.00%
Cycle count: 26480835985 -> 26484748317 (+0.01%); split: -0.01%, +0.03%
Spill count: 554335 -> 554338 (+0.00%)
Fill count: 645486 -> 645498 (+0.00%)

Totals from 610 (0.07% of 903944) affected shaders:
Instrs: 1139871 -> 1138041 (-0.16%); split: -0.17%, +0.01%
Cycle count: 2274612327 -> 2278524659 (+0.17%); split: -0.15%, +0.33%
Spill count: 15153 -> 15156 (+0.02%)
Fill count: 36831 -> 36843 (+0.03%)

Tiger Lake, Ice Lake, and Skylake had similar results. (Tiger Lake shown)
Totals:
Instrs: 268713723 -> 268712817 (-0.00%); split: -0.00%, +0.00%
Cycle count: 24653238085 -> 24652269669 (-0.00%); split: -0.00%, +0.00%
Fill count: 671369 -> 671361 (-0.00%)

Totals from 666 (0.07% of 899711) affected shaders:
Instrs: 924423 -> 923517 (-0.10%); split: -0.11%, +0.01%
Cycle count: 840380565 -> 839412149 (-0.12%); split: -0.13%, +0.02%
Fill count: 13006 -> 12998 (-0.06%)

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35444>
2025-08-28 22:08:20 +00:00
Faith Ekstrand
31f0d0732e lavapipe: Always use dma-buf for external memory when we can
This makes lavapipe act like other DRM drivers whenever we have udmabuf
and just make everything a dma-buf even if it doesn't strictly have to
be.  Without this we can end up in weird cases if the client asks to
allocate a memory object with multiple export types.  Before, if this
happened, we would allocate a memfd and then return that when the client
calls GetMemoryFd() even if they asked for a dma-buf.  In theory, we
could add additional plumbing to allow for using the memfd itself for
OPAQUE_FD and only wrap in a udmabuf if DMA_BUF is requested but this is
simpler and more in line with what hardware DRM drivers do.

Fixes: c1657de63c ("lavapipe: support VK_EXTERNAL_MEMORY_HANDLE_TYPE_DMA_BUF_BIT_EXT")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13798
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37067>
2025-08-28 21:50:56 +00:00
Connor Abbott
16cd5e0244 zink: Make sparse always wait on pending gfx commands
We need to make sure that earlier gfx commands don't see the committed
resource. Also, the commit doesn't necessarily happen atomically,
because the kernel has to unmap the NULL page and then map the BO page,
so earlier gfx submits could race with the kernel an see an unmapped
page and fault. This is the same race when uncommitting but in reverse.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37065>
2025-08-28 21:28:24 +00:00
Mike Blumenkrantz
0bae67b02b zink: flag resources for layout eval in update_binds_for_samplerviews()
Some checks are pending
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macOS-CI / macOS-CI (xlib) (push) Waiting to run
this ensures the used layout is in sync with the expected descriptor layout

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37066>
2025-08-28 20:24:34 +00:00
Mike Blumenkrantz
57399b5b8b zink: fix some weird indentation in update_binds_for_samplerviews()
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37066>
2025-08-28 20:24:33 +00:00
Hans-Kristian Arntzen
6fbe2be7a7 nvk: Return 0 for opaque memory capture replay.
If implementation does not actually replay the VA, it must return 0
to not violate:

"If the memory object was allocated with a non-zero value of
opaqueCaptureAddress, the return value must be the same address."

Fixes RenderDoc capture replay, which asserts on the this spec rule
being followed.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Fixes: ed6d5c33 ("nvk: Implement VK_EXT/KHR_buffer_device_address")
Reviewed-by: Mohamed Ahmed <mohamedahmedegypt2001@gmail.com>
Closes #13784

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37047>
2025-08-28 20:05:51 +00:00
Lionel Landwerlin
c0cfd16da6 anv: move input coverage mask setup to runtime flush
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37060>
2025-08-28 19:08:33 +00:00
Antonio Ospite
b39046b9ba radv: fix building with libdrm as a submodule
Some checks are pending
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When building with libdrm as an internal fallback dependency, i.e.
a submodule, meson does not find `amdgpu.h` from the installed external
dep, failing to build with the following error:

-----------------------------------------------------------------------
In file included from ../src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c:10:
In file included from ../src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.h:18:
../src/amd/common/ac_linux_drm.h:14:10: fatal error: 'amdgpu.h' file not found
   14 | #include "amdgpu.h"
      |          ^~~~~~~~~~
1 error generated.
-----------------------------------------------------------------------

Make libvulkan_radeon depend explicitly on dep_libdrm_amdgpu to also use
the include_directories declared for that dependency in case it's an
internal dependency.

Acked-by: Valentine Burley <valentine.burley@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36932>
2025-08-28 18:08:20 +00:00
Antonio Ospite
18ef7b82c6 radv: don't include amdgpu.h directly
Don't include amdgpu.h directly in AMDGPU/RADV code, the only libdrm
pieces that are needed are handled in src/amd/common/ac_linux_drm.h
which already includes amdgpu.h

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36932>
2025-08-28 18:08:20 +00:00
Samuel Pitoiset
4022b5c94a radv: bind the vertex input state like a normal dynamic state
This is much cleaner.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:26 +00:00
Samuel Pitoiset
2f7e8751ea radv: replace an assertion with a check when emitting VS prolog
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:26 +00:00
Samuel Pitoiset
d29087d353 radv: use the dynamic state to store vertex input state
This is also a dynamic state.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:26 +00:00
Samuel Pitoiset
d48096aed4 radv: remove unused parameter to radv_pipeline_init_dynamic_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:25 +00:00
Samuel Pitoiset
3eed98d122 radv: move VBO misaligned/unaligned info to radv_vertex_input_state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:25 +00:00
Samuel Pitoiset
53ce957983 radv: move radv_vertex_input_state to radv_pipeline_graphics.h
Like other similar states that are shared between graphics pipeline
and command buffers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:24 +00:00
Samuel Pitoiset
d7f401c2bb radv: bind the vertex binding strides like a normal dynamic state
This is much cleaner.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:24 +00:00
Samuel Pitoiset
9a5c540b75 radv: use the dynamic state to store vertex binding strides
This is a dynamic state. This also replaces the stride by a 16-bit
value because it's required to not exceed
VkPhysicalDeviceLimits::maxVertexInputBindingStride which is defined
to 2048.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:24 +00:00
Samuel Pitoiset
9597a3c13f radv: only update vertex stride if pStrides is non-NULL when binding VBO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37025>
2025-08-28 17:46:23 +00:00
Mike Blumenkrantz
b1d07ae43a zink: enable single-aspected blitting of mixed z/s formats
not sure anyone supports this, but zink should handle it alright

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37057>
2025-08-28 17:24:52 +00:00
Mike Blumenkrantz
e83c7f2912 zink: always flush clears when doing single-aspect blit to avoid data loss
if doing e.g., clear(DEPTH|STENCIL) -> blit(DEPTH), the stencil clear would
previously have been discarded

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37057>
2025-08-28 17:24:52 +00:00
Mike Blumenkrantz
817077276a zink: also set msrtss stencil
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37057>
2025-08-28 17:24:51 +00:00
Rob Clark
807644b864 freedreno/a6xx: Drop VPC table magic
It is a bit annoying to have the resulting increased duplication, but
the table magic doesn't play nicely with variant regs.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
0f2f247f91 freedreno: Name a few events
And add them to the gpu_event helper so we don't need to open-code these
packets.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
77c42c1a57 freedreno/registers: Make TPL1_BICUBIC_WEIGHTS_TABLE an array
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
acde75ba4e freedreno/registers: Prep for upcoming things
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
16ca19d6f9 freedreno/registers: Move descriptor related enums
These are mostly the same for a8xx.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
611e47ddeb freedreno/registers: Cleanup the bin_cntl's
Factor out a common bitset.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
a84069cff4 freedreno/registers: De-open-code some offsets
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
fd93414496 freedreno/registers: Add implicit reg32 for empty arrays
Registers declared as a "naked" array, ie:

  <array offset="0x1234" name="SOME_REG" stride="1" .../>

were not getting register packers generated for them.  Insert an
implicit <reg32> child for them, so the above would be equivalent
to:

  <array offset="0x1234" name="SOME_REG" stride="1" .../>
    <reg32 offset="0" name="REG"/>
  </array>

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
622c6a1315 freedreno/registers: Fix variant ranges
When we have a variant range, we need to test against the inclusive
range.  Ie. if we have variants="A6XX-A7XX" we can't just test for
chip == A6XX.

So switch the variant key to preserve the range (ie. "A6XX-A7XX" instead
of just "A6XX"), add a helper to sanitize the range for symbol/#define
names, and handle the three possible cases when generating the if/else
ladder:

  - single variant, ie. variants="A6XX", keeps the current logic
  - open ended range, ie. variants="A6XX-", generates a >=
  - closed ended range, ie. variants="A6XX-A7XX", generates a
    (CHIP >= A6XX) && (CHIP <= A7XX)

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
2967337f2d freedreno/computerator: Convert to variant reg packers
And drop -DFD_NO_DEPRECATED_PACK

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
f4ca0093d5 freedreno/a6xx: Convert to variant reg packers
Convert the builders and drop the -DFD_NO_DEPRECATED_PACK

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
b3ac37c515 freedreno/registers: Generate variant builder always
Even if there is only a single variant currently.  This will allow
porting code to use the new builders independently from adding new
hw support.  Basically avoiding churny conflicty changes on a branch
during bringup.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
ae8907f270 freedreno/registers: Add a way to disable deprecated warnings
Intended for temporarily disabling the warnings when bringing up a new
gen.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
85cb5cef2a freedreno/drm-shim: Handle GET/SET_METADATA
We could actually pretend to implement this.. but ignoring them is good
enough.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
6fe310416f freedreno/decode: lua support for <stripe>
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
52738a5545 freedreno/decode: Fix ufixed/fixed decode of bitset fields
We need to copy over the radix value.  Also add missing xyzvalid fields,
although they do not appear to be used anywhere.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Rob Clark
f31883c20c freedreno/registers: pm4 cleanup
Use <stripe> to handle 32b vs 64b gpu differences.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Danylo Piliaiev
065d2547e7 ir3: Add EOLM and EOGM a7xx flags to NOP
Apparently the ignored bits have meaning.
- EOLM - Is set on a NOP after the last cat6 instruction.
         Must be set outside of control flow including preambles.
         Doesn't seem to affect correctness.
- EOGM - Is set on a NOP after the last cat5/cat6 instruction.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37009>
2025-08-28 16:59:28 +00:00
Philipp Zabel
0e6b24451d rusticl: Fix hidden lifetime warnings
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Fix the following warning, and others that are similar, as rustc
suggests:

warning: hiding a lifetime that's elided elsewhere is confusing
   --> ../src/gallium/frontends/rusticl/mesa/compiler/nir.rs:282:22
    |
282 |     pub fn variables(&mut self) -> ExecListIter<nir_variable> {
    |                      ^^^^^^^^^     -------------------------- the same lifetime is hidden here
    |                      |
    |                      the lifetime is elided here
    = help: the same lifetime is referred to in inconsistent ways, making the signature confusing
    = note: `#[warn(mismatched_lifetime_syntaxes)]` on by default
help: use `'_` for type paths
    |
282 |     pub fn variables(&mut self) -> ExecListIter<'_, nir_variable> {
    |                                                 +++

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37059>
2025-08-28 16:39:53 +00:00
Karol Herbst
26c1ded905 nak: use ldsm
Reviewed-by: Mary Guillemard <mary@mary.zone>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363>
2025-08-28 16:09:14 +02:00
Dave Airlie
c38170452d nir: add nir_intrinsic_cmat_load_shared_nv
This maps to NAK's OpLdsm

Reviewed-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363>
2025-08-28 16:09:07 +02:00
Karol Herbst
016159096f nak/hw_runner: add ldsm tests
Reviewed-by: Mary Guillemard <mary@mary.zone>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363>
2025-08-28 16:09:03 +02:00
Karol Herbst
ad8df8407e nak/hw_runner: support shared memory
Reviewed-by: Mary Guillemard <mary@mary.zone>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363>
2025-08-28 16:09:03 +02:00