Commit graph

93236 commits

Author SHA1 Message Date
Pohjolainen, Topi
6a86795a3d i965/gen6: Use isl-based miptree also for stencil rbs
Fixes dEQP-EGL.functional.image.render_multiple_contexts.
gles2_renderbuffer_stencil_stencil_buffer

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-21 16:25:24 -07:00
Ian Romanick
c06b1d3c16 i965: Remove spurious mutex frobbing around call to intel_miptree_blit
These locks were added in 2f28a0dc, but I don't see anything in the
intel_miptree_blit path that should make this necessary.

When asked, Kristian says:

    I doubt it's needed now with the new blorp. If I remember correctly,
    I had to drop the lock there since intel_miptree_blit() could hit
    the XY blit path that requires a fast clear resolve. The fast
    resolve being meta, would then try to lock the texture again.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2017-06-21 14:34:56 -07:00
Eric Engestrom
4a1238a452 egl: turn one more boolean int into a bool
Same as the previous commit, but this one was split out because it's
a bit more complicated: this field is given as a pointer to a function,
so the function had to be changed as well, and the function was use in
a bunch of places, which needed updating as well.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-21 21:42:14 +01:00
Eric Engestrom
60f984262c egl: turn boolean ints into bools
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-21 21:42:08 +01:00
Jason Ekstrand
17918a0372 i965/miptree: Move isl_surf_get_(hiz|mcs)_surf out of the assert
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101535
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101538
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101539
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-06-21 11:21:19 -07:00
Rafael Antognolli
78b843af3c intel/genxml: Use the same naming convention for Floating Point Mode.
In newer gens, this field has a prefix and the non-IEEEE-745 mode is called
"Alternate", instead of simply "Alt".

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-21 10:16:05 -07:00
Rafael Antognolli
ce728594fd intel/genxml: Normalize URB Data field in WM_STATE.
On gen6+, this is called "Dispatch GRF Start Register For Constant/Setup Data
0", while on gen5 and lower it's called only "Dispatch GRF Start Register For
URB Data", but it's essentially the same thing (URB data), so rename it to
match newer gens and simplify the C code that handles it.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-21 10:16:05 -07:00
Rafael Antognolli
44415056e7 intel/genxml: Rename field on WM_STATE to match gen6+.
"Pixel Shader Kill Pixel" -> "Pixel Shader Kills Pixel", which is how it's
called on newer gens.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-21 10:16:05 -07:00
Rafael Antognolli
82c66965ac intel/genxml: Normalize fields on WM_STATE.
On gen4, WM_STATE only has one Kernel Start Pointer and one GRF Register
Count, but we can make the code that handles this on multiple gens simpler if
we add an index 0 to it too.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-21 10:16:05 -07:00
Rafael Antognolli
eddb1ebccf intel/genxml: Add missing field to CLIP_STATE.
Just because it's not set doesn't mean that it doesn't exist. And since the
field is there on newer gens, having it on gen5 simplifies the code when
porting gen5 and lower.

Also add missing value to API Mode on CLIP_STATE on gen4.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-21 10:16:05 -07:00
Rafael Antognolli
9a5ae19cbb intel/genxml: Fix type of UserClipFlags ClipTest Enable Bitmask.
This is a bitmask, so it can't be a boolean. Also rename it so it matches
gen6+.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-21 10:16:05 -07:00
Rafael Antognolli
19d1defcd5 intel/genxml: Add missing fields to CLIP_STATE on gen4-5.
These fields are set by brw_clip_unit, so we need them when converting to
genxml.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-21 10:16:05 -07:00
Rafael Antognolli
faa4f5c42d intel/genxml: Normalize GS_STATE.
Rename "Rendering Enable" to "Rendering Enabled", so it matches gen6+.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-21 10:16:05 -07:00
Ville Syrjälä
0eef03a6f2 i915: Always emit W on gen3
Unlike the older gen2 hardware, gen3 performs perspective
correct interpolation even for the primary/secondary colors.
To do that it naturally needs us to emit W for the vertices.

Currently we emit W only when at least one texture coordinate
set gets emitted. This means the interpolation of color will
change depending on whether texcoords/varyings are used or not.
That's probably not what anyone would expect, so let's just
always emit W to get consistent behaviour. Trying to avoid
emitting W seems like more hassle than it's worth, especially
as bspec seems to suggest that the hardware will perform the
perspective division anyway.

This used to be broken until it was accidentally fixed it in
commit c349031c27 ("i915: Fix texcoord vs. varying collision
in fragment programs") by introducing a bug that made the driver
always emit W. After fixing that bug in commit c1eedb43f3
("i915: Fix wpos_tex vs. -1 comparison") we went back to the
old behaviour and caused an apparent regression.

Fixes: c1eedb43f3 ("i915: Fix wpos_tex vs. -1 comparison")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101451
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-06-21 13:10:58 +03:00
Samuel Pitoiset
26fbdb12f4 mesa: add KHR_no_error support for glStencilOp()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-21 08:47:26 +02:00
Samuel Pitoiset
5407662570 mesa: add stencil_op() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-21 08:47:24 +02:00
Samuel Pitoiset
e6659c560a mesa: add KHR_no_error support for glStencilFunc()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-21 08:47:22 +02:00
Samuel Pitoiset
db967dcb05 mesa: add stencil_func() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-21 08:47:18 +02:00
Samuel Pitoiset
b9e2d5c18d mesa: add KHR_no_error support for glStencilOpSeparate()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-21 08:47:16 +02:00
Samuel Pitoiset
0614b7a6f7 mesa: add stencil_op_separate() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-21 08:47:14 +02:00
Samuel Pitoiset
d222e14ffa mesa: add KHR_no_error support for glStencilMaskSeparate()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-21 08:47:12 +02:00
Samuel Pitoiset
8ab0aaa350 mesa: add stencil_mask_separate() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-21 08:47:10 +02:00
Samuel Pitoiset
9c49c9d8dd mesa: add KHR_no_error support for glStencilFuncSeparate()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-21 08:47:09 +02:00
Samuel Pitoiset
6f10d93ea4 mesa: add stencil_func_separate() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-06-21 08:47:06 +02:00
Lucas Stach
629003b5b8 etnaviv: fix blend color for RB swapped rendertargets
Same as with the colormasks, the blend color needs to be swizzled according
to the rendertarget format.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-06-21 07:45:15 +02:00
Jason Ekstrand
1bd0acab21 spirv: Work around the Doom shader bug
Doom shipped with a broken version of GLSLang which handles samplers as
function arguments in a way that isn't spec-compliant.  In particular,
it creates a temporary local sampler variable and copies the sampler
into it.  While Dave has had a hack patch out for a while that gets it
working, we've never landed it because we've been hoping that a game
update would come out with fixed shaders.  Unfortunately, no game update
appears on to be on the horizon and I've found this issue in yet another
application so I think we're stuck working around it.  Hopefully, we can
delete this code one day.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99467
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-06-20 18:51:26 -07:00
Ian Romanick
93055576ae glsl: Update build instructions for int64.glsl
Trivial

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2017-06-20 17:45:49 -07:00
Elie Tournier
7e46be3dec glsl: Fix indent in dump code
Signed-off-by: Elie Tournier <elie.tournier@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-06-20 17:45:49 -07:00
Ilia Mirkin
8754c5359f st/xvmc: deal with drivers wanting different texture formats
Previously, texture formats were being used unconditionally without
checking. However nv30 supports neither RGBX8 nor R4A4/A4R4 formats. Add
sufficient fallbacks so that the nv30 driver can have working OSD.

Tested on a NV44A/PCI.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-06-20 20:20:55 -04:00
Ben Skeggs
7bae3ef812 nvc0: fix transfer of larger rectangles with DmaCopy on gk104 and up
By treating the rectangles as 1cpp, we can run up against some internal
copy engine limits and trigger a MEM2MEM_RECT_OUT_OF_BOUNDS error check
at launch time.

This commit enables the REMAP hardware, which allows us to specify both
the component size and number of components for a transfer.  We're then
able to pass in the real width/nblocksx values and not hit the limits.

There's a couple of "supported" CPPs in the list that we can't actually
hit, but are there simply because they're possible.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-06-20 20:18:54 -04:00
Ben Skeggs
ec3d489d5b nvc0: copy engine surface params are only relevant for tiled surfaces
Aside from reducing pushbuf usage in some situations, this commit should
have no other effect, and is just to make it somewhat obvious that those
methods have zero effect on linear surfaces.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-06-20 20:18:54 -04:00
Dave Airlie
72c8c68458 st/mesa: fix assert to be simpler
I just noticed a warning with a non-debug build, but really
this could all be one line, and I'm not even 100% the assert
makes sense here.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-06-21 08:59:18 +10:00
Lionel Landwerlin
030abc6109 intel: compiler/i965: fix is_broxton checks
In 5f2fe9302c is_geminilake was introduced for the differenciate
broxton from geminilake. Unfortunately I failed as verifying that
is_broxton is throughout the code base to mean Gen9lp.

Fixes: 5f2fe9302c ("intel: common: add flag to identify platforms by name")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-06-20 23:26:42 +01:00
Plamena Manolova
b3b6121115 mesa/main: Move NULL pointer check.
In blit_framebuffer we're already doing a NULL
pointer check for readFb and drawFb so it makes
sense to do it before we actually use the pointers.

CID: 1412569
Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2017-06-20 13:57:20 -07:00
George Kyriazis
12f52942f8 swr: Include definition of missing function
Inline function SWR_MULTISAMPLE_POS::PrecalcSampleData() was missing
definition.  Include definition in core/state_funcs.h.

Fixes windows build.

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
2017-06-20 14:42:42 -05:00
Ben Widawsky
3e1055591b i965/cnl: Add l3 configuration for Cannonlake
V2 (Anuj):
Squash the changes in one patch rebase on master.
Address the review comments made by Francisco Jerez.
Do the URB allocation per slice (not per bank).

V3 (Anuj):
Update the comment.
Format the table as other l3 config tables.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
---
V1 was sent out with the heading:
"i965/cnl: Properly handle l3 configuration"
2017-06-20 12:18:26 -07:00
Anuj Phogat
1024dad4d9 i965: Add a variable for way size per bank in get_l3_way_size()
Adding this variable better explains the computation of L3 way
size in the function.

V2: Use const variable for way_size_per_bank.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2017-06-20 12:18:26 -07:00
Anuj Phogat
8521559e08 i965: Fix broxton 2x6 l3 config
The new table added in this patch matches with the table
in gfxspecs. We were programming the wrong values earlier.

V2: Update the comment.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2017-06-20 12:18:26 -07:00
Ian Romanick
4eb3747544 i965: Fall back to normal blorp clear instead of meta clear
When intel_miptree_alloc_non_msrt_mcs fails, fall back to normal blorp
color clear instead of falling back to meta.  With this change,
brw_blorp_clear_color can never fail.

v2: Combine two if-statements to remove a level of indentation.
Suggested by Jason.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-20 11:07:02 -07:00
Ian Romanick
cbb941cdec intel/blorp: Apply source offset in the TEX case
Previously the offset was only applied in the TXF case.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-20 11:07:02 -07:00
Ian Romanick
990f2be139 intel/blorp: Apply Gen4 coord. normalization after cubemap sizes are adjusted
Otherwise the values used for coordinate normalization use the wrong
sizes.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-20 11:07:02 -07:00
Jason Ekstrand
b2dd61196e intel/blorp: Set needs_(dst|src)_offset for Gen4 cubemaps
We call convert_to_single_slice so they may end up with a non-trivial
offset that needs to be taken into account.

v2 (idr): Also set needs_src_offset.  Suggested by Jason.

Fixes ES2-CTS.functional.texture.specification.basic_copyteximage2d.cube_rgba
and ES2-CTS.functional.texture.specification.basic_copytexsubimage2d.cube_rgba
on G45.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101284
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-20 11:07:02 -07:00
Ian Romanick
cc14286930 meta/blit: Silence unused parameter warning
drivers/common/meta_blit.c: In function ‘setup_glsl_msaa_blit_scaled_shader’:
drivers/common/meta_blit.c:62:58: warning: unused parameter ‘filter’ [-Wunused-parameter]
                                    GLenum target, GLenum filter)
                                                          ^~~~~~

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-20 11:07:02 -07:00
Ian Romanick
37164da272 meta: Silence unused parameter warning
drivers/common/meta.c:2694:71: warning: unused parameter ‘dims’ [-Wunused-parameter]
 copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims,
                                                                       ^~~~

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-20 11:07:02 -07:00
Ian Romanick
691beaf241 i965: Fix incorrect comment
There is no intel_miptree_slice_has_hiz function, but there is a
intel_miptree_level_has_hiz function.  I assume that's the correct one
to use.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-20 11:07:01 -07:00
Samuel Pitoiset
4f00b2bc7e mesa: simplify _mesa_IsVertexArray()
_mesa_lookup_vao() already returns NULL if id is zero.

v2: - change the conditional (Ian)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> (v1)
2017-06-20 19:15:17 +02:00
Eric Engestrom
cb3e01ca71 mesa/format_info: use designated initialiser list
Also, make that table const, since no-one is supposed to modify it anyway.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-06-20 17:55:13 +01:00
Eric Anholt
45b0172693 vc4: Clean up release build warnings using MAYBE_UNUSED.
These variables are all used in an assert(), so release builds see no
usages.
2017-06-20 09:09:09 -07:00
Eric Anholt
743dcdd936 vc4: Allow VBOs to be mapped during execution.
There's no reason we can't -- the mappings we expose are basically
equivalent to persistent/coherent, already.

Improves mesa-demos drawoverhead (no state change) performance by
5.21362% +/- 1.25078% (n=11).
2017-06-20 09:05:44 -07:00
Brian Paul
d8148ed10a gallium/vbuf: avoid segfault when we get invalid glDrawRangeElements()
A common user error is to call glDrawRangeElements() with the 'end'
argument being one too large.  If we use the vbuf module to translate
some vertex attributes this error can cause us to read past the end of
the mapped hardware buffer, resulting in a crash.

This patch adjusts the vertex count to avoid that issue.  Typically,
the vertex_count gets decremented by one.

This fixes crashes with the Unigine Tropics and Sanctuary demos with older
VMware hardware versions.  The issue isn't hit with VGPU10 because we
don't hit this fallback.

No piglit changes.

CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-06-20 08:03:18 -06:00