Commit graph

213808 commits

Author SHA1 Message Date
Georg Lehmann
654bd74c60 treewide: use nir_store_global alias of nir_build_store_global
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37959>
2025-10-21 12:37:58 +02:00
Georg Lehmann
2306cba65b nir: remove manual nir_store_global
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37959>
2025-10-21 12:37:58 +02:00
Georg Lehmann
9e41a7c139 treewide: use nir_load_global alias of nir_build_load_global
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37959>
2025-10-21 12:37:58 +02:00
Georg Lehmann
77540cac8c nir: remove manual nir_load_global
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37959>
2025-10-21 12:37:58 +02:00
Samuel Pitoiset
9ebda88e34 radv: remove an obsolete comment about SMEM stores
Some checks are pending
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ACO doesn't use SMEM store instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37871>
2025-10-21 07:03:11 +00:00
Samuel Pitoiset
63099554ac radv: simplify L2 cache flushes on < GFX12
To be closer to RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37871>
2025-10-21 07:03:11 +00:00
Samuel Pitoiset
52e036fa9f radv: remove useless parameter to gfx10_cs_emit_cache_flush()
gfx9_eop_bug_va is always 0 on GFX10+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37871>
2025-10-21 07:03:10 +00:00
Samuel Pitoiset
c8de5a7479 radv: pass int_sel to radv_cs_emit_write_event_eop()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37871>
2025-10-21 07:03:09 +00:00
Samuel Pitoiset
eb65d17e00 radv: simplify error handling when creating descriptor pools
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37917>
2025-10-21 06:43:29 +00:00
Samuel Pitoiset
11daa11c4e radv: use vk_zalloc2() for allocating the descriptor pool
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37917>
2025-10-21 06:43:29 +00:00
Samuel Pitoiset
6106d9e818 radv: simplify allocating pool entries for descriptor sets
A complete new strategy allocation will be implemented on top of this.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37917>
2025-10-21 06:43:29 +00:00
Samuel Pitoiset
d4cb7d160d radv: add a small helper to destroy descriptor pool entries
No need to duplicate code.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37917>
2025-10-21 06:43:29 +00:00
Samuel Pitoiset
d29959f50d radv: remove an useless check when destroying descriptor sets
There is already an assertion.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37917>
2025-10-21 06:43:28 +00:00
Lionel Landwerlin
2b6c75423e anv: reenable VK_KHR_maintenance8 on pre-Xe2 platforms
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37929>
2025-10-21 06:13:10 +00:00
Lionel Landwerlin
c5d313a2a8 brw: handling dynamic programmable offsets pre-Xe2
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37929>
2025-10-21 06:13:10 +00:00
Lionel Landwerlin
d37c6ff4ed brw: mark divergence data as valid for debug purposes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37929>
2025-10-21 06:13:10 +00:00
Lionel Landwerlin
255d1e883d nir/divergence: fix handling of intel uniform block load
Those are normally uniform always, but for the purpose of fused
threads handling, we need to check their sources.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ca1533cd03 ("nir/divergence: add a new mode to cover fused threads on Intel HW")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37929>
2025-10-21 06:13:10 +00:00
Lionel Landwerlin
e2918ad82c brw: fix missing generation requirement on sampler opcode
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: bcffd839aa ("brw: new Xe2 sampler opcodes")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37929>
2025-10-21 06:13:10 +00:00
Lionel Landwerlin
757c042e39 brw: fix ballot() type operations in shaders with HALT instructions
Fixes dEQP-VK.reconvergence.terminate_invocation.bit_count

LNL fossildb stats:

 Totals from 16489 (3.36% of 490184) affected shaders:
 Instrs: 3710499 -> 3710500 (+0.00%)
 Cycle count: 91601018 -> 90305642 (-1.41%); split: -1.81%, +0.40%
 Max dispatch width: 523936 -> 523952 (+0.00%); split: +0.02%, -0.01%

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37939>
2025-10-21 05:55:04 +00:00
Lionel Landwerlin
70aa028f27 brw: only consider cross lane access on non scalar VGRFs
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1bff4f93ca ("brw: Basic infrastructure to store convergent values as scalars")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37939>
2025-10-21 05:55:04 +00:00
Lionel Landwerlin
f48c9c3a37 brw: constant fold u2u16 conversion on MCS messages
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: bddfbe7fb1 ("brw/blorp: lower MCS fetching in NIR")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37963>
2025-10-21 08:27:07 +03:00
Lionel Landwerlin
f8745b3af3 brw: add missing offset to MCS fetching messages
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37963>
2025-10-21 08:27:05 +03:00
Eric Engestrom
1773e2df50 ci: uprev vkd3d
Some checks are pending
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0845d1b69c...03cca4cd97

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37960>
2025-10-21 03:57:14 +00:00
Aitor Camacho
d6ddc5b219 kk: Fix Linux build valgrind dependency
Some checks are pending
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37965>
2025-10-21 02:28:09 +00:00
Aitor Camacho
873d2f252e ci: Add KosmicKrisp Linux build
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37965>
2025-10-21 02:28:09 +00:00
Aitor Camacho
bea2164d70 CODEOWNERS: Add KosmicKrisp owners
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37965>
2025-10-21 02:28:09 +00:00
Aitor Camacho
94d4df1c84 mr-label-maker: Add KosmicKrisp
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37965>
2025-10-21 02:28:09 +00:00
Mel Henning
77cd629b34 nvk: Really fix maxVariableDescriptorCount w/ iub
Some checks are pending
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I didn't test "nvk: Fix maxVariableDescriptorCount with iub" as
thoroughly as I should have and it regressed
dEQP-VK.api.maintenance3_check.descriptor_set because we were then
violating the requirement that maxPerSetDescriptors describes a limit
that's guaranteed to be supported (and reported as supported in
GetDescriptorSetLayoutSupport).

That commit was also based on a misreading of nvk_nir_lower_descriptors.c
where I thought that the end offset of an inline uniform block needed to
be less than the size of a UBO. That is not the case - on closer
inspection that code gracefully falls back to placing IUBs in globablmem
if necessary. So, we can afford to be less strict about our IUB sizing
and only require that IUBs follow the existing limit imposed by
maxInlineUniformBlockSize.

Fixes: ff7f785f09 ("nvk: Fix maxVariableDescriptorCount with iub")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37922>
2025-10-20 22:19:05 +00:00
Emma Anholt
0781edc30f nir/copy_prop_vars: Mask out no-op writes to variables.
Some checks are pending
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The pass previously supported removing complete no-op writes, but we can
do better by noticing if any channel being written is the current
channel's value and masking off those writes.  I noticed this happening in
Stray's fragment shader, where it looked like some translation layer had
turned var[x].zw = vec2(a, b) into var[x] = vec4(var[x].x, var[x].y, a,
b).  This in turn lets nir_shrink_vec_array_vars be more effective.

Totals:
MaxWaves: 22158876 -> 22156696 (-0.01%); split: +0.00%, -0.01%
Instrs: 401167243 -> 401007996 (-0.04%); split: -0.04%, +0.00%
CodeSize: 1004397302 -> 1004133728 (-0.03%); split: -0.03%, +0.00%
STPs: 369810 -> 234618 (-36.56%)
LDPs: 209430 -> 172011 (-17.87%)

Totals from 1884 (0.12% of 1560230) affected shaders:
MaxWaves: 12686 -> 10506 (-17.18%); split: +6.97%, -24.15%
Instrs: 2099486 -> 1940239 (-7.59%); split: -7.64%, +0.06%
CodeSize: 4570472 -> 4306898 (-5.77%); split: -5.81%, +0.05%
NOPs: 334399 -> 270881 (-18.99%); split: -20.58%, +1.58%
MOVs: 131003 -> 148034 (+13.00%); split: -11.59%, +24.59%
COVs: 14512 -> 16921 (+16.60%); split: -0.23%, +16.83%
Full: 58120 -> 72399 (+24.57%); split: -6.75%, +31.31%
(ss): 79215 -> 45331 (-42.77%); split: -48.46%, +5.68%
(sy): 33081 -> 11119 (-66.39%); split: -66.56%, +0.18%
(ss)-stall: 302152 -> 115528 (-61.76%); split: -64.34%, +2.57%
(sy)-stall: 2706110 -> 498998 (-81.56%); split: -81.68%, +0.12%
STPs: 212045 -> 76853 (-63.76%)
LDPs: 47337 -> 9918 (-79.05%)
Preamble Instrs: 413954 -> 413630 (-0.08%); split: -0.21%, +0.13%

Cat0: 370362 -> 306844 (-17.15%); split: -18.58%, +1.43%
Cat1: 145629 -> 165003 (+13.30%); split: -10.51%, +23.81%
Cat2: 687947 -> 683992 (-0.57%); split: -0.61%, +0.04%
Cat3: 362919 -> 360690 (-0.61%); split: -0.72%, +0.11%
Cat6: 461411 -> 352375 (-23.63%)
Cat7: 16857 -> 16974 (+0.69%); split: -0.35%, +1.04%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37313>
2025-10-20 19:24:45 +00:00
Emma Anholt
537cc4e0ff nir/shrink_stores: Don't shrink stores to an invalid num_components.
Avoids a regression in the CL CTS on the next commit.

Fixes: 2dba7e6056 ("nir: split nir_opt_shrink_stores from nir_opt_shrink_vectors")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37313>
2025-10-20 19:24:45 +00:00
Emma Anholt
aea949dd29 tu: Make sure we clear dead writes to vars before nir_link_opt_varyings().
It assumes you don't have dead writes to variables in the last block, and
will copy-propagate consts from the first write it finds.

Without this, the upcoming nir_opt_copy_prop_vars() change to have more
restricted write masks caused less nir_opt_dead_write_vars() (since it
doesn't trim write masks for dead writes, only removes fully-dead writes),
and then zero-initialization of variables at the top of a shader got
propagated, rather than the final store of the used channels of the
variable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37313>
2025-10-20 19:24:45 +00:00
Emma Anholt
d8690f9c60 nir/link_opt_varyings: Make it participate in NIR_DEBUG=print.
It's a pass with major effects on shaders, and it's otherwise weird to see
your varying disappear between two passes that shouldn't affect them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37313>
2025-10-20 19:24:45 +00:00
Emma Anholt
c76b52ae00 virgl: Fix VIRGL_DEBUG=tgsi to work on debugoptimized builds.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37313>
2025-10-20 19:24:44 +00:00
Romaric Jodin
762be5eae1 pan/va: make valhall_parse_isa input explicit
Usage of implicit input file in valhall_parse_isa makes it very
complicated for tools like ninja-to-soong to generate the Android
equivalent build file.

Instead use an explicit argument.
It also deduplicate the location of the input file name to have it
only in 'meson.build'.

Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37742>
2025-10-20 18:17:02 +00:00
Aitor Camacho
7c268a1e91 kk: Add KosmicKrisp
Some checks are pending
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37522>
2025-10-20 17:46:38 +00:00
Connor Abbott
f6c7f16322 tu: Implement VK_EXT_multisampled_render_to_single_sampled
The extension is emulated on top of traditional transient attachments,
with the driver creating extra internal attachments for each subpass
where the MSRTSS sample count doesn't match the color or depth/stencil
attachment's sample count and insert unresolves/resolves around them,
except for the cases where the original attachment is unused
before/after the subpass respectively. An important case is if the
original attachment would be cleared at the beginning of the subpass, in
which case we rewrite the clear to apply to the driver-internal
multisample attachment. This requires redirecting the clear colors in
CmdBeginRenderPass2.

We create images, image views, and backing memory for these attachments
that are part of the framebuffer with classic renderpasses or allocated
per-render-pass with dynamic rendering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:44 +00:00
Connor Abbott
9c5012b03c tu: Add support for "unresolve" ops
These ops replicate the single-sampled source attachment to the
multi-sampled destination attachment before the start of a subpass. This
is the new hardware feature for
VK_EXT_multisample_render_to_single_sampled, and the actual
implementation of the extension emulates everything on top of these.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:44 +00:00
Connor Abbott
7542d5068c tu: Make r*d_src_depth and r*d_src_stencil generic
We will have to use both in one function, so make them compatible and
add them to the ops function table.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:44 +00:00
Connor Abbott
efde8bf599 tu: Remove tu_attachment_info
This is an old leftover from the skeleton stage of the driver, and we
have never needed anything other than the image view. Having this in
the way made it impossible to write generic code that reads the
attachments in the !image_framebuffer and dynamic rendering cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:43 +00:00
Connor Abbott
8a12a0ec24 tu: Add CCU_RESOLVE_CLEAN workaround
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:42 +00:00
Connor Abbott
5cf0e741e2 tu: Make blit setup take source and destination samples
This will be necessary so that the 3d path can handle "unresolves",
where we select the single-sampled shader for the single-sampled source
but enable multisampling *without* per-sample shading to replicate it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:42 +00:00
Connor Abbott
a3652af380 tu: Also disable stencil load for attachments not in GMEM
We were accidentally still emitting loads for D32S8 resolve attachments.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:41 +00:00
Connor Abbott
9417ce287c tu: Fix 3d load path with D24S8 on a7xx
We need to always use the FMT6_Z24S8_AS_R8G8B8A8 format for GMEM even if
UBWC is disabled, as already done for the 2d store path. Because we
use the pre-baked RB_MRT_BUF_INFO register value, this means we have to
override it.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:40 +00:00
Connor Abbott
bc14dd98e3 tu: Clear RB_MRT_BUF_INFO::LOSSLESSCOMPEN for stencil
This was already present in the 2d paths but not in the 3d path,
probably because the flag was moved there only on a7xx and it was
missed. Prevents page faults from bad flag buffer accesses.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:40 +00:00
Connor Abbott
2231c51474 tu: Don't resolve twice in between subpasses
tu6_emit_gmem_stores() already handles resolves.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:39 +00:00
Connor Abbott
d491a79027 tu: Don't patch GMEM for input attachments never in GMEM
This can happen if we resolve to a resolve attachment and then use that
resolve attachment as an input attachment in a later subpass. We don't
need to put it in GMEM, but it's still considered "written" because
input attachment reads need a dependency after the resolve.

MSRTSS input attachment tests effectively created such a scenario after
lowering to transient multisample attachments and inserting resolves.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:39 +00:00
Connor Abbott
7a8b7fc480 tu: Remove useless tu_image_view_init parameter
We can find it from the device.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:38 +00:00
Connor Abbott
928e19320c tu: Fix corner case with clearing input attachment
If the first use of an attachment is as an input attachment, but it has
LOAD_OP_CLEAR, then we have to clear the attachment in GMEM and patch
the input attachment to refer to GMEM. Noticed by inspection.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
2025-10-20 17:18:37 +00:00
Aitor Camacho
f711c3afed nir: Add KosmicKrisp required utilities
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37520>
2025-10-20 16:22:00 +00:00
Yiwei Zhang
cc1d942727 panvk: use cs_move_reg32 and lower to cs_add32 if needed
Some checks are pending
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Trivial but still better than cs_add32 workaround on platforms
supporting MOVE_REG32.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37951>
2025-10-20 16:02:59 +00:00