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tu: Fix 3d load path with D24S8 on a7xx

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We need to always use the FMT6_Z24S8_AS_R8G8B8A8 format for GMEM even if
UBWC is disabled, as already done for the 2d store path. Because we
use the pre-baked RB_MRT_BUF_INFO register value, this means we have to
override it.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37919>
This commit is contained in:
Connor Abbott 2025-10-17 13:14:10 -04:00 • committed by Marge Bot
parent bc14dd98e3
commit 9417ce287c
1 changed files with 11 additions and 1 deletions
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12
src/freedreno/vulkan/tu_clear_blit.cc
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@ -1468,6 +1468,15 @@ r3d_dst_gmem(struct tu_cmd_buffer *cmd, struct tu_cs *cs,
gmem_offset = tu_attachment_gmem_offset(cmd, att, layer);
}
/* On a7xx we must always use FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8. See
* blit_base_format().
*/
if (CHIP >= A7XX && att->format == VK_FORMAT_D24_UNORM_S8_UINT) {
RB_MRT_BUF_INFO = pkt_field_set(A6XX_RB_MRT_BUF_INFO_COLOR_FORMAT,
RB_MRT_BUF_INFO,
FMT6_Z24_UNORM_S8_UINT_AS_R8G8B8A8);
}
tu_cs_emit_regs(cs,
RB_MRT_BUF_INFO(CHIP, 0, .dword = RB_MRT_BUF_INFO),
A6XX_RB_MRT_PITCH(0, 0),
@ -1540,7 +1549,8 @@ r3d_setup(struct tu_cmd_buffer *cmd,
tu_cs_emit_call(cs, cmd->device->dbg_renderpass_stomp_cs);
}
enum a6xx_format fmt = blit_base_format<CHIP>(dst_format, ubwc, false);
enum a6xx_format fmt = blit_base_format<CHIP>(dst_format, ubwc,
blit_param & R3D_DST_GMEM);
fixup_dst_format(src_format, &dst_format, &fmt);
if (!cmd->state.pass) {