Commit graph

72542 commits

Author SHA1 Message Date
Mike Blumenkrantz
62508b76b6 llvmpipe: save mesh shader when calling u_blitter
this otherwise causes the draw module to use mesh shaders when blitting

cc: mesa-stable

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
(cherry picked from commit 58dd7afa0e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 18:59:19 +01:00
Pavel Ondračka
0bf2abc5d5 r300: pad short vertex shaders to avoid R3xx hangs
Vertex shaders shorter than four instructions can hard-lock R3xx GPUs.
This seems to happen in combination with a small vertex count. This was
seen before, most notably with dummy shaders, but the earlier fix only
removed those dummy shaders, so some occurrences could still slip
through the cracks. Pad all vertex shaders to four instructions on R3xx.

Reviewed-by: Filip Gawin <filip@gawin.net>
Fixes: c6aa639ba9 ("r300: skip draws instead of using a dummy vertex shader")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/337
(cherry picked from commit 9b12664b72)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 18:59:00 +01:00
Mike Blumenkrantz
e7b12e5009 zink: work around drivers with broken mesh shader properties
some properties require setting MAX+1, but there are drivers which mistakenly
set 0

cc: mesa-stable

(cherry picked from commit c09d0018a3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 18:58:57 +01:00
Mike Blumenkrantz
2401bd8e0a zink: run opt_combine_stores when optimizing
this ensures stores to mesh builtins are vectorized, as required by
spec

cc: mesa-stable

(cherry picked from commit 20c65db45d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 12:38:39 +01:00
Mike Blumenkrantz
d4465aad0b zink: allow renderpass termination for clears with ZINK_DEBUG=rp and GENERAL layouts
this doesn't require a layout change

cc: mesa-stable

(cherry picked from commit eed3007588)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 12:38:38 +01:00
Mike Blumenkrantz
58950e2d06 zink: reapply zsbuf state after unordered blits
this otherwise creates desync if a renderpass continues after blit reordering

cc: mesa-stable

(cherry picked from commit 43a6928d62)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 12:38:36 +01:00
Faith Ekstrand
740734ac72 etnaviv: Call lower_bool_to_int32 not to_bitsize
It calls both for some reason but never handles any other booleans than
32-bit.  This was probably a mistake.

Fixes: e63a7882a0 ("etnaviv: call nir_lower_bool_to_bitsize")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
(cherry picked from commit 6fb3995659)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Antonino Maniscalco
7b2af9e15a zink: don't care about generated gs output primitive
Zink uses the output primitive of the last vertex stage when deciding
the raster primitive. When we generate the gs the output primitive
depends on the raster primitive.

Not only does the generated gs output primitive have no value in chosing
the raster primitive, it can also get us stuck with the last raster
primitve which is of course incorrect.

Ignore it for generated shaders.

Cc: mesa-stable
(cherry picked from commit d526bbc29b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Pavel Ondračka
eea697b179 r300: disable clip-discard watermark for triangles
Commit 0d4aa5f55f introduced the watermark to optimize the guardband
state changes and always computed new_distance as MAX2(distance,
watermark).

That is correct for point/line paths where distance > 0, but it keeps a
non-zero discard distance alive when the next draw sets distance = 0
(triangles). This leaks wide point/line clip-discard state into later
triangle draws and can clip away large parts of geometry (as observed in
Sauerbraten). Only apply the watermark when distance > 0 and reset it to
zero otherwise so triangle draws disable clip-discard as intended.

Fixes: 0d4aa5f55f ("r300: pop-free clipping")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14959
(cherry picked from commit ce33f82f83)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Yiwei Zhang
2b6e7f0be2 lvp: avoid advertising dmabuf support for kms_swrast
Lavapipe relies on true udmabuf support for dmabuf export allocation.
This changes aligns the behavior with both llvmpipe_allocate_memory_fd
and llvmpipe_import_memory_fd.

Fixes: 7d0a631f20 ("llvmpipe: export dmabuf caps for kms_swrast")
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
(cherry picked from commit 5ab8c8a439)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Lucas Fryzek
8d313e5d1c drisw: Properly mark shmid as -1 when alloc fails
Cc: mesa-stable
(cherry picked from commit b93bf19d94)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:10 +01:00
Timothy Arceri
a66a9280fb glsl: add workaround for MDK2 HD
Allows a shader to compile that uses an embedded struct declaration
which are not allowed in glsl 1.20+

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14986
(cherry picked from commit f109bfc3f1)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:10 +01:00
Jose Maria Casanova Crespo
31ea1923de v3d: reject fast TLB blit when RT formats don't match
v3d_tlb_blit_fast includes the blit onto a pending job that writes
to the source resource. The TLB data is already unpacked according to
the job's RT format, so storing it with a different RT format performs
a channel reinterpretation rather than a raw byte copy, corrupting the
data.

So when copying from RGB10_A2UI to RG16UI with glCopyImageSubData,
the copy_image path remaps both formats to R16G16_UNORM for a raw
32-bit copy. The fast TLB blit found the pending clear job
(RGB10_A2UI, 4 channels: 10-10-10-2) and stored its TLB data as RG16UI
(2 channels: 16-16), writing the unpacked 10-bit R and G channel values
into 16-bit fields instead of preserving the raw packed bits.

Previous internal_type/bpp check was insufficient: both RGB10_A2UI
and RG16UI share internal_type=16UI and the source bpp (64) exceeds
the destination bpp (32), but their channel layouts are different.

Add a check that the job's source surface RT format matches the blit
destination RT format before allowing the fast path.

Fixes: 66de8b4b5c ("v3d: add a faster TLB blit path")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit 5454221cfb)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:09 +01:00
Timothy Arceri
734e53c96b glsl: relax precision matching on unused uniforms ES
0886be09 ("glsl: Allow precision mismatch on dead data with GLSL ES 1.00")
allowed precision mismatches on uniforms, however if you lower precision on
16-bit consts, then this error triggers instead.

So here we relax the type matching and just make sure we match int vs
float.

Fixes: 0886be09 ("glsl: Allow precision mismatch on dead data with GLSL ES 1.00")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5337
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 73bc604128)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:09 +01:00
Pavel Ondračka
02f422a145 r300: disable HiZ for PIPE_FUNC_ALWAYS
AMD docs support this:
R5xx Acceleration v1.5 says safest handling for ZFUNC changes is to disable
HiZ except specific LESS/LEQUAL and GREATER/GEQUAL transitions.
ATI OpenGL Programming and Optimization Guide advises avoiding ALWAYS when
trying to benefit from HiZ so that would imply fglrx also disables HiZ
there.

On RV530 this fixes the following dEQPs:
dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.43
dEQP-GLES2.functional.fragment_ops.interaction.basic_shader.74

Fixes: 12dcbd5954 ("r300g: enable Hyper-Z by default on r500")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8093
(cherry picked from commit b0f019f8cf)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:09 +01:00
David Rosca
c001485f3b vl: Also disable MPEG2 Main profile when mpeg12 decode is disabled
Fixes: f4959c16c8 ("meson: add mpeg12dec as a video-codec")
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
(cherry picked from commit 55bab89951)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:09 +01:00
Jose Maria Casanova Crespo
7d25d214f5 vc4: flush write jobs before BO replacement in DISCARD_WHOLE path
The DISCARD_WHOLE_RESOURCE path in vc4_map_usage_prep() replaces the
resource's BO with vc4_resource_bo_alloc(). As the RCL resolves
rsc->bo at job submit in vc4_submit_setup_rcl_surface(), any pending
write job would store to the new BO instead of the old one, corrupting
the new written data.

This is the same bug that was fixed in v3d in the previous commit.

Fixes: 18ccda7b86 ("vc4: When asked to discard-map a whole resource, discard it.")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit ecb6c5d555)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:09 +01:00
Jose Maria Casanova Crespo
fb8f81a1d8 v3d: flush write jobs before BO replacement in DISCARD_WHOLE path
The DISCARD_WHOLE_RESOURCE path in v3d_map_usage_prep() replaces the
resource's BO with v3d_resource_bo_alloc(). As the RCL resolves
rsc->bo at job submit in emit_rcl() any pending write job would
store to the new BO instead of the old one, corrupting the new
written data.

This is adressed by flushing all pending write jobs affecting the
resource before replacing its BO.

This fixes multiple tests where data copied to a renderbuffer was
overwritten by a previos GPU clear. Test are from the subgroup:
dEQP-GLES31.functional.copy_image.non_compressed.viewclass_32_bits.*

Fixes: 45bb8f2957 ("broadcom: Add V3D 3.3 gallium driver called "vc5", for BCM7268.")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
(cherry picked from commit 1eaa46da09)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:09 +01:00
Jesse Natalie
5bf2bcd81e d3d12: Fix importing external resources
Fixes: 97061dd7 ("d3d12: Add support for Xbox GDK.")
(cherry picked from commit 9e277ed2b6)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:09 +01:00
Erik Faye-Lund
6e5d08c8e5 gallium/dri: set LIBVA_DRIVERS_PATH in devenv
We're setting this in the non-DRI codepath, but this was missed when we
started embedding the VA driver into libgallium. This means we no longer
were able to use VA-API from meson devenv, like we could before.

Fixes: 212d57f7e6 ("targets/va: Build va driver into libgallium when building with dri")
(cherry picked from commit 7e4744909b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:08 +01:00
Patrick Lerda
6f28830365 r600: fix cs atomic operations when the shader is called multiple times
This change is useful when the compute shader is called multiple
times with the atomic operations enabled. It fixes some data
coherency issues. This is done by moving
evergreen_emit_atomic_buffer_setup() after r600_flush_emit().

This change is also a partial fix for compute_shader.pipeline-compute-chain.
In this specific case, it makes the memory barrier working.

This change was tested on cayman and barts; it makes these tests
fully deterministic:
khr-gl4[2-6]/shader_atomic_counters/advanced-usage-many-dispatches: fail pass
khr-gles31/core/shader_atomic_counters/advanced-usage-many-dispatches: fail pass
deqp-gles31/functional/synchronization/inter_call/without_memory_barrier/atomic_counter_dispatch_.*_calls_.*_invocations: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
(cherry picked from commit dad942b468)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:08 +01:00
Pavel Ondračka
b1775f660a r300: copy target when merging alpha output instruction
The alpha instruction always wrote to the same rendertarget as the rgb and the
original target was ignored (surprisingly the HW docs explicitly allows rgb and
alpha to write to different targets). This makes tesseract rendering a bit
better, but there are still some remaining issues.

Fixes: 1c2c4ddbd1 ("r300g: copy the compiler from r300c")
Reviewed-by: Filip Gawin <filip@gawin.net>
(cherry picked from commit 87a881558f)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:08 +01:00
Pierre-Eric Pelloux-Prayer
f1a3aa4036 frontends/va: fix undefined ref error
When building with "-Dvideo-codecs=h264dec,h265dec,av1dec" va/encode.c
won't be built but it's still required because it's used from
picture.c

Fixes: c4f05bdf60 ("frontends/va: include picture_*.c based on selected codec")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 82a51ba9b3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:08 +01:00
Benjamin Cheng
3611d60cea radeonsi/vcn: Use full pitch for pre-encode input
In 1f83e73145, the pre-encode input picture size was also reduced.
However it was recently discovered that VCN FW uses the input picture
pitch as the pitch for this, which means that previous change broke
pre-encode.

Fixes: 1f83e73145 ("radeonsi/vcn: Reduce allocated size for pre-encode recon pics")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
(cherry picked from commit 2b2b1d405a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:08 +01:00
Luigi Santivetti
ec658ea317 zink: fix format conversion logic for the alpha emulation case
cc: mesa-stable

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Fixes: 252bff0f ("zink: use real A8_UNORM when possible")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
(cherry picked from commit 640bc3bc53)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:08 +01:00
Mike Blumenkrantz
0486f6bf8b zink: add TRANSFER_WRITE -> HOST_READ sync to end of batch
this is technically required by spec, even though at a practical level
it probably has no effect

cc: mesa-stable

(cherry picked from commit 3ba275aa70)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:08 +01:00
Benjamin Otte
d7607b6a4e lavapipe: Fix features for nonsubsampled ycbcr formats
The Vulkan spec says about VkFormatFeatureFlagBits:

  If a format does not incorporate chroma downsampling (it is
  not a “422” or “420” format) but the implementation supports
  sampler Y′CBCR conversion for this format, the implementation
  must set VK_FORMAT_FEATURE_MIDPOINT_CHROMA_SAMPLES_BIT.

Fixes: af062126ae
Signed-off-by: Benjamin Otte <otte@redhat.com>
(cherry picked from commit 0b6dd167ac)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
2026-02-25 14:22:23 +01:00
Robert Mader
a163dec3ff lavapipe: enable dmabuf import for planar drm formats
Like e.g. NV12. This just requires some minor fixes around offset
handling.

(cherry picked from commit 0b6340fd94)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
2026-02-25 14:22:23 +01:00
Mike Blumenkrantz
499a74569f zink: only do pre-sync transfer barrier after a renderpass
this is otherwise pointless and (for swapchain images) broken
(because they may never have acquired an image)

discovered by @valentine

cc: mesa-stable

(cherry picked from commit d47ba92d42)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
2026-02-25 14:22:23 +01:00
Mike Blumenkrantz
641a3ea0d9 zink: fix broken compiler assert
cc: mesa-stable

(cherry picked from commit 44f2c40830)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
2026-02-25 14:22:21 +01:00
Janne Grunau
1ce5b5b361 asahi: Implement clear_buffer using libagx_fill*
Use either libagx_fill_uint4 or libagx_fill based of size and object
alignment for clear_sizes which are a power of two up to 16.
Reported fill rate for 256MB buffers on a M1 Ultra (G13D) in
gpu-ratemeter is 355 GB/s for 16 byte aligned buffers and 155 GB/s for
4 byte aligned buffers.

Signed-off-by: Janne Grunau <janne-fdr@jannau.net>
(cherry picked from commit 5c2d62c030)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
2026-02-25 14:22:21 +01:00
Janne Grunau
37a269e303 asahi: Use GPU for buffer copies in resource_copy_region()
Use a compute shader to copy PIPE_BUFFERs. Based on hk's hk_cmd_copy().
For large copy sizes (>= 128MB) it achieves 3/4 of the available memory
bandwidth on a M1 Ultra (G13D). `gpu-ratemeter gl.bufbw` reports
~625 GB/s for 256MB buffer size. Apple specifies the memory bandwidth of
the M1 Ultra with 819.2 GB/s.

Signed-off-by: Janne Grunau <j@jannau.net>
(cherry picked from commit 3f5497ded8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
2026-02-25 14:22:21 +01:00
Wei Hao
f60b93b454 radeonsi: fix threaded shader compilation finishing after context is destroyed
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit ec6d077351)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
2026-02-25 14:22:21 +01:00
Pavel Ondračka
98e2234eb4 r300: align macro-tiled stride-addressed textures in X
Odd macro-tile counts in X trigger flaky rendering/readback in
parallel stress runs with macro-tiled NPOT textures (for example
piglit draw-pixel-with-texture -auto -fbo).

When a texture is macro-tiled and uses stride addressing, align the
width to two macro tiles. This keeps the stride at an even number of
macro tiles in X and avoids the corruption without disabling
macrotiling.

I was not able to find anything about this in the docs.

Cc: mesa-stable
(cherry picked from commit 0763fb947a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
2026-02-25 14:22:21 +01:00
Dave Airlie
b53dbb573a gallivm: handle u16 correct on const loads.
I somehow screwed this up on my previous attempt at fixing this bug,

This should fix the loop limiter bug on big endian properly.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Cc: mesa-stable
Fixes: e28cfb2bad ("gallivm: handle u8/u16 const loads properly on big-endian.")
(cherry picked from commit c016346b50)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39828>
2026-02-11 14:54:48 +00:00
OPNA2608
890ff49038 rocket: Fix printing of rknpu_mem_create.dma_addr
The Linux kernel's __u64 isn't always implemented as a long long, and there's no nice define for printing it like with uint64_t.

(cherry picked from commit 41b9dc3a2c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39828>
2026-02-11 14:54:48 +00:00
OPNA2608
00db096003 vc4: Fix printing of get_tiling.modifier
The Linux kernel's __u64 isn't always implemented as a long long, and there's no nice define for printing it like with uint64_t.

(cherry picked from commit 4c699087d4)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39828>
2026-02-11 14:54:48 +00:00
José Expósito
ee5075f221 winsys/amdgpu: Fix userq job info log on PPC
On the ppc64le architecture the macro printing the userq job info fails
to compile with error:

   In file included from ../src/gallium/winsys/amdgpu/drm/amdgpu_cs.cpp:11:
   ../src/gallium/winsys/amdgpu/drm/amdgpu_cs.cpp: In function ‘int amdgpu_cs_submit_ib_userq(amdgpu_userq*, amdgpu_cs*, uint32_t*, unsigned int, uint32_t*, unsigned int, uint64_t*, uint64_t)’:
   ../src/gallium/winsys/amdgpu/drm/amdgpu_cs.cpp:1652:20: error: format ‘%llx’ expects argument of type ‘long long unsigned int’, but argument 6 has type ‘__u64’ {aka ‘long unsigned int’} [-Werror=format=]
   1652 |          mesa_logi("amdgpu: uq_log: %s:  num_wait_fences=%d  uq_va=%llx  job=%llx\n",
   1653 |                    amdgpu_userq_str[acs->queue_index], userq_wait_data.num_fences, fence_info[i].va,
         |                                                                                    ~~~~~~~~~~~~~~~~
         |                                                                                                  |
         |                                                                                                  __u64 {aka long unsigned int}
   ../src/util/log.h:78:70: note: in definition of macro ‘mesa_logi’
      78 | #define mesa_logi(fmt, ...) mesa_log(MESA_LOG_INFO, (MESA_LOG_TAG), (fmt), ##__VA_ARGS__)
         |                                                                      ^~~
   ../src/gallium/winsys/amdgpu/drm/amdgpu_cs.cpp:1652:20: error: format ‘%llx’ expects argument of type ‘long long unsigned int’, but argument 7 has type ‘__u64’ {aka ‘long unsigned int’} [-Werror=format=]
   1652 |          mesa_logi("amdgpu: uq_log: %s:  num_wait_fences=%d  uq_va=%llx  job=%llx\n",
   1653 |                    amdgpu_userq_str[acs->queue_index], userq_wait_data.num_fences, fence_info[i].va,
   1654 |                    fence_info[i].value);
         |                    ~~~~~~~~~~~~~~~~~~~
         |                                  |
         |                                  __u64 {aka long unsigned int}
   ../src/util/log.h:78:70: note: in definition of macro ‘mesa_logi’
      78 | #define mesa_logi(fmt, ...) mesa_log(MESA_LOG_INFO, (MESA_LOG_TAG), (fmt), ##__VA_ARGS__)
         |                                                                      ^~~

Parse the parameters to fix the failure.

Fixes: 2547fd0f59 ("winsys/amdgpu: print userq job info")
(cherry picked from commit 757ae04bd9)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39828>
2026-02-11 14:54:48 +00:00
Karol Herbst
c0e5d821e1 rusticl/mesa: only use resource_from_user_memory if the cap is advertised
Fixes some buffer tests on some iris configurations.

Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Tested-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit 240bae6b23)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39828>
2026-02-11 14:54:48 +00:00
Mel Henning
c87b0a77a1 zink: Emit float controls for preserve_denorms too
Fixes: 6afa1b3bad ("zink: handle denorm preserve execution modes")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
(cherry picked from commit 9189a70598)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39828>
2026-02-11 14:54:47 +00:00
Tapani Pälli
bb9fef071e iris: set DisableAnyMCTRresponsefix to zero on init
This is to make sure early culling related Wa_16020518922 is enabled
properly.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 331238e44e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39828>
2026-02-11 14:54:47 +00:00
Lucas Stach
4cae263356 etnaviv: idle the pipe before flushing texture caches
As seen in the Vivante kernel driver function gckHARDWARE_Flush(),
GPUs without gcvFEATURE_TEX_CACHE_FLUSH_FIX, which translates to
all GPUs before halti5, need a full stall of the GPU pipeline
before flushing the texture caches.

This fixes sporadic GPU hangs observed in use-cases where texture
data updates are intermixed with draws without any state changes
that might necessitate a stall.

Cc: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39673>
(cherry picked from commit 643ba9a784)
2026-02-04 18:39:35 +01:00
Emma Anholt
26a8c34ff4 lima/ci: Remove erroneous skips.
When you get UnexpectedResult(skip), that means take your xfail out
because it's now skipping.  Which is the fix, instead of "take the xfail
out and add it to manual skips".

Fixes: e54440d15e ("Uprev Piglit to a3826de3c26a279599d15b018a9a3e75ca46f4f8")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39568>
(cherry picked from commit 42e17a948e)
2026-02-04 18:39:35 +01:00
Qiang Yu
67ad90c108 radeonsi: fix mesh shader outputs kill
Mesh shader uses store per vertex output for point size
and store per primitive output for layer id.

This fixes gpu-ratemeter run slow for kill point size
and layer id cases when mono shader is used which expect
to kill these outputs.

Also gather fragment shader per primitive input info
to kill mesh shader per primitive output.

Fixes: e6e21dfbf2 ("radeonsi: kill outputs for mesh shader")
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39644>
(cherry picked from commit f20cd07e21)
2026-02-04 18:39:34 +01:00
Patrick Lerda
14615a0add r600: improve vs_as_ls switch reliability
This change updates the vs_as_ls switch logic to make it
reliable. It resets the dirty flag when the switch is
happening. It uses also evergreen_emit_vs_constant_buffers()
to try to update again some of the states which could be
lost otherwise.

This change fixes some "flakes". These tests needed previously
to be executed twice to set the hardware in the proper state
for the test to pass. It also fixes the main issue of the
texture_view.view_sampling test.

This change was tested on palm and cayman. Here are the tests
which are now utterly fixed:
khr-gl4[3-6]/stencil_texturing/functional: fail pass
khr-gl4[4-6]/texture_cube_map_array/texture_size_tesselation_ev_sh: fail pass
khr-gles31/core/texture_cube_map_array/texture_size_tesselation_ev_sh: fail pass
khr-glesext/texture_cube_map_array/texture_size_tesselation_ev_sh: fail pass

Fixes: 25f96c1120 ("r600: hook up constants/samplers/sampler view for tessellation")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39269>
(cherry picked from commit 9c5e15e6f5)
2026-02-04 18:39:34 +01:00
Lars-Ivar Hesselberg Simonsen
4a3a3a7d84 panfrost/bi: Fix unbound texel buffers
In case of texel buffers that are read in the shader, but not bound by
the application, the current implementation would incorrectly try to
read from non-existent buffers.

To ensure this does not happen, this change sets the format for any
unbound attributes to CONST_0000, which will kill any actual
reads/writes and always return zeroes.

This fixes the following two tests:
- spec@arb_shading_language_420pack@active sampler conflict
- spec@arb_texture_buffer_object@render-no-bo

Fixes: a21ee564e2 ("pan/bi: Make texel buffers use Attribute Buffers")
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39431>
(cherry picked from commit aec8132b8b)
2026-02-04 18:39:33 +01:00
Mike Blumenkrantz
5dddf74a34 ntv: emit ViewIndex with flat for fragment stage
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39606>
(cherry picked from commit 999aaac12e)
2026-02-04 18:39:33 +01:00
Tomeu Vizoso
8111b41eb4 dril: don't build a rocket_dri.so
As Rocket has no graphics capability.

Fixes: 5b829658f7 ("rocket: Initial commit of a driver for Rockchip's NPU")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38532>
(cherry picked from commit a5daecafd3)
2026-02-04 18:39:32 +01:00
Nanley Chery
943fd8152a iris: Use the CLEAR state on Xe2+ for MCS
On Xe2+, HSD 14011946253 and the related documents explain that MCS
still only supports a single clear color.

Fixes: df006bba02 ("iris: Update aux state for color fast clears (xe2)")
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37660>
(cherry picked from commit 6c6b2d8f30)
2026-01-28 16:17:59 +01:00
Nanley Chery
f3adaccb4b iris: Set missing flags on clear color changes
When changing the clear color without a fast clear, use dirty bits to
ensure that surfaces with inline clear colors are updated and that
partial resolves are done as needed.

Remove the flags at the bottom of fast_clear_color() as
blorp_fast_clear() already sets them for us.

Fixes: 64d861b700 ("iris: Skip some fast-clears even on color changes")
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37660>
(cherry picked from commit 3b642f7456)
2026-01-28 16:17:59 +01:00