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radeonsi/vcn: Use full pitch for pre-encode input
In1f83e73145, the pre-encode input picture size was also reduced. However it was recently discovered that VCN FW uses the input picture pitch as the pitch for this, which means that previous change broke pre-encode. Fixes:1f83e73145("radeonsi/vcn: Reduce allocated size for pre-encode recon pics") Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40125>
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5a497316d4
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2b2b1d405a
1 changed files with 13 additions and 9 deletions
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@ -1313,7 +1313,8 @@ static int setup_dpb(struct radeon_encoder *enc, uint32_t num_reconstructed_pict
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uint32_t aligned_width = align(enc->base.width, rec_alignment);
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uint32_t aligned_height = align(enc->base.height, rec_alignment);
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uint32_t pitch = align(aligned_width, enc->alignment);
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uint32_t luma_size, chroma_size, pre_luma_size = 0, pre_chroma_size = 0, offset;
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uint32_t luma_size, chroma_size, offset;
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uint32_t pre_luma_size = 0, pre_chroma_size = 0, pre_input_plane_size = 0;
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struct radeon_enc_pic *enc_pic = &enc->enc_pic;
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int i;
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bool has_b = enc_pic->spec_misc.b_picture_enabled; /* for h264 only */
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@ -1327,15 +1328,18 @@ static int setup_dpb(struct radeon_encoder *enc, uint32_t num_reconstructed_pict
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if (enc_pic->quality_modes.pre_encode_mode) {
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uint32_t scale = enc_pic->quality_modes.pre_encode_mode;
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uint32_t pre_pitch = align(aligned_width / scale, enc->alignment);
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uint32_t pre_aligned_height = align(aligned_height / scale, enc->alignment);
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uint32_t pre_aligned_height = MAX2(align(aligned_height / scale, enc->alignment), 256);
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pre_luma_size = align(pre_pitch * MAX2(256, pre_aligned_height), enc->alignment);
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/* VCN FW always writes the preencode input picture using the input picture pitch. */
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pre_input_plane_size = align(pitch * pre_aligned_height, enc->alignment);
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pre_luma_size = align(pre_pitch * pre_aligned_height, enc->alignment);
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pre_chroma_size = align(pre_luma_size / 2, enc->alignment);
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}
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if (enc_pic->bit_depth_luma_minus8 || enc_pic->bit_depth_chroma_minus8) {
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luma_size *= 2;
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chroma_size *= 2;
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pre_input_plane_size *= 2;
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pre_luma_size *= 2;
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pre_chroma_size *= 2;
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}
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@ -1365,11 +1369,11 @@ static int setup_dpb(struct radeon_encoder *enc, uint32_t num_reconstructed_pict
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if (enc_pic->quality_modes.pre_encode_mode) {
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.red_offset = offset;
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offset += pre_luma_size;
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offset += pre_input_plane_size;
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.green_offset = offset;
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offset += pre_luma_size;
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offset += pre_input_plane_size;
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.blue_offset = offset;
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offset += pre_luma_size;
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offset += pre_input_plane_size;
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}
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if (is_av1) {
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@ -1407,11 +1411,11 @@ static int setup_dpb(struct radeon_encoder *enc, uint32_t num_reconstructed_pict
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if (enc_pic->quality_modes.pre_encode_mode) {
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.red_offset = offset;
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offset += pre_luma_size;
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offset += pre_input_plane_size;
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.green_offset = offset;
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offset += pre_luma_size;
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offset += pre_input_plane_size;
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enc_pic->ctx_buf.pre_encode_input_picture.rgb.blue_offset = offset;
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offset += pre_luma_size;
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offset += pre_input_plane_size;
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}
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for (i = 0; i < num_reconstructed_pictures; i++) {
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