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iris: Use the CLEAR state on Xe2+ for MCS

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On Xe2+, HSD 14011946253 and the related documents explain that MCS
still only supports a single clear color.

Fixes: df006bba02 ("iris: Update aux state for color fast clears (xe2)")
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37660>
(cherry picked from commit 6c6b2d8f30)
This commit is contained in:
Nanley Chery 2025-09-29 07:44:02 -04:00 • committed by Eric Engestrom
parent f3adaccb4b
commit 943fd8152a
2 changed files with 8 additions and 6 deletions
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2
.pick_status.json
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@ -634,7 +634,7 @@
"description": "iris: Use the CLEAR state on Xe2+ for MCS",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "df006bba0256e1d636b3fcc270db7c7b814e61d8",
"notes": null

12
src/gallium/drivers/iris/iris_clear.c
View file

@ -376,13 +376,15 @@ fast_clear_color(struct iris_context *ice,
}
}
/* If the buffer is already in ISL_AUX_STATE_CLEAR, the clear is redundant
* and can be skipped.
/* If the clear color is up-to-date and the buffer is already in
* ISL_AUX_STATE_CLEAR, the clear is redundant and can be skipped.
*/
const enum isl_aux_state aux_state =
iris_resource_get_aux_state(res, level, box->z);
if (box->depth == 1 && aux_state == ISL_AUX_STATE_CLEAR)
if ((devinfo->ver < 20 || !color_changed) &&
box->depth == 1 && aux_state == ISL_AUX_STATE_CLEAR) {
return;
}
iris_batch_sync_region_start(batch);
@ -453,8 +455,8 @@ fast_clear_color(struct iris_context *ice,
iris_batch_sync_region_end(batch);
iris_resource_set_aux_state(ice, res, level, box->z,
box->depth, devinfo->ver < 20 ?
iris_resource_set_aux_state(ice, res, level, box->z, box->depth,
devinfo->ver < 20 || res->surf.samples > 1 ?
ISL_AUX_STATE_CLEAR :
ISL_AUX_STATE_COMPRESSED_NO_CLEAR);
}