Commit graph

46918 commits

Author SHA1 Message Date
Marek Olšák
5baa33a738 r300g: disable stream output on SWTCL chipsets
Unimplemented and not so useful for this driver.
2011-10-08 00:49:34 +02:00
Stéphane Marchesin
b7cd18bc49 i915g: Add two new unsupported PIPE_CAPs. 2011-10-07 15:14:39 -07:00
Chad Versace
53f8586373 i915,i830: Remove dead HiZ assertions in *update_draw_buffer()
i915 and i830 hardware doesn't have HiZ, so remove all HiZ related
assertions from *update_draw_buffer().

I've removed the dead format checks completely rather than replace them
with more appropriate checks. This doesn't reduce "assertion coverage",
however, because when I added these HiZ related assertions in c8fdf66
there were no pre-existing checks there.

Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-10-07 10:33:51 -07:00
Brian Paul
793d29d6d3 tnl: fix result vector allocation regression
We need to allocate all the output vectors.
Fixes a regression from commit f7f678331d
Fixes fd.o bugs 41441 and 41492.
2011-10-07 10:58:53 -06:00
Brian Paul
cea946307f i965: make swizzle_for_size() return unsigned
Silences a warning about comparing to an unsigned variable.  It looks like
the result of swizzle_for_size() is always assigned to unsigned vars.

Reviewed-by: Chad Versace <chad@chad-versace.us>
2011-10-07 10:38:30 -06:00
Brian Paul
e967c5b38f i965: make size_swizzles[] static const
Reviewed-by: Chad Versace <chad@chad-versace.us>
2011-10-07 10:38:30 -06:00
Brian Paul
4170227407 i965: silence unused var warnings in non-debug builds
Reviewed-by: Chad Versace <chad@chad-versace.us>
2011-10-07 10:38:30 -06:00
Brian Paul
13b776ed51 intel: silence uninitialized var warning
Reviewed-by: Chad Versace <chad@chad-versace.us>
2011-10-07 10:38:30 -06:00
Brian Paul
23c6eb035b mesa: fix software mipmap generation code for packed Z/stencil formats
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=32458

Reviewed-by: Chad Versace <chad@chad-versace.us>
2011-10-07 09:52:04 -06:00
Brian Paul
9938912ccb r300: fix incompatible pointer type warnings 2011-10-07 08:23:24 -06:00
Brian Paul
8c3b5cf943 mesa: update gl_texture_image comments 2011-10-07 08:23:24 -06:00
Brian Paul
5ac96033c5 swrast: s/FetchTexelf/FetchTexel/ 2011-10-07 08:23:24 -06:00
Brian Paul
26b8dfc8ca swrast: silence unused var warnings in non-debug builds 2011-10-07 08:23:24 -06:00
Brian Paul
ba69c4a002 swrast: remove unused swrast_texture_image::FetchTexelc method
We only use the float-valued function now.
2011-10-07 08:23:24 -06:00
Brian Paul
d7477ad0a3 mesa: fix image unpacking when storing compressed textures
This fixes failures found with the new piglit texsubimage test.

Two things were broken:
1. The dxt code doesn't handle sources images where width != row stride.
   Check for that and take the _mesa_make_temp_ubyte_image() path to get
   an image where width = rowstride.
2. If we don't take the _mesa_make_temp_ubyte_image() path we need to
   take the source image unpacking parameters into account in order to
   get the proper starting memory address of the source texels.

Note: This is a candidate for the 7.11 branch.
2011-10-07 08:14:46 -06:00
Daniel Vetter
530728fb60 i915g: handle seperate stencil clear
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-07 14:31:17 +02:00
Daniel Vetter
ce775dc1b6 i915g: actually try to clear 16bit depth bufs
... with the right value.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-07 14:31:17 +02:00
Daniel Vetter
661b7ef9a8 i915g: hw can't fastclear both depth and color when bbp doesn't match
Do it in two passes in that case.

v2: Don't forget to handle stencil clears.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-07 14:31:17 +02:00
Daniel Vetter
0a6131b15c i915g: disable scissor in fast clear
Docs say this is obeyed.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-07 14:31:17 +02:00
Daniel Vetter
b8f3381f2c i915g: add some obscure sampler formats
4bit palette ftw!

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-07 14:31:17 +02:00
Daniel Vetter
8dd523b2df i915g: fixup clear params emission
Docs say that default shader input color input need to be spec
as ARGB8888. And a clear rect prim essentially uses this value
instead of default diffuse. Depth on the other hands is an ieee
32 bit float. Clear stencil is U8.

Completely different are the clear values for zone init prims.
These are speced in the actual output pixel layout (and need
to be repeated for 16 bit formats).

Clear up the confusion by adding some comments.

v2: Retain the target swizzling support added by Stephan Marchesin.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-07 14:31:16 +02:00
Daniel Vetter
305bcda4b5 i915g: make fixup swizzle into a real hw state
This way it can be reused in the fastclear path.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2011-10-07 14:31:16 +02:00
Jason Wood
c475a54578 glsl: Remove version check when looking for identifiers containing "__".
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-06 22:39:08 -07:00
Stéphane Marchesin
c2244cfa19 i915g: Announce GL 2.0.
We leave the debug code in place to troubleshoot issues while we complete the transition. That code might be removed after that.
2011-10-06 20:40:49 -07:00
Paul Berry
018ea68d87 i965 Gen6+: De-compact clip planes.
Previously, if the user enabled a non-consecutive set of clip planes
(e.g. 0, 1, and 3), the driver would compact them down to a
consecutive set starting at 0.  This optimization was of dubious
value, and complicated the implementation of gl_ClipDistance.

This patch changes the driver so that with Gen6 and later chipsets, we
no longer compact the clip planes.  However, we still discard any clip
planes beyond the highest number that is in use, so performance should
not be affected for applications that use clip planes consecutively
from 0.

With chipsets previous to Gen6, we still compact the clip planes,
since the pre-Gen6 clipper thread relies on this behavior.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-06 19:29:14 -07:00
Paul Berry
f4f686e825 i965 VS: Change nr_userclip to nr_userclip_planes.
The only remaining uses of brw_vs_prog_key::nr_userclip only occurred
when using clip planes (as opposed to gl_ClipDistance).  This patch
renames the value to nr_userclip_planes and sets it to zero when
gl_ClipDistance is in use.  This avoids unnecessary VS recompiles.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-06 19:29:10 -07:00
Paul Berry
18e2e19b07 i965: Make brw_compute_vue_map's userclip dependency a boolean.
Previously, brw_compute_vue_map required an argument indicating the
number of clip planes in use, but all it did with it was check if it
was nonzero.

This patch changes brw_compute_vue_map to take a boolean instead.
This allows us to avoid some unnecessary recompilation of the Gen4/5
GS and SF threads.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-06 19:29:07 -07:00
Paul Berry
8f6920a7b6 i965: Move ClipPlanesEnabled state to VS cache key.
Previous to this patch, setup_uniform_clipplane_values() was setting
up clip plane uniforms based on ctx->Transform.ClipPlanesEnabled, a
piece of state not stored in the vertex shader cache key.  As a
result, a change to this piece of state might not trigger a necessary
vertex shader recompile.

The patch adds a field to the vertex shader cache key,
userclip_planes_enabled, to store the current value of
ctx->Transform.ClipPlanesEnabled.  Also, it changes
setup_uniform_clipplane_values() to read from this new field, so that
it's manifestly clear that the vertex shader isn't depending on state
not stored in the cache key.

Note: when the vertex shader uses gl_ClipDistance, the VS backend
doesn't need to know which clip planes are in use, so we leave the
field as zero in that case to avoid unnecessary recompiles.

Fixes Piglit test vs-clip-vertex-enables.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-06 19:29:02 -07:00
Paul Berry
a1b37ebe75 i965: Rearrange VS cache key struct.
No functional change.  This patch rearranges the struct
brw_vs_prog_key so that the two fields related to clipping are
together, and documents those fields.  This should make the patches
that follow easier to comprehend, since they add additional
clipping-related fields to this structure.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-06 19:28:55 -07:00
Paul Berry
c163072197 mesa: Create _mesa_bitcount_64() to replace i965's brw_count_bits()
The i965 driver already had a function to count bits in a 64-bit uint
(brw_count_bits()), but it was buggy (it only counted the bottom 32
bits) and it was clumsy (it had a strange and broken fallback for
non-GCC-like compilers, which fortunately was never used).  Since Mesa
already has a _mesa_bitcount() function, it seems better to just
create a _mesa_bitcount_64() function rather than special-case this in
the i965 driver.

This patch creates the new _mesa_bitcount_64() function and rewrites
all of the old brw_count_bits() calls to refer to it.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-06 19:27:33 -07:00
Kenneth Graunke
09fcd01301 mesa/es: Allow GL_CLIP_PLANE0+6 and GL_CLIP_PLANE0+7.
Fixes the ES1 conformance 'userclip' test, which broke when we increased
MAX_CLIP_PLANES to 8.  Core Mesa already validates incoming values
against MAX_CLIP_PLANES; we just need the ES wrapper to pass everything
through.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-06 11:24:11 -07:00
Kenneth Graunke
5785cd2bf5 mesa/get: Move MAX_LIGHTS from GL/ES2 to GL/ES1.
It's required for ES 1.0 and 1.1, and isn't specified for ES 2.

While the comment says Mesa depends on it internally, removing it from
ES2 doesn't seem to regress any Piglit or ES2 conformance tests.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-06 11:24:10 -07:00
Kenneth Graunke
300a4cd9f2 meta: Don't enable TEXTURE_RECTANGLE when it's unsupported.
In particular, drivers don't enable this in ES 1.1 contexts.

Prior to this, none of the OpenGL ES 1.1 conformance tests passed.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-06 11:24:10 -07:00
Stéphane Marchesin
9f2c56fbd6 i915g: Silence warning.
We still need to investigate LIS7 though.
2011-10-06 01:02:23 -07:00
Stéphane Marchesin
527235223a i915g: Fix comment. 2011-10-05 22:53:48 -07:00
Brian Paul
0214712c30 mesa: remove some unneeded forward struct declarations 2011-10-05 21:43:43 -06:00
Brian Paul
068fcc029d st/mesa: fix comment 2011-10-05 21:43:21 -06:00
Brian Paul
c80aaad77e mesa: remove unused _mesa_rescale_teximage2d() function
It was only used by the old tdfx driver, IIRC.
2011-10-05 21:14:37 -06:00
Brian Paul
2c5bb57b50 mesa: remove unused gl_texture_image::DriverData field
Was only used by some older/removed DRI drivers.
2011-10-05 21:14:37 -06:00
Brian Paul
cf2439e246 st/mesa: don't use gl_texture_image::RowStride
It's always the same as the texture width.
2011-10-05 21:14:37 -06:00
Brian Paul
aff65241c8 st/mesa: completely stop using gl_texture_image::Data
Instead, use the new st_texture_image::TexData field to hold texture
images that don't fit the parent object's mipmap buffer.
2011-10-05 21:06:48 -06:00
Brian Paul
85f5aa1565 st/mesa: stop using gl_texture_image::Data when mapping/unmapping textures
Since core Mesa no longer depends on gl_texture_image::Data pointing to
mapped texture buffers we don't have to mess with it all over the place
in the state tracker.  Now Data is only used to point to malloc'd memory
that holds images which don't fit in the texture object's mipmap buffer.
2011-10-05 21:06:48 -06:00
Brian Paul
5253cf9805 mesa: get rid of imageOffsets arrays in texstore code
These were used to find the start of a 3D image slice (or 2D array texture
slice) given a base address.  Instead, use a simple array of address of
image slices instead.

This is a step toward getting rid of the gl_texture_image::ImageOffsets
field.

Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-05 21:06:47 -06:00
Stéphane Marchesin
c3ef232315 st/glx: remove the duplicated Drawable member.
If you want to access it, you should use the Drawable in xlib_drawable instead.
2011-10-05 17:36:32 -07:00
Eric Anholt
684b701c12 glsl: Consider "__" in identifers as reserved.
Fixes double-underscore-*.frag.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-05 12:49:17 -07:00
Brian Paul
bf059ebd33 swrast: update texfetch_funcs table for new int/uint formats
This only adds dummy entries to the table to fix failed assertions.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=41491
2011-10-05 13:35:35 -06:00
Paul Berry
d912669034 i965 Gen6: Implement gl_ClipVertex.
This patch implements proper support for gl_ClipVertex by causing the
new VS backend to populate the clip distance VUE slots using
VERT_RESULT_CLIP_VERTEX when appropriate, and by using the
untransformed clip planes in ctx->Transform.EyeUserPlane rather than
the transformed clip planes in ctx->Transform._ClipUserPlane when a
GLSL-based vertex shader is in use.

When not using a GLSL-based vertex shader, we use
ctx->Transform._ClipUserPlane (which is what we used prior to this
patch).  This ensures that clipping is still performed correctly for
fixed function and ARB vertex programs.  A new function,
brw_select_clip_planes() is used to determine whether to use
_ClipUserPlane or EyeUserPlane, so that the logic for making this
decision is shared between the new and old vertex shaders.

Fixes the following Piglit tests on i965 Gen6:
- vs-clip-vertex-const-accept
- vs-clip-vertex-const-reject
- vs-clip-vertex-different-from-position
- vs-clip-vertex-equal-to-position
- vs-clip-vertex-homogeneity
- vs-clip-based-on-position
- vs-clip-based-on-position-homogeneity
- clip-plane-transformation clipvert_pos
- clip-plane-transformation pos_clipvert
- clip-plane-transformation pos

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad@chad-versace.us>
2011-10-05 11:51:00 -07:00
Paul Berry
7d68c639dd mesa: Add a gl_vert_result for gl_ClipVertex.
Before this patch, clip planes didn't work properly in Mesa when using
vertex shaders, because Mesa assigned both gl_ClipVertex and
gl_Position to the same gl_vert_result (VERT_RESULT_HPOS).  As a
result, backends couldn't distinguish between the two variables, so
any shader that wrote different values to them would fail to work
properly.

This patch paves the way for proper support of gl_ClipVertex by
creating a new enumerated value in gl_vert_result for it
(VERT_RESULT_CLIP_VERTEX).  After this patch, a back-end may add
support for gl_ClipVertex using the following algorithm:

- If using a user-supplied GLSL vertex shader:
  - If the bit corresponding to VERT_RESULT_CLIP_VERTEX is set in
    gl_program::OutputsWritten:
    - Clip using the vertex shader output VERT_RESULT_CLIP_VERTEX and
      the clip planes defined in gl_context::Transform.EyeUserPlane.
  - Else:
    - Clip using the vertex shader output VERT_RESULT_HPOS and the
      clip planes defined in gl_context::Transform.EyeUserPlane.
- Else (either using fixed function or an ARB vertex program):
  - Clip using the vertex shader output VERT_RESULT_HPOS and the clip
    planes defined in gl_context::Transform._ClipUserPlane (*)

where (*) represents the normal Mesa behavior before this patch.

An example of implementing the above algorithm can be found in the
patch that follows this one, which implements gl_ClipVertex in i965
Gen6.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-05 11:50:21 -07:00
José Fonseca
e2072a1046 llvmpipe: Fix the 4 planes (lines) case properly.
The previous change was not effective for lines, because there is no
4 planes 4x4 block rasterization path: it is handled by the 16x16 block
case too, and the 16x16 block was not being budged as it should.

This fixes assertion failures on line rasterization.
2011-10-05 18:07:05 +01:00
José Fonseca
c620087432 llvmpipe: Ensure the 16x16 special rasterization path does not touch outside the tile.
llvmpipe has a few special rasterization paths for triangles contained in
16x16 blocks, but it allows the 16x16 block to be aligned only to a 4x4
grid.

Some 16x16 blocks could actually intersect the tile
if the triangle is 16 pixels in one dimension but 4 in the other, causing
a buffer overflow.

The fix consists of budging the 16x16 blocks back inside the tile.
2011-10-05 18:07:05 +01:00