Commit graph

218945 commits

Author SHA1 Message Date
Lionel Landwerlin
e4efe32909 anv: delay BRW prog_data filling
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:25 +00:00
Lionel Landwerlin
d1a1e98e4e brw: handle non-GRF aligned pushed UBO masking
Right now all the drivers align push data to GRF (32B pre Xe2, 64B
post Xe2) but the push constant delivery mechanism can actually pack
32B ranges so alignment is not required.

Off course we need the push UBO masking to deal with unaligned pushed
ranges.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Calder Young <cgiacun@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:25 +00:00
Lionel Landwerlin
c1c9048dbf anv: add a couple of surfaces to read descriptors
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:25 +00:00
Lionel Landwerlin
812b62a315 anv: remove set index for descriptor buffers
We can check the shader's layout_type.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:25 +00:00
Lionel Landwerlin
c6bbf6dff4 anv: rework descriptor set indexing in NIR
We're currently using 2 address formats for accessing descriptor
buffers (regardless of whether EXT_descriptor_buffer is used).
nir_address_format_64bit_global_32bit_offset is used with bindless
shaders or nir_address_format_32bit_index_offset otherwise.

When using nir_address_format_32bit_index_offset, the layout pass
insert vec2(surface, offset) values in the shader to access the
descriptor buffers. With surface being the binding table entry of the
descriptor. The binding table is packed and might also contain render
targets so there is no equality mapping between the binding table
index and the descriptor set index. For example with we could have a
binding table like this :
   - BT0 : render target 0
   - BT1 : render target 1
   - BT2 : descriptor buffer 0
   - BT3 : descriptor buffer 4

In the next commit we will stop using a binding table entry to access
descriptor buffers on Gfx12.5+ and we will need the descriptor set
index access the descriptor data.

So in this commit we introduce a remapping in NIR to do the descriptor
set index to binding table entry mapping. The mapping table is a vec8
put at the beginning of the functions and the value from the vector is
extracted when loading data from the descriptor buffer

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:24 +00:00
Lionel Landwerlin
01011e0e11 anv: rename/document a layout helper
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:23 +00:00
Sagar Ghuge
1fb8435b77 nir: Add nir_resource_intel_internal entry
Will use the load/store_ssbo with nir_resource_intel_internal later in
this series.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:22 +00:00
Lionel Landwerlin
2ef29502ed brw: enable ex_bso for LSC_SS
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:22 +00:00
Lionel Landwerlin
9bb152c9a9 brw: make PULL_CONSTANT opcodes more like MEMORY opcodes
Using binding & binding_type sources.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:22 +00:00
Lionel Landwerlin
d956957153 isl: fix 32bit math with 4GB buffer size
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:21 +00:00
Lionel Landwerlin
42b70cf05a anv: add missing constant cache invalidation for descriptor buffers
A descriptor buffer promoted to push constants requires a constant
cache invalidation if it is modified on the device.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:21 +00:00
Lionel Landwerlin
e64889635c anv: fix nested command buffer relocations
When executing 3 command buffers :

vkCmdExecuteCommands(CB_B, CB_C);
vkCmdExecuteCommands(CB_A, CB_B);

vkQueueSubmit(CB_A);

We're not transfering correctly the relocations of CB_C from CB_B to
CB_A.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
2026-02-12 16:45:21 +00:00
Valentine Burley
ff4e1b9ed9 tu: Advertise VK_KHR_depth_clamp_zero_one
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This was promoted from EXT.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39823>
2026-02-12 16:20:07 +00:00
Valentine Burley
b828bba6f6 tu: Advertise VK_EXT_shader_uniform_buffer_unsized_array
This is already implemented in common Vulkan code.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39823>
2026-02-12 16:20:07 +00:00
Valentine Burley
10ac4298a3 tu: Enable VK_KHR_compute_shader_derivatives for a6xx
Linear is supported on a6xx.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39823>
2026-02-12 16:20:05 +00:00
Valentine Burley
b7f0c541f2 docs: Update features.txt for Turnip
Document the already implemented extenstions that were missing, and
update the comment for a promoted extension.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39823>
2026-02-12 16:20:02 +00:00
Eric Engestrom
e2c35f4828 docs/precompiled: document debug packages
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14803
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39732>
2026-02-12 16:15:51 +00:00
Eric Engestrom
7eef815667 docs/precompiled: modernize distro documentation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39732>
2026-02-12 16:15:50 +00:00
Vignesh Raman
202437dd8e ci/gitlab_gql: disable schema fetch
When running ci_run_n_monitor, the following error is seen,
gql.transport.exceptions.TransportQueryError: Error while fetching schema: {'message': 'Internal server error'}
If you don't need the schema, you can try with: "fetch_schema_from_transport=False"

Set fetch_schema_from_transport=False to avoid this failure.

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39845>
2026-02-12 16:02:01 +00:00
David Rosca
5d4f977573 radv/video: Support UVD decode on hawaii and older
H264 requires extra allocation in DPB. Use helper function
to get the required size, same as we do for encode.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:27 +00:00
David Rosca
24c74f522c ac/vcn_dec: Make the helper functions static
They are only used in ac_vcn_dec.c now.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
7ad4f501fa radv: Drop videoarraypath debug option
It's not really usefull and only works for H264/5.
On AV1/VP9 it would cause hang.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
19a8b7121e radv/video: Remove old VCN and UVD decode implementation
Only ac_video_dec is now used.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
Benjamin Cheng
6aed906410 radv/video: Use ac_video_dec for decode
Supports VCN and UVD.

Co-authored-by: David Rosca <david.rosca@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
2130df7c2a radeonsi/video: Drop offsets parameter for si_vid_resize_buffer
Not used anymore.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
af5b9d7a4e radeonsi: Move functions from radeon_video.c to si_video.c
And remove radeon_video.c/h

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
528b5c56d2 radeonsi: Rename si_uvd.c to si_video.c
Also move function declarations to si_video.h

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
0f48b667b2 radeonsi: Rename si_uvd_create_decoder to si_video_codec_create
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
1fad2ae6e1 radeonsi/video: Remove old VCN and UVD decode implementation
Only ac_video_dec is now used.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
26979becec radeonsi/video: Add video decoder using ac_video_dec
Supports VCN, VCN JPEG and UVD.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
cb1dde2cc3 radeonsi: Don't assert when using src texture in si_compute_clear_copy_buffer
This will be used for texture -> texture copy in next commit, to copy
DPB (layered texture with multiple planes). It needs to use buffer copy,
because VCN expects interleaved layers.
(layer0_plane0, layer0_plane1, layer1_plane0, layer1_plane1, ...).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
4d06fb9acd ac: Add UVD ac_video_dec implementation
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
9608abb26b ac: Add VCN JPEG ac_video_dec implementation
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
79af03556c ac: Add VCN ac_video_dec implementation
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
b5028e84c8 ac: Add video decode interface
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:25 +00:00
Samuel Pitoiset
02a2451e1f radv: rename radv_image_use_dcc_image_stores()
To radv_image_compress_dcc_on_image_stores() because it seems more
informative.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:26 +00:00
Samuel Pitoiset
d58080f787 radv/meta: add a function to fixup DCC metadata for compute resolves
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:25 +00:00
Samuel Pitoiset
ed166804f6 radv/meta: remove an useless barrier when fixing up DCC for compute resolves
The resolve operation doesn't use DCC of the destination image, so the
clear can run in parallel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:25 +00:00
Samuel Pitoiset
a673c9e414 radv/meta: stop fixing up DCC after a partial resolve using compute
The decompression pass already resets DCC to its uncompressed state,
so this is just redundant.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:25 +00:00
Rhys Perry
fa5d4174c4 nir/search: use memcmp/memcpy/memset
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39808>
2026-02-12 14:47:06 +00:00
Rhys Perry
5d92942241 nir/search: remove creation of swizzle
match_expression() only accesses the first instr->def.num_components
elements, so we don't need to ensure the rest are zero.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39808>
2026-02-12 14:47:06 +00:00
Konstantin Seurer
f574de2249 radv: Fix setting the viewport for depth stencil FS resolves
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
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Fixes: 704fbbb ("radv/meta: rework depth/stencil resolves using graphics")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39836>
2026-02-12 14:25:31 +00:00
Konstantin Seurer
bc86c5adae radv: Stop saving descriptors before acceleration structure OPs
They only use compute+constants.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39836>
2026-02-12 14:25:31 +00:00
Utku Iseri
7c9b4fc524 panvk: BDA capture/replay support on v10+
The spec recommends the capture/replay enabled buffers to be separated
from other buffers created by the implementation, so this introduces a
split-heap mode to be used only when this feature is enabled.

The rest of the change is trivial, as we can allocate from the
fixed-heap on BDA-C/R-enabled allocations during capture, and simply
map the address we're given on that same heap during replays.

Architectures older than v10 use AUTO_VA, so we can't do the same thing
on them.

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38871>
2026-02-12 14:00:50 +00:00
Utku Iseri
3a853e0ba4 panvk: add max supported va to physical device
This is slightly neater to check during device feature
filling instead of calculating it repeatedly.

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38871>
2026-02-12 14:00:50 +00:00
Utku Iseri
a1b2d2293f panvk: use AUTO_VA with v9
v9 uses panfrost, which only supports AUTO_VA

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38871>
2026-02-12 14:00:49 +00:00
jiajia Qian
f16d17a454 nir/opt_phi_precision: Fix bit size mismatch when moving widening conversions
Add a check to ensure that when load_const can be narrowed, the bit size

from other widening conversion sources must be 16-bit to maintain

consistency across all phi sources.

Signed-off-by: jiajia Qian <jiajia.qian@nxp.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39773>
2026-02-12 12:27:55 +00:00
Ansari, Muhammad
d42268f3e5 amd/vpelib: Adding new wrapper for register profiling
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
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[WHY]
To read back register read/write counts from VPEs, we need to add a new
wrapper function.

[HOW]
Added a wrapper that calls build command and populate the register
profiling data structure.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Muhammad Ansari <Muhammad.Ansari@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:26 +00:00
Ali, Nawwar
2a5124a09f amd/vpelib: Fix crash during encoding test
[WHY]
Fix crash during encoding test

Co-authored-by: Agate, Jesse <Jesse.Agate+amdeng@amd.com>
Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Nawwar Ali <Nawwar.Ali@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:25 +00:00
Agate, Jesse
39187b36b5 amd/vpelib: Add RGB 601 Primaires to BG Color
[WHY]
RGB 601 Primaries are missing from vpe_is_limited_cs

[HOW]
Add 601 primaries to the switch statement

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-Off-by: Jesse Agate <Jesse.Agate@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:25 +00:00