Commit graph

62282 commits

Author SHA1 Message Date
Emil Velikov
56f531657c Partially revert "st/xa: Fix advertized version number and try to avoid future discrepancies"
This reverts commit 61bedc3d6b.

As the header is the one defining the API/ABI and is distributed
during installation, we should be using it rather than re-defining
the XA version in configure.ac.

Bump the version in the header to 2.2.0, to reflect what was the
original intent of commit 42158926c6.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2014-04-09 22:12:35 +01:00
Emil Velikov
f9832f960f glx: drop obsolete _XUnlock_Mutex in __glXInitialize error path
With commit 1f1928db001(glx: Drop _Xglobal_lock while we create and
initialize glx display) we've split the big _Xglobal_lock handling in
a more fine grained manner.

Unfortunatelly we forgot to drop the unlock_mutex on the error paths,
leading to undefined behaviour as the mutex is already unlocked.

Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: "9.2 10.0 10.1"  <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-04-09 22:12:35 +01:00
Rob Clark
6afd7be132 freedreno/a3xx: assert() -> debug_assert()
We hit this assert with some piglit tests.  Which appears to be a bug
outside of freedreno.  Previously we were relying on assert() being
redefined to debug_assert() so that we didn't crash in release builds.
Somehow that stopped working.  So just use debug_assert() directly.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-04-09 16:37:04 -04:00
Brian Paul
e853ade544 svga: move LIST_INITHEAD(dirty_buffers) earlier in svga_context_create()
Fixes a crash in svga_context_flush_buffers() if we use the 'draw' module
for AA lines (when the device doesn't support that feature).  We need to
initialize this list before we setup the swtnl pieces.

Found/fixed by Charmaine Lee.

Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2014-04-09 12:02:03 -06:00
Kenneth Graunke
26ae030fcc i965: Stop advertising GL_MESA_ycbcr_texture.
The "new" fragment shader backend has never supported the necessary
color conversion code for this to work.  We began using the new backend
in Mesa 7.10 for GLSL (commit a81d423d93, October 2010),
and for ARB_fragment_program in Mesa 9.1 (commit 97615b2d8c,
August 2012).

I haven't heard any complaints, so I don't think anyone will miss this
feature.  I believe mplayer used it at one point, but these days
defaults to other paths anyway.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <idr@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-09 08:28:25 -07:00
Rob Clark
4a92c12232 freedreno/a3xx/compiler: add CEIL
fixes piglit glsl-fs-ceil

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-04-09 10:59:18 -04:00
Rob Clark
9604e31dc9 freedreno/a3xx/compiler: fix neg mov's
create_mov() was fixed up to handle neg/abs properly for interal mov's,
using absneg.f, but forgot to fix it for TGSI MOV's.  The problem with
using add.f to handle negated mov's is that we can only take a single
const reg src.  So:

  MOV TEMP[n], -CONST[m]

would turn into:

  add.f Rdst, (neg)CONST[m], 0.0

which would not work.  Anyways, just remove the extra code and always
use create_mov() which DTRT.

This fixes piglit vs-op-neg-int test.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-04-09 10:59:18 -04:00
Marek Olšák
4d641803e8 radeonsi: allow fast color clear and Hyper-Z with 1D-tiled surfaces on CIK
This depends on my kernel fix. Hyper-Z is still disabled by default.
2014-04-09 01:45:16 +02:00
Marek Olšák
fb5cf3490e r600g,radeonsi: add a bunch of useful queries for the HUD 2014-04-09 01:45:16 +02:00
Marek Olšák
4a5519f1e0 r600g,radeonsi: set correct initial domain for shared resources 2014-04-09 01:45:16 +02:00
Marek Olšák
5f7faff61b gallium/radeon: fix warnings 2014-04-09 01:45:16 +02:00
Iago Toral Quiroga
1a92637c68 tnl: Merge _tnl_vbo_draw_prims() into _tnl_draw_prims().
This should help prevent situations where we render without proper index
bounds. For example: https://bugs.freedesktop.org/show_bug.cgi?id=59455

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-08 15:10:10 -07:00
Topi Pohjolainen
2ffb50d77b i965: Remove unused sampler key fields
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 13:34:59 -07:00
Brian Paul
6f059725fa mesa: move declaration before code in etc2_unpack_rgb8()
To fix MSVC build since cb4ad13685.
2014-04-08 14:17:40 -06:00
Kenneth Graunke
ec1baea95a i965: Delete "fast color clear unsupported" performance warning.
Applications frequently clear to colors other than 0.0 or 1.0, which
prevents us from doing fast color clears.  In that case, we issue this
performance warning on basically every glClear call, resulting in so
much spam that it's nearly impossible to see any other messages.

Plus, I don't think it's useful.  We aren't suggesting a better way to
do what the application developers want---we're just telling them it
would be faster to do something they don't want.

Driver developers have no control over the clear color, so this message
is totally useless to them.

A better alternative to get this sort of information is to use
INTEL_DEBUG=blorp, which tells you whether color clears were fast,
simd16 repdata, or slow.

v2: Rebase on has_color_component changes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-04-08 13:09:46 -07:00
Rob Clark
ee839cc6ef freedreno/a3xx: deal with optimized tex instructions
Keep track of whether we actually have any sam instructions in the
resulting shader, rather than using TGSI SAMP declarations.  If the sam
instruction is optimized out, because the result is not used, we don't
want to emit texture state, etc.  In fact emitting sampler state and/or
setting PIXLODENABLE bit when there are no texture fetches seems to
cause lockup.

In theory this should never happen for a "normal" shader, unless the
state tracker is wonky.  But it is a very real possibility for binning
pass shaders.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-04-08 16:06:49 -04:00
Courtney Goeltzenleuchter
cb4ad13685 mesa: add bounds checking to eliminate buffer overrun
Decompressing ETC2 textures was causing intermitent segfault
by copying resulting 4x4 texel block to the destination texture
regardless of the size of the destination texture. Issue found
via application crash in GLBenchmark 3.0's Manhattan test.

v2: add more detail comment. Compute limit outside inner loops.
v3: add bugzilla reference
v4: Correct cc syntax in commit log
v5: really grab the right patch

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74988
Cc: "9.2 10.0 10.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> [v1, suggested v2-3]
2014-04-08 12:55:25 -07:00
Leo Liu
a22d944fdb st/omx/enc: cleanup omx/vid_enc.c
cleanup by moving each step into a separate function

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2014-04-08 17:51:19 +02:00
Christian König
5f374826f8 st/omx/enc: allocate input buffer private on demand
v2: move allocation to a function as first step
    to clean vid_enc_EncodeFrame

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
2014-04-08 17:51:15 +02:00
Brian Paul
9bb2ec6fd1 svga: replace sampler assertion with conditional
For TEX instructions, the set of samplers and sampler views should
be consistent.  The XA state tracker sometimes passes an inconsistent
set of samplers and sampler views.  Rather than assert and die, issue
a warning.

v2: add debugging code to detect inconsistent state.
v3: also check for null sampler in svga_state_tss.c

Cc: "10.0" "10.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
2014-04-08 08:45:18 -06:00
Chia-I Wu
4ddf51db6a i965/vec4: fix record clearing in copy propagation
Given

  mov vgrf7, vgrf9.xyxz
  add vgrf9.xyz, vgrf4.xyzw, vgrf5.xyzw
  add vgrf10.x, vgrf6.xyzw, vgrf7.wwww

the last instruction would be wrongly changed to

  add vgrf10.x, vgrf6.xyzw, vgrf9.zzzz

during copy propagation.

The issue is that when deciding if a record should be cleared, the old code
checked for

  inst->dst.writemask & (1 << ch)

instead of

  inst->dst.writemask & (1 << BRW_GET_SWZ(src->swizzle, ch))

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76749
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Cc: Jordan Justen <jljusten@gmail.com>
Cc: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romainck <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: "10.1" <mesa-stable@freedesktop.org>
2014-04-08 21:04:22 +08:00
Eric Anholt
57d6e7b7ee i965/vec4: Add a test for copy propagation behavior.
I thought I was seeing a bug in the code while reviewing, but it's not
there.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-04-08 00:59:48 -07:00
Eric Anholt
6230b646a5 i965/fs: Track whether we're doing dual source in a more obvious way.
I'm going to be turning dual_src_output into an array in a moment.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 00:59:48 -07:00
Eric Anholt
14b85e3a47 i965/fs: Add a couple more global special regs to special[]
Nothing bad came of this because they weren't used after visitor running,
but leaving them in a bad state seems like a recipe for pain later.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 00:59:48 -07:00
Eric Anholt
4303d26f93 i965/fs: Handle arrays of special regs more cleanly.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 00:59:48 -07:00
Eric Anholt
72b845e640 i965/fs: Fix dump_instructions() on uniforms.
All of a vec4 uniform was being printed as "u0"

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 00:59:48 -07:00
Eric Anholt
caa2605db5 i965/fs: Fix vgrf0 live interval when no interpolation was done.
When you've got a simple solid-color shader that doesn't generate
pixel_x/y interpolation, we were deciding that the first vgrf was both the
undefined pixel_x and pixel_y, and extending its live interval to avoid
the stride problem.  That tricked other optimization that tries to see if
a particular instruction is the last use of a variable.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 00:59:48 -07:00
Eric Anholt
cf40ebacb1 i965: Drop pointless check for variable declarations in splitting.
We're walking the whole instruction stream, so we know the declaration
will be found.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 00:59:48 -07:00
Eric Anholt
66b15ad9db i965: Remove stale comment.
We stopped doing variable index lowering for uniforms in
a64c1eb9b1, 5 months after the comment was
added.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 00:59:48 -07:00
Eric Anholt
8c2bfbc6b9 glsl: Move tree grafting's debug output to stderr.
The rest of our compiler dumps are there, now.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 00:59:48 -07:00
Eric Anholt
e9822f77a9 glsl: Skip making a temporary for assignments when we don't need one.
While we wish our optimization passes could identify all the cases where
we can coalesce our variables, we miss out on a lot of opportunities.

total instructions in shared programs: 1673849 -> 1673166 (-0.04%)
instructions in affected programs:     299521 -> 298838 (-0.23%)
GAINED:                                7
LOST:                                  0

Note that many programs are "hurt".  The notable ones are where we produce
unrolling in cases we didn't before (presumably just because of the lower
instruction count).  But there are also some cases where pushing things
right into the variables prevents copy propagation and tree grafting,
since we don't split our variable usage webs apart.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 00:59:47 -07:00
Iago Toral Quiroga
dff3439fef i915: Fix build error.
is_power_of_two() is now provided by mesa so its definition must be removed
from the i915 driver code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-04-08 00:29:59 -07:00
Kenneth Graunke
73f80c20f6 glsl: Pass ctx->Const.NativeIntegers to do_algebraic.
The next patch will introduce an optimization that only works when
integers are not represented as floating point values.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-04-08 00:02:06 -07:00
Kenneth Graunke
169c645f12 glsl: Pass ctx->Const.NativeIntegers to do_common_optimization().
The next few patches will introduce an optimization that only works when
integers are not represented as floating point values.

v2: Re-word-wrap a line, as requested by Ian Romanick.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-04-08 00:02:03 -07:00
Kenneth Graunke
40d9337406 glsl: Validate that base types match for a number of binops.
The IR is not supposed to support implicit type conversions; we just
failed to validate it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-04-08 00:02:01 -07:00
Kenneth Graunke
e14b93371c glsl: Fix lack of i2u in lower_ubo_reference.
ir_binop_ubo_load takes unsigned integer operands.  However, the array
index used to compute these offsets may be a signed integer.  (For
example, see Piglit's spec/glsl-1.40/uniform_buffer/fs-bvec-array).

For some reason, we were missing an ir_binop_i2u cast, and ir_validator
was failing to catch that.

Without this change, ir_builder's type inference code broke for me when
writing a new optimization pass.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-04-08 00:01:58 -07:00
Kenneth Graunke
4311f9878d i965/fs: Skip emitting MACH/MOV for small integers.
The vector backend already implemented this optimization, but
surprisingly, we never bothered to implement it in the scalar backend.

In addition to saving two instructions, this eliminates a use of the
accumulator as an explicit source, which is unsupported in SIMD16 mode
on Gen7+, which could help us gain SIMD16 programs.

Cuts 19.23% of the instructions in dolphin/efb2ram.shader_test.

v2: Rebase on is_16bit_integer_constant -> is_uint16_constant rename.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-04-08 00:01:55 -07:00
Kenneth Graunke
7540be22d1 glsl: Make is_16bit_constant from i965 an ir_constant method.
The i965 MUL instruction doesn't natively support 32-bit by 32-bit
integer multiplication; additional instructions (MACH/MOV) are required.
However, we can avoid those if we know one of the operands can be
represented in 16 bits or less.  The vector backend's is_16bit_constant
static helper function checks for this.

We want to be able to use it in the scalar backend as well, which means
moving the function to a more generally-usable location.  Since it isn't
i965 specific, I decided to make it an ir_constant method, in case it
ends up being useful to other people as well.

v2: Rename from is_16bit_integer_constant to is_uint16_constant, as
    suggested by Ilia Mirkin.  Update comments to clarify that it does
    apply to both int and uint types, as long as the value is
    non-negative and fits in 16-bits.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-04-08 00:01:53 -07:00
Kenneth Graunke
bd69f65f90 mesa: Move is_power_of_two() function from brw_context.h to macros.h.
This makes the function available from core Mesa code, including the
GLSL compiler.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-04-08 00:01:51 -07:00
Kenneth Graunke
6bda3a5267 i965: Fix "SIMD16 unsupported" messages via KHR_debug.
Performance warnings are logged via KHR_debug in addition to when the
INTEL_DEBUG=perf environment variable is set.  Without this, messages in
debug contexts would have "(null)" for the reason.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2014-04-08 00:01:34 -07:00
Kenneth Graunke
ee12a03805 i965: Fix missing dirty bits in the gen8_sbe_state atom.
These are clearly needed---the comments in the function are even present
for each one of them.   I originally had two separate state atoms for
3DSTATE_SBE and 3DSTATE_SBE_SWIZ.  When I combined the functions, I must
have forgotten to add the atoms for 3DSTATE_SBE_SWIZ.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-07 23:37:18 -07:00
Kenneth Graunke
47682f2ca1 i965: Drop BRW_NEW_RASTERIZER_DISCARD flag from Broadwell SOL atom.
Nothing actually uses this---we handle rasterizer discard in the
clipper in order for statistics counters to work.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-07 23:37:16 -07:00
Kenneth Graunke
f68353c57c i965: Use the correct program when uploading Broadwell SOL state.
This is the equivalent of commit 43e77215b1.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-04-07 23:36:19 -07:00
Thomas Hellstrom
47f60cbb71 st/xa: Make sure unused samplers are set to NULL
renderer_copy_prepare was setting the first sampler but never telling
the cso code how many samplers were actually used. Fix this.

Cc: "10.1" <mesa-stable@freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2014-04-07 22:34:10 -07:00
Thomas Hellstrom
e5d2c5b899 st/xa: Bind destination before setting new state
Binding a new destination may cause the svga driver to emit draw calls
while propagating the surface. Make sure this doesn't happen in the middle
of sampler state setup where state may be incosistent.

In practice, surface propagation should never happen here and even if it did,
it wouldn't be a valid reason for the svga driver to emit partially set up
state, but to avoid future uncertainties, make sure this doesn't happen
anyway.

Found while auditing the state tracker for inconsistent sampler state /
sampler view setup.

Cc: "10.1" <mesa-stable@freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2014-04-07 22:34:10 -07:00
Eric Anholt
34f15903d6 glapi: Fix libglapi build.
This line appears to have been accidentally dropped from the last commit,
and the resulting libglapi was missing symbols.
2014-04-07 14:34:49 -07:00
Matt Turner
144bbb7b78 glapi/build: Add headers to distribution.
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-04-07 09:45:26 -07:00
Matt Turner
fbca1ab780 glapi/gen: Ship more Python files
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-04-07 09:45:19 -07:00
Matt Turner
b0f37a6bd2 glapi/gen: Ship XML and Python files
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-04-07 09:43:21 -07:00
Matt Turner
f76ac9c9a6 glapi/gen: Add missing XML files to API_XML
Also (re)move XML files from COMMON to API_XML.

Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-04-07 09:43:21 -07:00