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Author SHA1 Message Date
Karol Herbst
4999f9995e rusticl/mem: fix validation of packed image formats 
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
 2023-06-19 14:06:48 +02:00
Karol Herbst
73f86c9b9d rusticl/mem: cache the pipe_format 
This moves the expensive to_pipe_format call to image creation time.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
 2023-06-19 14:06:45 +02:00
Karol Herbst
ff95349285 docs/cl: improve reporting of image features 
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
 2023-06-19 14:06:44 +02:00
Eric Engestrom
d0dd0ad1c3 Revert "ci: remove clang-format testing" 
This reverts commit d666a8d259.

Let's move past that tantrum and hope we can have an adult conversation
if one person wants to go against all the other developers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23719>
 2023-06-19 11:19:42 +01:00
Eric Engestrom
ec8932fd63 radv: fix formatting 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23719>
 2023-06-19 11:19:42 +01:00
Illia Abernikhin
45a0de8491 docs: remove i965 features from docs/features.txt 
Upgrade docs/features.txt

Signed-off-by: Illia Abernikhin <illia.abernikhin@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4990
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17251>
 2023-06-19 12:02:39 +03:00
Illia Abernikhin
125700cf8b docs: add crocus features to docs/features.txt 
Upgrade docs/features.txt with crocus extensions

Signed-off-by: Illia Abernikhin <illia.abernikhin@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17251>
 2023-06-19 12:02:39 +03:00
Illia Abernikhin
aa20ea7c5e docs: add iris features to docs/features.txt 
Upgrade docs/features.txt with iris extensions

Signed-off-by: Illia Abernikhin <illia.abernikhin@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17251>
 2023-06-19 12:02:39 +03:00
Iago Toral Quiroga
5cdb2371fd v3dv: expose shaderImageGatherExtended 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
 2023-06-19 08:13:06 +00:00
Iago Toral Quiroga
e31aff59d8 broadcom/compiler: handle textureGatherOffsets 
There is a lowering in NIR for this so we just need to enable it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
 2023-06-19 08:13:06 +00:00
Iago Toral Quiroga
0de89e10ba nir/lower_tex: handle lower_tg4_offsets with lower_tg4_broadcom_swizzle 
This pass uses a safe iterator so it can't lower new instructions that are
injected as part of the lowering, which is exactly what lower_tg4_offsets
does, and if lower_tg4_broadcom_swizzle is also set then we need to lower
these new instructions. Handle this by running the pass twice when both
are set: the first pass will only handle lower_tg4_offsets and
the second pass (which will see the new tg4 instructions produced with
lower_tg4_offsets) will process the remaining options, including
lower_tg4_broadcom_swizzle.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
 2023-06-19 08:13:06 +00:00
Iago Toral Quiroga
65353814a3 nir/lower_tex: copy missing fields when creating copy of tex instruction 
This is missing both texture and sampler indices.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
 2023-06-19 08:13:06 +00:00
Samuel Pitoiset
3208844539 radv: use cs_execute_ib() for GFX, MBCP and DGC IBs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23671>
 2023-06-19 07:53:35 +00:00
Samuel Pitoiset
afbe187715 radv/amdgpu: add cs_execute_ib() for executing IBs 
This will be used to implement support for DGC with RADV_DEBUG=noibs,
DGC for secondaries and for future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23671>
 2023-06-19 07:53:35 +00:00
Samuel Pitoiset
0551954e80 radv/amdgpu: remove useless assert in radv_amdgpu_winsys_cs_submit_internal() 
The zero CS submission path is used instead, and this assertion isn't
really useful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23669>
 2023-06-19 07:33:35 +00:00
Samuel Pitoiset
8e1579a214 radv/amdgpu: fix a buffer overflow for submissions with RADV_DEBUG=noibs 
With RADV_DEBUG=noibs (aka no chaining) the number of IBs to submit
depends on the number of old IB buffers of every CS.

This fixes a stack smashing error.

Fixes: 53b439d24f ("radv/amdgpu: Use STACK_ARRAY for IB array to reduce stack usage."
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23669>
 2023-06-19 07:33:35 +00:00
Samuel Pitoiset
795bf984c6 radv: reserve space for shadowed regs 
Tested on RDNA2, hopefully the space reservation is large enough for
other chips as well.

Fixes: 7893040f80 ("radv: Add stricter space checks.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23672>
 2023-06-19 07:07:37 +00:00
Samuel Pitoiset
a5cdc4840d radv: use IB for the GFX preamble on GFX6 
GFX6 supports IBs without any issues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23670>
 2023-06-19 06:48:21 +00:00
Samuel Pitoiset
e20a0f32f2 radv: do not use IB for the GFX preamble with RADV_DEBUG=noibs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23670>
 2023-06-19 06:48:21 +00:00
David Heidelberg
7e56f0389b ci/docs: fixup incorrect spacing around console block 
Fixes: dcf5dfbbf8 ("ci: implement farms handling trough files inside .ci-farms")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23713>
 2023-06-18 19:29:00 +00:00
Gert Wollny
e0ca73e96d r600/sfn: Don't deref unused group slots 
Fixes: e57643cf5 (r600/sfn: Add handling for R600 indirect access alias handling)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9219

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23711>
 2023-06-18 19:01:01 +00:00
Gert Wollny
3a569fbf9b r600: Split tex CF only if written component is read 
There is no need to split the CF if only the register ID
in a previous write is the same, we should look at the actual
slots instead, ut we have also to take writes of 0 and 1 into
account.

Cc: mesa-stable

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23710>
 2023-06-18 07:22:14 +00:00
Marek Olšák
da4b5b4a47 intel/ci: disable iris-jsl-deqp because it always fails for an AMD MR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
d666a8d259 ci: remove clang-format testing 
The way it's used is unacceptable. Here's the change it suggested:

    diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
    index 05b9cb0a3f1..e58abfa885f 100644
    --- a/src/amd/vulkan/radv_device.c
    +++ b/src/amd/vulkan/radv_device.c
    @@ -783,8 +783,7 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr
        device->overallocation_disallowed = overallocation_disallowed;
        mtx_init(&device->overallocation_mutex, mtx_plain);

    -   if (physical_device->rad_info.register_shadowing_required ||
    -       device->instance->debug_flags & RADV_DEBUG_SHADOW_REGS)
    +   if (physical_device->rad_info.register_shadowing_required || device->instance->debug_flags & RADV_DEBUG_SHADOW_REGS)
           device->uses_shadow_regs = true;

        /* Create one context per queue priority. */

This is the dumbest reason to prevent merging a MR. I don't want to see this
in projects I work on.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
845ed015dd radeonsi: remove gfx10 NGG streamout 
Unused and unstable. Keep it only for gfx11.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
283be8ac3b radeonsi: handle GE_CNTL and IA_MULTI_VGT_PARAM as a tracked register 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
12b123fdb7 radeonsi: handle VGT_LS_HS_CONFIG like a tracker register 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
7065bbdc23 radeonsi: handle VGT_GS_OUT_PRIM_TYPE like a tracked register 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
315231b5a5 radeonsi: eliminate redundant compute SH register changes 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
35fa013545 radeonsi: handle demoted si_pm4_set_reg_idx3 as si_pm4_set_reg 
to allow merging packets; otherwise no change in behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
29e1d0ac4f radeonsi: set non-graphics uconfig registers first in the preamble 
we want to keep all SH registers next to each other, so that we can use
only one SET_SH_REG_PAIRS_PACKED packet

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
52087d5772 radeonsi: remove sscreen parameter from si_pm4_set_reg_idx3 
si_pm4_state now contains the screen.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
7d2a0bda77 radeonsi: add more variables into si_pm4_state and rework how it's created 
to be used later

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
8c7e32fb33 radeonsi: don't needlessly invalidate L0/L1 caches at the beginning of IBs 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
c5a565d094 radeonsi: don't do PFP_SYNC_ME before CP DMA and compute blits 
It's not needed before them, and we already set it after them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
76664c1677 radeonsi: shrink the last field of tcs_offchip_layout due to LDS limit 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
c89ca3b47f radeonsi: change si_emit_derived_tess_state into a state atom 
This splits the state into an update function and an emit function
setting the registers, and only 2 functions update it: set_patch_vertices
and si_update_shaders.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
d891bd7c3a radeonsi: fix RB+ and gfx11 issues with framebuffer state 
This fixes most gfx11 test failures.

Fixes: 9fecac091f - radeonsi/gfx11: scattered register deltas

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
9fd5561d77 radeonsi/ci: add glx@glx-visuals-stencil to skips because it gets stuck often 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
229c3b7827 radeonsi: set register_shadowing_enabled if AMD_DEBUG=shadowregs is set 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
f0eb548e7b amd: skip redundant INDEX_TYPE even with register shadowing 
same as PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
2ce24402d6 amd: skip redundant PKT3_NUM_INSTANCES even with register shadowing 
same as PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
6349d3f537 amd: update shadowed register tables for gfx11 
The new table format is identical to the source to facilitate backporting.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
c8efd2b2cf amd: add a new helper that prints all non-shadowed regs 
for validating our tables against register definitions

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
f43d68d7ac amd: remove ac_check_shadowed_regs 
not useful anymore

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
6e19b6d97f amd: remove non-shadowed register tables 
not useful

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
93dbdde313 amd: fix GPU cache sizes retrieved from the kernel 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:21 +00:00
Marek Olšák
c33622d931 amd: don't set PA_RATE_CNTL because it has no effect 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:20 +00:00
Marek Olšák
3e5aa9e717 amd: increase the attribute ring size on gfx1103_r1 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:20 +00:00
Marek Olšák
9316258449 amd: rename mid_command_buffer_preemption_enabled -> register_shadowing_required 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
 2023-06-17 23:42:20 +00:00