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amd: add a new helper that prints all non-shadowed regs
for validating our tables against register definitions Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
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5 changed files with 51 additions and 34 deletions
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@ -174,6 +174,12 @@ const char *ac_get_register_name(enum amd_gfx_level gfx_level, enum radeon_famil
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return reg ? sid_strings + reg->name_offset : "(no name)";
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}
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bool ac_register_exists(enum amd_gfx_level gfx_level, enum radeon_family family,
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unsigned offset)
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{
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return find_register(gfx_level, family, offset) != NULL;
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}
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void ac_dump_reg(FILE *file, enum amd_gfx_level gfx_level, enum radeon_family family,
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unsigned offset, uint32_t value, uint32_t field_mask)
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{
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@ -41,6 +41,8 @@ typedef void *(*ac_debug_addr_callback)(void *data, uint64_t addr);
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const char *ac_get_register_name(enum amd_gfx_level gfx_level, enum radeon_family family,
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unsigned offset);
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bool ac_register_exists(enum amd_gfx_level gfx_level, enum radeon_family family,
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unsigned offset);
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void ac_dump_reg(FILE *file, enum amd_gfx_level gfx_level, enum radeon_family family,
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unsigned offset, uint32_t value, uint32_t field_mask);
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void ac_parse_ib_chunk(FILE *f, uint32_t *ib, int num_dw, const int *trace_ids,
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@ -3706,44 +3706,53 @@ void ac_emulate_clear_state(const struct radeon_info *info, struct radeon_cmdbuf
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}
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}
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/* Debug helper to print all shadowed registers and their current values read
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* by umr. This can be used to verify whether register shadowing doesn't affect
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* apps that don't enable it, because the shadowed register tables might contain
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* registers that the driver doesn't set.
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*/
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void ac_print_shadowed_regs(const struct radeon_info *info)
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static void ac_print_nonshadowed_reg(enum amd_gfx_level gfx_level, enum radeon_family family,
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unsigned reg_offset)
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{
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bool found = false;
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for (unsigned type = 0; type < SI_NUM_REG_RANGES && !found; type++) {
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const struct ac_reg_range *ranges;
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unsigned num_ranges;
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ac_get_reg_ranges(gfx_level, family, type, &num_ranges, &ranges);
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for (unsigned i = 0; i < num_ranges; i++) {
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if (reg_offset >= ranges[i].offset && reg_offset < ranges[i].offset + ranges[i].size) {
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/* Assertion: A register can be listed only once in the shadowed tables. */
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if (found) {
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printf("warning: register R_%06X_%s found multiple times in tables\n",
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reg_offset, ac_get_register_name(gfx_level, family, reg_offset));
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}
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found = true;
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}
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}
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}
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if (!found) {
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printf("register R_%06X_%s not found in any tables\n", reg_offset,
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ac_get_register_name(gfx_level, family, reg_offset));
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}
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}
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void ac_print_nonshadowed_regs(enum amd_gfx_level gfx_level, enum radeon_family family)
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{
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if (!debug_get_bool_option("AMD_PRINT_SHADOW_REGS", false))
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return;
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for (unsigned type = 0; type < SI_NUM_REG_RANGES; type++) {
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const struct ac_reg_range *ranges;
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unsigned num_ranges;
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for (unsigned i = 0xB000; i < 0xBFFF; i += 4) {
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if (ac_register_exists(gfx_level, family, i))
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ac_print_nonshadowed_reg(gfx_level, family, i);
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}
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ac_get_reg_ranges(info->gfx_level, info->family, type, &num_ranges, &ranges);
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for (unsigned i = 0x28000; i < 0x28FFF; i += 4) {
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if (ac_register_exists(gfx_level, family, i))
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ac_print_nonshadowed_reg(gfx_level, family, i);
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}
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for (unsigned i = 0; i < num_ranges; i++) {
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for (unsigned j = 0; j < ranges[i].size / 4; j++) {
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unsigned offset = ranges[i].offset + j * 4;
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const char *name = ac_get_register_name(info->gfx_level, info->family, offset);
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unsigned value = -1;
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#ifndef _WIN32
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char cmd[1024];
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snprintf(cmd, sizeof(cmd), "umr -r 0x%x", offset);
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FILE *p = popen(cmd, "r");
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if (p) {
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ASSERTED int r = fscanf(p, "%x", &value);
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assert(r == 1);
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pclose(p);
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}
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#endif
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printf("0x%X %s = 0x%X\n", offset, name, value);
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}
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printf("--------------------------------------------\n");
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}
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for (unsigned i = 0x30000; i < 0x31FFF; i += 4) {
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if (ac_register_exists(gfx_level, family, i))
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ac_print_nonshadowed_reg(gfx_level, family, i);
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}
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}
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@ -39,7 +39,7 @@ void ac_get_reg_ranges(enum amd_gfx_level gfx_level, enum radeon_family family,
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const struct ac_reg_range **ranges);
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void ac_emulate_clear_state(const struct radeon_info *info, struct radeon_cmdbuf *cs,
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set_context_reg_seq_array_fn set_context_reg_seq_array);
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void ac_print_shadowed_regs(const struct radeon_info *info);
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void ac_print_nonshadowed_regs(enum amd_gfx_level gfx_level, enum radeon_family family);
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void ac_create_shadowing_ib_preamble(const struct radeon_info *info,
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pm4_cmd_add_fn pm4_cmd_add, void *pm4_cmdbuf,
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@ -1448,7 +1448,7 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
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RADEON_DOMAIN_OA);
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}
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ac_print_shadowed_regs(&sscreen->info);
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ac_print_nonshadowed_regs(sscreen->info.gfx_level, sscreen->info.family);
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return &sscreen->b;
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}
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