amd: skip redundant INDEX_TYPE even with register shadowing

same as PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
This commit is contained in:
Marek Olšák 2023-06-11 01:16:33 -04:00 committed by Marge Bot
parent 2ce24402d6
commit f0eb548e7b
2 changed files with 2 additions and 2 deletions

View file

@ -5293,7 +5293,7 @@ radv_emit_draw_registers(struct radv_cmd_buffer *cmd_buffer, const struct radv_d
disable_instance_packing = true;
}
if ((draw_info->indexed && (state->index_type != state->last_index_type || cmd_buffer->device->uses_shadow_regs)) ||
if ((draw_info->indexed && state->index_type != state->last_index_type) ||
(info->gfx_level == GFX10_3 &&
(state->last_index_type == -1 ||
disable_instance_packing != G_028A7C_DISABLE_INSTANCE_PACKING(state->last_index_type)))) {

View file

@ -1504,7 +1504,7 @@ static void si_emit_draw_packets(struct si_context *sctx, const struct pipe_draw
/* draw packet */
if (index_size) {
/* Register shadowing doesn't shadow INDEX_TYPE. */
if (index_size != sctx->last_index_size || sctx->shadowing.registers ||
if (index_size != sctx->last_index_size ||
(GFX_VERSION == GFX10_3 && disable_instance_packing != sctx->disable_instance_packing)) {
unsigned index_type;