Commit graph

48156 commits

Author SHA1 Message Date
Eric Anholt
fff693828e i965: Add a note about an unsafe-looking state check.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
2011-10-29 12:15:59 -07:00
Eric Anholt
3faf56ffbd intel: Add an interface for saving/restoring the batchbuffer state.
This will be used to avoid the prepare() step in the i965 driver's
state setup.  Instead, we can just speculatively emit the primitive
into the batchbuffer, then check if the batch is too big, rollback and
flush, and replay the primitive.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
2011-10-29 12:15:56 -07:00
Eric Anholt
db364a8af0 i915: Move the always_flush_cache code to triangle emit.
This could have broken always_flush_cache on i965, since
reserved_space doesn't reflect the size of the workaround flushes, and
we might run out of space.  This should make always_flush_cache more
useful on pre-i965, anyway (since the point is to flush around each
draw call, even within a batchbuffer).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
2011-10-29 12:15:33 -07:00
Morgan Armand
439d67f502 glsl: Fix compilation of glsl_lexer.ll with MSVC.
strtoull is not supported on msvc (as there is no C99 support).
2011-10-29 10:37:58 -07:00
Mathias Fröhlich
e8139ebf58 r600g: Replace needless flush in texture upload.
Replace pipe->flush() with pipe->texture_barrier() in
the texture upload path for the staging texture.
This should be enough to get data out of the gpu
caches ready to be read for texture fetch.
2011-10-29 18:36:42 +02:00
Marek Olšák
7684808f9c r600g: remove one pointless flush
It's not useful for anything.
The rest of the patch is just a cleanup resulting
from some of the variables being no longer used.

There are no piglit regressions.
2011-10-29 13:48:39 +02:00
Dave Airlie
09a92e376b radeon/r200: forgot one somehow
drops last usage.
2011-10-29 08:15:27 +01:00
Dave Airlie
b490fa0172 radeon/r200: drop remains of non-libdrm_radeon build
These wrappers and associated symlinks were from the non-libdrm_radeon build.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-10-29 08:13:47 +01:00
Dave Airlie
4dfee0011a mesa/st: get interpolation mode from the fragment shader.
With the recent changes to interpolation stuff, we can now get the value
direct from the program instead of just being fail.

fixes some of the glsl-1.30 interpolation tests with softpipe

Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-10-29 07:41:46 +01:00
Adam Jackson
25620eb1d2 glx: Don't enable INTEL_swap_event unconditionally
DRI2 supports this now - and already enables it explicitly - but drisw
does not and should not.  Otherwise toolkits like clutter will only ever
SwapBuffers once and wait forever for an event that's not coming.

Signed-off-by: Adam Jackson <ajax@redhat.com>
2011-10-28 20:38:32 -04:00
Morgan Armand
0c6a2c78fd implement WGL_ARB_create_context
Signed-off-by: José Fonseca <jfonseca@vmware.com>
2011-10-28 21:58:36 +01:00
Marek Olšák
bbad5103e6 r600g: get backend mask after the context is fully set up 2011-10-28 22:55:01 +02:00
Ian Romanick
276000472a ir_to_mesa: Let check_resources halt compilation
Previously check_resources could fail, but we'd still try to optimize
the shader, do device-specific code generation, etc.  In some cases,
this could explode (especially in the device-specific code
generation).  I haven't found that I could trigger this with the
current code.  When too many samplers were used with the new uniform
handling code, I observed several crashes deep down in the driver.

NOTE: This is candidate for the 7.11 branch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41609
Cc: Eric Anholt <eric@anholt.net>
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-28 13:28:55 -07:00
Ian Romanick
6da9b21f71 i965: Use glsl_type::column_type instead of open-coding it
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-28 13:28:55 -07:00
Ian Romanick
f5ba4d055e glsl: Clean-up spurious error message on bad structure definitions
Previously a shader like

int X;
struct X { int i; };

void main() { gl_Position = vec4(0.0); }

would generate two error message:

0:2(19): error: struct `X' previously defined
0:2(20): error: incomplete declaration

The first one is the real error, and the second is spurious.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-28 13:28:55 -07:00
Ian Romanick
a04211ecb8 glsl: Generate an error for array-of-array declarations
Other parts of the code already caught things like 'float x[4][2]'.
However, nothing caught 'float [4] x[2]'.

Fixes piglit test array-multidimensional-new-syntax.vert.

NOTE: This is candidate for the 7.11 branch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-28 13:28:36 -07:00
Marek Olšák
e79aaf000b r300c/compiler: remove the compiler too
Gallium has a fork of this.
2011-10-28 21:28:31 +02:00
Kenneth Graunke
512431b357 i965/fs: Use the actual hardware g0 register for texel offset setup.
The idea here is to set up the message header with the Sampler State
pointer which the hardware provides as part of the PS Thread Payload in
register g0.

Unfortunately, the existing code

   fs_reg(GRF, 0, BRW_REGISTER_TYPE_UD))

actually references "virtual GRF 0" rather than the hardware g0.  This
is just some arbitrary GRF temporary which will get register allocated.

So, we ended up setting up the header with garbage.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-28 12:11:52 -07:00
Eric Anholt
058e712415 u_format: Fix -NaN handling for packing of 10F_11F_11F_REV to match GL specs.
Fixes the remainder of piglit GL_EXT_packed_float/pack.c

Reviewed-by: Marek Ol ák <maraeo@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-28 12:10:01 -07:00
Eric Anholt
00d3716f4a u_format: Fix clamping of overflow in 10F_11F_11F_REV to match GL specs.
Fixes the 1000000.0 overflow cases of piglit
GL_EXT_packed_float/pack.c

Reviewed-by: Marek Ol ák <maraeo@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-28 12:10:01 -07:00
Eric Anholt
b4d988bc9f mesa: Don't do [0, 1] clamping on glGetTexImage() of packed float formats.
From the GL_EXT_packed_float spec:

    For an RGBA color, if <type> is not one of FLOAT,
    UNSIGNED_INT_5_9_9_9_REV_EXT, or UNSIGNED_INT_10F_11F_11F_REV_EXT,
    or if the CLAMP_READ_COLOR_ARB is TRUE, or CLAMP_READ_COLOR_ARB
    is FIXED_ONLY_ARB and the selected color (or texture) buffer is
    a fixed-point buffer, each component is first clamped to [0,1].
    Then the appropriate conversion formula from table 4.7 is applied
    the component."

(but we previously resolved that the CLAMP_READ_COLOR bit is not
relevant to glGetTexImage())

This fixes most of the cases in piglit GL_EXT_packed_float/pack.

Reviewed-by: Marek Ol ák <maraeo@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-28 12:10:01 -07:00
Eric Anholt
3d7477206d u_format: Fix bitshifting for unpacking from 10F.
This code was copy and pasted from the 11F unpacking, but not updated
for actually being 10 bits instead of 11.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41206
Reviewed-by: Marek Ol ák <maraeo@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-28 12:10:01 -07:00
Eric Anholt
028ce1cd0f u_format: Fix bit definition of UF10_MANTISSA_BITS.
This is only used in the code for packing to INF, and resulted in an
extra bit set that was set anyway, so it was harmless except for the
confusion caused.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-28 12:09:47 -07:00
Eric Anholt
687e4446bf glsl: Implement GLSL 1.30's literal integer range restrictions.
From page 22 (28 of PDF) of GLSL 1.30 spec:
    It is an error to provide a literal integer whose magnitude is too
    large to store in a variable of matching signed or unsigned type.

    Unsigned integers have exactly 32 bits of precision.  Signed integers
    use 32 bits, including a sign bit, in two's complement form.

Fixes piglit int-literal-too-large-0[123].frag.

v2: Take care with INT_MIN, use stroull, and make it a function.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-28 12:03:03 -07:00
Eric Anholt
974c66875e radeon: Remove the non-libdrm kernel memory manager support.
We should have never been building this at this point.
2011-10-28 11:32:10 -07:00
Eric Anholt
830e546f94 radeon: Insist on libdrm being present to build.
There's no sense in building a broken driver.  Previously, there was
the potential of building a DRI1-only driver that would work for DRI1
and fail on DRI2 because the newer libdrm code wasn't present.  Now
the radeon build system should be matching intel and nouveau.
2011-10-28 11:32:00 -07:00
Eric Anholt
48c9925367 configure.ac: Fix equality checks in gallium st setup. 2011-10-28 11:31:11 -07:00
Eric Anholt
bd51e8e4f4 dri: Remove driver GenerateMipmap hooks.
Mesa sets up _mesa_meta_GenerateMipmap as the default hook, which does
this check for fallback and call the fallback itself.
2011-10-28 11:31:11 -07:00
Eric Anholt
eb135fe8c1 radeon: Drop some remaining DRI1 vblank support code. 2011-10-28 11:31:11 -07:00
Eric Anholt
a9f7515890 intel: remove dead prototype for old DRI1 code.
Noticed while grepping for radeon code.
2011-10-28 11:31:11 -07:00
Eric Anholt
339c1731c3 radeon: Simplify cliprects computation now that there's just 1.
This can probably be reduced even further by moving this logic to the
scissor state update or just removing the logic entirely, but I don't
trust myself in radeon quite that much.
2011-10-28 11:31:11 -07:00
Eric Anholt
cab4578024 radeon: Drop the clipping in spans, now that we always have (0,0) -> (w,h). 2011-10-28 11:31:11 -07:00
Eric Anholt
8c11f0a883 radeon: Drop the legacy BO manager code. 2011-10-28 11:27:56 -07:00
Eric Anholt
976d4f58fa radeon: Drop the DRI1 zero-copy TFP code. 2011-10-28 11:27:42 -07:00
Eric Anholt
1553723712 radeon: Drop the radeon_cs_legacy code now that we rely on kernel mm. 2011-10-28 11:23:43 -07:00
Eric Anholt
53b382637c radeon: Drop dri2 checks now that it's always true.
This makes LOCK_HARDWARE empty, so it goes away.
2011-10-28 11:23:33 -07:00
Eric Anholt
fb52b4303d radeon: Drop the DRI1 swapbuffers implementation. 2011-10-28 11:23:09 -07:00
Eric Anholt
0973a1ec78 radeon: Drop the non-kernel-memory-manager support, and thus DRI1.
It's past time, and it was going to get in the way of the renderbuffer
mapping refactor.  We dropped all the other DRI1 drivers for this
release, and I can't imagine anybody supporting DRI1 radeon classic in
a new release of Mesa.

Diff produced by treating kernel_mm as true, deleting the DRI1 paths
that produce kernel_mm false, and deleting code.
2011-10-28 11:23:09 -07:00
Eric Anholt
4a2f00889b r200: Drop the non-kernel-memory-manager and DRI1 code. 2011-10-28 11:22:26 -07:00
Eric Anholt
3996ed555e radeon: Unifdef RADEON_R300 and RADEON_R600. 2011-10-28 11:21:38 -07:00
Eric Anholt
b300d62617 docs: Update to note that r300 and r600 have been replaced. 2011-10-28 11:20:30 -07:00
Eric Anholt
de22b9018f r300c, r600c: Remove these DRI drivers.
They have been superseded by the gallium equivalents.

Acked-by: Michel Dänzer <michel@daenzer.net>
Acked-by: Alex Deucher <alexdeucher@gmail.com>
Acked-by: Dave Airlie <airlied@gmail.com>
Acked-by: Corbin Simpson <mostawesomedude@gmail.com>
2011-10-28 11:20:30 -07:00
Eric Anholt
2f4c7ebea6 mesa: Remove build infrastructure for r300c and r600c.
These drivers have been superseded by the gallium equivalents.
2011-10-28 11:19:56 -07:00
Eric Anholt
9171bfe5f6 radeon: Delete DRI1 screen init code and thus support for !kernel_mm.
It's past time, and it was going to get in the way of the renderbuffer
mapping refactor.  We dropped all the other DRI1 drivers for this
release, and I can't imagine anybody supporting DRI1 radeon classic in
a new release of Mesa.

Cleanup of the resulting dead code to follow.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
2011-10-28 11:19:14 -07:00
Eric Anholt
a34c28f1aa dri: Drop _dri_texformats that just obfuscate MESA_FORMAT names.
The remaining _dri_texformats are the ones that are variable depending
on the endianness of the system.
2011-10-28 11:19:14 -07:00
Eric Anholt
8d9c5167ac radeon: Use _mesa_get_format_base_format for winsys renderbuffer setup. 2011-10-28 11:19:14 -07:00
Eric Anholt
964c5195a2 radeon: Remove dead swrast renderbuffer setup code.
This was from the stub code in the initial commit of this file.
2011-10-28 11:19:14 -07:00
Kenneth Graunke
3b4d2eac60 glsl: Remove pointless uses of glsl_type::get_base_type().
These are effectively doing type->get_base_type()->base_type, which is
equivalent to type->base_type.  Just use that, as it's simpler.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2011-10-28 11:12:33 -07:00
Marek Olšák
1e1a7011ee r600g: don't flush before reading query results
Taken care of by the winsys.
2011-10-28 19:29:05 +02:00
Marek Olšák
e9b6f21a50 r600g: only maintain the list of active queries
And not all existing queries. The only reason we have that list is to be able
to suspend and resume the active ones.

This reduces looping over queries when suspending and resuming.
The queries no longer have to track some of their states.
2011-10-28 19:29:05 +02:00