Commit graph

11833 commits

Author SHA1 Message Date
Samuel Pitoiset
3b5ea90f1d radv: move the serialized NIR to radv_graphics_lib_pipeline
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22356>
2023-04-07 14:38:46 +00:00
Samuel Pitoiset
4672c6c43b radv: add a helper for retaining NIR shaders
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22356>
2023-04-07 14:38:46 +00:00
Qiang Yu
2c78cbbfe1 ac/llvm: remove some unused code replaced by nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22304>
2023-04-07 03:42:25 +00:00
Qiang Yu
a2cecbbc44 ac/nir/ngg: fix store shared alignment
For stream!=0, this align_mul=4 is not true. Not observe any
problem yet, just for correctness.

Fixes: 60ac5dda82 ("ac: Add NIR lowering for NGG GS.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22304>
2023-04-07 03:42:25 +00:00
Qiang Yu
c082cdacae ac/nir/ngg: fix gs culling vertex liveness check for odd vertices
If vertex does not complete a primitive, it should not set the odd
flag which miss lead liveness check when culling is enabled.

For example, if odd flag is set regardless of complete flag, when
culling is enabled, 3 vertices of a triangle's init prim flag:
  [0x00 0x04 0x01]

then after culling, this triangle has been culled, their prim flag:
  [0x00 0x04 0x00]

the second vertex is miss treat as live because its odd flag (code
check prim_flag!=0 for liveness).

Fixes: 1bdeb961bd ("ac/nir/ngg: add gs culling")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8725
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22304>
2023-04-07 03:42:25 +00:00
Marek Olšák
debc543904 amd/registers: use gfx9 packet definitions for gfx940
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:54 +00:00
Marek Olšák
ba74d10950 amd/registers: update gfx940.json
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:54 +00:00
Marek Olšák
e3bc800d5d amd/registers: fix the parser to include CP_COHER registers for gfx940
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:54 +00:00
Marek Olšák
e917db3b42 amd/registers: simplify integer division by 0x1000 in the parser
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:54 +00:00
Sonny Jiang
5639b23644 amd/common: Add gfx940 codec query support
Add support for GFX940 VCN query

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Sathishkumar S
d0477cbd07 radeonsi/vcn: add support for picture crop on JPEG 4.0.3
set the crop region and enable the feature if requested

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Sathishkumar S
74572084d8 radeonsi/vcn: use register versions for jpeg
update the register version and select appropriate registers during decoder create

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Sathishkumar S
9422627074 radeonsi/vcn: add register definitions for JPEG 4.0.3
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Ganesh Belgur Ramachandra
d75f0d6c26 ac/nir: fix CDNA image lowering for array textures
The x,y coordinates were not added.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Marek Olšák
eaf98b1422 ac/nir: implement image opcode emulation for CDNA, enable it in radeonsi
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Marek Olšák
96913bbf3e ac/surface: force linear image layout for chips not supporting image opcodes
Image opcodes will be emulated.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Marek Olšák
d3b03fedd8 amd: add initial code for gfx940
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Marek Olšák
46639eb056 amd: add gfx940 register definitions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
2023-04-06 15:00:53 +00:00
Chia-I Wu
a38de4c011 radv: disable tc_compatible_cmask on GFX9 in some cases
There seems to be issues when sample count > 2 on GFX9.  More precisely,
CTS has issues when sample count > 2.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21615>
2023-04-06 05:27:01 +00:00
Chia-I Wu
bd5fb29db6 radv: add RADV_FMASK_COMPRESSION_PARTIAL
RADV_FMASK_COMPRESSION_PARTIAL means the fmask is decompressed but not
expanded.  It is desired for sampling when the cmask is not
TC-compatible.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21615>
2023-04-06 05:27:01 +00:00
Chia-I Wu
3cf7ac4e9c radv: rework radv_layout_fmask_compressed
Rename radv_layout_fmask_compressed and make it return an enum.  We will
add partial compression (fmask decompressed and not expanded) in a
following commit.

Drop the check for VK_IMAGE_USAGE_STORAGE_BIT and
VK_IMAGE_USAGE_TRANSFER_DST_BIT.  When transitioning to
VK_IMAGE_LAYOUT_GENERAL, we should decompress and expand FMASK even when
those usage bits are not set.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21615>
2023-04-06 05:27:01 +00:00
Mike Blumenkrantz
a73c28fdce radv: fix leak of nir from retained shaders
if shaders are found in the app cache above, execution will goto done:
and the nir must still be freed

Fixes: 03d2bd6042 ("radv: ensure to retain NIR shaders for GPL libs found in the cache")

fixes #8786

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22317>
2023-04-06 01:53:28 +00:00
Timur Kristóf
7abd8c499b radv/amdgpu: Remove can_patch and chained submit code path.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Timur Kristóf
6aa518ea86 radv: Chain cmd buffers in queue code when possible, not in winsys.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Timur Kristóf
c876e99aa4 radv/amdgpu: Unchain CS array in queue code not in winsys.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Timur Kristóf
44f7e42665 radv/amdgpu: Walk chained CS objects for BO list.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Timur Kristóf
d7fc114788 radv/amdgpu: Remember which CS the current one is chained to.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Timur Kristóf
ba87ade6d0 radv/amdgpu: Extract radv_amdgpu_add_cs_to_bo_list function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Timur Kristóf
9d22125f05 radv/amdgpu: Expose CS chain and unchain on the winsys.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Timur Kristóf
aa9558698e radv/amdgpu: Extract CS chain and unchain functions.
Also add a comment that explains what chaining means
and add a check to make sure the HW IP type supports it.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22220>
2023-04-05 17:10:25 +00:00
Samuel Pitoiset
981f512037 radv: emit the PS epilog after the graphics pipeline
Otherwise, SPI_SHADER_PGM_RSRC1_PS is overwritten when the graphics
pipeline is emitted.

Fixes: 5c362cde33 ("radv: update PS num_vgprs in case of epilogs rather than overallocating VGPRs")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22310>
2023-04-05 14:48:00 +00:00
Samuel Pitoiset
9085c9d43e radv: fix VS prologs with GPL and static binding stride
When a graphics pipeline library is created with only the vertex input
state, the driver binds this state at pipeline bind time. Though the
vertex binding stride is not necessarily dynamic, in this case the
pipeline stride should be used.

This fixes GPU hangs with recent
dEQP-VK.pipeline.fast_linked_library.vertex_input.*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22285>
2023-04-05 07:18:37 +00:00
Daniel Schürmann
5c362cde33 radv: update PS num_vgprs in case of epilogs rather than overallocating VGPRs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22267>
2023-04-04 18:35:43 +00:00
Daniel Schürmann
4c7a5b1e51 aco: don't use shared VGPRs for shaders consisting of multiple binaries
When using multiple binaries, we don't know the required number of VGPRs beforehand,
which means we either have to over-allocate VGPRs or avoid shared VGPRs.
As bpermute is the only instructions needing shared VGPRs, we decide for the latter.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22267>
2023-04-04 18:35:43 +00:00
Daniel Schürmann
37df8edf34 aco/ra: adjust_max_used_regs() for fixed Operands
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22267>
2023-04-04 18:35:43 +00:00
Daniel Schürmann
8c68aba678 aco: split ps_epilog args before exporting them
This avoids some unnecessary copies from extracting from the input vectors.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22267>
2023-04-04 18:35:42 +00:00
Collabora's Gfx CI Team
91b06ea8b2 Uprev Piglit to 2391a83d1639a7ab7bbea02853b922878687b0e5
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22279>
2023-04-04 15:37:14 +00:00
Samuel Pitoiset
c5b7efa293 radv: enable shaders cache for libraries with GPL
This was the last missing feature for GPL. The main problem is that
the on-disk shaders cache size will increase a lot because we don't
deduplicate shaders but there is on-going work to improve that.

We also can't use the shaders cache for libraries created with the
RETAIN_LINK_TIME_OPTIMIZATION flag and module identifiers because we
don't know the SPIR-V and thus can't retain NIR shaders for linking.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
03d2bd6042 radv: ensure to retain NIR shaders for GPL libs found in the cache
Even if we are able to get the assembly from the shaders cache for
graphics pipeline libraries, we still need to retain NIR shaders in
case the LTO pipelines won't be find in the cache.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
5e62d8d1bd radv: add VkGraphicsPipelineLibraryFlag to the graphics pipeline key
This is to generate a different key for a library created with
FRAGMENT_SHADER_BIT and no FS (ie. it would generate a noop FS) and
a library created with FRAGMENT_OUTPUT_INTERFACE with no CB attachments.

Otherwise, the same key would be generated and this would corrupt
the cache.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
47c0820dc7 radv: remove dead code in radv_pipeline_get_nir()
We either import the NIR or the assembly, so this was never reached.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
a9529d9644 radv: allow to create/insert PS epilogs from/to the cache for libs
To cache PS epilogs compiled inside graphics pipeline libraries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
ba967e1a28 radv: rely on non-NULL binaries when inserting shaders to the cache
With GPL, a stage can be imported from a library which means that the
binary is NULL (it's freed right after compilation) but the shader is
non-NULL. To avoid crashing, rely on non-NULL binaries because this
implies that the shader is non-NULL as well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
1239fcab4d radv: only copy non-NULL shaders when loaded from the cache
With GPL, we don't necessarily load all stages from the same cache
entry and other stages might have been imported from libraries, so
don't overwrite them.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22264>
2023-04-04 14:47:39 +00:00
Samuel Pitoiset
9582c1e52a radv/ci: add one more flake
This one is randomly failing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22258>
2023-04-03 17:20:13 +00:00
Rhys Perry
f92994bb83 radv/gfx11: improve RT scratch allocation
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22232>
2023-04-03 16:35:17 +00:00
Timur Kristóf
50e9a8f7c2 radv: Use linear_dispatch info in GFX11 task/mesh draw packet.
This helps the CP (command processor) optimize mesh shader
dispatch when Y = Z = 1.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22222>
2023-04-03 15:36:02 +00:00
Timur Kristóf
836204da25 aco: Better phi lowering for merge block when else-side is const.
Add a new special case for binary merge blocks to boolean
phi lowerig. This special case benefits shaders that
have divergent branches with an empty else block,
for example all NGG culling shaders.

Fossil DB stats on Rembrandt (NGG culling enabled):

Totals from 61778 (45.79% of 134913) affected shaders:
SpillVGPRs: 2268 -> 2284 (+0.71%); split: -1.10%, +1.81%
CodeSize: 164317952 -> 162962772 (-0.82%); split: -0.83%, +0.00%
Instrs: 31249824 -> 30910686 (-1.09%); split: -1.09%, +0.00%
Latency: 154948555 -> 154781097 (-0.11%); split: -0.12%, +0.02%
InvThroughput: 30397664 -> 30370872 (-0.09%); split: -0.13%, +0.04%
VClause: 529239 -> 529229 (-0.00%); split: -0.00%, +0.00%
SClause: 783417 -> 783430 (+0.00%)
Copies: 2627570 -> 2595161 (-1.23%); split: -1.25%, +0.02%
Branches: 976506 -> 976508 (+0.00%); split: -0.00%, +0.00%

Fossil DB stats on GFX11 (NGG culling disabled):

Totals from 895 (0.66% of 134913) affected shaders:
SpillVGPRs: 2258 -> 2322 (+2.83%); split: -0.44%, +3.28%
CodeSize: 6229152 -> 6215880 (-0.21%); split: -0.37%, +0.16%
Scratch: 216576 -> 215808 (-0.35%); split: -0.47%, +0.12%
Instrs: 1202077 -> 1198396 (-0.31%); split: -0.43%, +0.13%
Latency: 15921336 -> 16000561 (+0.50%); split: -0.74%, +1.24%
InvThroughput: 7425765 -> 7474891 (+0.66%); split: -0.67%, +1.33%
VClause: 22976 -> 23008 (+0.14%); split: -0.03%, +0.17%
SClause: 38269 -> 38271 (+0.01%)
Copies: 123244 -> 123896 (+0.53%); split: -0.30%, +0.83%
Branches: 47570 -> 47574 (+0.01%); split: -0.00%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
2023-04-03 14:36:07 +00:00
Timur Kristóf
81b4806d64 aco: Call dominator_tree before lower_phis.
This just makes it possible to use the dominator
tree information during phi lowering.

No Fossil DB changes on GFX11.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
2023-04-03 14:36:07 +00:00
Timur Kristóf
0eb7c49c7f aco: Pop branch operands when targets are same in SSA elimination.
The branch instruction is no longer conditional when the targets are the
same, so the operand is not necessary and can be removed.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21493>
2023-04-03 14:36:07 +00:00