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radv: Use linear_dispatch info in GFX11 task/mesh draw packet.
This helps the CP (command processor) optimize mesh shader dispatch when Y = Z = 1. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22222>
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3 changed files with 11 additions and 1 deletions
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@ -8167,11 +8167,14 @@ radv_cs_emit_dispatch_taskmesh_gfx_packet(struct radv_cmd_buffer *cmd_buffer)
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uint32_t ring_entry_reg = ((base_reg + ring_entry_loc->sgpr_idx * 4) - SI_SH_REG_OFFSET) >> 2;
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uint32_t xyz_dim_en = 1; /* TODO: disable XYZ_DIM when unneeded */
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uint32_t mode1_en = 1; /* legacy fast launch mode */
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uint32_t linear_dispatch_en =
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cmd_buffer->state.shaders[MESA_SHADER_TASK]->info.cs.linear_taskmesh_dispatch;
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radeon_emit(cs, PKT3(PKT3_DISPATCH_TASKMESH_GFX, 2, predicating));
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radeon_emit(cs, S_4D0_RING_ENTRY_REG(ring_entry_reg) | S_4D0_XYZ_DIM_REG(xyz_dim_reg));
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if (cmd_buffer->device->physical_device->rad_info.gfx_level >= GFX11)
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radeon_emit(cs, S_4D1_XYZ_DIM_ENABLE(xyz_dim_en) | S_4D1_MODE1_ENABLE(mode1_en));
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radeon_emit(cs, S_4D1_XYZ_DIM_ENABLE(xyz_dim_en) | S_4D1_MODE1_ENABLE(mode1_en) |
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S_4D1_LINEAR_DISPATCH_ENABLE(linear_dispatch_en));
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else
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radeon_emit(cs, 0);
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radeon_emit(cs, V_0287F0_DI_SRC_SEL_AUTO_INDEX);
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@ -373,6 +373,7 @@ struct radv_shader_info {
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bool uses_dynamic_rt_callable_stack;
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bool uses_rt;
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bool uses_full_subgroups;
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bool linear_taskmesh_dispatch;
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bool regalloc_hang_bug;
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} cs;
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@ -721,6 +721,12 @@ gather_shader_info_task(const nir_shader *nir, struct radv_shader_info *info)
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/* Needed for storing draw ready only on the 1st thread. */
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info->cs.uses_local_invocation_idx = true;
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/* Task->Mesh dispatch is linear when Y = Z = 1.
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* GFX11 CP can optimize this case with a field in its draw packets.
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*/
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info->cs.linear_taskmesh_dispatch = nir->info.mesh.ts_mesh_dispatch_dimensions[1] == 1 &&
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nir->info.mesh.ts_mesh_dispatch_dimensions[2] == 1;
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}
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static uint32_t
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