Change brw_untyped_atomic() and brw_untyped_surface_read() to take the
surface index as a register instead of a constant and to use
brw_send_indirect_message() to emit the indirect variant of send with
a dynamically calculated message descriptor. This will be required to
support variable indexing of image arrays for
ARB_shader_image_load_store.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Tested on Ivybridge, Haswell and Broadwell.
v2:
* Use SET_FIELD. (Ken)
* Use simd_size / 16 to support SIMD8/16/32. Ken suggested
that we might be able to do it arithmetically rather than just
supporting SIMD8 and SIMD16 with a conditional.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
brw_emit_gpgpu_walker will be implemented in a subsequent patch.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
v2:
* Don't bother checking for 'gen > 5' (krh)
* Populate sampler data in key (krh)
v3:
* Drop no8 support, and simplify code in several places (Ken)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
For ES, we set the max counts based on SIMD8, which is currently
accurate.
For desktop GL, we set the max counts based on SIMD16, which can fail
in some cases where a SIMD16 program is not currently supported.
Therefore, this value is not currently accurate, but will work fine in
many cases, and lets us run more test cases. Eventually we want to
always be able to generate a SIMD16 program.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Add values for gen7 & gen8. These are the number threads in a
subslice.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
v2:
* Clean out some unneeded code copied from run_fs (krh)
* Always use NIR
* Split shader time out into a separate commit
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
v2:
* Don't rely on brw_eu* to generate the send instruction. We now
generate the send here, and drop the "i965/cs: Add support for the
SEND message that terminates a CS thread" brw_eu* patch.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
v2:
* Do more work at the visitor level. g0 is loaded and sent to the
generator now.
v3:
* Use Ken's comment explaining g0 usage
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
At the moment it's not wired up to anything. Later patches will hook
it up to the compute shader back-end.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
