Dan Nicholson
2dc85e8078
Fix the library name in glw.pc
...
Fix a copy and paste error s/GLU/GLw/ in glw.pc.
2007-12-03 11:57:14 -08:00
Brian
ce98779571
glut doesn't need -lXt
2007-12-03 12:00:28 -07:00
Brian
b1416c2137
added missing quote char
2007-12-03 12:00:28 -07:00
Michel Dänzer
2af613e0b8
i915: Fix up state changes for i8xx.
2007-12-03 09:28:49 +01:00
Eric Anholt
556cf9abff
[intel] Move batch bo_unmap from TTM code to shared, and add more asserts.
2007-11-30 18:17:12 -08:00
Eric Anholt
d388cad746
[intel] Add failure path printfs to relocation code and some comments.
2007-11-30 18:12:41 -08:00
Eric Anholt
700468b8bc
[intel] Simplify TTM relocation code by passing around bufmgr struct.
2007-11-30 18:08:17 -08:00
Eric Anholt
ddd92ee9a1
[intel] Fix the type and naming of the flags/mask args to TTM functions.
...
The uint64_t flags (as defined by drm.h) were being used as unsigned ints in
many places.
2007-11-30 18:06:32 -08:00
Eric Anholt
6f8dee03aa
[intel] intel_bufmgr_ttm style sanity
2007-11-30 17:28:48 -08:00
Brian
b0b882b666
fix-build: remove ctx->_Facing assignment
2007-11-30 15:52:27 -07:00
Brian
fcd7c37fd3
fix broken two-sided stencil
2007-11-30 13:01:57 -07:00
Brian
44c8dac0af
better front-plane clip test
2007-11-30 09:08:58 -07:00
joukj
a11b6f025c
Updates of some OpenVMS makefiles.
2007-11-30 13:16:05 +01:00
joukj
86f3135fbd
Merge branch 'master' of git+ssh://joukj@git.freedesktop.org/git/mesa/mesa
2007-11-30 11:12:41 +01:00
Xiang, Haihao
d2540e6d4b
i965: if source depth to render target is set,
...
it should be handled in fb_write.
2007-11-30 12:04:04 +08:00
Xiang, Haihao
6bc1d38567
i965: use uncompressed instruction to ensure only
...
Pixel Mask Copy is modified as the pixel shader thread
turns off pixels based on kill instructions.
2007-11-30 11:50:08 +08:00
Eric Anholt
1df7a82688
[i915] Make INTEL_DEBUG=bufmgr actually do things for bufmgr_fake.
2007-11-29 13:00:34 -08:00
Brian
61fbc81657
New ctx->Driver.Map/UnmapTexture() functions for accessing textures from t_vb_program.c
2007-11-29 08:13:16 -07:00
Brian
a2ab143b75
cleanups, comments
2007-11-29 08:13:16 -07:00
Brian
a7e1b4456a
Move _mesa_load_tracked_matrices() from TNL module to prog_statevars.c
2007-11-29 08:13:16 -07:00
Michel Dänzer
dc88a96631
r200: Fix texture format regression on big endian systems.
...
See https://bugs.freedesktop.org/show_bug.cgi?id=13324 .
Also use tx_table_be for VALID_FORMAT, in case r200SetTexImages ever gets
called for MESA_FORMAT_RGB888.
2007-11-28 10:20:04 +01:00
Xiang, Haihao
d8fcb504a4
i965: update RefCount when using Vertex/Fragment program.
...
It makes quake4-demo works well on 965.
2007-11-28 09:46:43 +08:00
WuNian
16099c15f5
remove drawable from hash table when window is deleted (see bug 13091)
2007-11-27 18:22:42 -07:00
Delle
5c64e6885d
use DEFAULT_SOFTWARE_DEPTH_BITS
2007-11-27 18:18:25 -07:00
Brian
27028fcf74
minor additions to avoid FAQs
2007-11-27 10:31:55 -07:00
Brian
5ef3a2c06d
document GLSL float f/F suffix bug
2007-11-27 10:31:55 -07:00
Brian
4fe3bf2d77
set fp->UsesKill when emitting OPCODE_KIL
2007-11-27 10:31:55 -07:00
Brian
92e4090b4c
add a few more logicop modes, simplify code
2007-11-27 10:31:55 -07:00
Brian
74cd0b459f
improve 24-bit Z to 32-bit Z conversion
2007-11-27 10:31:55 -07:00
Xiang, Haihao
46e03d584a
i965: The jump instruction count is added
...
to IP pre-increment, and should point to
the first instruction after the do instruction
of the do-while block of code
2007-11-27 09:45:32 +08:00
Keith Whitwell
a8fee3a498
i915: Catch cases where not all state is emitted for a new batchbuffer.
...
This could lead to incorrect rendering or even lockups.
2007-11-26 17:49:29 +01:00
Michel Dänzer
63e6bfe8db
i915: Some additional blit fixes and assertions.
2007-11-26 17:35:35 +01:00
Michel Dänzer
42108629e8
libGL: Make sure a valid value is returned for GLX_BIND_TO_MIPMAP_TEXTURE_EXT.
...
If the server didn't send a value, assume it's not supported.
A more generic solution might be better for this kind of problem, but an
attempt for this failed (see https://bugs.freedesktop.org/show_bug.cgi?id=9264 )
and this allows compiz to work with drivers that support
GL_EXT_framebuffer_object.
2007-11-25 14:20:36 +01:00
Michel Dänzer
7dd5ced962
intel: Fix relative symlinks.
2007-11-25 14:17:02 +01:00
Brian
be1fa5b3d7
better test of point attenuation
2007-11-23 16:19:25 -07:00
Brian
88b067cb04
#define GL_GLEXT_PROTOTYPES to silence warning
2007-11-23 14:35:46 -07:00
Brian
999b55663a
Consolidate texture fetch code and use partial derivatives when possible.
2007-11-23 12:01:57 -07:00
Brian
ba16243884
Fix parsing of gl_FrontLightModelProduct.sceneColor, don't segfault on variable array indexes.
2007-11-23 10:25:48 -07:00
Brian
c14d969a69
need to check border width in sample_linear_2d() - fixes failed assertion in texwrap.c test
2007-11-23 09:14:39 -07:00
Brian
0fd679a190
Consolidate point size computation, clamping in get_size().
...
Also, apply user-defined clamp limits to point size even when not using
attentuation or program-computed size.
2007-11-22 09:34:38 -07:00
Brian
ccb1c9df00
Print point/line size range limits
2007-11-22 09:34:38 -07:00
Roland Scheidegger
3d51c79001
fix z buffer read/write issue with rv100-like chips and old ddx
2007-11-22 02:49:15 +01:00
Eric Anholt
93c98a4669
[965] Replace 965 texture format code with common code.
...
The only functional difference should be that 965 now gets the optimization
where textures default to 16bpp when the screen is 16bpp.
2007-11-20 11:30:12 -08:00
Eric Anholt
e962997429
[965] Remove dead exec vfmt code which was replaced by generic vbo code.
2007-11-20 11:30:10 -08:00
Brian
827e72de75
clamp lambda to Min/MaxLod
2007-11-20 08:24:46 -07:00
Eric Anholt
3821d15e06
[965] Add INTEL_DEBUG=fall debugging output.
2007-11-19 15:29:31 -08:00
Eric Anholt
27674c4135
[965] Convert DBG macro to use FILE_DEBUG_FLAG like i915.
2007-11-19 15:28:26 -08:00
Brian
87373e3072
fix some texture format assertions, etc
2007-11-19 10:37:54 -07:00
Brian
22a374fc3f
fix out-of-bounds array index (ix=-1)
2007-11-19 09:55:47 -07:00
Eric Anholt
f00a64999c
[intel] Add 965 support to shared intel_blit.c
...
This requires that regions grow a marker of whether they are tiled or not,
because fence (surface) registers are ignored by the 965 2D engine.
2007-11-16 17:29:30 -08:00
