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Author SHA1 Message Date
Marek Olšák
2cf46f2e3d ac/gpu_info: replace num_good_cu_per_sh with min/max_good_cu_per_sa 
Perf counters use the new max number.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5184>
 2020-05-26 06:00:54 -04:00
Bas Nieuwenhuizen
be784cc77b radv: Implement vkGetSwapchainGrallocUsage2ANDROID. 
This was implemented in version 6 of the VK_ANDROID_native_buffer
extension and we only implement version 5. However, the Android
Vulkan loader only checks whether vkGetInstanceProcAddr for the
function is not NULL.

This all went wrong when we switched to the layer code from ANV.
Because the function may now be different per device, it adds fallback
functions that dispatch to the dispatch table. So if we didn't implement
the function we still returned a pointer to the dispatch function,
which made the Android Vulkan loader believe it was supported.

Dispatch functions:
d555794f30/src/amd/vulkan/radv_entrypoints_gen.py (L328)

Fixes: d555794f30 "radv: update entrypoints generation from ANV"
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2936
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5198>
 2020-05-25 15:34:44 +00:00
Bas Nieuwenhuizen
a51ab5f956 radv: Do not close fd -1 when NULL-winsys creation fails. 
Fixes: cd6ec2b1ab "radv: implement a dummy winsys for creating devices without AMDGPU"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5181>
 2020-05-25 11:12:07 +00:00
Bas Nieuwenhuizen
cd0c5b64cc radv: Remove dead code. 
pool is always non-NULL, and is also accessed before this check
in the function, so remove the pool = NULL case.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5181>
 2020-05-25 11:12:07 +00:00
Bas Nieuwenhuizen
cd61f5234d radv: Handle failing to create .cache dir. 
Fixes: f4e499ec79 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5181>
 2020-05-25 11:12:07 +00:00
Bas Nieuwenhuizen
906435fb0e radv/winsys: Remove extra sizeof multiply. 
The pointer is already uint64_t*, so the sizeof was too much ...

Fixes: eeff7e1154 "radv: Add userspace fence buffer per context."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5181>
 2020-05-25 11:12:07 +00:00
Samuel Pitoiset
b3c0f82841 radv: advertise VK_AMD_texture_gather_bias_lod 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5147>
 2020-05-25 08:51:10 +02:00
Samuel Pitoiset
2e265b94a2 radv: add support for querying which formats support texture gather LOD 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5147>
 2020-05-25 08:51:10 +02:00
Samuel Pitoiset
94570e87bd aco: add support for bias/lod with texture gather 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5147>
 2020-05-25 08:51:10 +02:00
Samuel Pitoiset
e99c818cf0 ac/nir: add support for bias/lod with texture gather 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5147>
 2020-05-25 08:51:10 +02:00
Samuel Pitoiset
5bc18b79a4 radv: advertise shaderDeviceClock on GFX8+ 
Unsupported on GFX6-GFX7.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5117>
 2020-05-24 20:37:59 +02:00
Samuel Pitoiset
14292310d9 ac/nir: implement nir_intrinsic_shader_clock with device scope 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5117>
 2020-05-24 20:37:58 +02:00
Samuel Pitoiset
b034f6cf2a ac/nir: fix shader clock with subgroup scope 
The compiler should emit s_memtime instead of s_memrealtime for
the subgroup scope. I don't know why this LLVM 9 checks was for
but LLVM 8 also has this amdgcn intrinsic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5117>
 2020-05-24 20:37:54 +02:00
Samuel Pitoiset
cecd4aad46 aco: implement nir_intrinsic_shader_clock with device scope 
Use s_memrealtime instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5117>
 2020-05-24 20:37:52 +02:00
Samuel Pitoiset
769bf48d16 radv: remove useless assignment in build_streamout_vertex() 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3025
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5158>
 2020-05-24 18:28:07 +00:00
Samuel Pitoiset
e1fa60838e radv: cleanup physical device features 
Similar to the physical device properties.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5116>
 2020-05-24 20:06:03 +02:00
Samuel Pitoiset
198e5e2e9e radv: do not return from radv_GetPhysicalDeviceFeatures2() 
This function returns void.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5116>
 2020-05-24 20:06:02 +02:00
Marek Olšák
3509d3bd53 ac: update register and packet definitions for preemption 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
 2020-05-23 03:45:07 -04:00
Marek Olšák
8db739880a ac/surface: don't compute single-sample CMASK if it's unaligned 
Displayable DCC can cause this and fail the assertion later.

Fixes: cf61f635ff

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
 2020-05-23 03:44:44 -04:00
Marek Olšák
21504eab78 ac/gpu_info: compute the best safe IB alignment 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5095>
 2020-05-23 03:44:44 -04:00
Pierre-Eric Pelloux-Prayer
dddd91eef3 amd/addrlib: fix forgotten char -> enum conversions 
clang warning:
  result of comparison of constant 115 with expression of type
  'const enum Dim' is always false

Fixes: e3e704c7e7 ("amd/addrlib: Use enum instead of sparse chars to identify dimensions")
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5119>
 2020-05-22 09:11:47 +02:00
Samuel Pitoiset
2d4493ee11 aco: sign-extend the input and identity for 8-bit subgroup operations 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
 2020-05-21 15:06:48 +00:00
Samuel Pitoiset
c76595aec2 aco: use a temporary SGPR for 8-bit/16-bit literal reduction identities 
Otherwise, the compiler overwrites s0 which contains the exec mask.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
 2020-05-21 15:06:48 +00:00
Samuel Pitoiset
b3c87c52ea aco: implement 8-bit/16-bit nir_intrinsic_quad_* 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
 2020-05-21 15:06:48 +00:00
Samuel Pitoiset
dfa62d97a0 aco: implement 8-bit/16-bit nir_intrinsic_{shuffle,_read_invocation} 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
 2020-05-21 15:06:48 +00:00
Samuel Pitoiset
f03e56eaf0 aco: implement 8-bit/16-bit nir_intrinsic_read_first_invocation 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
 2020-05-21 15:06:48 +00:00
Samuel Pitoiset
af7e2c6133 aco: validate 8-bit/16-bit VGPR operands for readfirstlane/readlane/writelane 
I would expect it to just work as intended and other solutions,
like v_and_b32 to make sure the upper bits are 0, might have some
overhead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
 2020-05-21 15:06:48 +00:00
Samuel Pitoiset
86e2b03e3f aco: implement 8-bit/16-bit reductions 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
 2020-05-21 15:06:48 +00:00
Samuel Pitoiset
cc79945b21 aco: declare 8-bit/16-bit reduce operations 
The 8-bit float variants are only for consistency but are unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
 2020-05-21 15:06:48 +00:00
Rhys Perry
40ed7fcc0b aco: fix typo in insert_waitcnt's kill() 
No shader-db changes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3004
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5126>
 2020-05-21 13:01:41 +00:00
Daniel Schürmann
51f4b22fee aco: don't allow unaligned subdword accesses on GFX6/7 
There are no SDWA instructions which means that only
full registers can be accessed.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5070>
 2020-05-21 12:07:40 +00:00
Daniel Schürmann
ae390755fe aco: fix corner case in register allocation 
We mark dead operands in the register file when searching for
a register for a definition. Only do so, if this space has not
yet been taken by a different definition.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5070>
 2020-05-21 12:07:40 +00:00
Daniel Schürmann
acec00eae0 aco: don't move create_vector subdword operands to unsupported register offsets 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5070>
 2020-05-21 12:07:40 +00:00
Daniel Schürmann
5201985332 aco: restrict copying of create_vector operands to GFX9+ 
This improves code size for Polaris and earlier due to less register swapping

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5070>
 2020-05-21 12:07:40 +00:00
Samuel Pitoiset
a3045cbc97 radv/winsys: remove useless free in radv_amdgpu_create_bo_list() 
free(NULL) is fine but let's remove it.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3008
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5131>
 2020-05-21 08:09:18 +00:00
Samuel Pitoiset
57a4837f6b radv: fix duplicated expression in ac_setup_rings() 
Probably a search&replace mistake when that common struct was
introduced.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3006
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5130>
 2020-05-21 07:51:55 +00:00
Samuel Pitoiset
ef042ae7c3 radv: fix missing break in radv_GetPhysicalDeviceFeatures2() 
Wow, missed that one.

Fixes: 57e796a12a - ("radv: Implement VK_EXT_custom_border_color")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5128>
 2020-05-21 07:36:32 +00:00
Samuel Pitoiset
1ad9a8a884 aco: fix missing break in label_instruction() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5129>
 2020-05-21 09:00:02 +02:00
Bas Nieuwenhuizen
4c62dbb145 radv/winsys: Finish mapping for sparse residency. 
This adds the part that disables pagefaults when unbacked sparse
textures get accessed.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5079>
 2020-05-19 19:17:35 +00:00
Bas Nieuwenhuizen
f8314291b3 radv: Expose VK_EXT_pipeline_creation_cache_control. 
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2972
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
 2020-05-19 18:40:04 +00:00
Bas Nieuwenhuizen
32e9283145 radv: Support VK_PIPELINE_CACHE_CREATE_EXTERNALLY_SYNCHRONIZED_BIT_EXT. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
 2020-05-19 18:40:04 +00:00
Bas Nieuwenhuizen
e11f077bb2 radv: Support VK_PIPELINE_CREATE_EARLY_RETURN_ON_FAILURE_BIT_EXT. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
 2020-05-19 18:40:04 +00:00
Bas Nieuwenhuizen
dde998685e radv: Support VK_PIPELINE_COMPILE_REQUIRED_EXT. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5072>
 2020-05-19 18:40:04 +00:00
Samuel Pitoiset
0fb3dc8d10 radv/aco: enable storageInputOutput16 on GFX9+ 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
 2020-05-19 17:05:05 +00:00
Samuel Pitoiset
cc1a1da8ab aco: fix off-by-one error with 16-bit MTBUF opcodes on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
 2020-05-19 17:05:05 +00:00
Samuel Pitoiset
1647e098e9 aco: implement 16-bit interp 
For 16-bit bank LDS (ie. Kabini/Stoney) we need a slightly different
path. It's completely untested though because I don't have these
chips but according to vkpipeline-db the generated assembly seems fine.

Note that 16-bit I/O is currently only exposed on GFX9+ for both
compiler backends.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
 2020-05-19 17:05:05 +00:00
Samuel Pitoiset
bbbb4057e6 aco: emit v_interp_*_f16 instructions as VOP3 instead of VINTRP 
This adds a separate emission path in the assembly for the 16-bit
interp instructions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
 2020-05-19 17:05:05 +00:00
Samuel Pitoiset
34f2c4dc6a aco: validate v_interp_*_f16 as VOP3 instructions instead of VINTRP 
16-bit interp instructions are considered VINTRP by the compiler
but they are emitted as VOP3 by the assembler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
 2020-05-19 17:05:05 +00:00
Samuel Pitoiset
3fba5bb9cc aco: implement 16-bit vertex fetches with tbuffer_load_format_d16_* 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
 2020-05-19 17:05:05 +00:00
Samuel Pitoiset
7ffd394605 aco: implement 8-bit/16-bit mov's with p_create_vector 
ACO doesn't lower 8-bit/16-bit mov's in NIR.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2997
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
 2020-05-19 17:05:05 +00:00