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radv: Implement VK_EXT_custom_border_color
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4877>
This commit is contained in:
Joshua Ashton
Marge Bot
parent
9e3c6a7ba7
commit
57e796a12a
5 changed files with 160 additions and 2 deletions
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@ -1,2 +1,3 @@
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GL_ARB_compute_variable_group_size on Iris.
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VK_EXT_private_data on ANV and RADV.
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VK_EXT_custom_border_color on RADV.
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@ -1294,6 +1294,12 @@ void radv_GetPhysicalDeviceFeatures2(
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features->robustBufferAccess2 = true;
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features->robustImageAccess2 = true;
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features->nullDescriptor = true;
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}
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case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CUSTOM_BORDER_COLOR_FEATURES_EXT: {
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VkPhysicalDeviceCustomBorderColorFeaturesEXT *features =
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(VkPhysicalDeviceCustomBorderColorFeaturesEXT *)ext;
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features->customBorderColors = true;
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features->customBorderColorWithoutFormat = true;
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break;
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}
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case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PRIVATE_DATA_FEATURES_EXT: {
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@ -1938,6 +1944,11 @@ void radv_GetPhysicalDeviceProperties2(
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(VkPhysicalDeviceRobustness2PropertiesEXT *)ext;
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properties->robustStorageBufferAccessSizeAlignment = 4;
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properties->robustUniformBufferAccessSizeAlignment = 4;
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}
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case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CUSTOM_BORDER_COLOR_PROPERTIES_EXT: {
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VkPhysicalDeviceCustomBorderColorPropertiesEXT *props =
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(VkPhysicalDeviceCustomBorderColorPropertiesEXT *)ext;
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props->maxCustomBorderColorSamplers = RADV_BORDER_COLOR_COUNT;
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break;
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}
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default:
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@ -2936,6 +2947,37 @@ check_physical_device_features(VkPhysicalDevice physicalDevice,
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return VK_SUCCESS;
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}
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static VkResult radv_device_init_border_color(struct radv_device *device)
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{
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device->border_color_data.bo =
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device->ws->buffer_create(device->ws,
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RADV_BORDER_COLOR_BUFFER_SIZE,
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4096,
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RADEON_DOMAIN_VRAM,
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RADEON_FLAG_CPU_ACCESS |
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RADEON_FLAG_READ_ONLY |
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RADEON_FLAG_NO_INTERPROCESS_SHARING,
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RADV_BO_PRIORITY_SHADER);
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if (device->border_color_data.bo == NULL)
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return vk_error(device->physical_device->instance, VK_ERROR_OUT_OF_DEVICE_MEMORY);
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device->border_color_data.colors_gpu_ptr =
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device->ws->buffer_map(device->border_color_data.bo);
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pthread_mutex_init(&device->border_color_data.mutex, NULL);
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return VK_SUCCESS;
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}
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static void radv_device_finish_border_color(struct radv_device *device)
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{
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if (device->border_color_data.bo) {
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device->ws->buffer_destroy(device->border_color_data.bo);
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pthread_mutex_destroy(&device->border_color_data.mutex);
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}
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}
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VkResult radv_CreateDevice(
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VkPhysicalDevice physicalDevice,
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const VkDeviceCreateInfo* pCreateInfo,
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@ -2949,6 +2991,7 @@ VkResult radv_CreateDevice(
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bool keep_shader_info = false;
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bool robust_buffer_access = false;
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bool overallocation_disallowed = false;
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bool custom_border_colors = false;
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/* Check enabled features */
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if (pCreateInfo->pEnabledFeatures) {
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@ -2980,6 +3023,11 @@ VkResult radv_CreateDevice(
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overallocation_disallowed = true;
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break;
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}
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case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CUSTOM_BORDER_COLOR_FEATURES_EXT: {
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const VkPhysicalDeviceCustomBorderColorFeaturesEXT *border_color_features = (const void *)ext;
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custom_border_colors = border_color_features->customBorderColors;
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break;
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}
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default:
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break;
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}
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@ -3150,6 +3198,13 @@ VkResult radv_CreateDevice(
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radv_device_init_msaa(device);
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/* If the border color extension is enabled, let's create the buffer we need. */
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if (custom_border_colors) {
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result = radv_device_init_border_color(device);
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if (result != VK_SUCCESS)
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goto fail;
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}
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for (int family = 0; family < RADV_MAX_QUEUE_FAMILIES; ++family) {
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device->empty_cs[family] = device->ws->cs_create(device->ws, family);
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switch (family) {
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@ -3221,6 +3276,8 @@ fail:
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if (device->gfx_init)
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device->ws->buffer_destroy(device->gfx_init);
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radv_device_finish_border_color(device);
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for (unsigned i = 0; i < RADV_MAX_QUEUE_FAMILIES; i++) {
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for (unsigned q = 0; q < device->queue_count[i]; q++)
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radv_queue_finish(&device->queues[i][q]);
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@ -3247,6 +3304,8 @@ void radv_DestroyDevice(
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if (device->gfx_init)
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device->ws->buffer_destroy(device->gfx_init);
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radv_device_finish_border_color(device);
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for (unsigned i = 0; i < RADV_MAX_QUEUE_FAMILIES; i++) {
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for (unsigned q = 0; q < device->queue_count[i]; q++)
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radv_queue_finish(&device->queues[i][q]);
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@ -7094,6 +7153,9 @@ radv_tex_bordercolor(VkBorderColor bcolor)
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case VK_BORDER_COLOR_FLOAT_OPAQUE_WHITE:
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case VK_BORDER_COLOR_INT_OPAQUE_WHITE:
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return V_008F3C_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE;
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case VK_BORDER_COLOR_FLOAT_CUSTOM_EXT:
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case VK_BORDER_COLOR_INT_CUSTOM_EXT:
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return V_008F3C_SQ_TEX_BORDER_COLOR_REGISTER;
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default:
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break;
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}
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@ -7149,6 +7211,40 @@ static inline int S_FIXED(float value, unsigned frac_bits)
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return value * (1 << frac_bits);
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}
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static uint32_t radv_register_border_color(struct radv_device *device,
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VkClearColorValue value)
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{
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uint32_t slot;
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pthread_mutex_lock(&device->border_color_data.mutex);
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for (slot = 0; slot < RADV_BORDER_COLOR_COUNT; slot++) {
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if (!device->border_color_data.used[slot]) {
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/* Copy to the GPU wrt endian-ness. */
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util_memcpy_cpu_to_le32(&device->border_color_data.colors_gpu_ptr[slot],
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&value,
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sizeof(VkClearColorValue));
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device->border_color_data.used[slot] = true;
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break;
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}
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}
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pthread_mutex_unlock(&device->border_color_data.mutex);
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return slot;
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}
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static void radv_unregister_border_color(struct radv_device *device,
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uint32_t slot)
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{
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pthread_mutex_lock(&device->border_color_data.mutex);
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device->border_color_data.used[slot] = false;
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pthread_mutex_unlock(&device->border_color_data.mutex);
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}
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static void
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radv_init_sampler(struct radv_device *device,
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struct radv_sampler *sampler,
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@ -7161,6 +7257,11 @@ radv_init_sampler(struct radv_device *device,
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unsigned filter_mode = V_008F30_SQ_IMG_FILTER_MODE_BLEND;
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unsigned depth_compare_func = V_008F30_SQ_TEX_DEPTH_COMPARE_NEVER;
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bool trunc_coord = pCreateInfo->minFilter == VK_FILTER_NEAREST && pCreateInfo->magFilter == VK_FILTER_NEAREST;
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bool uses_border_color = pCreateInfo->addressModeU == VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER ||
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pCreateInfo->addressModeV == VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER ||
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pCreateInfo->addressModeW == VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER;
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VkBorderColor border_color = uses_border_color ? pCreateInfo->borderColor : VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK;
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uint32_t border_color_ptr;
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const struct VkSamplerReductionModeCreateInfo *sampler_reduction =
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vk_find_struct_const(pCreateInfo->pNext,
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@ -7171,6 +7272,30 @@ radv_init_sampler(struct radv_device *device,
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if (pCreateInfo->compareEnable)
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depth_compare_func = radv_tex_compare(pCreateInfo->compareOp);
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sampler->border_color_slot = RADV_BORDER_COLOR_COUNT;
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if (border_color == VK_BORDER_COLOR_FLOAT_CUSTOM_EXT || border_color == VK_BORDER_COLOR_INT_CUSTOM_EXT) {
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const VkSamplerCustomBorderColorCreateInfoEXT *custom_border_color =
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vk_find_struct_const(pCreateInfo->pNext,
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SAMPLER_CUSTOM_BORDER_COLOR_CREATE_INFO_EXT);
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assert(custom_border_color);
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sampler->border_color_slot =
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radv_register_border_color(device, custom_border_color->customBorderColor);
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/* Did we fail to find a slot? */
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if (sampler->border_color_slot == RADV_BORDER_COLOR_COUNT) {
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fprintf(stderr, "WARNING: no free border color slots, defaulting to TRANS_BLACK.\n");
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border_color = VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK;
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}
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}
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/* If we don't have a custom color, set the ptr to 0 */
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border_color_ptr = sampler->border_color_slot != RADV_BORDER_COLOR_COUNT
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? sampler->border_color_slot
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: 0;
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sampler->state[0] = (S_008F30_CLAMP_X(radv_tex_wrap(pCreateInfo->addressModeU)) |
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S_008F30_CLAMP_Y(radv_tex_wrap(pCreateInfo->addressModeV)) |
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S_008F30_CLAMP_Z(radv_tex_wrap(pCreateInfo->addressModeW)) |
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@ -7191,8 +7316,8 @@ radv_init_sampler(struct radv_device *device,
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S_008F38_XY_MIN_FILTER(radv_tex_filter(pCreateInfo->minFilter, max_aniso)) |
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S_008F38_MIP_FILTER(radv_tex_mipfilter(pCreateInfo->mipmapMode)) |
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S_008F38_MIP_POINT_PRECLAMP(0));
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sampler->state[3] = (S_008F3C_BORDER_COLOR_PTR(0) |
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S_008F3C_BORDER_COLOR_TYPE(radv_tex_bordercolor(pCreateInfo->borderColor)));
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sampler->state[3] = (S_008F3C_BORDER_COLOR_PTR(border_color_ptr) |
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S_008F3C_BORDER_COLOR_TYPE(radv_tex_bordercolor(border_color)));
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if (device->physical_device->rad_info.chip_class >= GFX10) {
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sampler->state[2] |= S_008F38_ANISO_OVERRIDE_GFX10(1);
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@ -7245,6 +7370,10 @@ void radv_DestroySampler(
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if (!sampler)
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return;
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if (sampler->border_color_slot != RADV_BORDER_COLOR_COUNT)
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radv_unregister_border_color(device, sampler->border_color_slot);
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vk_object_base_finish(&sampler->base);
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vk_free2(&device->vk.alloc, pAllocator, sampler);
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}
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@ -122,6 +122,7 @@ EXTENSIONS = [
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Extension('VK_EXT_calibrated_timestamps', 1, True),
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Extension('VK_EXT_conditional_rendering', 1, True),
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Extension('VK_EXT_conservative_rasterization', 1, 'device->rad_info.chip_class >= GFX9'),
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Extension('VK_EXT_custom_border_color', 12, True),
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Extension('VK_EXT_display_surface_counter', 1, 'VK_USE_PLATFORM_DISPLAY_KHR'),
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Extension('VK_EXT_display_control', 1, 'VK_USE_PLATFORM_DISPLAY_KHR'),
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Extension('VK_EXT_debug_report', 9, True),
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@ -781,6 +781,20 @@ struct radv_secure_compile_state {
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char *uid;
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};
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#define RADV_BORDER_COLOR_COUNT 4096
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#define RADV_BORDER_COLOR_BUFFER_SIZE (sizeof(VkClearColorValue) * RADV_BORDER_COLOR_COUNT)
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struct radv_device_border_color_data {
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bool used[RADV_BORDER_COLOR_COUNT];
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struct radeon_winsys_bo *bo;
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VkClearColorValue *colors_gpu_ptr;
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/* Mutex is required to guarantee vkCreateSampler thread safety
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* given that we are writing to a buffer and checking color occupation */
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pthread_mutex_t mutex;
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};
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struct radv_device {
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struct vk_device vk;
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@ -851,6 +865,8 @@ struct radv_device {
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/* Whether anisotropy is forced with RADV_TEX_ANISO (-1 is disabled). */
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int force_aniso;
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struct radv_device_border_color_data border_color_data;
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struct radv_secure_compile_state *sc_state;
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/* Condition variable for legacy timelines, to notify waiters when a
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@ -2162,6 +2178,7 @@ struct radv_sampler {
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struct vk_object_base base;
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uint32_t state[4];
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struct radv_sampler_ycbcr_conversion *ycbcr_sampler;
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uint32_t border_color_slot;
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};
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struct radv_framebuffer {
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@ -456,6 +456,16 @@ si_emit_graphics(struct radv_device *device,
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radeon_set_context_reg(cs, R_028C5C_VGT_OUT_DEALLOC_CNTL, 16);
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}
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if (device->border_color_data.bo) {
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uint64_t border_color_va = radv_buffer_get_va(device->border_color_data.bo);
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radeon_set_context_reg(cs, R_028080_TA_BC_BASE_ADDR, border_color_va >> 8);
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if (physical_device->rad_info.chip_class >= GFX7) {
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radeon_set_context_reg(cs, R_028084_TA_BC_BASE_ADDR_HI,
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S_028084_ADDRESS(border_color_va >> 40));
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}
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}
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if (physical_device->rad_info.chip_class >= GFX9) {
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radeon_set_context_reg(cs, R_028C48_PA_SC_BINNER_CNTL_1,
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S_028C48_MAX_ALLOC_COUNT(physical_device->rad_info.pbb_max_alloc_count - 1) |
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