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aco: implement 8-bit/16-bit nir_intrinsic_{shuffle,_read_invocation}

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
This commit is contained in:
Samuel Pitoiset 2020-04-08 09:24:36 +02:00 • committed by Marge Bot
parent f03e56eaf0
commit dfa62d97a0
1 changed files with 8 additions and 1 deletions
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9
src/amd/compiler/aco_instruction_selection.cpp
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@ -7539,7 +7539,14 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr)
if (instr->intrinsic == nir_intrinsic_read_invocation || !nir_src_is_divergent(instr->src[1]))
tid = bld.as_uniform(tid);
Temp dst = get_ssa_temp(ctx, &instr->dest.ssa);
if (src.regClass() == v1) {
if (src.regClass() == v1b || src.regClass() == v2b) {
Temp tmp = bld.tmp(v1);
tmp = emit_wqm(ctx, emit_bpermute(ctx, bld, tid, src), tmp);
if (dst.type() == RegType::vgpr)
bld.pseudo(aco_opcode::p_split_vector, Definition(dst), bld.def(src.regClass() == v1b ? v3b : v2b), tmp);
else
bld.pseudo(aco_opcode::p_as_uniform, Definition(dst), tmp);
} else if (src.regClass() == v1) {
emit_wqm(ctx, emit_bpermute(ctx, bld, tid, src), dst);
} else if (src.regClass() == v2) {
Temp lo = bld.tmp(v1), hi = bld.tmp(v1);