Commit graph

153016 commits

Author SHA1 Message Date
Alyssa Rosenzweig
4d04437a3b panfrost: Add shader_stage helper
For Valhall, which specifies these in the shader program descriptor.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
2022-04-07 15:11:04 +00:00
Alyssa Rosenzweig
783d27645c panfrost: Add panfrost_make_resource_table helper
For Valhall drivers.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
2022-04-07 15:11:04 +00:00
Alyssa Rosenzweig
3baceb0ca4 panfrost: Hide parts of pan_encoder.h for Valhall
These pertain to data structures that no longer exist.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
2022-04-07 15:11:04 +00:00
Alyssa Rosenzweig
d11351c616 panfrost: Control tiler memory usage
Ensure we don't hit OOM when rendering at 8192x8192 on Valhall by disabling
the smallest bin size of the hierarchy mask.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
2022-04-07 15:11:04 +00:00
Alyssa Rosenzweig
586c3b9e35 panfrost: Handle stencil texturing on Valhall
Use a Bifrost compatible path. It's not clear this is optimal but it passes the
tests and is no worse than what we do on Bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
2022-04-07 15:11:04 +00:00
Alyssa Rosenzweig
db20152c8a panfrost: Handle Valhall texturing
Surface descriptors have been replaced by plane descriptors, which facilitate
the intermediate layout of textures. This allows for more sophisticated handling
of texture compressions, of particular to interest to copy_image. However, it
requires a considerable amount of new logic to handle.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15795>
2022-04-07 15:11:04 +00:00
Krunal Patel
f21d6e18bc frontend/va: Create decoder once the max_references is updated
Issue: When a video is decoded where the max_references is updated the
decoder keeps using same old value. This results into green patches and
decoding is not proper.

Root Cause: The max_references is updated only once when the instance is
created for the first time.

Fix: Added a check along with the context->decoder to check if the
context->templat.max_references has changed. If yes, then we go ahead
and create the decoder again.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Krunal Patel <krunalkumarmukeshkumar.patel@amd.corp-partner.google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15750>
2022-04-07 14:48:37 +00:00
Mike Blumenkrantz
2f8d11463f zink: ci updates
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Mike Blumenkrantz
527deb91ff zink: export PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Mike Blumenkrantz
dac830b5ad zink: run the cubemap -> array compiler pass if the shader key is set
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Mike Blumenkrantz
f97014c3da zink: handle nonseamless cube sampler binding
now when a cube is sampled with a nonseamless sampler, the relevant shader
stage is flagged for a variant update, the

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Mike Blumenkrantz
be6d4b8583 zink: create an array view for all cube samplerviews
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Mike Blumenkrantz
55f90c5fa4 zink: set nonseamless hint for sampler states
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Mike Blumenkrantz
5b2d0cca17 zink: handle shader key variants that have nonseamless cubemaps
this is just the program-based handling, which means finding the right
variant and/or creating new ones based on matching a 32bit mask indicating
which textures must be rewritten

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Mike Blumenkrantz
a06b0e0d21 zink: specify struct member name when copying inline uniforms for gfx variants
avoid memory mismatch if inline uniform values aren't first member of struct

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Mike Blumenkrantz
be1b36d631 zink: support nir_op_imod
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Mike Blumenkrantz
2d745904ca zink: add a gently mangled version of the d3d12 cubemap -> array compiler pass
this differs in that it doesn't handle images and also doesn't filter
based on sampler type, instead using a 32bit mask for determining which
samplers to rewrite

also zink doesn't use sampler derefs

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Mike Blumenkrantz
dc3f62e0c2 zink: rename a variable
no functional changes

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15536>
2022-04-07 14:36:25 +00:00
Alyssa Rosenzweig
813d355e9e pan/va: Add LD_TILE.v3.f16 packing test
This tests the staging register behaviour.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
2b57303eaf pan/bi: Consider flow control in DCE
We don't want to remove instructions like `NOP.wait` on Valhall; this would be
tantamount to deleting barriers.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
6e69c3369c pan/bi: Don't lower vertex_id for malloc IDVS
Based on hardware behaviour, it appears vertex_id is zero-based with the legacy
geometry flow but not with the new malloc IDVS flow. Since the geometry flow is
per-shader (not per-machine), there's not a good way to communicate this to NIR.
Rather than trying to shoehorn this obscure detail into NIR, just do the
lowering ourselves instead of in NIR. It's not much more code anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
ccdec68aee pan/bi: Report whether workgroups can be merged
This flag gates a Valhall hardware optimization for compute shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
170d5a012e pan/bi: Avoid masked writes for now
Our swizzle lowering optimizations depend on replication of scalar fp16. This
holds on Bifrost (at least for now), but not on Valhall which has proper support
for write masks. For now, enforce Bifrost-compatible behaviour as we do not make
use of the write masks on Valhall yet.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
ba5b63f642 pan/bi: Generate LD_BUFFER on Valhall
Replace LOAD.ubo with LD_BUFFER since the .ubo segment doesn't exist on Valhall.
We could do this with a lowering pass instead but this is probably fine.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
f487c09045 pan/bi: Make psiz variants
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
9497a6a3c9 pan/bi: Lower gl_PointSize to FP16 on Valhall
It is unclear if FP32 point sizes are supported on Valhall -- I can't get the
DDK to use them at any rate. Always lower them to FP16 and store them as FP16
for hardware use.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
8e6f97b5fc pan/bi: Force psiz to mediump
To match driver behaviour.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
90d3f55aff pan/bi: Set table for Valhall LD_ATTR
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
f79e33f82f pan/bi: Emit Valhall-style varying stores
Varying stores was changed in Valhall. Rather than using attribute descriptors
like on Bifrost and Midgard, on Valhall we store to memory directly with
hardware-allocated buffers. This requires a new implementation of store_output,
with special provisions for writing gl_PointSize from a position shader.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
14e7796d4c pan/bi: Emit Valhall-style varying loads
Memory-allocated IDVS requires special varying load instructions that take an
offset into the hardware-allocated varying buffer, as opposed to a varying slot.
Emit these instructions.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
a1d5bf0a7a pan/bi: Track whether the malloc IDVS flow is used
This affects what instructions the fragment shader uses. Will be used for the
legacy geometry flow in blit shaders. Whether that is a good idea remains to be
seen, admittedly.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
9758555481 pan/bi: Handle Valhall texturing in helper analysis
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
ae79f6765a pan/bi: Emit Valhall texture instructions
Valhall uses an updated version fo the TEXC path. To avoid disrupting the
existing Bifrost code, add a new Valhall-specific texture path that generates
the new-style texture instructions.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
9091b6261b pan/bi: Specialize BLEND emit for Valhall
Fewer arguments compared to Bifrost; the corresponding information is encoded in
a Valhall-specific blend shader prologue instead.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
a8afe6f7fb pan/bi: Waits before tilebuffer access on Valhall
On Bifrost, this is handled in the scheduler. Until we grow a Valhall scheduler,
add a NOP with the appropriate flow control. This is correct but carries a small
performance cost.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
fe9cf1d0a4 pan/bi: Fix spilling on Valhall
We need a slightly different idiom on Valhall, since the segment modifiers no
longer exist but we now have an immediate offset.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:45 +00:00
Alyssa Rosenzweig
a2916aa934 pan/bi: Mark LD_TILE as w=format
This tracks register usage more precisely for LD_TILE, which is an encoding
difference on Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:44 +00:00
Alyssa Rosenzweig
b371e509da panfrost: Add a table for images
For the default Valhall ABI.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
2022-04-07 14:20:44 +00:00
Mike Blumenkrantz
736f3fdadd radv: improve failure logging for amdgpu on init
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15771>
2022-04-07 13:48:34 +00:00
Alyssa Rosenzweig
0864b15047 pan/va: Allow small constants in register pairs
They are zero extended 32->64-bit. Allow this. Noticed debugging spilling on
Valhall.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
2022-04-07 09:28:43 -04:00
Alyssa Rosenzweig
862a19aa4b pan/va: Add flow control lowering pass
Something an instruction has two logic flow controls, namely wait + reconverge.
These are orthogonal -- we need to insert a NOP to handle this. Add a lowering
pass that works out flow control to replace the ad hoc previous va_pack_flow.

Fixes dEQP-GLES31.functional.ssbo.layout.single_basic_type.shared.lowp_vec3.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
2022-04-07 09:27:32 -04:00
Alyssa Rosenzweig
4f5e0e1874 pan/va: Don't truncate slots
Causes BARRIER not to work.

Fixes: f45654af59 ("pan/va: Add packing routines")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
2022-04-07 09:27:32 -04:00
Alyssa Rosenzweig
9b727944a0 pan/va: Model image load instructions
These use the attribute pipe, the new versions of LD_ATTR_TEX, but reading
texture descriptors instead of attribute descriptors unlike their Bifrost
predecessors.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
2022-04-07 09:27:32 -04:00
Alyssa Rosenzweig
12da32c31f pan/va: Pack LEA_TEX_IMM
Mostly automatic.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
2022-04-07 09:27:32 -04:00
Alyssa Rosenzweig
1f4cb6d99f pan/va: Add indirect LEA_{ATTR, TEX}
For parity with Bifrost. We might need these for images.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
2022-04-07 09:27:32 -04:00
Alyssa Rosenzweig
c6fdafe5ea pan/bi: Model Valhall image loads
Like LD_ATTR_TEX.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15756>
2022-04-07 09:27:32 -04:00
Lionel Landwerlin
b5031bd6f7 intel/nir: don't report progress on rayqueries if no queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c78be5da30 ("intel/fs: lower ray query intrinsics")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15769>
2022-04-07 08:24:19 +00:00
Danylo Piliaiev
dde1623ed2 turnip: Implement VK_EXT_primitives_generated_query
Similar to pipeline statistics but done for a single counter.

We use REG_A6XX_RBBM_PRIMCTR_7 to get generated primitives
and not PRIMCTR_8 because PRIMCTR_7 counts pre-clipped prims
while PRIMCTR_8 counts them after clipping.

OpenGL spec for GL_PRIMITIVES_GENERATED says:
 "Subsequent rendering will increment the counter once for every
  vertex that is emitted from the geometry shader, or from the
  vertex shader if no geometry shader is present."

Passes tests:
 dEQP-VK.transform_feedback.primitives_generated_query.*

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15746>
2022-04-07 08:01:59 +00:00
Samuel Pitoiset
5ac8f10ec3 radv: mark all states declared dynamic at pipeline creation
It will be easier to merge dynamic states from libraries this way.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15764>
2022-04-07 06:16:20 +00:00
Samuel Pitoiset
c7ae87d7af radv: add a new helper to determine if rasterization is enabled
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15764>
2022-04-07 06:16:20 +00:00