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pan/bi: Don't lower vertex_id for malloc IDVS

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Based on hardware behaviour, it appears vertex_id is zero-based with the legacy
geometry flow but not with the new malloc IDVS flow. Since the geometry flow is
per-shader (not per-machine), there's not a good way to communicate this to NIR.
Rather than trying to shoehorn this obscure detail into NIR, just do the
lowering ourselves instead of in NIR. It's not much more code anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15793>
This commit is contained in:
Alyssa Rosenzweig 2022-03-31 11:08:17 -04:00 • committed by Marge Bot
parent ccdec68aee
commit 6e69c3369c
2 changed files with 17 additions and 3 deletions
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19
src/panfrost/bifrost/bifrost_compile.c
View file

@ -1555,8 +1555,23 @@ bi_emit_intrinsic(bi_builder *b, nir_intrinsic_instr *instr)
BI_VARYING_NAME_POINT, BI_VECSIZE_V2);
break;
case nir_intrinsic_load_vertex_id_zero_base:
bi_mov_i32_to(b, dst, bi_vertex_id(b));
/* It appears vertex_id is zero-based with Bifrost geometry flows, but
* not with Valhall's memory-allocation IDVS geometry flow. Ostensibly
* we support the legacy geometry flow even on Valhall, so
* vertex_id_zero_based isn't a machine property for us. Don't set it,
* and lower here if needed.
*/
case nir_intrinsic_load_vertex_id:
if (b->shader->malloc_idvs) {
bi_mov_i32_to(b, dst, bi_vertex_id(b));
} else {
bi_index first = bi_load_sysval(b,
PAN_SYSVAL_VERTEX_INSTANCE_OFFSETS,
1, 0);
bi_iadd_u32_to(b, dst, bi_vertex_id(b), first, false);
}
break;
case nir_intrinsic_load_instance_id:

1
src/panfrost/bifrost/bifrost_compile.h
View file

@ -91,7 +91,6 @@ static const nir_shader_compiler_options bifrost_nir_options = {
.lower_uniforms_to_ubo = true,
.has_cs_global_id = true,
.vertex_id_zero_based = true,
.lower_cs_local_index_to_id = true,
.max_unroll_iterations = 32,
.force_indirect_unrolling = (nir_var_shader_in | nir_var_shader_out | nir_var_function_temp),