Commit graph

131319 commits

Author SHA1 Message Date
Pierre-Eric Pelloux-Prayer
274c594559 st/mesa: consider texture view format for fbo blits
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4034
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8387>
(cherry picked from commit 5d9bfcac06)
2021-03-16 09:20:31 -07:00
Pierre-Eric Pelloux-Prayer
a731f0353e mesa/fbo: don't check_end_texture_render on fb read change
Otherwise this resets is_rtt to false in st/mesa, and then
breaks fbo + texture view.

This change also aligns the code with the comment above:
    * Note that if the ReadBuffer has texture attachments we don't consider
    * that a render-to-texture case.

Acked-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8387>
(cherry picked from commit a6fe1eeb05)
2021-03-16 09:20:25 -07:00
Pierre-Eric Pelloux-Prayer
1f211daea1 st/mesa: use the correct src format in ReadPixels
If reading from an FBO that uses a texture view src->format will
be the format of the original texture, not from the view.

Acked-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8387>
(cherry picked from commit 8ecace073e)
2021-03-16 09:20:18 -07:00
Caio Marcelo de Oliveira Filho
d45e9e576d anv: Lower ViewIndex to zero when multiview is disabled
Vulkan spec says

    If multiview is enabled in the render pass, this value will be one
    of the bits set in the view mask of the subpass the pipeline is
    compiled against. If multiview is not enabled in the render pass,
    this value will be zero.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4446
Fixes: 0db7070330 ("anv/pipeline: Add shader lowering for multiview")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9574>
(cherry picked from commit f603a2c25a)
2021-03-15 11:43:26 -07:00
Pierre-Eric Pelloux-Prayer
66587ecf54 frontends/va: fix protected slice data buffer read size
Read vlVaBuffer->size bytes instead of an hardcoded value.

Fixes: deb7dc82f6 ("frontends/va: handle protected slice data buffer")
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9553>
(cherry picked from commit 9e5623ccc3)
2021-03-15 11:43:26 -07:00
Timothy Arceri
b9174db5f2 glsl: fix declarations of gl_MaxVaryingFloats
gl_MaxVaryingFloats was not removed from core until 4.20 and is still
available in compat shaders. Found while writing some new CTS to test
the correct declarations of this constant.

Fixes: 0ebf4257a385i ("glsl: define some GLES3 constants in GLSL 4.1")

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9514>
(cherry picked from commit 684f97de80)
2021-03-15 11:43:26 -07:00
Dylan Baker
3f66917855 .pick_status.json: Update to b1ab69f467 2021-03-15 11:43:26 -07:00
Pierre Moreau
5bc34fc80e spirv: Ignore WorkgroupSize in non-compute stages
If a SPIR-V module contains for example both a geometry and a compute
shader, when processing the geometry shader its vertices out, input
primitive and output primitive attributes would get overwritten by the
value of the WorkgroupSize.

```
; SPIR-V
; Version: 1.5
; Generator: Khronos; 17
; Bound: 12
; Schema: 0
               OpCapability Geometry
               OpCapability Shader
          %1 = OpExtInstImport "GLSL.std.450"
               OpMemoryModel Logical GLSL450
               OpEntryPoint Geometry %main "main"
               OpEntryPoint GLCompute %main_0 "main"
               OpExecutionMode %main InputPoints
               OpExecutionMode %main Invocations 1
               OpExecutionMode %main OutputTriangleStrip
               OpExecutionMode %main OutputVertices 4
               OpExecutionMode %main_0 LocalSize 1 1 1
               OpSource GLSL 460
               OpSource GLSL 460
               OpName %main "main"
               OpName %main_0 "main"
               OpModuleProcessed "Linked by SPIR-V Tools Linker"
               OpDecorate %gl_WorkGroupSize BuiltIn WorkgroupSize
       %void = OpTypeVoid
          %6 = OpTypeFunction %void
       %uint = OpTypeInt 32 0
     %v3uint = OpTypeVector %uint 3
     %uint_1 = OpConstant %uint 1
%gl_WorkGroupSize = OpConstantComposite %v3uint %uint_1 %uint_1 %uint_1
       %main = OpFunction %void None %6
         %10 = OpLabel
               OpReturn
               OpFunctionEnd
     %main_0 = OpFunction %void None %6
         %11 = OpLabel
               OpReturn
               OpFunctionEnd
```

Running spirv_to_nir on the SPIR-V sample above and for the geometry
entry point would say that (among others):

* vertices out: 1
* input primitive: LINES
* output primitive: LINES

By removing any reference to `%gl_WorkGroupSize`, the output would
change to (among others):

* vertices out: 4
* input primitive: POINTS
* output primitive: TRIANGLE_STRIP

Fixes: 7d862ef530 ("spirv: Rework handling of spec constant workgroup size built-ins")

v2:
* Move the check from inside `handle_workgroup_size_decoration_cb()` to
  its caller (Caio Marcelo de Oliveira Filho )
* Add an assert on the shader stage before using
  `workgroup_size_builtin` (Caio Marcelo de Oliveira Filho )

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9418>
(cherry picked from commit 4a408ff7ea)
2021-03-15 11:43:26 -07:00
Dylan Baker
497e8aa9b8 .pick_status.json: Update to 4fdbc22c42 2021-03-15 11:43:26 -07:00
Lionel Landwerlin
596f3190f4 anv: fix MI_PREDICATE_RESULT write
This register is only 32bits.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1952fd8d2c ("anv: Implement VK_EXT_conditional_rendering for gen 7.5+")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry-picked from commit 8955d179d3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9554>
2021-03-12 10:26:56 +02:00
Lionel Landwerlin
a193060221 anv: reset binary syncobj to be signaled before submission
Before we introduced the submission thread in 829699ba63, once we
returned from vkQueueSubmit, all signaled syncobj would have a
i915_request/dma-fence waiting to be signaled by some work that would
submitted to HW by i915.

After this submission thread that is no longer the case. We added a
few checks in places like vkQueuePresentKHR() to wait for the binary
semaphores to materialize before we would hand things over to the WSI
code.

Unfortunately 829699ba63 forgot to reset the signaled binary
semaphore.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 829699ba63 ("anv: implement shareable timeline semaphores")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4276
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry-picked from commit cb74cd816c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9554>
2021-03-12 10:25:58 +02:00
Rhys Perry
334a5437a9 aco: set compr for fp16 exports
Obviously this didn't affect correctness. Not sure about performance.

It also changes enabled_channels to match radeonsi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: f29c81f863 ("aco: use VOP2 for v_cvt_pkrtz_f16_f32 if possible")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9459>
(cherry picked from commit 341dd9d834)
2021-03-11 11:49:12 -08:00
Jason Ekstrand
60c959b3a2 intel/fs: Handle payload node interference in destinations
Starting with d0d039a4d3, we emit writes to the push constant chunk
of the payload to stomp out-of-bounds data to zero for Vulkan.  Then, in
369eab9420, we started emitting shader preamble code for emulated
push constants on Gen12.5 parts.  In either of these cases, we can run
into issues if we don't have a proper live range for some of the payload
registers where they get used for something and then smashed by our push
handling code.  We've not seen many issues with this yet because it only
happens when you have dead push constants.

Fixes: d0d039a4d3 "anv: Emit pushed UBO bounds checking code..."
Fixes: 369eab9420 "intel/fs: Emit code for Gen12-HP indirect..."
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9501>
(cherry picked from commit b9e9f92f73)
2021-03-11 11:49:11 -08:00
Matt Turner
a14b8956fe turnip: Remove unused TU_DEBUG_IR3 flag
Replaced by IR3_SHADER_DEBUG=disasm,{vs,...,cs} and unused since the
commit referenced below.

Fixes: 808992fc50 ("tu: Use the ir3 shader API")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8249>
(cherry picked from commit 6ceb6b509e)
2021-03-11 11:49:10 -08:00
Georg Lehmann
14033ab6dc vulkan/device_select: Only call vkGetPhysicalDeviceProperties2 if the device supports it.
vkGetPhysicalDeviceProperties2 is not allowed to be used with a 1.0 device
because it's  a vulkan 1.1 function.

Closes: #4396
Fixes: 38ce8d4d ("vulkan/device_select: Stop using device properties 2.")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9462>
(cherry picked from commit fb1100d718)
2021-03-11 11:49:09 -08:00
Mike Blumenkrantz
7704e09cd8 zink: fix streamout emission for super-enhanced layouts
if we get some crazy matrix types in here then we need to ensure that
we accurately unwrap them and copy the components

fixes KHR-GL46.enhanced_layouts.xfb_stride

Fixes: 1b130c42b8 ("zink: implement streamout and xfb handling in ntv")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9271>
(cherry picked from commit 1b25e3a701)
2021-03-11 11:49:07 -08:00
Tony Wasserka
1b1a7711a1 aco: Fix vector::reserve() being called with the wrong size
The container is moved from before and hence returns size 0. To get the
correct value, the new instruction container must be used instead.

This was flagged by clang-tidy. The fixed call still triggers the
corresponding diagnostic, hence this change silences it by adding a
redundant clear() after move.

Fixes: 7f1b537304 ("aco: add new NOP insertion pass for GFX6-9")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9432>
(cherry picked from commit 97c97781f6)
2021-03-11 11:49:05 -08:00
Icecream95
3342edc1d2 st/mesa: Update constants on alpha test change if it's lowered
nir_lower_alpha_test creates a uniform for the alpha reference value;
this needs to be updated when changing alpha test state.

Fixes: b1c4c4c7f5 ("mesa/gallium: automatically lower alpha-testing")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4390
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9439>
(cherry picked from commit efd7711e0e)
2021-03-11 11:49:01 -08:00
Pierre-Eric Pelloux-Prayer
5ad7edf8af radeonsi: properly set SPI_SHADER_PGM_HI_ES
When not using S_00B324_MEM_BASE the value isn't properly truncated.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9277>
(cherry picked from commit 0e97d817f5)
2021-03-11 11:48:59 -08:00
Rhys Perry
62dd1015ee radv: don't set sx_blend_opt_epsilon for V_028C70_COLOR_10_11_11
Matches radeonsi and PAL. From PAL:
// 1 is recommended, but doesn't provide sufficient precision

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4394
Fixes: ed94638156 ("radv: Enable RB+ where possible.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9427>
(cherry picked from commit 524848707b)
2021-03-11 11:48:58 -08:00
Rhys Perry
d6a63c09b5 aco: add missing usable_read2 check
A Hitman 2 shader does: read64(local_invocation_index() * 4 - 4). This was
likely emitting a ds_read2_b32 on GFX6. For local_invocation_index()=0,
because the first dword was out-of-bounds, the second was likely also
considered out-of-bounds (even though it's not, at offset 0).

Likely fixes https://gitlab.freedesktop.org/mesa/mesa/-/issues/3882

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 57e6886f98 ("aco: refactor load_lds to use new helpers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9332>
(cherry picked from commit 3a72044ece)
2021-03-11 11:48:46 -08:00
Mike Blumenkrantz
7b59be1c70 mesa/st: clamp scissored clear regions to fb size
these should never be larger than the fb and drivers shouldn't have to
care about it

Fixes: 1c8bcad81a ("gallium: add pipe cap for scissored clears and pass scissor state to clear() hook")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9344>
(cherry picked from commit c5e72eb09d)
2021-03-11 11:48:45 -08:00
Alyssa Rosenzweig
0602af57bc panfrost/lcra: Fix constraint counting
We need to iterate the whole row, we can't be clever and only look at
one side, the symmetry doesn't work like that. See the original paper.

total instructions in shared programs: 69392 -> 69322 (-0.10%)
instructions in affected programs: 9002 -> 8932 (-0.78%)
helped: 82
HURT: 28
Instructions are helped.

total bundles in shared programs: 32225 -> 32155 (-0.22%)
bundles in affected programs: 4286 -> 4216 (-1.63%)
helped: 82
HURT: 28
Bundles are helped.

total quadwords in shared programs: 56102 -> 56102 (0.00%)
quadwords in affected programs: 0 -> 0
helped: 0
HURT: 0

total registers in shared programs: 4552 -> 4572 (0.44%)
registers in affected programs: 298 -> 318 (6.71%)
helped: 18
HURT: 38
Registers are HURT.

total threads in shared programs: 3772 -> 3775 (0.08%)
threads in affected programs: 84 -> 87 (3.57%)
helped: 15
HURT: 14
Inconclusive result (value mean confidence interval includes 0).

total spills in shared programs: 0 -> 0
spills in affected programs: 0 -> 0
helped: 0
HURT: 0

total fills in shared programs: 0 -> 0
fills in affected programs: 0 -> 0
helped: 0
HURT: 0

Fixes: 66ad64d73d ("pan/midgard: Implement linearly-constrained register allocation")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9338>
(cherry picked from commit 4f969d796d)
2021-03-11 11:48:43 -08:00
Bas Nieuwenhuizen
c8095546e9 radv: Expose robustBufferAccessUpdateAfterBind correctly.
We do support it.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4351
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9281>
(cherry picked from commit f67259d83b)
2021-03-11 11:48:33 -08:00
Dylan Baker
d28525a7ef .pick_status.json: Update to 38b2e13766 2021-03-11 11:48:25 -08:00
Mauro Rossi
54f4be2620 android: pan/bi: reorder static dependencies in gallium/dri
libpanfrost_lib depends on libpanfrost_bifrost for 'bifrost_compile_shader_nir' symbol
libpanfrost_lib depends on libpanfrost_bifrost_disasm for 'disassemble_bifrost' symbol
LOCAL_STATIC_LIBRARIES requires proper ordering to make the symbols available

Fixes the following building error happening with Android P:

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
external/mesa/src/panfrost/lib/decode.c:534: error: undefined reference to 'disassemble_bifrost'
external/mesa/src/panfrost/lib/pan_shader.c:145: error: undefined reference to 'bifrost_compile_shader_nir'

Cc: 20.3 21.0 <mesa-stable@lists.freedesktop.org>
Fixes: 166630f ("android: pan/bi: Separate disasm/compiler targets")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9265>
(cherry picked from commit 97b7786e6b)
2021-03-10 12:39:59 -08:00
Dylan Baker
d5525a84a7 .pick_status.json: Update to ea27f2bf09 2021-03-10 12:39:46 -08:00
Lionel Landwerlin
09f3a1f724 anv: Fix wait_count missing increment
If we don't wait on anything, I bet it makes the QueuePresent faster,
but also completely wrong...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 02f94c3306 ("anv: don't wait for completion of work on vkQueuePresent()")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4276
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9211>
(cherry picked from commit b0b1bf9957)
2021-02-23 13:51:00 -08:00
Rhys Perry
73e1f3a3dd aco/lower_phis: fix all_preds_uniform with continue_or_break
Found in a Death Stranding shader with loop unrolling disabled.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 9a089baff1 ("aco: optimize boolean phis with uniform selections")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9193>
(cherry picked from commit 75c9adf039)
2021-02-23 13:51:00 -08:00
Lionel Landwerlin
ac1880edc5 anv: don't wait for completion of work on vkQueuePresent()
Another mistake which is that we don't use the right wait API.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 829699ba63 ("anv: implement shareable timeline semaphores")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4276
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9188>
(cherry picked from commit 02f94c3306)
2021-02-23 13:51:00 -08:00
Jeremy Huddleston Sequoia
ab3f1b8eb5 Adjust dylib compatibility versions to match what was set by mesa-18.3's autotools-based builds
Cc: 20.3 21.0 <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4113
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8796>
(cherry picked from commit 38ae84b8da)
2021-02-23 13:51:00 -08:00
Dave Airlie
421b5d62e1 glx: proposed fix for setSwapInterval
When mesa gets a DRI2 1.1 connection (as experienced with
vmwware DDX) we don't get a pointer for this.

Don't explode just keep going.

Fixes: 60ebeb4608 ("glx: Implement GLX_EXT_swap_control for DRI2 and DRI3")
Reviewed-by: Adam Jackson <ajaX@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9184>
(cherry picked from commit 279d170552)
2021-02-23 13:51:00 -08:00
Alyssa Rosenzweig
2447e82b0a panfrost: Don't advertise OES_copy_image
We don't support it yet.

Fixes: 61d3ae6e0b ("panfrost: Initial stub for Panfrost driver")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9164>
(cherry picked from commit 5eff64e3a3)
2021-02-23 13:51:00 -08:00
Bas Nieuwenhuizen
9a467b33bf vulkan/device_select: Stop using device properties 2.
We have to choose between:
1) Stop handling two identical GPUs
2) Stop having crashes with other layers active.
3) Fix the Vulkan Loader.

Since nobody seems to want to spend enough effort to do 3 the
effective choice is between 1 and 2. This is choosing 2, as
two identical GPUs is pretty uncommon since crossfire doesn't
work on Linux anyway.

(And it would only work sporadically as the game needs to enable the
 extension)

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3801
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8414>
(cherry picked from commit 38ce8d4d00)
2021-02-23 13:51:00 -08:00
Bas Nieuwenhuizen
890bde0e04 radv: Don't use dedicated memory info to indicate sharing.
Can be used without sharing, so if only the dedicated memory info
is set we know it isn't shareable. Use that.

Fixes: a639d40f13 ("radv: add support for local bos. (v3)")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4330
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9176>
(cherry picked from commit 2d520b6923)
2021-02-23 13:51:00 -08:00
Vinson Lee
a0f4bac7dc aco: Initialize ds_state.front.writeMask.
Fix defect reported by Coverity Scan.

Uninitialized scalar variable (UNINIT)
uninit_use: Using uninitialized value ds_state.front. Field ds_state.front.writeMask is uninitialized.

Fixes: d488d0fd7b ("aco: add framework for testing isel and integration tests")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9033>
(cherry picked from commit 7cc83f237e)
2021-02-23 13:51:00 -08:00
Erico Nunes
f8921a493b lima: fix max sampler views
If this is not defined, mesa may not deallocate sampler views,
which can result in memory leaks.
Just define it to the same as max texture samplers, like other
mesa drivers do.

Cc: mesa-stable
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9172>
(cherry picked from commit f3d47ba0c7)
2021-02-23 13:51:00 -08:00
Ian Romanick
49f6978adc nir/algebraic: Fix some min/max of b2f replacements
fmin(-A, -B) is -fmax(A, B), and fmax(-A, -B) is -fmin(A, B).  Therefore
the logic joining A and B should toggle between ior and iand for the
negated versions.

At the very least, a shader from Euro Truck Simulator 2 in shader-db is
affected by this.  The KIL instruction in the (ARB assembly) shader ends
up with the wrong logic.  This is _probably_ the source of
https://gitlab.freedesktop.org/mesa/mesa/-/issues/1346.

That said, the issue mentions that Mesa 18.0.5 works, but commit
68420d8322 ("nir: Simplify min and max of b2f") was added in 17.3.
Moreover, I was not able to reproduce the error in the ETS2 shader from
shader-db from any Mesa commit near the time the original fd.o bugzilla
was submitted (December 2018). 🤷

In fact, the current error in that shader starts with 9167324a86
("nir/algebraic: Mark some logic-joined comparison reductions as
exact").  That's a bit of a red herring as 9167324a86 just sets off a
chain of replacements that eventually leads to the incorrect min/max of
b2f patterns fixed by this commit.

The other affected shaders in the shader-db results are from Cargo
Commander.  These are also ARB assembly shaders.

I think any ARB assembly shader that uses the pattern

    SLT    r0, ...;
    ...
    KIL    -r0;

will suffer from issues related to this.

This change fixes the piglit
tests/spec/arb_fragment_program/kil-of-slt.shader_test test added in
https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/454.

shader-db results:

All Gen6+ platforms had similar result. (Ice Lake shown)
total instructions in shared programs: 20034604 -> 20034486 (<.01%)
instructions in affected programs: 3885 -> 3767 (-3.04%)
helped: 47
HURT: 2
helped stats (abs) min: 2 max: 4 x̄: 2.64 x̃: 2
helped stats (rel) min: 2.33% max: 8.33% x̄: 3.48% x̃: 3.39%
HURT stats (abs)   min: 3 max: 3 x̄: 3.00 x̃: 3
HURT stats (rel)   min: 13.64% max: 16.67% x̄: 15.15% x̃: 15.15%
95% mean confidence interval for instructions value: -2.83 -1.99
95% mean confidence interval for instructions %-change: -3.84% -1.60%
Instructions are helped.

total cycles in shared programs: 979881379 -> 979879406 (<.01%)
cycles in affected programs: 119873 -> 117900 (-1.65%)
helped: 46
HURT: 3
helped stats (abs) min: 10 max: 756 x̄: 45.41 x̃: 26
helped stats (rel) min: 0.53% max: 19.72% x̄: 1.67% x̃: 1.26%
HURT stats (abs)   min: 28 max: 56 x̄: 38.67 x̃: 32
HURT stats (rel)   min: 1.44% max: 3.54% x̄: 2.75% x̃: 3.27%
95% mean confidence interval for cycles value: -70.83 -9.70
95% mean confidence interval for cycles %-change: -2.23% -0.57%
Cycles are helped.

Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8115098 -> 8115076 (<.01%)
instructions in affected programs: 2592 -> 2570 (-0.85%)
helped: 32
HURT: 2
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.88% max: 2.70% x̄: 1.35% x̃: 1.31%
HURT stats (abs)   min: 5 max: 5 x̄: 5.00 x̃: 5
HURT stats (rel)   min: 17.24% max: 18.52% x̄: 17.88% x̃: 17.88%
95% mean confidence interval for instructions value: -1.15 -0.15
95% mean confidence interval for instructions %-change: -1.83% 1.39%
Inconclusive result (%-change mean confidence interval includes 0).

total cycles in shared programs: 238189718 -> 238189802 (<.01%)
cycles in affected programs: 75076 -> 75160 (0.11%)
helped: 3
HURT: 31
helped stats (abs) min: 2 max: 130 x̄: 44.67 x̃: 2
helped stats (rel) min: 0.18% max: 5.70% x̄: 2.02% x̃: 0.19%
HURT stats (abs)   min: 2 max: 70 x̄: 7.03 x̃: 4
HURT stats (rel)   min: 0.07% max: 6.41% x̄: 0.53% x̃: 0.15%
95% mean confidence interval for cycles value: -7.27 12.21
95% mean confidence interval for cycles %-change: -0.33% 0.94%
Inconclusive result (value mean confidence interval includes 0).

No fossil-db changes on any Intel platform.

Fixes: 68420d8322 ("nir: Simplify min and max of b2f")
Closes: #1346
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9122>
(cherry picked from commit 7e127c1fca)
2021-02-23 13:51:00 -08:00
Yevhenii Kharchenko
f656ef672d st/mesa: fix PBO download for TEXTURE_1D_ARRAY textures
Fixes 'nir_tex_src_coord' param was provided to NIR 'txf' operation as a
vec3 for TEXTURE_1D_ARRAY target, causing an assert.
Only following targets require vec3: TEXTURE_2D_ARRAY, TEXTURE_3D,
TEXTURE_CUBE, TEXTURE_CUBE_ARRAY. The rest must use vec2.

Packing layer value into Y-coordinate the same way it was done in
'create_fs' in commit 2bf6dfac.

Fixes: a01ad311 ("st/mesa: Add NIR versions of the PBO upload/download
shaders. ")

Signed-off-by: Yevhenii Kharchenko <yevhenii.kharchenko@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9014>
(cherry picked from commit 1516b6bd9a)
2021-02-23 13:51:00 -08:00
Samuel Pitoiset
6fd153b6df radv: set correct value for OFFCHIP_BUFFERING on GFX10+
Higher values break tessellation. I was only able to reproduce this
by switching back/from AMDVLK which was really weird...

According to Marek (1c6eca23fd), it looks like it's related to
register shadowing and PAL enables it, that probably explains a bit.

Copied from PAL and RadeonSI.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4207
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2498
Fixes: 74d69299d1 ("radv/gfx10: double the number of tessellation offchip buffers per SE")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9141>
(cherry picked from commit e3bdf815b7)
2021-02-23 13:50:59 -08:00
Timur Kristóf
6ae0a97ca5 aco: Disallow LSHS temp-only I/O when VS output is written indirectly.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9100>
(cherry picked from commit a6e1178f91)
2021-02-23 13:50:59 -08:00
Timur Kristóf
759ea48de8 radv/llvm: Fix reporting LDS stats of tess control shaders.
The LLVM backend forgot to set config->lds_size, which is used
for reporting LDS stats.

Fixes: cf89bdb9ba "radv: align the LDS size in calculate_tess_lds_size()"
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9098>
(cherry picked from commit 72c348f85c)
2021-02-23 13:50:59 -08:00
Jason Ekstrand
367b48e510 anv/formats: Advertise linear sampling on depth formats
They've all supported it since either forever or Iron Lake which is
equivalent to forever for Vulkan.

From Kenneth Graunke's GitLab review:

    "Linear blending of depth buffer data is usually fairly nonsense
    (something's 2 meters away?  another thing's 6 meters away?  let's
    just report 4 meters?)...but it's definitely a thing we can do, so
    we may as well let apps do it, and trust them not when it doesn't
    make sense."

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9110>
(cherry picked from commit 56d005c21c)
2021-02-23 13:50:59 -08:00
Anuj Phogat
1dcfbfbfd9 intel/anv: Fix condition for planar yuv surface
Test the sampler->conversion for NULL pointer before dereferencing it.

Fixes: Regressions in VulkanCTS.
Fixes: 226316116c "intel/anv: Fix condition to set MipModeFilter for YUV surface"
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 69e94e8939)
2021-02-23 13:50:59 -08:00
Ian Romanick
f99cab1c03 intel/compiler: Use CMPN for min / max on Gen4 and Gen5
On Intel platforms before Gen6, there is no min or max instruction.
Instead, a comparison instruction (*more on this below) and a SEL
instruction are used.  Per other IEEE rules, the regular comparison
instruction, CMP, will always return false if either source is NaN.  A
sequence like

    cmp.l.f0.0(16)  null<1>F        g30<8,8,1>F     g22<8,8,1>F
    (+f0.0) sel(16) g8<1>F          g30<8,8,1>F     g22<8,8,1>F

will generate the wrong result for min if g22 is NaN.  The CMP will
return false, and the SEL will pick g22.

To account for this, the hardware has a special comparison instruction
CMPN.  This instruction behaves just like CMP, except if the second
source is NaN, it will return true.  The intention is to use it for min
and max.  This sequence will always generate the correct result:

    cmpn.l.f0.0(16) null<1>F        g30<8,8,1>F     g22<8,8,1>F
    (+f0.0) sel(16) g8<1>F          g30<8,8,1>F     g22<8,8,1>F

The problem is... for whatever reason, we don't emit CMPN.  There was
even a comment in lower_minmax that calls out this very issue!  The bug
is actually older than the "Fixes" below even implies.  That's just when
the comment was added.  That we know of, we never observed a failure
until #4254.

If src1 is known to be a number, either because it's not float or it's
an immediate number, use CMP.  This allows cmod propagation to still do
its thing.  Without this slight optimization, about 8,300 shaders from
shader-db are hurt on Iron Lake.

Fixes the following piglit tests (from piglit!475):

    tests/spec/glsl-1.20/execution/fs-nan-builtin-max.shader_test
    tests/spec/glsl-1.20/execution/fs-nan-builtin-min.shader_test
    tests/spec/glsl-1.20/execution/vs-nan-builtin-max.shader_test
    tests/spec/glsl-1.20/execution/vs-nan-builtin-min.shader_test

Closes: #4254
Fixes: 2f2c00c727 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8115134 -> 8115135 (<.01%)
instructions in affected programs: 229 -> 230 (0.44%)
helped: 0

HURT: 1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
(cherry picked from commit 3c31364f5e)
2021-02-23 13:50:59 -08:00
Ian Romanick
6ee04359c3 intel/compiler: Make the CMPN builder work like the CMP builder
Since the CMPN builder was never used, there was no reason to make its
interface usable. :)

Fixes: 2f2c00c727 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
(cherry picked from commit 684ec33c79)
2021-02-23 13:50:59 -08:00
Ian Romanick
3c70ece7eb intel/compiler: Enable the ability to emit CMPN instructions
v2: Move checks to the EU validator.  Suggested by Jason.

Fixes: 2f2c00c727 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
(cherry picked from commit 6c8e2e9317)
2021-02-23 13:50:59 -08:00
Anuj Phogat
cce41638d3 intel/anv: Fix condition to set MipModeFilter for YUV surface
Mip Mode Filter must be set to MIPFILTER_NONE for Planar YUV surfaces.
Add the missing condition to check for planar format.

Fixes: b24b93d584 "anv: enable VK_KHR_sampler_ycbcr_conversion"
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 226316116c)
2021-02-23 13:50:59 -08:00
Mike Blumenkrantz
f0d85d2d10 gallium/trace: add a pipe_screen::get_compiler_options method
this fixes crashes on startup

Fixes: a3512ddfdf ("st/mesa: don't enable NV_copy_depth_to_color if NIR doesn't support FP64")

fixes mesa/mesa#4312

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9082>
(cherry picked from commit 4feca7ecde)
2021-02-23 13:50:59 -08:00
Vinson Lee
846b536f40 etnaviv: Fix memory leak in etna_vertex_elements_state_create.
Fix defect reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable cs going out of scope leaks the storage it points to.

Fixes: c9e8b49b88 ("etnaviv: gallium driver for Vivante GPUs")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9034>
(cherry picked from commit a7a7d25e5b)
2021-02-23 10:48:22 -08:00