Eric Anholt
3821d15e06
[965] Add INTEL_DEBUG=fall debugging output.
2007-11-19 15:29:31 -08:00
Eric Anholt
27674c4135
[965] Convert DBG macro to use FILE_DEBUG_FLAG like i915.
2007-11-19 15:28:26 -08:00
Brian
87373e3072
fix some texture format assertions, etc
2007-11-19 10:37:54 -07:00
Brian
22a374fc3f
fix out-of-bounds array index (ix=-1)
2007-11-19 09:55:47 -07:00
Michal Krol
7f718f0476
Implement early depth test.
...
Early depth test is enabled when depth test is enabled and
alpha test is disabled and fragment shader does not write
depth.
The early-z is implemented by moving the depth test stage
just before the fragment shader stage and prepending it
with an earlyz stage, introduced with this commit.
The earlyz stage prepares the quad->outputs.depth for
the following depth test stage by interpolating Z position,
just as the fragment shader would do.
2007-11-18 18:20:20 +00:00
Ben Skeggs
c7c6253169
nouveau: m2mf fallback path for region copies.
2007-11-18 23:08:33 +11:00
Ben Skeggs
f940603037
nv40: fix thinko == fix 3d textures
2007-11-18 22:12:50 +11:00
Ben Skeggs
a1d622190f
nv40: support TXP again
2007-11-18 21:47:18 +11:00
Ben Skeggs
3ab26c864c
nv40: some very rough guesses for get_paramf()
2007-11-18 17:59:45 +11:00
Ben Skeggs
bc449c28c6
nouveau: oops, when'd that disappear..
2007-11-18 17:49:30 +11:00
Ben Skeggs
2f33b5b56e
nouveau: Very rough cut at gallium winsys + nv40 pipe driver.
2007-11-18 17:34:06 +11:00
José Fonseca
ca7f68a7cf
Fix typo
2007-11-17 15:39:36 +00:00
José Fonseca
dec60d33b2
Proper fence reference counting.
2007-11-17 15:39:36 +00:00
Eric Anholt
f00a64999c
[intel] Add 965 support to shared intel_blit.c
...
This requires that regions grow a marker of whether they are tiled or not,
because fence (surface) registers are ignored by the 965 2D engine.
2007-11-16 17:29:30 -08:00
Eric Anholt
9b461d4d02
[i915] Pass static region names in so debugging says more than "static region".
2007-11-16 16:18:30 -08:00
Brian
34a00276c7
more convenient debug code
2007-11-16 17:13:26 -07:00
Brian
aa880bdfa0
Reimplement glRasterPos using the private 'draw' module.
2007-11-16 17:13:01 -07:00
Brian
6a1154bab0
adjustments so st_feedback_draw_vbo() can be used for glRasterPos
2007-11-16 17:12:22 -07:00
Eric Anholt
5ef6803b7a
[intel] Move additional code to be shared from intel_context.h to intel/.
2007-11-16 16:05:11 -08:00
Eric Anholt
5cdf3972de
[intel] Move intel_tex.h into place, forgotten in the previous commit.
2007-11-16 15:51:34 -08:00
Eric Anholt
8775bf475b
[965] Add batchbuffer decode for several more packets.
2007-11-16 15:44:11 -08:00
Eric Anholt
a66413874d
[intel] Fix typos in intel_chipset.h macros.
2007-11-16 15:36:18 -08:00
Eric Anholt
3bd07ba0d4
[i915] Add INTEL_DEBUG=sync debug flag to wait for fences after making them.
2007-11-16 15:36:18 -08:00
Eric Anholt
f7e0513d70
[i915] Reenable batchbuffer debug under INTEL_DEBUG=bat.
2007-11-16 15:36:18 -08:00
Eric Anholt
152aa6350d
[intel] Add some doxygen notes on what the bufmgr_fake block members mean.
2007-11-16 15:36:18 -08:00
Eric Anholt
c29e9e534e
[intel] Add a simple relocation cache to the fake buffer manager.
...
This is required for 965 performance, as it avoids a lot of repeated data
uploads of the state caches due to surface offsets in them.
2007-11-16 15:36:18 -08:00
Eric Anholt
4bc625e378
[intel] Assert against 0-sized buffers in dri_bufmgr_fake.c.
...
They shouldn't be created, and this often helps catch stupid issues.
2007-11-16 15:36:18 -08:00
Eric Anholt
00eb5635c6
[intel] Add support for multiple levels of relocation in bufmgr_fake.
...
This is required for 965 support, which has relocations in other places than
just the batchbuffer.
2007-11-16 15:36:18 -08:00
Eric Anholt
df3c530bed
[i915] Push locking in intelClearWithTris down inside meta_draw_poly.
...
The lock coverage and checks for cliprects were unneeded since the batchbuffer
will have INTEL_BATCH_CLIPRECTS anyway. It appeared to be a leftover from
intelClearWithBlit.
This makes the locking requirements of i915 meta_draw_quad match i965
meta_draw_quad.
2007-11-16 15:36:18 -08:00
Brian
8211b20026
added z/s keys to reset/step rotation
2007-11-16 15:19:05 -07:00
Brian
fb69fe58a0
Only emit texcoords for enabled units. Enable/disable units with 0..7 keys.
...
Also, asst. clean-ups.
2007-11-16 15:19:05 -07:00
Brian
95f066fc54
note problem with fragment coord Y orientation
2007-11-16 10:39:08 -07:00
Brian
f361edae5d
added a clip-bypass flag to rasterizer state
2007-11-16 09:31:25 -07:00
José Fonseca
90dd0cb822
Include fences in the i915simple winsys interface.
2007-11-15 17:07:50 +00:00
Roland Scheidegger
96ba38a450
fix bogus assumption if ddx has set up surface reg for z buffer
...
this is wrong since even if ddx has not set up a surface reg to cover the z
buffer we should pretend it has on those rv100 chips since they presumably do
not do z buffer tiling if not using hyperz, so we can use linear addressing
just the same. Doesn't seem to fix #13080 , but it's wrong anyway and the bug
almost certainly broke newer non-tcl chips.
2007-11-15 01:13:16 +01:00
Roland Scheidegger
dab7c810e9
fix position invariant vertex programs for sw-tnl
...
do the same math as for fixed function pipe, including
user clip planes.
(mostly resurrected from the dead t_vb_arbprogram.c code)
2007-11-15 00:52:38 +01:00
Brian
f6ab1347d6
remove dependency on libGLU
2007-11-12 08:02:09 -07:00
Brian
b87ce5be82
add glw.pc.in to tarball list, remove from DEPEND_FILES
2007-11-12 07:51:55 -07:00
Xiang, Haihao
9bf5da906f
i965: correct the opcode of XY_SETUP_BLT_CMD. fix bug #12730
2007-11-12 10:20:26 +08:00
Brian
578641941f
test that point/line/quad rendering hits the right pixels
2007-11-09 17:02:51 -07:00
Eric Anholt
9724dc1ac7
[i915] Remove old frontbuffer rotation hack.
...
This was replaced in previous releases of xserver/dri/libGL by reporting the
damage to the frontbuffer so that the server and driver could handle it
appropriately.
2007-11-09 15:05:56 -08:00
Eric Anholt
7d4b89a2b3
[intel] By default, output batchbuffer decode to stderr like other debug info.
2007-11-09 14:27:33 -08:00
Eric Anholt
38c616260a
[intel] Initialize a depth buffer if the visual has depth 24 but no stencil.
2007-11-09 14:27:33 -08:00
Eric Anholt
77a5bcaff4
[intel] Move over files that will be shared with 965-fbo work.
2007-11-09 14:27:33 -08:00
Brian
8b36166d29
check for texture and renderbuffer in check_end_texture_render()
2007-11-09 08:56:05 -07:00
Benno Schulenberg
4e91ad8c0e
code clean-ups, reformatting
2007-11-09 08:56:05 -07:00
Benno Schulenberg
d540e8e9df
remove commented-out code
2007-11-09 08:56:05 -07:00
Brian
193c85ec7a
comments, assertions
2007-11-09 07:55:08 -07:00
Brian
50a56cd755
minor simplifcation in vertex_fetch()
2007-11-09 07:55:08 -07:00
Roland Scheidegger
7b3ab451a8
recreate from changed gl_API.xml
2007-11-09 14:49:01 +01:00
