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[i915] Push locking in intelClearWithTris down inside meta_draw_poly.
The lock coverage and checks for cliprects were unneeded since the batchbuffer will have INTEL_BATCH_CLIPRECTS anyway. It appeared to be a leftover from intelClearWithBlit. This makes the locking requirements of i915 meta_draw_quad match i965 meta_draw_quad.
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8211b20026
commit
df3c530bed
2 changed files with 72 additions and 85 deletions
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@ -1072,6 +1072,8 @@ intel_meta_draw_poly(struct intel_context *intel,
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union fi *vb;
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GLint i;
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LOCK_HARDWARE(intel);
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/* All 3d primitives should be emitted with INTEL_BATCH_CLIPRECTS,
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* otherwise the drawing origin (DR4) might not be set correctly.
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*/
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@ -1089,6 +1091,7 @@ intel_meta_draw_poly(struct intel_context *intel,
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}
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INTEL_FIREVERTICES(intel);
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UNLOCK_HARDWARE(intel);
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}
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void
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@ -387,102 +387,87 @@ intelClearWithTris(struct intel_context *intel, GLbitfield mask)
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{
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GLcontext *ctx = &intel->ctx;
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struct gl_framebuffer *fb = ctx->DrawBuffer;
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drm_clip_rect_t clear;
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GLuint buf;
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if (INTEL_DEBUG & DEBUG_BLIT)
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_mesa_printf("%s 0x%x\n", __FUNCTION__, mask);
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LOCK_HARDWARE(intel);
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intel->vtbl.install_meta_state(intel);
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/* XXX FBO: was: intel->driDrawable->numClipRects */
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if (intel->numClipRects) {
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GLint cx, cy, cw, ch;
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GLuint buf;
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/* Back and stencil cliprects are the same. Try and do both
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* buffers at once:
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*/
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if (mask & (BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH)) {
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struct intel_region *backRegion =
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intel_get_rb_region(fb, BUFFER_BACK_LEFT);
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struct intel_region *depthRegion =
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intel_get_rb_region(fb, BUFFER_DEPTH);
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const GLuint clearColor = (backRegion && backRegion->cpp == 4)
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? intel->ClearColor8888 : intel->ClearColor565;
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intel->vtbl.install_meta_state(intel);
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intel->vtbl.meta_draw_region(intel, backRegion, depthRegion);
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/* Get clear bounds after locking */
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cx = fb->_Xmin;
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cy = fb->_Ymin;
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ch = fb->_Ymax - cx;
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cw = fb->_Xmax - cy;
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if (mask & BUFFER_BIT_BACK_LEFT)
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intel->vtbl.meta_color_mask(intel, GL_TRUE);
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else
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intel->vtbl.meta_color_mask(intel, GL_FALSE);
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/* note: regardless of 'all', cx, cy, cw, ch are now correct */
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clear.x1 = cx;
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clear.y1 = cy;
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clear.x2 = cx + cw;
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clear.y2 = cy + ch;
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if (mask & BUFFER_BIT_STENCIL)
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intel->vtbl.meta_stencil_replace(intel,
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intel->ctx.Stencil.WriteMask[0],
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intel->ctx.Stencil.Clear);
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else
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intel->vtbl.meta_no_stencil_write(intel);
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/* Back and stencil cliprects are the same. Try and do both
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* buffers at once:
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*/
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if (mask &
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(BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH)) {
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struct intel_region *backRegion =
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intel_get_rb_region(fb, BUFFER_BACK_LEFT);
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struct intel_region *depthRegion =
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intel_get_rb_region(fb, BUFFER_DEPTH);
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const GLuint clearColor = (backRegion && backRegion->cpp == 4)
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? intel->ClearColor8888 : intel->ClearColor565;
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if (mask & BUFFER_BIT_DEPTH)
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intel->vtbl.meta_depth_replace(intel);
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else
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intel->vtbl.meta_no_depth_write(intel);
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intel->vtbl.meta_draw_region(intel, backRegion, depthRegion);
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intel_meta_draw_quad(intel,
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fb->_Xmin,
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fb->_Xmax,
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fb->_Ymin,
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fb->_Ymax,
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intel->ctx.Depth.Clear, clearColor,
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0, 0, 0, 0); /* texcoords */
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if (mask & BUFFER_BIT_BACK_LEFT)
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intel->vtbl.meta_color_mask(intel, GL_TRUE);
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else
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intel->vtbl.meta_color_mask(intel, GL_FALSE);
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if (mask & BUFFER_BIT_STENCIL)
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intel->vtbl.meta_stencil_replace(intel,
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intel->ctx.Stencil.WriteMask[0],
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intel->ctx.Stencil.Clear);
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else
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intel->vtbl.meta_no_stencil_write(intel);
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if (mask & BUFFER_BIT_DEPTH)
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intel->vtbl.meta_depth_replace(intel);
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else
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intel->vtbl.meta_no_depth_write(intel);
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/* XXX: Using INTEL_BATCH_NO_CLIPRECTS here is dangerous as the
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* drawing origin may not be correctly emitted.
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*/
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intel_meta_draw_quad(intel, clear.x1, clear.x2, clear.y1, clear.y2, intel->ctx.Depth.Clear, clearColor, 0, 0, 0, 0); /* texcoords */
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mask &=
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~(BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH);
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}
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/* clear the remaining (color) renderbuffers */
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for (buf = 0; buf < BUFFER_COUNT && mask; buf++) {
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const GLuint bufBit = 1 << buf;
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if (mask & bufBit) {
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struct intel_renderbuffer *irbColor =
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intel_renderbuffer(fb->Attachment[buf].Renderbuffer);
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GLuint color = (irbColor->region->cpp == 4)
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? intel->ClearColor8888 : intel->ClearColor565;
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ASSERT(irbColor);
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intel->vtbl.meta_no_depth_write(intel);
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intel->vtbl.meta_no_stencil_write(intel);
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intel->vtbl.meta_color_mask(intel, GL_TRUE);
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intel->vtbl.meta_draw_region(intel, irbColor->region, NULL);
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/* XXX: Using INTEL_BATCH_NO_CLIPRECTS here is dangerous as the
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* drawing origin may not be correctly emitted.
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*/
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intel_meta_draw_quad(intel, clear.x1, clear.x2, clear.y1, clear.y2, 0, /* depth clear val */
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color, 0, 0, 0, 0); /* texcoords */
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mask &= ~bufBit;
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}
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}
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intel->vtbl.leave_meta_state(intel);
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intel_batchbuffer_flush(intel->batch);
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mask &= ~(BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH);
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}
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UNLOCK_HARDWARE(intel);
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/* clear the remaining (color) renderbuffers */
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for (buf = 0; buf < BUFFER_COUNT && mask; buf++) {
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const GLuint bufBit = 1 << buf;
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if (mask & bufBit) {
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struct intel_renderbuffer *irbColor =
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intel_renderbuffer(fb->Attachment[buf].Renderbuffer);
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GLuint color = (irbColor->region->cpp == 4)
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? intel->ClearColor8888 : intel->ClearColor565;
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ASSERT(irbColor);
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intel->vtbl.meta_no_depth_write(intel);
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intel->vtbl.meta_no_stencil_write(intel);
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intel->vtbl.meta_color_mask(intel, GL_TRUE);
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intel->vtbl.meta_draw_region(intel, irbColor->region, NULL);
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/* XXX: Using INTEL_BATCH_NO_CLIPRECTS here is dangerous as the
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* drawing origin may not be correctly emitted.
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*/
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intel_meta_draw_quad(intel,
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fb->_Xmin,
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fb->_Xmax,
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fb->_Ymin,
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fb->_Ymax,
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0, color,
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0, 0, 0, 0); /* texcoords */
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mask &= ~bufBit;
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}
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}
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intel->vtbl.leave_meta_state(intel);
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intel_batchbuffer_flush(intel->batch);
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}
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/**
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@ -775,7 +760,6 @@ intelSwapBuffers(__DRIdrawablePrivate * dPriv)
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intel = intel_context(ctx);
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if (ctx->Visual.doubleBufferMode) {
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intelScreenPrivate *screen = intel->intelScreen;
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GLboolean missed_target;
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struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
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int64_t ust;
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