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1694 commits

Author SHA1 Message Date
Samuel Pitoiset
b8b7c57c00 meson: do not mark exynos/omap/tegra as disabled features
Otherwise, using `--auto-features=enabled` wouldn't work because it
only "forces" auto options to be enabled.

This will enable these backends in CI to catch possible build errors.

Closes: https://gitlab.freedesktop.org/mesa/libdrm/-/work_items/128
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2026-04-27 18:23:20 +02:00
Samuel Pitoiset
7f86e45164 omap: stop including linux/types.h
Nothing uses __u32 and friends, so it should be safe to remove.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2026-04-27 18:23:04 +02:00
Samuel Pitoiset
cb4669afe8 build: bump version to 2.4.133
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2026-04-27 17:47:19 +02:00
Rudi Heitbaum
91f7cd0ba2 modetest: fix discards 'const' qualifier from pointer target type
Since glibc-2.43:

For ISO C23, the functions bsearch, memchr, strchr, strpbrk, strrchr,
strstr, wcschr, wcspbrk, wcsrchr, wcsstr and wmemchr that return pointers
into their input arrays now have definitions as macros that return a
pointer to a const-qualified type when the input argument is a pointer
to a const-qualified type.

fixes:
    tests/modetest/modetest.c: In function 'parse_connector':
    tests/modetest/modetest.c:1997:22: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
     1997 |                 endp = strpbrk(p, ",@:");
          |                      ^

Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
2026-04-27 17:45:10 +02:00
Rudi Heitbaum
ff12339926 amdgpu: fix discards 'const' qualifier from pointer target type
Since glibc-2.43:

For ISO C23, the functions bsearch, memchr, strchr, strpbrk, strrchr,
strstr, wcschr, wcspbrk, wcsrchr, wcsstr and wmemchr that return pointers
into their input arrays now have definitions as macros that return a
pointer to a const-qualified type when the input argument is a pointer
to a const-qualified type.

fixes:
    amdgpu/amdgpu_asic_id.c: In function 'find_asic_id_table':
    amdgpu/amdgpu_asic_id.c:249:19: warning: assignment discards 'const' qualifier from pointer target type [-Wdiscarded-qualifiers]
      249 |         file_name = strrchr(AMDGPU_ASIC_ID_TABLE, '/');
          |                   ^

Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
2026-04-27 17:45:10 +02:00
Samuel Pitoiset
a6e1316d03 add missing include to util_math.h
This fixes a build error with Tegra.

Fixes: 8cc2d09c ("amdgpu: reserve half of the addr space to implement a workaround for PRT")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2026-04-27 17:42:30 +02:00
Eric Engestrom
31c6232896 ci: bump debian from bookworm to trixie 2026-04-27 17:31:38 +02:00
Eric Engestrom
b1144c21ca ci: fix indentation 2026-04-27 17:31:23 +02:00
Samuel Pitoiset
979f607906 build: bump version to 2.4.132
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2026-04-27 10:28:45 +02:00
Samuel Pitoiset
8cc2d09c29 amdgpu: reserve half of the addr space to implement a workaround for PRT
On GFX6-GFX12, except GFX9, SMEM loads on NULL PRT pages would just
fault and hang the GPU. The better workaround that we found is to split
the address space in two equal parts "LOW"/"HIGH", here's more details:

To workaround that, the driver splits the total VA space in half, so
that a single bit controls whether it's the "HIGH" or the "LOW"
address space. Every sparse residency buffer allocations that might
be used with SMEM get two allocations:

- the "HIGH" address space is mapped normally and its VA is returned
  to the application.
- the "LOW" address space is explicitly mapped to a zero-initialized
  buffer when it's allocated or when it's unmapped.

Other buffer allocations are always allocated in the "LOW" address.

The driver also creates a zero-allocated BO that will be used to map
partially resident buffers at creation and when explicitly unmapped.
The size is arbitrary but it seems that allocating 8MiB is perfectly
reasonable and fast enough in most cases. This BO is marked as
read-only for the GPU because the backend compilers don't use SMEM
stores.

For example this makes the "LOW" half of the HIGH VA range like
[0xffff800100000000,0xffffbfffffbfe000], and the "HIGH" half is left
for PRT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2026-04-27 09:59:32 +02:00
Rudi Heitbaum
8de45ef60d drm: handle asprintf() allocation failures in format modifier name functions
Check the return value of asprintf() in drmGetFormatModifierNameFromNvidia(),
drmGetFormatModifierNameFromAmlogic(), and drmGetFormatModifierNameFromVivante()
to avoid leaving pointers uninitialized on allocation failure.

asprintf() returns -1 on failure and does not guarantee the output pointer
is set to NULL, which could lead to undefined behavior if the pointer is
used subsequently. Set the pointer to NULL explicitly on failure.

Fixes: -Wunused-result warnings from GCC
Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com>
2026-04-06 08:00:12 +00:00
Janne Grunau
b9dea73dfa gen_table_fourcc: Add Apple as vendor
The modifiers for DRM_FORMAT_MOD_VENDOR_APPLE are simple and cna be
represented in a static table. Add "APPLE" as pattern.

Signed-off-by: Janne Grunau <j@jannau.net>
2026-03-06 13:06:12 +01:00
Alex Deucher
15cdcfe9e1 amdgpu: update marketing names
From ROCm 7.2.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-25 17:36:48 -05:00
Alex Deucher
bd856bed23 amdgpu: update marketing names
https://www.amd.com/en/products/graphics/workstations/radeon-ai-pro/ai-9000-series/amd-radeon-ai-pro-r9600d.html
https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-5-330.html
https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-5-340.html
https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-7-350.html

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-02-23 16:59:55 -05:00
Ilya Zlobintsev
369990d966 amdgpu: update marketing names for strix point revisions 2025-12-19 15:41:40 +02:00
Simon Ser
6bfcfc725f build: bump version to 2.4.131
Signed-off-by: Simon Ser <contact@emersion.fr>
2025-12-11 22:17:34 +01:00
Sergio Costas Rodriguez
64ef303d70
amdgpu: NetBSD lacks secure_getenv
When adding support for defining extra paths for the `amdgpu.ids`
file using an environment variable, the patch used a call to
secure_getenv(), which is only available in GNU. This breaks the
build in NetBSD systems.

This patch adds conditional compilation to use secure_getenv()
only when compiling against the GNU libraries.

Fix c3c7fb21aa (note_3229411)

Signed-off-by: Sergio Costas Rodriguez <sergio.costas@canonical.com>
2025-12-11 15:41:39 +01:00
Samuel Pitoiset
b7861fb536 amdgpu: add Steam Machine marketing name
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2025-12-11 08:52:33 +01:00
Simon Ser
523534ee01 build: bump version to 2.4.130
Signed-off-by: Simon Ser <contact@emersion.fr>
2025-12-08 14:15:17 +01:00
Simon Ser
1b68532f88 Sync headers with drm-next
Synchronize drm.h, drm_mode.h and drm_fourcc.h to drm-next.

Generated using make headers_install
Generated from drm-next branch commit 0692602defb0c273f80dec9c564ca50726404aca

Signed-off-by: Simon Ser <contact@emersion.fr>
2025-12-08 13:09:09 +00:00
Val Packett
bef7c6fcf1 headers: drm: Sync virtgpu_drm.h with Linux v6.16
The header shipped with libdrm was missing blob resources, context_init,
syncobj support, and capset definitions.

Update to the current version from Linux, which was last modified in 6.16.

Signed-off-by: Val Packett <val@invisiblethingslab.com>
2025-12-07 20:06:56 -03:00
Andrew Davis
b71953a199 omap: fix omap_bo_size for tiled buffers
The buffer size is calculated using pixels, not bytes as it should. The
result is often correct, though, as the stride is aligned to page size,
but there are still many cases where the size ends up being wrong.

Fix this by not calculating the size at all, as in that case
DRM_OMAP_GEM_INFO ioctl is used to get the correct size from the kernel.
This is better in any case as then the userspace library doesn't need to
know how the tiled buffers need to be aligned.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
2025-12-04 09:39:10 +00:00
Sergio Costas Rodriguez
d72d7c6eef
amdgpu: Fix envar name in documentation
After a change in the patch, the environment variable name for
the `amdgpu.ids` file paths changed to plurar form, but the
documentation wasn't updated.

This patch fixes it.
2025-12-03 10:53:38 +01:00
Sergio Costas Rodriguez
a050f86ed8
Support multiple paths in AMDGPU_ASIC_ID_TABLE_PATH envar
This patch allows to specify several colon-separated paths where
to search for the `amdgpu.ids` file in the AMDGPU_ASIC_ID_TABLE_PATH
environment variable.
2025-12-02 17:03:09 +01:00
Sergio Costas Rodriguez
c3c7fb21aa
amdgpu: add env support for amdgpu.ids path
In some cases, like when building a Snap application that uses
libdrm, the `amdgpu.ids` file isn't directly available at the
compiling place, but inside a mounted folder. This forces each
application to link/bind the file from the current place
(usually at the $SNAP/gnome-platform/usr/share/libdrm/amdgpu.ids)
which is cumbersome.

This patch allows to set an environment variable, called
AMDGPU_ASIC_ID_TABLE_PATH, where the file will be also searched
if it isn't located in the default, meson-configured, path.
2025-12-02 17:02:39 +01:00
Simon Ser
a8e5e10a87 build: bump version to 2.4.128
Signed-off-by: Simon Ser <contact@emersion.fr>
2025-11-17 16:17:12 +01:00
Simon Ser
31e68ea81c Sync headers with drm-next
Synchronize drm.h, drm_mode.h and drm_fourcc.h to drm-next.

Generated using make headers_install
Generated from drm-next branch commit 2a084f4ad727244768b919455aa9dc1c04630487

Signed-off-by: Simon Ser <contact@emersion.fr>
2025-11-16 20:45:03 +01:00
Alex Deucher
35a21916c8 amdgpu: update marketing names
https://www.amd.com/en/products/graphics/desktops/radeon/7000-series/amd-radeon-rx-7700.html
https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9060.html
https://www.amd.com/en/products/accelerators/instinct/mi350/mi350x.html
https://www.amd.com/en/products/accelerators/instinct/mi350/mi355x.html

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-11-10 14:37:06 -05:00
Samuel Pitoiset
3968028058 amdgpu: update marketing names
https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9060xt.html

Closes: https://gitlab.freedesktop.org/mesa/libdrm/-/issues/120
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2025-11-03 09:43:51 +01:00
Marek Olšák
679c474974 Bump version to 2.4.128 2025-11-01 22:30:31 -04:00
Marek Olšák
7816984a20 Revert ABI breakage "drm/amdgpu: Add user queue HQD count to hw_ip info"
This reverts commit e4bd1ba753.

Such a change of ABI is illegal and causes crashes. See:
https://gitlab.freedesktop.org/mesa/libdrm/-/issues/121#note_3172362
2025-11-01 22:14:40 -04:00
Christian König
aaf8a893e1 test/amdgpu: remove amdgpu unit tests
Those haven't been updated in the last two years and have been replaced by
IGT test cases: https://gitlab.freedesktop.org/drm/igt-gpu-tools

Signed-off-by: Christian König <christian.koenig@amd.com>
2025-10-27 07:32:56 +00:00
Mario Limonciello
871e326ac7 amdgpu: Only read /proc/cpuinfo as a fallback
Some older Vega APUs don't provide a very useful string. If we have
a string in amdgpu.ids use that, but fallback to /proc/cpuinfo.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2025-10-22 03:08:52 +00:00
Mario Limonciello (AMD)
90656fc8e4 amdgpu: Slice and dice the string for APUs
The string will generally have a CPU and GPU component, so if both
are found split it up.  Make sure that it starts with AMD to be
consistent.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
2025-10-22 03:08:52 +00:00
Jesse.Zhang
7518cc4fdd amdgpu: Add parameter validation to amdgpu_bo functions to fix SIGSEGV
This commit adds essential parameter validation to several key
functions in amdgpu_bo.c to prevent null pointer dereferences
that were causing segmentation faults and improve overall code
robustness.

The changes address the following crash scenario:
Received signal SIGSEGV.
Stack trace:
 #0 [fatal_sig_handler+0x17b]
 #1 [__sigaction+0x50]
 #2 [amdgpu_bo_alloc+0x37]
 #3 [__igt_unique____real_main461+0x7d5]
 #4 [main+0x2d]
 #5 [__libc_init_first+0x90]
 #6 [__libc_start_main+0x80]
 #7 [_start+0x25]

Changes made:

1. amdgpu_bo_alloc():
   - Validate alloc_buffer and buf_handle parameters
   - Return -EINVAL if either is NULL
   - Prevents null pointer dereference in memset and subsequent operations

2. amdgpu_bo_set_metadata():
   - Validate info parameter
   - Return -EINVAL if info is NULL
   - Prevents accessing invalid metadata structure

3. amdgpu_bo_query_info():
   - Validate info parameter in addition to existing bo->handle check
   - Return -EINVAL if info is NULL
   - Prevents writing to invalid info pointer

4. amdgpu_bo_list_create():
   - Validate resources parameter
   - Return -EINVAL if resources is NULL when number_of_resources > 0
   - Prevents invalid memory access during resource array processing

These changes ensure proper error handling when callers pass invalid
null pointers, preventing potential segmentation faults and making
the API more robust against programming errors. The validation occurs
early in each function to minimize performance impact.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
2025-10-22 08:59:55 +08:00
Mario Limonciello
2c1d39eff8 amdgpu: Read model name from /proc/cpuinfo for APUs
The correct marketing name is encoded in the model name field
that is read from the hardware on an APU.  Try to read from /proc/cpuinfo
when an APU is found to identify such hardware.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
2025-10-15 09:20:59 -05:00
Simon Ser
f7013effc3 build: bump version to 2.4.127
Signed-off-by: Simon Ser <contact@emersion.fr>
2025-10-14 18:44:17 +02:00
Vlad Zahorodnii
7a325ad150 xf86drm: Drop drmFauxDeviceInfo
Its contents is the same as drmFauxBusInfo. While it is technically an
API breaking change, libdrm with the relevant changes has been released
only recently and there are issues with quering DRM nodes that are on
the faux bus, which result in crashes, so it is unlikely that there are
users that depend on the new API.

Signed-off-by: Vlad Zahorodnii <vlad.zahorodnii@kde.org>
2025-10-14 19:38:10 +03:00
Vlad Zahorodnii
1e9b50f1d5 xf86drm: Fix drmDevicesEqual() for nodes on the faux bus
The name string is allocated on the heap, so the memcmp() function will
not return 0 even though two nodes share the same device name.

Also, the device info will not be populated when counting the available
drm devices. For example, using drmGetDevices2(0, NULL, 0). In that
case, drmGetDevices2() will eventually crash in drmDevicesEqual() while
merging nodes belonging to the same device due to passing null pointers
to memcmp().

This change adds faux device name to businfo. The businfo is populated
regardless whether device info is needed, which is needed to make the
drmGetDevices2(0, NULL, 0) case work. drmFauxBusInfo can also be used
with the memcmp() function to match the other cases in drmDevicesEqual().

Signed-off-by: Vlad Zahorodnii <vlad.zahorodnii@kde.org>
2025-10-14 19:38:10 +03:00
Vlad Zahorodnii
0a5e2c96b1 xf86drm: Trim traling whitespace in xf86drm.h
This prevents text editors that trim trailing whitespace automatically
from making unrelated changes.

Signed-off-by: Vlad Zahorodnii <vlad.zahorodnii@kde.org>
2025-10-14 19:38:03 +03:00
Simon Ser
22d70b6a8f build: bump version to 2.4.126
Signed-off-by: Simon Ser <contact@emersion.fr>
2025-10-01 15:59:46 +02:00
Alex Deucher
7d43d9b6fe amdgpu: update marketing names
https://www.amd.com/zh-cn/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9070-gre.html
https://www.amd.com/en/products/graphics/workstations/radeon-ai-pro/ai-9000-series/amd-radeon-ai-pro-r9700.html

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-11 09:52:25 -04:00
José Expósito
d870a12c3a xf86drm: Add faux bus
Linux 6.14 included a new type of bus, the "faux" bus [1].

The next version of Linux (v6.16) will move the VKMS driver to the faux
bus. See kernel commit 5686601908d8 ("drm/vkms: convert to use
faux_device") for more details.

Add support for the faux bus so drmGetDeviceFromDevId(), drmGetDevices()
and drmGetDevices2() return the devices on it.

[1] https://lore.kernel.org/all/2025021023-sandstorm-precise-9f5d@gregkh/
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: José Expósito <jose.exposito89@gmail.com>
2025-08-01 11:22:18 +02:00
Huang Rui
9ea8a8e93d modetest: fix build error on is_power_of_two()
The inline function is_power_of_two should be set as static since it's
only called in pattern.c, otherwise it will encounter below build error.

[114/136] Linking target tests/modetest/modetest
FAILED: tests/modetest/modetest
cc  -o tests/modetest/modetest tests/modetest/modetest.p/buffers.c.o tests/modetest/modetest.p/cursor.c.o tests/modetest/modetest.p/modetest.c.o -Wl,--as-needed -Wl,--no-undefined -fno-omit-frame-pointer '-Wl,-rpath,$ORIGIN/../..' -Wl,-rpath-link,/home/ray/repo/drm/build/ -Wl,--start-group libdrm.so.2.125.0 tests/util/libutil.a -lm -pthread /usr/lib/x86_64-linux-gnu/libcairo.so -Wl,--end-group
/usr/bin/ld: tests/util/libutil.a.p/pattern.c.o: in function `check_yuv':
/home/ray/repo/drm/build/../tests/util/pattern.c:1989: undefined reference to `is_power_of_two'
/usr/bin/ld: /home/ray/repo/drm/build/../tests/util/pattern.c:1990: undefined reference to `is_power_of_two'
/usr/bin/ld: /home/ray/repo/drm/build/../tests/util/pattern.c:1991: undefined reference to `is_power_of_two'
collect2: error: ld returned 1 exit status

Signed-off-by: Huang Rui <ray.huang@amd.com>
2025-07-14 14:45:14 +08:00
Jesse.Zhang
e4bd1ba753 drm/amdgpu: Add user queue HQD count to hw_ip info
Add a new field userq_num_hqds to drm_amdgpu_info_hw_ip to expose the
number of available hardware queue descriptors (HQDs) for user queues.
This allows userspace to query the maximum number of user queues that
can be created for a particular IP block.

the patch link in driver side:
https://lists.freedesktop.org/archives/amd-gfx/2025-June/126686.html
https://lists.freedesktop.org/archives/amd-gfx/2025-July/126981.html

v2: rename userq_num_hqds to userq_num_slots (Marek)

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2025-07-09 09:40:34 +08:00
Emil Svendsen
289175512c modetest: util: add seed argument for noise patterns
Add seed argument for modetest noise patterns. If no seed is provided
the current time will be used as seed.

The used seed will be printed so the noise pattern can be reproduced.

Signed-off-by: Emil Svendsen <emas@bang-olufsen.dk>
2025-06-09 09:31:02 +02:00
Emil Svendsen
40aeab6fd5 modetest: util: pattern: add new patterns
Add three new test patterns:

- noise: random black and white pixels
- noise-color: random color pixels
- black-white: alternate between black and white pixels

These patterns are useful for measuring radiated emissions for EMC
compliance tests.

Signed-off-by: Emil Svendsen <emas@bang-olufsen.dk>
2025-06-09 09:25:29 +02:00
Simon Ser
76a1e97a9a build: bump version to 2.4.125
Signed-off-by: Simon Ser <contact@emersion.fr>
2025-06-08 14:27:53 +02:00
Simon Ser
3ba6183b79 Sync headers with drm-next
Synchronize drm.h, drm_mode.h and drm_fourcc.h to drm-next.

Generated using make headers_install.
Generated from drm-next branch commit 04c8970771b4f1f39bb8453a2eeb188c4d5edbd6

Signed-off-by: Simon Ser <contact@emersion.fr>
2025-06-08 14:22:46 +02:00
Simon Ser
fa6f0fbad7 Switch URLs to mesa/libdrm
The GitLab repository has been renamed.

Signed-off-by: Simon Ser <contact@emersion.fr>
References: https://gitlab.freedesktop.org/mesa/drm/-/issues/74
2025-06-08 12:16:36 +00:00
Simon Ser
dccb4b18e2 ci: fix arm32v7 Debian container preparation
buildah tried to pull the arm64 variant of the arm32v7/debian:bookworm
container:

 * choosing an image from manifest list docker://arm32v7/debian:bookworm: no image found in image index for architecture "arm64", variant "v8", OS "linux"

Signed-off-by: Simon Ser <contact@emersion.fr>
2025-05-22 16:05:30 +02:00
Simon Ser
c3a4c985d5 ci: upgrade FreeBSD to version 14.2
py39-docutils doesn't exist in the package repositories, likely
because the Python version has been upgraded. Let's not hardcode
the Python version in the package name.

Signed-off-by: Simon Ser <contact@emersion.fr>
2025-05-22 16:05:30 +02:00
Simon Ser
e9a886f859 ci: upgrade ci-templates to latest commit
Signed-off-by: Simon Ser <contact@emersion.fr>
2025-05-22 16:05:25 +02:00
Corentin Noël
a0fbf455fa meson: Do not check for meson version >=0.54
Meson version 0.59 is already required.
2025-05-20 11:05:27 +02:00
Alex Deucher
b65d6ede3e amdgpu: update marketing names
https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-max-plus-395.html
https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-max-390.html
https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-max-385.html
https://www.amd.com/en/products/processors/laptop/ryzen-pro/ai-max-pro-300-series/amd-ryzen-ai-max-pro-380.html
https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9070.html
https://www.amd.com/en/products/graphics/desktops/radeon/9000-series/amd-radeon-rx-9070xt.html
https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-5-340.html
https://www.amd.com/en/products/processors/laptop/ryzen/ai-300-series/amd-ryzen-ai-7-350.html

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-05-05 16:49:52 -04:00
Sunil Khatri
614f8d7391 drm/amdgpu: add UAPI to query if user queues are supported
add uapi support for user queues query inline with kernel
changes.

https://lists.freedesktop.org/archives/amd-gfx/2025-April/122559.html

Reviewed-by: Marek Olšák marek.olsak@amd.com
Reviewed-by: Yogesh Mohan Marimuthu yogesh.mohanmarimuthu@amd.com
Reviewed-by: Alex Deucher alexander.deucher@amd.com
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
2025-04-30 18:56:07 +05:30
Arunpravin Paneer Selvam
15e174c1ed amdgpu: Add queue id support to the user queue wait IOCTL
Add queue id support to the user queue wait IOCTL
drm_amdgpu_userq_wait structure.

This is required to retrieve the wait user queue and maintain
the fence driver references in it so that the user queue in
the same context releases their reference to the fence drivers
at some point before queue destruction.

Otherwise, we would gather those references until we
don't have any more space left and crash.

Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2025-04-18 20:51:59 +05:30
Jie1zhang
fdf384d4b5 amdgpu: Add queue priority and secure flags support for user queues
This patch extends the user queue creation API to support:
1. Queue priority levels (normal low, low, normal high, high)
   - High priority is restricted to admin-only
2. Secure queue flag for protected content access

The changes include:
- Adding a `flags` parameter to `amdgpu_create_userqueue()`
- Defining priority and security flags in `amdgpu_drm.h`
- Updating the `drm_amdgpu_userq_in` struct to replace padding with flags
- Documenting the new flags field

Related driver patches provided by Alex:
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122782.html
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122780.html
https://lists.freedesktop.org/archives/amd-gfx/2025-April/122786.html

Cc: Koenig, Christian <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>

Signed-off-by: Jesse.Zhang <Jesse.zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2025-04-14 15:37:51 +08:00
Arvind Yadav
43e8a3f86a amdgpu: Add amdgpu userqueue IOCTL functions
This patch adds new IOCTL functions to support
userqueue create, remove, signal and wait etc.

v2:(Marek)
 - Add csa support for SDMA queue.
 - Addressed's review comments.
 - Removed raw2/op2 ioctl.
 - Added syncobj_timeline_handles in amdgpu_userq_wait IOCTL.

v3:(Yogesh)
 - Rename timeline* objects as per UAPI review (Arvind).

v4: (Marek)
 - Drop AMDGPU_USERQ_BO_WRITE as this should not be a global option
   of the IOCTL, It should be option per buffer. Hence adding separate
   array for read and write BO handles. (Arun)

 - Modify num_fences to __u16, flags changed to __u16 and placed
   the num_fences next to flags for optimal padding and size. (Arun)

v5:(Marek/Pierre-Eric)
  - add more detail params description for signal and wait IOCTL calls.
  - Remove the unused structure fields in signal and wait structs.
  - Add separate array of read and write for BO handles. (Arun)

  - Removes the unused flags parameter from the
	amdgpu_create_userqueue IOCTL. (Arvind)

v6:(Pierre-Eric)
  - Remove unused headers. (Arvind)

  - Modify the function parameter names and struct
    field names as per the review comments. (Arun)

v7:(Marek)
  - Modify the structure field name and comments. (Arun)

  - Rename vm_timeline_syncobj and add comment for
    vm_timeline_point.
  - Remove GDS buffer support from MQD. (Arvind)

v8:(Pierre-Eric)
  - Modify the function parameter names.
  - Added new function in amdgpu-symbols.txt (Arvind)

v9:(Marek)
  - Use the drm signal/wait structure as the parameter. (Arun)

Cc: Deucher, Alexander <alexander.deucher@amd.com>
Cc: Koenig, Christian <christian.koenig@amd.com>
Cc: Sharma, Shashank <shashank.sharma@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
2025-04-10 10:03:07 -04:00
Arvind Yadav
72d3140428 amdgpu: UAPI for AMDGPU usermode queues
This patch adds UAPI interface changes for AMDGPU usermode
queues, semaphore and new AMDGPU GEM domain for doorbells.
Usermode queues allow a userspace process to create
and submit its graphics/compute/sdma work directly to the GPU.

v2:(Marek)
 - Add csa support for SDMA queue.
 - Rename UAPI objects and struct as per UAPI review. (Shashank)

v3:(Yogesh)
 - Rename UAPI timeline* objects as per UAPI review. (Arvind)

v4: (Marek)
 - Drop AMDGPU_USERQ_BO_WRITE as this should not be a global option
   of the IOCTL, It should be option per buffer. Hence adding separate
   array for read and write BO handles. (Arun)
 - Modify num_fences to __u16, flags changed to __u16 and placed
   the num_fences next to flags for optimal padding and size. (Arun)

 - Fix 32-bit holes issue in sturct drm_amdgpu_gem_va as per
   UAPI review (Arvind).

v5:(Marek/Pierre-Eric)
  - add more detail params description for signal and wait IOCTL calls.
  - Remove the unused structure fields in signal and wait structs.
  - Add separate array of read and write for BO handles. (Arun)

  - Removes the unused flags parameter from the usermode queue UAPI structure
  - Clarify comments on top of drm_amdgpu_userq_in
  - Clarify comment for queue_id (in)
  - Clarify comment for mqd
  - Clarify comment for compute MQD size
  - Clarify comment for queue_id (out)
  - Adds padding variables in userqueue in/out structures. (Shashank)

v6:(Pierre-Eric)
  - Modify the function parameter names and struct
    field names as per the review comments. (Arun)

v7:(Marek)
  - Modify the structure field name and comments. (Arun)

  - Rename vm_timeline_syncobj and add comment for
    vm_timeline_point.
  - Remove GDS buffer support from MQD. (Arvind)

v8:(Pierre-Eric)
  - Modify the function parameter names.

Cc: Koenig, Christian <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
2025-04-10 10:03:07 -04:00
Shashank Sharma
5d7d7c4318 drm/amdgpu: add new AMDGPU_INFO subquery for userqueue metadata
This patch:
- adds a new subquery (AMDGPU_INFO_UQ_FW_AREAS) in AMDGPU_INFO_IOCTL
  to get the size and alignment of shadow and csa objects from the
  kernel. This information is required for a userqueue consumer (like
  MESA/libdrm) to create the userqueue metadata objects properly.
- also adds supporting metadata structures and a high level wrapper
  function (amdgpu_query_uq_metadata_info) to the query, to make it
  easy to use.

The corresponding kernel changes for this UAPI extension can be found
in amd-gfx mailing list, link:
https://patchwork.freedesktop.org/patch/621390/?series=139715&rev=2

This patch adds support only for the GFX IP, and the other engines may
be supported in subsequent development.

V2: fix the build error due to exporting of helper function
V3: make an entry for amdgpu_query_uq_metadata_info in
    amdgpu-symbols.txt
V4: Rename the subquery to AMDGPU_INFO_UQ_FW_AREAS (Marek, Pierre-Eric)
V5: Addressed review comments (Pierre-Eric):
    - Fix the API comment to match the new IOCTL name
    - remove the unused uq_metadata parameter

Cc: Marek Olsak <marek.olsak@amd.com>
Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Cc: Arvind Yadav <arvind.yadav@amd.com>
Reviewed-by: Marek Olsak <marek.olsak@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
2025-04-10 13:20:00 +00:00
Daniel van Vugt
d387ec976f xf86drm: Handle NULL in drmCopyVersion
Just as it is already handled in the caller, `drmGetVersion`.

I'm not sure what the offending driver is, but the Ubuntu incidents
seem to be coming from a dual Intel/Nvidia machine. And they show
it is `card1` so I'm guessing `nvidia-drm` is the offender.

Related: https://bugs.launchpad.net/bugs/2104352
2025-03-27 17:43:05 +08:00
Alex Deucher
a7eb2cfd53 amdgpu: add new marketing names
Updated client names.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-01-17 17:26:15 -05:00
Simon Ser
c7684a957a xf86drm: deprecate drmAvailable()
Signed-off-by: Simon Ser <contact@emersion.fr>
References: https://gitlab.freedesktop.org/mesa/drm/-/issues/113
2025-01-09 14:08:03 +00:00
Alex Deucher
e7d4b1df2d amdgpu: add new marketing names
Updated from 6.3 branch.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-12-18 13:15:57 -05:00
Alex Deucher
1f140f7d65 amdgpu: add new marketing names
Updated from 6.2 branch.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-12-18 13:11:38 -05:00
Matt Turner
38ec7dbd4d build: bump version to 2.4.124 2024-12-04 13:30:30 -05:00
Rob Barnes
f314a43f14 modetest: Make modetest availble to vendor on Android
Make modetest available to vendors on Android. libdrm_util and
libdrm_test_headers is also made available to vendors since these are
depenencies of modetest. This results in the module target
modetest.vendor being availble to vendor modules.

Signed-off-by: Rob Barnes <robbarnes at google.com>
2024-10-29 10:49:10 -06:00
Mauro Rossi
e68e9b8013 android: add genrule for generated_static_table_fourcc.h
Fixes the following building error:

external/libdrm/xf86drm.c:158:10: fatal error: 'generated_static_table_fourcc.h' file not found
         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Change-Id: I1b0cac498ed63ebec6e8c03629bbf4a1b6a9618d
Reviewed-by: Mauro Rossi <issor.oruam@gmail.com>
2024-10-20 12:26:53 +02:00
Marek Olšák
50da61eebd xf86drm: print AMD modifiers properly
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2024-10-15 19:49:05 -04:00
Alan Coopersmith
c0a08f06ae include/drm/README: update drm-next link to use gitlab instead of cgit 2024-09-29 17:47:51 -07:00
Dmitry Baryshkov
0a1162e2af modetest: add support for YUV422 and YUV444 plane format
Currently modetest supports only the YUV420 and YVU420 planar YCbCr
plane formats (aka YV12 and YU12). Extend the code to add support for
YUV422 / YVU422 and YUV444 / YVU444 plane formats.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-09-23 21:11:29 +02:00
Dmitry Baryshkov
38c043dca2 modetest: simplify planar YUV handling
In preparation to adding more planar YUV formats, introduce X, Y
subsampling ratios and use them to calculate plane offsets and buffer
size.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-09-23 21:11:29 +02:00
Simon Ser
bea14386bc build: simplify Linux system check
No need for contains() here.

Signed-off-by: Simon Ser <contact@emersion.fr>
2024-09-08 09:15:08 +00:00
Marijn Suijten
887fec2c28
tests/util: Call drmGetDevices2() instead of drmOpen()ing all modules
Whenever `util_open()` is called to open a device for the first matching
module, it will skip devices for the `nvidia_drm` kernel module which
is not in the list.  We could add this module for now, but keeping this
list of DRM modules up to date is cumbersome.

At the same time walking a list of modules and calling `drmOpen()` for
each of them is incredibly expensive (when the user doesn't explicitly
specify one with `-M`), as each each call opens every DRM node just
to see if they are associated to the requested module.  And for no
good reason: all we want is the first `DRM_NODE_PRIMARY` (which is what
`drmOpen()` also returns) to use by default.

For example on the `"msm"` driver, which used to be the 9th in the
modules list, all nodes are opened for the 9th time before e.g.
`modetest` returns a useful result, which takes ages unless the user
painstakingly provides the module for the currently known device on
the cmdline.

This is very simply solved by calling `drmGetDevices(2)()`, which
iterates through all DRM nodes only once and allows us to immediately
find + `open()` the first device that has a PRIMARY node.  A random
search for the error shows that this was also attempted in (a fork of?)
kmscube:
https://git.ti.com/cgit/glsdk/kmscube/commit/?id=456cabc661caac5c60729751d45efd668faa8e97

Finally we add a `drmIsKMS()` check to make sure we only include primary
nodes that actually support rendering, and also print the values from
`drmGetVersion()` on success to make it easier to identify the device.

In the future we could extrapolate this feature by letting query
commands like `modetest -c` list connectors for every device/module, not
just the first PRIMARY node that we found.
2024-09-03 13:30:41 +02:00
Matt Turner
25dec5b91f build: bump version to 2.4.123 2024-08-26 13:10:22 -07:00
Mark Collins
f3f56f41bb Disable ioctl signed overload for Bionic libc
Bionic libc ships with `ioctl` that has two signatures, one with an
unsigned `request` parameter and one with a signed request parameter.

This leads to compilation failing due to `__typeof__(ioctl)` being used
by DRM which fails to resolve which overload to use, this has been fixed
by defining `BIONIC_IOCTL_NO_SIGNEDNESS_OVERLOAD` on Android.

Signed-off-by: Mark Collins <mark@igalia.com>
2024-08-22 18:45:38 +00:00
Su Hong Koo
88db611498 tests: Make modetest and proptest cc_binary in Android.bp
Change module type of modetest and proptest from cc_test to cc_binary,
as neither are tests.

Signed-off-by: Su Hong Koo <sukoo@google.com>
2024-08-01 10:09:05 -04:00
Daniel Stone
b0815faac0 libs: Tie DSO minor versions to libdrm version
There is an excellent writeup explaining this requirement here:
    https://gitlab.freedesktop.org/wayland/wayland/-/issues/175

In short, for mixed environments such as the Steam Runtime and other
container-like environments, choosing which libdrm to link into the
client's address space is a hard problem. If the runtime has a newer
libdrm than the host, then it should be preferred, because the client
may be using newly-added symbols. But if the host has a newer libdrm,
then that should be used, because drivers may be depending on those.

Bumping the DSO minor version is transparent to all users because apps
only link against the major version, e.g. DT_NEEDED libdrm.so.2; the
fact that libdrm.so.2 is a link to libdrm.so.2.122.0 is a detail known
only to the loader, but it does let a smart runtime make better
decisions.

Signed-off-by: Daniel Stone <daniels@collabora.com>
2024-08-01 13:28:41 +01:00
Jiyong Park
4bd09d78df Enable GPU in crosvm
When the GPU feature is turned on in crosvm, these modules are added as
dependencies. Since crosvm is included in the virt APEX, add the APEX to
the apex_available properties of the modules to make them available in
the APEX.
2024-07-30 10:54:34 -04:00
Jiyong Park
d9043a256f add crosvm to com.android.virt
To do so, crosvm and its dependencies have the apex_available property
set to "//apex_available:platform", "com.android.virt" to explicitly
acknowledge the joining.
2024-07-30 10:54:34 -04:00
Jason Macnak
f22956a4e9 Adds libdrm_headers
... as being able to use cc_library in header_libs is not
intended and does not work on all branches which blocks
aosp/1497292.
2024-07-30 10:54:34 -04:00
Inseob Kim
460f7907de Export include dirs with -isystem
drm_property_type_is function in xf86drmMode.h file can cause compiler
error because it performs unsigned to signed conversion. Some Android.mk
modules have been avoiding this by adding "-isystem external/libdrm"
flag, because warnings from system headers are suppressed.

This changes exported_include_dirs to export_system_include_dirs
to workaround the potential error with the same manner above.
2024-07-30 10:54:34 -04:00
Jason Macnak
dcb14fe0c6 Makes libdrm available on host
... to make drm format header visible for host wayland server.

Adds -Wno-implicit-function-declaration for vasprintf() on
xf86drm.c:2965.

Adds -Wno-int-conversion for drm_mmap() on libdrm_macros.h:60.

Also, drive-by alphabetize cflags.
2024-07-30 10:54:34 -04:00
Jerry Zhang
6aa6411c5a Make libdrm recovery_available 2024-07-30 10:54:34 -04:00
John Stultz
c2b5759a2f Android.bp: Add include exports for android dir
This forward ports Stefan Schake's patch
32ee9c0e05 "android: Add missing include exports" to the
Android.bp file.
2024-07-30 10:54:34 -04:00
Elliott Hughes
aef24b66d9 readdir_r is deprecated.
Add -Wno-deprecated-declarations to suppress compiler warning about
using readdir_r, which is deprecated.
2024-07-30 10:54:34 -04:00
Su Hong Koo
aefb5fa987 Delete all Makefile.sources files
Delete all Makefile.sources as all the makefiles that use them have
been replaced with Android.*.bp files for Soong.
2024-07-30 10:54:23 -04:00
Dan Willemsen
21ac1816a4 Convert to Android.bp
See build/soong/README.md for more information about Soong.

Removes BOARD_GPU_DRIVERS, which wasn't affecting anything, since none
of the HAVE_* macros are defined. Even if they were, we'd prefer to
compile all of them so that a single library can support multiple
boards.
2024-07-29 14:47:30 -04:00
Alex Deucher
11cafdd8d6 amdgpu: add new marketing names
Updated from 6.1 branch.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-11 21:46:17 -04:00
Alex Deucher
5e1e7c4d71 amdgpu: add new marketing names
https://www.amd.com/en/processors/ryzen-processors-laptop-business
https://www.amd.com/en/products/ryzen-pro-processors-laptop

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-07-11 21:31:50 -04:00
Enrico Weigelt, metux IT consult
b065dbc5cc Fix FTBS on undefined clock_gettime() and asprintf()
Some platforms (eg. SunOS) explicitly need extra symbols in order to define
those functions. There're many files needing the __EXTENSIONS__ symbol,
so doing this on a global scale.

Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
2024-06-27 02:07:00 +02:00
Simon Ser
ad78bb591d build: bump version to 2.4.122
Signed-off-by: Simon Ser <contact@emersion.fr>
2024-06-26 10:13:31 +02:00
Simon Ser
998d2a2e81 Sync headers with drm-next
Synchronize drm_fourcc.h and drm_mode.h to drm-next.

Generated using make headers_install.
Generated from drm-next branch commit 541b1b0a8fc235bca355921eb7f3f59a8efa3e9a

Signed-off-by: Simon Ser <contact@emersion.fr>
2024-06-26 08:08:40 +00:00
Enrico Weigelt, metux IT consult
a97bd7b4ac ci: upgrade FreeBSD VM to 14.1
Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
2024-06-25 12:57:01 +02:00
Enrico Weigelt, metux IT consult
d096affbaa ci: upgrade debian container to bookworm
Buster is oldoldstable and EOL in a few days. Bookworm is the current stable.

Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
2024-06-25 12:56:11 +02:00
Enrico Weigelt, metux IT consult
589f8e86f1 etnaviv: fix FTBS on undefined linux/* headers on non-Linux platforms.
Using C standard headers instead.

Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
2024-06-25 10:41:35 +02:00
Enrico Weigelt, metux IT consult
b7338fc842 freedreno: fix FTBS on non-Linux platforms (unused header)
The <linux/fb.h> header only exists on Linux, but isn't used anymore,
so drop it entirely.

Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
2024-06-24 17:44:54 +00:00
Enrico Weigelt, metux IT consult
90c1a35f2a fix FTBS on FreeBSD (or non-Linux in general)
Several drivers still including <linux/stddef.h>, but not using anything
from it, thus breaking build on non-Linux platforms (eg. FreeBSD).
Since not needed at all, just stop including it.

Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
2024-06-24 17:24:28 +00:00
Enrico Weigelt, metux IT consult
0cd18d0dfb OpenBSD: fix FTBS on misspelled and missing variables
../xf86drm.c:4622:9: error: use of undeclared identifier 'written'; did you mean 'write'?
    if (written + 1 > max_node_length)
        ^~~~~~~
        write

../xf86drm.c:4624:21: error: use of undeclared identifier 'sbuf'; did you mean 'sbrk'?
    if (stat(node, &sbuf))
                    ^~~~

Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net>
2024-06-24 12:57:51 +02:00
Nicolas Caramelli
7f20912b1b Remove libm in libdrm dependencies
Signed-off-by: Nicolas Caramelli <caramelli.devel@gmail.com>
2024-06-02 22:09:56 +00:00
Marek Olšák
70c4f836cc Bump version to 2.4.121 2024-06-01 13:31:41 -04:00
Marek Olšák
93d037cdd4 amdgpu: sync amdgpu_drm.h 2024-06-01 13:27:04 -04:00
Flora Cui
37265ab0ad tests/amdgpu: fix compile error with gcc14
../../drm/tests/amdgpu/shader_code.h:114:9: error: initialization of
‘const uint32_t *’ {aka ‘const unsigned int *’} from incompatible
pointer type ‘const uint32_t (*)[10][6]’ {aka ‘const unsigned int
(*)[10][6]’} [-Wincompatible-pointer-types]
  114 |         ps_##_ps##_shader_patchinfo_code_gfx##_n, \
      |         ^~~
../../drm/tests/amdgpu/shader_code.h:119:10: note: in expansion of macro
‘SHADER_PS_INFO’
  119 |         {SHADER_PS_INFO(const, 9), SHADER_PS_INFO(tex, 9)},
      |          ^~~~~~~~~~~~~~

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2024-05-27 10:37:25 +08:00
Flora Cui
cee441f32d tests/amdgpu: fix compile error with gcc7.5
fix commit cc3c80c6("tests/amdgpu: refactor dispatch/draw test")
../../SOURCES/drm/tests/amdgpu/shader_code.h:113:2: error: initializer
element is not constant
  ps_##_ps##_shader_patchinfo_code_size_gfx##_n, \
	    ^

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2024-05-27 10:37:18 +08:00
Flora Cui
058a04de62 tests/amdgpu: fix compile warning with the guard enum value
../../drm/tests/amdgpu/shader_test_util.c: In function
‘amdgpu_dispatch_init’:
../../drm/tests/amdgpu/shader_test_util.c:296:9: warning: enumeration
value ‘AMDGPU_TEST_GFX_MAX’ not handled in switch [-Wswitch]
  296 |         switch (test_priv->info->version) {
      |         ^~~~~~

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2024-05-27 10:37:13 +08:00
José Expósito
4df9173595 amdgpu: Make amdgpu_cs_signal_semaphore() thread-safe
The issue was found by a static analysis tool:

    Error: LOCK_EVASION (CWE-543):
    libdrm-2.4.115/amdgpu/amdgpu_cs.c:596: thread1_checks_field:
        Thread1 uses the value read from field "context" in the
        condition "sem->signal_fence.context". It sees that the
        condition is false. Control is switched to Thread2.
    libdrm-2.4.115/amdgpu/amdgpu_cs.c:596: thread2_checks_field:
        Thread2 uses the value read from field "context" in the
        condition "sem->signal_fence.context". It sees that the
        condition is false.
    libdrm-2.4.115/amdgpu/amdgpu_cs.c:598: thread2_acquires_lock:
        Thread2 acquires lock "amdgpu_context.sequence_mutex".
    libdrm-2.4.115/amdgpu/amdgpu_cs.c:599: thread2_modifies_field:
        Thread2 sets "context" to a new value. Note that this write can
        be reordered at runtime to occur before instructions that do
        not access this field within this locked region. After Thread2
        leaves the critical section, control is switched back to
        Thread1.
    libdrm-2.4.115/amdgpu/amdgpu_cs.c:598: thread1_acquires_lock:
        Thread1 acquires lock "amdgpu_context.sequence_mutex".
    libdrm-2.4.115/amdgpu/amdgpu_cs.c:599: thread1_overwrites_value_in_field:
        Thread1 sets "context" to a new value. Now the two threads have
        an inconsistent view of "context" and updates to fields of
        "context" or fields correlated with "context" may be lost.
    libdrm-2.4.115/amdgpu/amdgpu_cs.c:596: use_same_locks_for_read_and_modify:
        Guard the modification of "context" and the read used to decide
        whether to modify "context" with the same set of locks.
    #  597|                   return -EINVAL;
    #  598|           pthread_mutex_lock(&ctx->sequence_mutex);
    #  599|->         sem->signal_fence.context = ctx;
    #  600|           sem->signal_fence.ip_type = ip_type;
    #  601|           sem->signal_fence.ip_instance = ip_instance;

Check `sem->signal_fence.context` in the locked region to avoid a race
condition.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: José Expósito <jexposit@redhat.com>
2024-05-23 18:57:18 +00:00
Simon Ser
362b5b0a88 xf86drm: document drmDevicesEqual()
I always need to double-check what the return value means when
using that function (since it's not a bool).

Signed-off-by: Simon Ser <contact@emersion.fr>
2024-04-11 12:11:30 +02:00
David Heidelberg
1179edb49a include poll.h instead of sys/poll.h
Fixes: f803a45e74 ("add libsync.h helper")
Fixes: 4c18828e16 ("tegra: Add job and push buffer APIs")
Signed-off-by: David Heidelberg <david@ixit.cz>
2024-04-10 23:27:16 +00:00
Simon Ser
f94a79a7a7 ci: use "meson setup" sub-command
"meson" without a sub-command is deprecated.

Signed-off-by: Simon Ser <contact@emersion.fr>
2024-03-29 16:09:47 +01:00
Simon Ser
5a9cfb3c59 ci: build with meson --fatal-meson-warnings
This catches uses of deprecated features.

Signed-off-by: Simon Ser <contact@emersion.fr>
2024-03-29 11:44:09 +01:00
Joaquim Monteiro
764ed8b916
meson: Fix broken str.format usage
str.format used to allow any type as an argument, which often resulted
in using an internal string representation. This is considered broken
behavior, and is deprecated since Meson 1.3.0.

Signed-off-by: Joaquim Monteiro <joaquim.monteiro@protonmail.com>
2024-03-29 10:24:22 +00:00
Joaquim Monteiro
fbb83f74d6
meson: Replace usages of deprecated ExternalProgram.path()
!347 fixed some of these, but not all.

Signed-off-by: Joaquim Monteiro <joaquim.monteiro@protonmail.com>
2024-03-29 10:23:52 +00:00
Pierre-Eric Pelloux-Prayer
c7c3c14bfc amdgpu: fix deinit logic
The devices weren't removed from dev_list.

Instead of just fixing the issue by adding:

   if (*node) *node = dev->next;

after the while loop, use this opportunity to use a clearer
control flow.

Fixes: 7275ef8e ("amdgpu: add amdgpu_device_initialize2")
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
2024-03-27 08:55:26 +01:00
Matt Turner
c45ffb1edf symbols-check: Add _fbss, _fdata, _ftext
These are exported on mips/mips64.

See also: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11955
2024-03-25 15:35:58 +00:00
Matt Turner
525e80447f symbols-check: Add _GLOBAL_OFFSET_TABLE_
This is exported on hppa/parisc.

See also: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26978

Bug: https://bugs.gentoo.org/927204
2024-03-25 15:35:58 +00:00
Pierre-Eric Pelloux-Prayer
7275ef8eba amdgpu: add amdgpu_device_initialize2
Allows to opt-out from the device deduplication logic. This is not the
recommended way of using dev handles, but it's necessary for native context:
in this situation one process (eg: Qemu) will init many devices and we
want independent devices to make sure guest applications are isolated from
each other.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2024-03-21 11:03:38 +01:00
Pierre-Eric Pelloux-Prayer
6978f999ea amdgpu: add amdgpu_va_range_alloc2
This is the same functionnality that amdgpu_va_range_alloc offers,
except it's now usable without a device handle.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2024-03-21 10:57:04 +01:00
Pierre-Eric Pelloux-Prayer
96fe43a029 amdgpu: expose amdgpu_va_manager publicly
This will allow applications to use this feature without a device.

The first use case will be native context: we want VA address to
be managed by the guest (to avoid a round-trip to the host to only
generate a VA) but the amdgpu_device only exist on the host.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2024-03-21 10:57:02 +01:00
Pierre-Eric Pelloux-Prayer
4376848720 amdgpu: add amdgpu_va_manager
Until now VA management was tied to a device handle, but there's no
reason for this.

As a first step to export VA management outside of amdgpu_device,
this commit adds a new structure type holding the 4 va_mgr.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2024-03-21 10:56:29 +01:00
David Rosca
c8f327ce9c amdgpu: Make amdgpu_device_deinitialize thread-safe
Device will be removed from dev_list when refcount reaches 0, so the
dev_mutex must be locked before decreasing reference otherwise there's
a race where this device is still in dev_list with refcount 0 which will
assert or crash in amdgpu_device_initialize trying to use this device
instead of creating new one.

Fixes issue reported in https://gitlab.freedesktop.org/drm/amd/-/issues/2156#note_2268110

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2024-03-05 03:53:39 +00:00
Francesco Valla
1b4e04ba68 tests/util: add tidss driver
Add an entry for the "tidss" driver, so that the test utilities work
with this driver without passing the -M argument.

Signed-off-by: Francesco Valla <valla.francesco@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-02-26 23:50:25 +01:00
Adrián Larumbe
01f91aa73d meson: make build system happy by replacing deprecated feature
ExternalProgram.path() is deprecated since 0.55, use
ExternalProgram.full_path() instead.

Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
2024-02-15 01:20:02 +00:00
Dylan Baker
7c5c742de8 xf86drm: Don't consider node names longer than the maximum allowed
This fixes the logic that decides if a node name is valid to use the
same length restrictions that are used in drmDeviceAlloc, which expects
node names to conform to a specific naming scheme (On OSes except
OpenBSD this means `/dev/dri/renderD123`). This addresses the problem of
node names that are longer than expected, while still allowing symlinks
to work.

I've also applied the same fix to the OpenBSD path, while bringing the
check that `snprintf` didn't error from OpenBSD to the main path.

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
2024-02-12 12:03:21 -08:00
Dylan Baker
1aa800d464 Revert "xf86drm: ignore symlinks in process_device()"
This reverts commit 7ab1cdac90.

This breaks numerous tools that rely on being able to read symlinks, and
constitutes a regression.

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Closes: #103
2024-02-12 12:03:17 -08:00
Tobias Jakobi
7ab1cdac90 xf86drm: ignore symlinks in process_device()
If the user has some UDev rules in place that creates symlinks for
one of the card or render nodes, and the name of the symlink is
too long, then drmDeviceAlloc() ends up truncating the name of
the node.
This in turn results in chaos in different subsystems. E.g.
vulkaninfo dies early with this:

Code 0 : failed to stat DRM primary node /dev/dri/my-favorite- (VK_ERROR_INITIALIZATION_FAILED)
(if the symlink is called /dev/dri/my-favorite-card-node)

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
2024-02-08 14:23:52 +00:00
Jonathan Gray
140943281b amdgpu: add marketing names from amd-6.0.1 2024-01-24 11:17:03 +11:00
Jonathan Gray
9d9498f466 amdgpu: add marketing name for Radeon RX 6550M
from notebookcheck review of Lenovo ThinkPad Z16 Gen 2
2024-01-24 11:17:03 +11:00
Jonathan Gray
dfb8111ecb amdgpu: add marketing names from amd-6.0 2024-01-24 11:17:03 +11:00
Jonathan Gray
fb13af4398 amdgpu: add marketing names from Windows Steam Deck OLED APU driver 2024-01-24 11:17:03 +11:00
Jonathan Gray
6414474000 amdgpu: add marketing names from PRO Edition for W7700 2024-01-24 11:17:03 +11:00
Jonathan Gray
ad750dc608 amdgpu: add marketing names from Adrenalin 23.11.1 2024-01-24 11:17:03 +11:00
Simon Ser
75254bf239 build: bump version to 2.4.120
Signed-off-by: Simon Ser <contact@emersion.fr>
2024-01-13 10:37:07 +01:00
Simon Ser
6c4392f49b Sync headers with drm-next
Synchronize drm.h and drm_mode.h to drm-next.

Generated using make headers_install.
Generated from drm-next branch commit a60501d7c2d3e70b3545b9b96576628e369d8e85

Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Simon Zeni <simon.zeni@collabora.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-01-13 10:33:05 +01:00
Pierre-Eric Pelloux-Prayer
118addfaf8 amdgpu: fix use-after-free
Closes: https://gitlab.freedesktop.org/mesa/drm/-/issues/96
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2024-01-04 11:00:37 +01:00
Eric Engestrom
54b1208138 radeon: fix missing stencil_tile_mode initialisation in the linear/fallback case
../radeon/radeon_surface.c:1611:13: error: 'stencil_tile_mode' may be used uninitialized [-Werror=maybe-uninitialized]
 1611 |         r = si_surface_init_1d(surf_man, surf, surf->stencil_level, 1, stencil_tile_mode, surf->bo_size, 0);
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2024-01-01 07:43:19 +00:00
Marek Olšák
fc5f2239f3 meson: bump libdrm version to 2.4.119
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2023-12-21 06:49:36 -05:00
Marek Olšák
85343095fd amdgpu: add amdgpu_va_get_start_addr
for Mesa

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2023-12-21 06:49:34 -05:00
Simon Ser
02a41cf302 build: bump version to 2.4.118
Signed-off-by: Simon Ser <contact@emersion.fr>
2023-11-20 14:03:51 +01:00
Simon Ser
07f4948bfc xf86drmMode: add drmModeCloseFB()
Add a wrapper for the new CLOSEFB IOCTL, to close a framebuffer
without implicitly disabling planes or CRTCs.

See https://lore.kernel.org/dri-devel/20231020101926.145327-2-contact@emersion.fr/

Signed-off-by: Simon Ser <contact@emersion.fr>
2023-11-20 12:55:31 +00:00
Simon Ser
7b60986640 Sync headers with drm-next
Synchronize drm.h, drm_mode.h and drm_fourcc.h to drm-next.

Generated using make headers_install.
Generated from drm-next branch commit c79b972eb88b077d2765e7790d0902b3dc94d55c

Signed-off-by: Simon Ser <contact@emersion.fr>
2023-11-20 12:55:31 +00:00
Simon Ser
15b7fbf3e7 xf86drm: add drmGetNodeTypeFromDevId
This is useful to figure out whether the dev_t refers to a primary
node or a render node. Indeed, drmGetDeviceFromDevId returns a
drmDevice, which holds both the primary and render nodes.

Signed-off-by: Simon Ser <contact@emersion.fr>
2023-11-20 12:22:10 +00:00
Neil Armstrong
6acadd495c modetest: switch usage to proper options grammar
It was unclear how #mode could be used, so fixup the usage string and print
the struct grammar of the -s and -P options to clarify the usage.

The following grammar was compiled:
<plane_topology> ::= <plane_id> "@" <crtc_id> ":" <width> "x" <height> ( <plane_offsets> )?
<plane_offsets> ::= "+" <x_offset> "+" <y_offset> ( <plane_scale> )?
<plane_scale> ::= "*" <scale> ( <plane_format> )?
<plane_format> ::= "@" <format>

<mode_topology> ::= <connector_id> ( "," <connector_id> )* ( "@" <crtc_id> )? ":" <mode_selection> ( "@" <format> )?
<mode_selection> ::=  <indexed_mode> | <named_mode> | <custom_mode>
<indexed_mode> ::=  "#" <mode_index>
<named_mode> ::=  <width> "x" <height> ( "-" <vrefresh> )?
<custom_mode> ::=  <hdisplay> "," <hsyncstart> "," <hsyncend> "," <htotal> "," <vdisplay> "," <vsyncstart> "," <vsyncend> "," <vtotal>  "-" <vrefresh>
<property>  ::= <object_id> ":" <property_name> ":" <value>

<plane_id> ::= [0-9]+
<crtc_id> ::= [0-9]+
<width> ::= [0-9]+
<height> ::= [0-9]+
<x_offset> ::= [0-9]+
<y_offset> ::= [0-9]+
<scale> ::= [0-9]+ ( "." [0-9]+ )
<format> ::= ( [A-Z] | [0-9] )+
<connector_id> ::= [0-9]+
<mode_index> ::= [0-9]+
<hdisplay> ::= [0-9]+
<hsyncstart> ::= [0-9]+
<hsyncend> ::= [0-9]+
<htotal> ::= [0-9]+
<vdisplay> ::= [0-9]+
<vsyncstart> ::= [0-9]+
<vsyncend> ::= [0-9]+
<vtotal> ::= [0-9]+
<object_id> ::= [0-9]+
<vrefresh> ::= [0-9]+
<property_name> ::= ( [A-Z] | [0-9] | "_" )+
<value> ::= [0-9]+

with the https://bnfplayground.pauliankline.com/ service

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-11-15 09:11:48 +00:00
Geert Uytterhoeven
a0b011439d modetest: add support for big-endian XRGB1555/RGB565
Add support for creating buffers using big-endian formats.

For now this is limited to XRGB1555 and RGB565, which are the most
common big-endian formats.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - No changes,

v2:
  - New.
2023-10-31 13:24:32 +00:00
Geert Uytterhoeven
584a85b891 util: add pwetty support for big-endian RGB565
Add support for rendering the crosshairs in a buffer using the
big-endian RGB565 format.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - No changes,

v2:
  - New.
2023-10-31 13:24:32 +00:00
Geert Uytterhoeven
32a03fb32c util: fix pwetty on big-endian
Cairo always uses native byte order for rendering.

Hence if the byte order of the frame buffer differs from the byte order
of the CPU, the frame buffer contents need to be byteswapped twice: once
before rendering, to convert to native byte order, and a second time
after rendering, to restore the frame buffer format's byte order.

Note that byte swapping is not done for ARGB32 formats, as for these
formats, byte order only affects the order of the red, green, and blue
channels, which we do not care about here.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - Wrap byteswap_buffer{16,32}() implementation inside #if HAVE_CAIRO
    to avoid defined-but-not-used compiler warnings,

v2:
  - RGB30 is untested.
2023-10-31 13:24:32 +00:00
Geert Uytterhoeven
6f00a73485 util: add test pattern support for big-endian XRGB1555/RGB565
Add support for drawing the SMPTE and tiles test patterns in buffers
using big-endian formats.

For now this is limited to XRGB1555 and RGB565, which are the most
common big-endian formats.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - Increase indentation after definition of cpu_to_be16(),

v2:
  - New.
2023-10-31 13:24:32 +00:00
Geert Uytterhoeven
bc37db5c66 modetest: add support for parsing big-endian formats
When specifying a frame buffer format like "RG16_BE" (big-endian RG16),
modetest still uses the little-endian variant, as the format string is
truncated to four characters.

Fix this by increasing the format string size to 8 bytes (7 characters +
NUL terminator).

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - Update for suffix change from "be" to "_BE", cfr. commit
    ffb9375a50 ("xf86drm: handle DRM_FORMAT_BIG_ENDIAN in
    drmGetFormatName()"),
  - Replace hardcoded numbers in code by sizeof(),

v2:
  - New.
2023-10-31 13:24:32 +00:00
Geert Uytterhoeven
9d7024218f util: add missing big-endian RGB16 frame buffer formats
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - Update for suffix change from "be" to "_BE", cfr. commit
    ffb9375a50 ("xf86drm: handle DRM_FORMAT_BIG_ENDIAN in
    drmGetFormatName()"),

v2:
  - New.
2023-10-31 13:24:32 +00:00
Geert Uytterhoeven
1b8d0e5ccd util: fix 16 bpp patterns on big-endian
DRM formats are defined to be little-endian, unless the
DRM_FORMAT_BIG_ENDIAN flag is set.  Hence writes of multi-byte pixel
values need to take endianness into account.

Introduce a swap16() helper to byteswap 16-bit values, and a
cpu_to_le16() helper to convert 16-bit values from CPU-endian to
little-endian, and use the latter in the various pattern fill functions
for 16-bit formats.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - Increase indentation after definition of cpu_to_le16(),

v2:
  - New.
2023-10-31 13:24:32 +00:00
Geert Uytterhoeven
8cb6d837cc util: fix 32 bpp patterns on big-endian
DRM formats are defined to be little-endian, unless the
DRM_FORMAT_BIG_ENDIAN flag is set.  Hence writes of multi-byte pixel
values need to take endianness into account.

Introduce a swap32() helper to byteswap 32-bit values, and a
cpu_to_le32() helper to convert 32-bit values from CPU-endian to
little-endian, and use the latter in the various pattern fill functions
for 32-bit formats.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Pekka Paalanen <pekka.paalanen@collabora.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - Use new HAVE_BIG_ENDIAN symbol,

v3:
  - Increase indentation after definition of cpu_to_le32(),

v2:
  - Add Acked-by,
  - Add swap32() intermediate helper,
  - Add __ARM_BIG_ENDIAN and __s390__.
2023-10-31 13:24:32 +00:00
Geert Uytterhoeven
5dba8d73df intel: determine target endianness using meson
The endianness of the target is currently determined based on
preprocessor symbols.  Unfortunately some symbols checked are wrong
(sparc64-linux-gnu-gcc does not define __BIG_ENDIAN__ or SPARC), and
several checks for big-endian architectures are missing.

Fix this by introducing a new preprocessor symbol HAVE_BIG_ENDIAN, which
is set based on meson's knowledge of the target endianness.

Android.common.mk does not need an update, as Android is always
little-endian (https://developer.android.com/ndk/guides/abis.html).

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - Replace explicit #ifdef checks by a define set by meson,

v3:
  - No changes,

v2:
  - Add arm, aarch64, microblaze, s390, and sh.
2023-10-31 13:24:32 +00:00
Jonas Karlman
de88f74df9 modetest: add support for DRM_FORMAT_NV{15,20,30}
Add smpte and tiles pattern for 10-bit NV15, NV20 and NV30 pixel formats
based on the existing pattern for NV12 with colors simply scaled from
8-bit to 10-bit.

These pixel formats are typically used by video decoder and display
pipeline on Rockchip SoCs, e.g. on RK322X, RK3288, RK3328 and RK3399
the video decoder produce 10-bit video frames in NV15 and NV20 format.

NV20 and NV30 pixel formats was added in drm-misc commit 728c15b4b5f3
("drm/fourcc: Add NV20 and NV30 YUV formats").

This can be tested/validated on Rockchip SoCs with drm-misc commit
d4b384228562 ("drm/rockchip: vop: Add NV15, NV20 and NV30 support").

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Christopher Obbard <chris.obbard@collabora.com>
Tested-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-10-30 12:25:09 +00:00
David Jagu
8a933c778a meson: fix typo in libdrm_intel
Replace system() with cpu_family() for libdrm_intel
This restore libdrm_intel to be built by default

Closes: #93

Signed-off-by: David Jagu <marav8@free.fr>
2023-10-24 18:59:39 +02:00
Geert Uytterhoeven
a2dbfd6442 modetest: add SMPTE pattern support for C[124] formats
Add support for drawing the SMPTE pattern in buffers using a
color-indexed frame buffer formats with two, four, or sixteen colors.

Note that this still uses 256 as the CLUT size, as
DRM_IOCTL_MODE_SETGAMMA enforces that the size matches against the
(fixed) gamma size, while the CLUT size depends on the format.

Move clearing the color LUT entries from util_smpte_index_gamma() to its
caller, as only the caller knows how many entries there really are
(currently DRM always assumes 256 entries).

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - Add missing C[12] to oneline-summary,
  - Do not remove memset() of full lut, else some entries may stay
    uninitialized,

v3:
  - Add Acked-by,

v2:
  - Split off changes to tests/modetest/modetest.c,
  - Add C1 and C2 support.

The linuxdoc comments say userspace can query the gamma size:

 * drm_mode_gamma_set_ioctl - set the gamma table
 *
 * Set the gamma table of a CRTC to the one passed in by the user. Userspace can
 * inquire the required gamma table size through drm_mode_gamma_get_ioctl.

 * drm_mode_gamma_get_ioctl - get the gamma table
 *
 * Copy the current gamma table into the storage provided. This also provides
 * the gamma table size the driver expects, which can be used to size the
 * allocated storage.

but the code doesn't seem to support that in an easy way (like setting
red/green/blue to NULL on input, retrieving gamma_size on output), only
by providing big enough buffers for red/green/blue, and looping over
gamma_size until -EINVAL is no longer returned.
2023-10-24 09:45:14 +02:00
Geert Uytterhoeven
bf462d0311 modetest: add support for DRM_FORMAT_C[124]
Add support for creating buffers using the new color-indexed frame
buffer formats with two, four, and sixteen colors.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - Add Acked-by,

v2:
  - Split off changes to tests/modetest/buffers.c.
2023-10-24 09:45:09 +02:00
Geert Uytterhoeven
c895650f5d util: add SMPTE pattern support for C2 format
Add support for drawing the SMPTE pattern in a buffer using the C2
indexed format.

As only four colors are available, resolution is halved, and the pattern
is drawn in a PenTile RG-GB matrix, using Floyd-Steinberg dithering.
The magnitude of the green subpixels is reduced, as there are twice as
many green subpixels as red or blue subpixels.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Dithering example at https://drive.google.com/file/d/1g5O8XeacrjrC8rgaVENvR65YeI6QvmtO/view

v5:
  - Add Reviewed-by,

v4:
  - Replace FILL_COLOR() use by pentile_color_lut[],

v3:
  - Add Acked-by,

v2:
  - New.
2023-10-24 09:44:49 +02:00
Geert Uytterhoeven
6b9b462729 util: add SMPTE pattern support for C1 format
Add support for drawing the SMPTE pattern in a buffer using the C1
indexed format.

As only two colors are available, the pattern is drawn in black and
white, using Floyd-Steinberg dithering[1].

[1] https://en.wikipedia.org/wiki/Floyd%E2%80%93Steinberg_dithering

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Dithering example at https://drive.google.com/file/d/1waJczErrIaEKRhBCCU1ynxRG8agpo0Xx/view

v5:
  - Add Reviewed-by,

v4:
  - Replace FILL_COLOR() use by bw_color_lut[],

v3:
  - Add Acked-by,
  - Add Wikipedia link,

v2:
  New.
2023-10-24 09:44:29 +02:00
Geert Uytterhoeven
15c6657617 util: add SMPTE pattern support for C4 format
Add support for drawing the SMPTE pattern in a buffer using the C4
indexed format.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - Add Acked-by,

v2:
  - Use new smpte_top[],
  - Split off changes to tests/util/pattern.c.
2023-10-24 09:44:25 +02:00
Geert Uytterhoeven
8134deb31f util: store number of colors for indexed formats
Store the number of available colors for color-indexed frame
buffer formats in the format_info[] array.  This avoids the need of test
code for having to use switch statements all the time to obtain the
number of colors, or to check if a mode is color-indexed or not.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - Add Acked-by,

v2:
  - New.
2023-10-24 09:44:21 +02:00
Geert Uytterhoeven
236766b0b3 util: add support for DRM_FORMAT_C[124]
Add support for creating buffers using the new color-indexed frame
buffer formats with two, four, and sixteen colors.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - Add Acked-by,

v2:
  - Split off changes to tests/util/format.c.
2023-10-24 09:44:13 +02:00
Geert Uytterhoeven
6d9645bb3b util: factor out and optimize C8 SMPTE color LUT
The color LUT for the SMPTE pattern in indexed mode contains 22 entries,
although only 13 are non-unique.

Reduce the size of the color LUT by dropping duplicate entries, so it
can be reused for formats supporting e.g. 16 colors.  Rename the
function util_smpte_c8_gamma() to util_smpte_fill_lut(), and its first
parameter size to ncolors, to match their actual use.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - Rename util_smpte_index_gamma() to util_smpte_fill_lut(), and its
    first parameter from size to ncolors,
  - Move smpte_color_lut[] down,
  - Kill FILL_COLOR() macro,
  - Add and use EXPAND_COLOR() macro,

v3:
  - Add Acked-by,

v2:
  - Factor out smpte color LUT.
2023-10-24 09:44:04 +02:00
Geert Uytterhoeven
eb06a81e42 util: improve SMPTE color LUT accuracy
Fill in the LSB when converting color components from 8-bit to 16-bit.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
v5:
  - Add Reviewed-by,

v4:
  - No changes,

v3:
  - Add Acked-by,

v2:
  - New.
2023-10-24 09:43:30 +02:00
Simon Ser
5254fd1146 build: bump version to 2.4.117
Signed-off-by: Simon Ser <contact@emersion.fr>
2023-10-20 07:24:54 +02:00
Dylan Baker
bd205d133e meson: replace deprecated program.path -> program.full_path
To avoid Meson warnings

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2023-10-20 05:21:01 +00:00
Dylan Baker
16e6a96505 meson: Use feature.require() and feature.allowed()
To reduce the size and complexity of checks. require() allows combining
auto and enabled checks(), so that something like
```meson
x = get_option('feature')
y = false
if x.enabled()
  if not condition
    error(...)
  endif
  y = condition
endif
```
can be rewritten as:
```meson
y = get_option('feature').require(condition, error_message : ...).allowed()
```
require checks the condition, then if the feature is required it emits
an error with the given message otherwise it returns a disabled feature.
allowed then returns whether the feature is not disabled, and returns
that (ie, .allowed() == not .disabled()). This is especially helpful for
longer more complex conditions

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2023-10-20 05:21:01 +00:00
Dylan Baker
a6a2ccb448 meson: fix intel requirements
Intel requires libpciaccess and an x86/x86_64 host, so if those
aren't found and it's enabled we need to error

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2023-10-20 05:21:01 +00:00
Samuel Pitoiset
8d8357dc64 amdgpu: add support for querying VM faults information
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2023-10-10 10:25:07 +02:00
Samuel Pitoiset
22b698a599 amdgpu: amdgpu_drm.h for new GPUVM fault ioctl
Based on agd5f/drm-next.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2023-10-10 10:25:07 +02:00
Simon Ser
6abc164052 ci: bump FreeBSD to 13.2
13.0 is no longer supported and causes a 404 when fetching the
image, see e.g. [1] for example failure.

[1]: https://gitlab.freedesktop.org/mesa/drm/-/jobs/45849458

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-09-19 23:39:10 +09:00
Simon Ser
bdab606879 xf86drm: mark DRM_MAX_MINOR as deprecated
With the work in [1], libdrm users should no longer rely on the
minor numbering scheme we've used so far. Instead, they should use
drmGetDevices2().

[1]: https://lore.kernel.org/lkml/20230724211428.3831636-1-michal.winiarski@intel.com/

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-09-19 23:35:59 +09:00
Chia-I Wu
13691f5266 modetest: print modifiers in hex as well
Print modifiers in hex in addtion to in strings returned by
drmGetFormatModifierName.  In some cases, hex numbers can be more easily
compared visually.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
2023-09-13 16:26:49 +00:00
Marijn Suijten
dfd00c6250 modetest: allocate and commit atomic request around set_property()
Currently the atomic request is only assigned after `set_property()` is
called, leaving `dev.req` in its uninitialized state causing
`drmModeAtomicAddProperty()` to return an error code, which is printed
as `"Success"` because `errno` is not set by `libdrm` (but it would have
been when non-atomic `drmModeObjectSetProperty()` called an IOCTL
immediately):

    sony-akatsuki-row ~ $ modetest -M msm -a -w 81:ACTIVE:0
    failed to set CRTC 81 property ACTIVE to 0: Success

Solve this by assigning a new atomic request object before calling
`set_property()`, when there are properties to set.  Likewise, commit
these properties after `set_property()` even if there is no other
operation (setting modes or planes) specified.

Furthermore `drmModeObjectSetProperty()` is implemented in terms of
`DRM_IOCTL()` which already returns `-errno` when `ioctl()` returns
`-1`, so we should instead pass `ret` to `strerror()` and get an
accurate error string out of `drmModeAtomicAddProperty()` too.

Fixes: 93220283 ("tests/modetest: Add atomic support")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
2023-09-10 12:14:06 +00:00
Neil Armstrong
7618a64633 modetest: allow using -r and -P
Since now -r sets the pipe struct and count like -s we can also
use -P with -r.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-09-10 11:55:14 +00:00
Neil Armstrong
2e17aea573 modetest: permit -r and -s to work together
Let's permit testing vsync with the default mode, this returns
back the pipe content and count when calling set_mode() so the
vsync test can also be used.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-09-10 11:55:14 +00:00
Marijn Suijten
64b09cef49 modetest: document why no blob is created for linear gamma LUT
As found and discussed in [MR 58] a blob is not created in the else arm
because adding the GAMMA_LUT property with a NULL/0 blob_id causes it
to be reset to a default linear / pass-thru gamma table.  The values
in the gamma_lut table might still be consumed in the legacy API path
below though, so it has to be initialized to a linear table.

[MR 58]: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/58#note_466972

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
2023-09-09 11:07:56 +02:00
Ezequiel Garcia
b709c3010e modetest: avoid erroring if there's no gamma legacy support
Let's follow the Rule of Silence. And while here,
document what's going on.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
2023-09-09 11:07:47 +02:00
Dmitry Baryshkov
45f3d9bab6 modetest: custom mode support
It is useful to be able to specify mode parameters manually. Add support
for setting user-supplied modes. This patch is based on the original
idea by Rohit and Jessica, but implemented from scratch.

Suggested-by: Rohith Iyer <quic_rohiiyer@quicinc.com>
Suggested-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-09-08 18:19:31 +00:00
Geert Uytterhoeven
4d3635fada util: remove unused definitions of RED, GREEN, and BLUE
These are unused since commit edcef53685 ("modetest: Add test
pattern support for missing RGB formats").

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
v2:
  - Add Reviewed-by.
2023-09-08 18:01:43 +00:00
Geert Uytterhoeven
ea5237e549 modetest: fix mode_vrefresh() for interlace/dblscan/vscan
mode_vrefresh() does not take into account interlaced, doublescan, and
multiscan modes, leading to incorrect refresh rates.

Fix this, based on drm_mode_vrefresh() in Linux.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2023-09-08 18:01:43 +00:00
Geert Uytterhoeven
022a4d8a82 util: fix grey in YUV SMPTE patterns
The YUV SMPTE patterns use RGB 191/192/192 instead of 192/192/192 for
the grey color in the top color bar.

Change it to 192/192/192, to match the RGB SMPTE patterns.

Fixes: a94ee62429 ("modetest: Add SMPTE test pattern")
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
v2:
  - Add Reviewed-by.
2023-09-08 18:01:43 +00:00
Geert Uytterhoeven
be42051ead modetest: add support for DRM_FORMAT_NV{24,42}
Add support for creating buffers using semi-planar YUV formats with
non-subsampled chroma planes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
v2:
  - Add Reviewed-by.
2023-09-08 17:42:38 +00:00
Geert Uytterhoeven
8e5286d4f9 util: add pattern support for DRM_FORMAT_NV{24,42}
Add support for drawing the SMPTE and tiles patterns in buffers using
semi-planar YUV formats with non-subsampled chroma planes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
v2:
  - Add Reviewed-by.
2023-09-08 17:42:38 +00:00
Geert Uytterhoeven
cd3b248cdc util: add NV24 and NV42 frame buffer formats
Add the missing entries for semi-planar YUV formats with
non-subsampled chroma planes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
v2:
  - Add Reviewed-by.
2023-09-08 17:42:38 +00:00
Rohith Iyer
8db39ef7bb modetest: add support for writeback connector
Add writeback support to modetest with the below options:

- Passing in -a -c will now also show the writeback connector

- Dump the writeback output buffer to bitstream
  Usage: "./modetest -M msm -s <connector_id>:<widthxheight>
          -a -o <filepath>
          -P <plane_id>@<crtc_id>:<widthxheight>+0+0@RG24"

This currently supports single writeback connector.

Co-developed-by: Rohith Iyer <quic_rohiiyer@quicinc.com>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
[DB: dropped custom mode support, fixed segfault]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2023-09-08 16:27:39 +00:00
Jonathan Gray
ee52a88a57 amdgpu: add marketing names from Adrenalin 23.9.1 2023-09-07 01:28:25 +10:00
Jonathan Gray
0be9179f41 amdgpu: add marketing names from Adrenalin 23.7.2 2023-09-05 19:25:16 +00:00
Jonathan Gray
e194de72d3 amdgpu: add marketing names from PRO Edition 23.Q3 W7000 2023-09-05 19:25:16 +00:00
Jonathan Gray
51f3109f19 amdgpu: add marketing names from amd-5.5.1 (23.10.1) 2023-09-05 19:25:16 +00:00
Jonathan Gray
d4a7ee1a56 amdgpu: add marketing names from amd-5.4.6 (22.40.6) 2023-09-05 19:25:16 +00:00
Geert Uytterhoeven
6a961ca843 amdgpu: Use PRI?64 to format uint64_t
On 32-bit:

    ../tests/amdgpu/amdgpu_stress.c: In function ‘alloc_bo’:
    ../tests/amdgpu/amdgpu_stress.c:178:49: warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 4 has type ‘uint64_t’ {aka ‘long long unsigned int’} [-Wformat=]
      fprintf(stdout, "Allocated BO number %u at 0x%lx, domain 0x%x, size %lu\n",
                                                   ~~^
                                                   %llx
       num_buffers++, addr, domain, size);
                      ~~~~
    ../tests/amdgpu/amdgpu_stress.c:178:72: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 6 has type ‘uint64_t’ {aka ‘long long unsigned int’} [-Wformat=]
      fprintf(stdout, "Allocated BO number %u at 0x%lx, domain 0x%x, size %lu\n",
                                                                          ~~^
                                                                          %llu
       num_buffers++, addr, domain, size);
                                    ~~~~
    ../tests/amdgpu/amdgpu_stress.c: In function ‘submit_ib’:
    ../tests/amdgpu/amdgpu_stress.c:276:54: warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 5 has type ‘uint64_t’ {aka ‘long long unsigned int’} [-Wformat=]
      fprintf(stdout, "Submitted %u IBs to copy from %u(%lx) to %u(%lx) %lu bytes took %lu usec\n",
                                                        ~~^
                                                        %llx
       count, from, virtual[from], to, virtual[to], copied, delta / 1000);
                    ~~~~~~~~~~~~~
    ../tests/amdgpu/amdgpu_stress.c:276:65: warning: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 7 has type ‘uint64_t’ {aka ‘long long unsigned int’} [-Wformat=]
      fprintf(stdout, "Submitted %u IBs to copy from %u(%lx) to %u(%lx) %lu bytes took %lu usec\n",
                                                                   ~~^
                                                                   %llx
       count, from, virtual[from], to, virtual[to], copied, delta / 1000);
                                       ~~~~~~~~~~~
    ../tests/amdgpu/amdgpu_stress.c:276:70: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 8 has type ‘uint64_t’ {aka ‘long long unsigned int’} [-Wformat=]
      fprintf(stdout, "Submitted %u IBs to copy from %u(%lx) to %u(%lx) %lu bytes took %lu usec\n",
                                                                        ~~^
                                                                        %llu
       count, from, virtual[from], to, virtual[to], copied, delta / 1000);
                                                    ~~~~~~
    ../tests/amdgpu/amdgpu_stress.c:276:85: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 9 has type ‘uint64_t’ {aka ‘long long unsigned int’} [-Wformat=]
      fprintf(stdout, "Submitted %u IBs to copy from %u(%lx) to %u(%lx) %lu bytes took %lu usec\n",
                                                                                       ~~^
                                                                                       %llu
       count, from, virtual[from], to, virtual[to], copied, delta / 1000);
                                                            ~~~~~~~~~~~~
    ../tests/amdgpu/amdgpu_stress.c: In function ‘parse_size’:
    ../tests/amdgpu/amdgpu_stress.c:296:24: warning: format ‘%li’ expects argument of type ‘long int *’, but argument 3 has type ‘uint64_t *’ {aka ‘long long unsigned int *’} [-Wformat=]
      if (sscanf(optarg, "%li%1[kmgKMG]", &size, ext) < 1) {
                          ~~^             ~~~~~
                          %lli
    ../tests/amdgpu/amdgpu_stress.c: In function ‘main’:
    ../tests/amdgpu/amdgpu_stress.c:378:45: warning: format ‘%lu’ expects argument of type ‘long unsigned int’, but argument 3 has type ‘uint64_t’ {aka ‘long long unsigned int’} [-Wformat=]
         fprintf(stderr, "Buffer size to small %lu\n", size);
                                               ~~^     ~~~~
                                               %llu

Fix this by using the proper "PRI?64" format specifiers.

Fixes: d77ccdf3ba ("amdgpu: add amdgpu_stress utility v2")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
---
On Linux/amd64, the format strings in the resulting binary are
unchanged.

v3:
  - Add Reviewed-by,

v2:
  - Use PRI?64 to unbreak 64-bit build.
2023-09-04 09:31:55 +02:00
Geert Uytterhoeven
ca041d5fe6 amdgpu: Fix pointer/integer mismatch warning
On 32-bit:

    ../amdgpu/amdgpu_bo.c: In function ‘amdgpu_find_bo_by_cpu_mapping’:
    ../amdgpu/amdgpu_bo.c:554:13: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
           cpu < (void*)((uintptr_t)bo->cpu_ptr + bo->alloc_size))
                 ^

Indeed, as amdgpu_bo_info.alloc_size is "uint64_t", the sum is
always 64-bit, while "void *" can be 32-bit or 64-bit.

Fix this by casting bo->alloc_size to "size_t", which is either
32-bit or 64-bit, just like "void *".

Fixes: c6493f360e ("amdgpu: Eliminate void* arithmetic in amdgpu_find_bo_by_cpu_mapping")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
---
v2:
  - Add Reviewed-by.
2023-09-04 09:31:36 +02:00
Simon Ser
7bdb135f0c build: bump version to 2.4.116
Signed-off-by: Simon Ser <contact@emersion.fr>
2023-08-23 11:57:39 +02:00
Dor Askayo
18644eb64f nouveau: add interface to make buffer objects global
This is useful for when GEM handles are exported and may be shared
between multiple buffer objects without going through other libdrm
interfaces.

Signed-off-by: Dor Askayo <dor.askayo@gmail.com>
Reviewed-by: Karol Herbst <git@karolherbst.de>
2023-08-17 21:09:55 +00:00
James Zhu
3bc3cca230 xf86drm: use drm device name to identify drm node type
Currently drm node's minor range is used to identify node's type.
Since kernel drm uses node type name and minor to generate drm
device name, It will be more general to use drm device name to
identify drm node type.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2023-08-16 09:28:59 -04:00
James Zhu
7130cb163e xf86drm: update DRM_NODE_NAME_MAX supporting more nodes
Current DRM_NODE_NAME_MAX only can support up to 999 nodes,
Update to support up to 2^MINORBITS nodes.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2023-08-16 09:28:57 -04:00
Simon Ser
c6013245ce xf86drm: add drmSyncobjEventfd
This is a wrapper for DRM_IOCTL_SYNCOBJ_EVENTFD.

Signed-off-by: Simon Ser <contact@emersion.fr>
2023-07-27 16:10:41 +02:00
Simon Ser
431becd4e0 Sync headers with drm-next
Synchronize drm.h, drm_mode.h and drm_fourcc.h to drm-next.

Generated using make headers_install.
Generated from drm-next branch commit 52920704df878050123dfeb469aa6ab8022547c1

Signed-off-by: Simon Ser <contact@emersion.fr>
2023-07-27 15:57:59 +02:00
Simon Ser
4de32c8609 xf86drm: drop control nodes implementation
Drop support for control nodes. The kernel never returns such
nodes. Stop trying to detect and handle them, and always return
an error when a caller tries to open them.

The header is left untouched to avoid breaking libdrm's API.

Signed-off-by: Simon Ser <contact@emersion.fr>
2023-07-26 08:26:05 +00:00
Simon Ser
4b51e34d1a xf86drm: bump DRM_MAX_MINOR to 64
This is what the kernel uses (see drm_minor_alloc).

Signed-off-by: Simon Ser <contact@emersion.fr>
2023-07-26 08:22:27 +00:00
Xaver Hugl
cc8c223c9e xf86drmMode: constify drmModeCrtcSetGamma
The data is never modified, so it should be const

Signed-off-by: Xaver Hugl <xaver.hugl@gmail.com>
2023-07-20 11:01:48 +00:00
Ruijing Dong
5e0b1df4fb tests/amdgpu/vcn: fix session buffer issue for vcn1-vcn3
issue:
   in vcn1-vcn3, session buffer was not truly added, it shows
   decoding creation commands cannot be sent multiple times.

problem:
   session buffer has to be the first buffer sending out.
   Otherwise, system could assume session buffer doesn't
   exist.

solution:
   move session buffer sending sequence to be the first one.

Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
2023-07-17 08:40:11 -04:00
Saleemkhan Jamadar
7d7a9901bd tests/amdgpu/vcn:update decoder unit test
update decoder unit test with session context buffer for VCN v1 to v4

v2: remove multiple checks for vcn4 (Ruijing Dong)

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
2023-07-06 14:03:15 -04:00
Marek Olšák
98e1db5011 amdgpu: add an environment variable that overrides the context priority
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2023-05-11 12:53:29 -04:00
Ruijing Dong
7784d57166 tests/amdgpu/vcn: fix drm test failure
1. fixed an issue that drm test vcn3/4 encoding test
   could cause VCN engine stuck.
2. adding missing or errous encoding ib package members.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
2023-05-11 11:09:38 -04:00
Ruijing Dong
03d18b44db tests/amdgpu/vcn: change vbv_buffer name to input
It is input buffer instead of vbv_buffer.
Correct its name.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
2023-05-11 11:09:32 -04:00
Luben Tuikov
28d9a3c4fb tests/amdgpu: Allow to exclude a test or a suite of tests
Add the command line argument -e s[.t] to exclude (disable) suite s, or to
exclude suite s test t.

This is useful for instance to run the Basic Suite, but disable the GPU reset
test, on the command line, like this:

    amdgpu_tests -s 1 -e 1.13

This option can be specified more than once on the command line, in order to
exclude more than one suite and/or suite and test combination from being run.

Cc: Alex Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2023-03-24 13:47:21 +00:00
Luben Tuikov
41121251de tests/amdgpu: Add all 9 options to the help output
Add -s and -t to the help output, as well as sort
the options output alphabetically.

v1: Fix a spelling in the subject of this commit.

Cc: Alex Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2023-03-24 13:47:21 +00:00
Luben Tuikov
25e08fd9ae tests/amdgpu: Fix Usage string
Fix the Usage: string on -h (help) in amdgpu_tests.c,
so brackets match, and remove mismatched angle brackets.

Cc: Alex Deucher <Alexander.Deucher@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2023-03-24 13:47:21 +00:00
Jonathan Gray
bf867aed27 amdgpu: add marketing names from amd-5.4.3 (22.40.3) 2023-03-24 13:21:42 +00:00
Pierre-Eric Pelloux-Prayer
466e3c0c24 amdgpu: remove va::dev member
This is unused so drop it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2023-03-24 11:25:10 +01:00
jie zhang
d1681af054 test/amdgpu/hotunplug: add apu check for hotplug test
For apu, it is integrated with cpu.
So hotplug test should be unnecessary for it.

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Flora Cui <flora.cui@amd.com>
2023-03-17 17:24:14 +00:00
Jan Beich
332809f3ee meson: drop pthread-stubs dependency on BSDs
pthread-stubs >= 0.4 simply passes -pthread which is similar to what
dependency('threads') returns. And make it a private dependency
for subprojects even on Linux.

Reviewed-by: Emmanuel Vadot <manu@FreeBSD.org>
2023-02-10 14:58:52 +00:00
Yi Xie
c6d6dce99f tests/util: Add vkms driver
Add an entry for the "vkms" driver, so that the test utilities work with
the vkms driver without passing the -M argument.

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Yi Xie <yixie@google.com>
2023-02-10 05:22:52 +00:00
Simon Ser
ee558cea20 build: bump version to 2.4.115
Signed-off-by: Simon Ser <contact@emersion.fr>
2023-02-09 12:55:44 +01:00
Simon Ser
6c4c48e61c xf86drm: add support for printing AMD GFX11 modifiers
See kernel commit 543036a2de71 ("drm/amd: Add GFX11 modifiers support
to AMDGPU (v3)").

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2023-02-09 10:41:58 +01:00
Alex Deucher
0e2c7d0571 amdgpu: add some additional marketing names
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03 11:20:38 -05:00
Alex Deucher
bdcd492328 amdgpu: add marketing names from amd-5.4 (22.40)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-03 11:20:27 -05:00
Simon Ser
64d6fabaa1 xf86drm: fix warning in drmGetFormatModifierNameFromVivante()
Fixes the following warning:

    ../xf86drm.c: In function ‘drmGetFormatModifierNameFromVivante’:
    ../xf86drm.c:614:14: warning: passing argument 1 of ‘asprintf’ from incompatible pointer type [-Wincompatible-pointer-types]
      614 |     asprintf(&mod_vivante, "%s%s%s", color_tiling, tile_status, compression);
          |              ^~~~~~~~~~~~
          |              |
          |              const char **
    In file included from ../xf86drm.c:34:
    /usr/include/stdio.h:396:40: note: expected ‘char ** restrict’ but argument is of type ‘const char **’
      396 | extern int asprintf (char **__restrict __ptr,
          |                      ~~~~~~~~~~~~~~~~~~^~~~~
    ../xf86drm.c:615:12: warning: return discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
      615 |     return mod_vivante;
          |            ^~~~~~~~~~~

Signed-off-by: Simon Ser <contact@emersion.fr>
2022-12-21 16:42:44 +01:00
Philipp Zabel
874af99463 xf86drm: Add support for decoding Vivante format modifiers
Allow applications to pretty-print Vivante format modifiers.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2022-11-30 18:18:17 +01:00
Philipp Zabel
329eebcf32 drm_fourcc: sync drm_fourcc with latest drm-next kernel
Update drm_fourcc.h to include latest changes from drm-next branch.
This brings in sub-8bpp formats, AVUY and XVUY 8:8:8:8, and
Vivante tile-status and compression modifiers.

Generated using make headers_install.
Generated from drm-next branch commit 077bd80083ab

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2022-11-30 18:18:17 +01:00
Matt Roper
07dae1d108 intel: Eliminate need to keep adding PCI IDs
The Intel-specific code in libdrm is continually updated with new PCI
IDs for each new platform so that we can recognize the IP version
properly.  However this is mostly a pointless exercise; none of the
Intel code in libdrm is conditional on IP versions above 8.  If we just
treat any future unrecognized Intel platforms as IP version 8, we should
get the same behavior without the need for continued PCI ID updates.

Note that the intel_decode tool probably _should_ have conditions on
newer IP versions, but it was last updated for gen8 and has been
bitrotting from gen9 onward.  This change won't make the tool behave any
more incorrectly than it already does today.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2022-11-22 16:00:57 -08:00
Saleemkhan Jamadar
e699b28b54 tests/amdgpu/jpeg: enable unit test for jpeg 4
Enable decode unit test for jpeg4.

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
2022-11-11 09:57:01 -05:00
Lang Yu
0a8fad5f5c tests/amdgpu: use AMDGPU_TIMEOUT_INFINITE to query fence
We need to wait longer when running on emulator.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
2022-11-09 14:57:14 +08:00
Simon Ser
b9ca37b313 build: bump version to 2.4.114
Signed-off-by: Simon Ser <contact@emersion.fr>
2022-11-03 09:33:36 +01:00
Simon Ser
e832f5b0b8 modetest: use dumb buffer helpers
Signed-off-by: Simon Ser <contact@emersion.fr>
2022-11-02 18:46:38 +01:00
Simon Ser
ce22377778 modetest: use sized integers in struct bo
Use the same size types as the kernel.

Signed-off-by: Simon Ser <contact@emersion.fr>
2022-11-02 18:46:15 +01:00
Simon Ser
fc6bc66c64 modetest: drop unused offset field in struct bo
Signed-off-by: Simon Ser <contact@emersion.fr>
2022-11-02 18:45:42 +01:00
Simon Ser
3be3b1a83f xf86drmMode: add helpers for dumb buffers
Up until now, DRM clients had to hand-roll their code to create,
destroy and map dumb buffers. This is slightly inconvenient,
a bit error-prone, and not easily discoverable.

Introduce wrappers for these operations, just like we have for
other KMS IOCTLs.

Signed-off-by: Simon Ser <contact@emersion.fr>
2022-10-27 22:18:22 +02:00
Simon Ser
82b2b1e898 amdgpu: silence uninitialized variable warning
The compiler isn't smart enough to tell that this can't happen:

    [30/74] Compiling C object amdgpu/libdrm_amdgpu.so.1.0.0.p/amdgpu_bo.c.o
    In file included from ../amdgpu/amdgpu_internal.h:32,
                     from ../amdgpu/amdgpu_bo.c:39:
    ../xf86atomic.h: In function ‘amdgpu_find_bo_by_cpu_mapping’:
    ../xf86atomic.h:47:54: warning: ‘bo’ may be used uninitialized [-Wmaybe-uninitialized]
       47 | # define atomic_inc(x) ((void) __sync_fetch_and_add (&(x)->atomic, 1))
          |                                                      ^
    ../amdgpu/amdgpu_bo.c:536:27: note: ‘bo’ was declared here
      536 |         struct amdgpu_bo *bo;
          |                           ^~

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2022-10-23 17:47:24 +02:00
Alex Deucher
a81b9ab8f3 amdgpu: Add a default marketing name if none is found
Apparently quite a few apps use this API to get the GPU
name and end up with NULL as the GPU name.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-10-17 16:19:44 -04:00
Alex Deucher
613cc945b3 amdgpu_ids: add MI marketing names
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-10-17 16:19:44 -04:00
Alex Deucher
2ca30c7e4f amdgpu.ids: update to the latest marketing name
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-10-17 16:19:44 -04:00
Alex Deucher
7e4aa50e3d amdgpu.ids: sort the file
So the list is in numeric order.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-10-17 16:19:44 -04:00
Alex Deucher
74b7b618dc amdgpu.ids: use consistent formatting for RID
Use two digits for the revision id.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-10-17 16:19:44 -04:00
Simon Ser
ffb9375a50 xf86drm: handle DRM_FORMAT_BIG_ENDIAN in drmGetFormatName()
This bit can be added to a DRM format to indicate that it's
big endian instead of little endian.

Signed-off-by: Simon Ser <contact@emersion.fr>
2022-10-17 12:03:50 +02:00
Marco Felsch
e08a22dc43 tests/util: add imx-lcdif driver
This makes the test utilities work with the i.MX LCDIFv3 driver
without the necessity of using the -M argument.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2022-10-06 18:38:29 +02:00
Simon Ser
0bd3e4e94f build: automatically disable Intel if pciaccess is not found
Wire up the pciaccess dep to the intel option. This automatically
skips the dep if intel is explicitly disabled, fails if intel is
explicitly enabled and it's not found, and disables intel if it's
set to auto and the dep is not found.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2022-10-03 09:03:30 +02:00
Simon Ser
2df9cc28c0 intel: move declarations to top in drm_intel_gem_bo_unreference()
Fixes the following warning:

    [65/74] Compiling C object intel/libdrm_intel.so.1.0.0.p/intel_bufmgr_gem.c.o
    ../intel/intel_bufmgr_gem.c: In function ‘drm_intel_gem_bo_unreference’:
    ../intel/intel_bufmgr_gem.c:1388:9: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
     1388 |         drm_intel_bufmgr_gem *bufmgr_gem =
          |         ^~~~~~~~~~~~~~~~~~~~

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2022-10-03 08:54:43 +02:00
Jordan Justen
e0df5fce89
include/drm/i915_drm.h: Update from Linux v6.0-rc7
Generated from the Linux v6.0-rc7 tag with a sha1 of
f76349cf41451c5c42a99f18a9163377e4b364ff.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2022-09-28 17:04:12 -07:00
Jordan Justen
e2504b921f
include/drm/drm_fourcc.h: Update from Linux v6.0-rc7
Generated from the Linux v6.0-rc7 tag with a sha1 of
f76349cf41451c5c42a99f18a9163377e4b364ff.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2022-09-28 17:03:04 -07:00
Eli Schwartz
474894ed17
meson: fast-fail on unsupported OSes
It's not worth even attempting to configure anything on OSes where there
is no DRM to have a userspace library for.

This failure message can be useful in e.g. the case where libdrm is an
optional wrap fallback in another project.

Signed-off-by: Eli Schwartz <eschwartz93@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2022-09-11 01:49:42 -04:00
Simon Ser
fb5c0c301a build: bump to version 2.4.113
Signed-off-by: Simon Ser <contact@emersion.fr>
2022-08-31 16:38:38 +02:00
Simon Ser
e761875fc5 tests/modetest: use drmGetFormatName()
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marius Vlad <marius.vlad@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
2022-08-31 06:40:49 +00:00
Simon Ser
baa4b8cafc xf86drm: add drmGetFormatName()
Same as drmGetFormatModifierName() but for formats.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marius Vlad <marius.vlad@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
2022-08-31 06:40:49 +00:00
Matt Roper
03e0ab4d88 intel: Hook up new platforms IDs
In commit 98794e2a0d ("lib: sync i915_pciids.h with kernel") we
resynchronized the PCI header with the kernel to bring in the
definitions for several new platforms.  But before those IDs will be
recognized, we still need to hook them up in the libdrm chipset code as
well.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/5416
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2022-08-30 19:32:48 +00:00
Sui Jingfeng
33f0009de5 meson: auto-enable etnaviv on arm, arc, mips and loongarch architectures
There is a Vivante GC1000 gpu in LS2K1000 and LS7A1000.

LS7A1000 is a bridge chip made by Loongson corporation
which act as north and/or south bridge of loongson's
desktop and server level processor. It is equivalent
to RS780E or something like that. In fact, the company
use RS780E as bridge of LS3A3000 at its early stage,
but as RS780E is out of stock long long time ago, the
company have to made one by themself. More details can
be read from its user manual[1].

This bridge chip typically use with LS3A3000, LS3A4000
and LS3A5000.

LS3A3000 is 4 core 1.45gHz mips64r2 compatible cpu.
LS3A4000 is 4 core 1.8gHz mips64r5 compatible cpu.
LS3A5000 is 4 core 2.5gHz loongarch cpu, the company
acclaim that loongarch a new archtecture with its
instruction set is released[2].

LS2K1000 is a double core 1.0Ghz mips64r2 compatible SoC[3].

we need to enable it to test and developing driver on above
listed archtecture.

[1] https://loongson.github.io/LoongArch-Documentation/Loongson-7A1000-usermanual-EN.html
[2] https://loongson.github.io/LoongArch-Documentation/Loongson-3A5000-usermanual-EN.html
[3] https://wiki.debian.org/InstallingDebianOn/Lemote/Loongson2K1000

Signed-off-by: Sui Jingfeng <15330273260@189.cn>

[Eric: rebase over meson changes, add ARM & ARC architectures, and drop
"experimental" from the description]
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
2022-08-30 16:03:36 +01:00
Matt Turner
d4bb19e2c4 intel: Avoid aliasing violation
../intel/test_decode.c: In function ‘compare_batch’:
../intel/test_decode.c:109:39: error: dereferencing type-punned pointer might break strict-aliasing rules [-Werror=strict-aliasing]
  109 |         out = open_memstream((char **)&ptr, &size);
      |                                       ^~~~
cc1: some warnings being treated as errors

The fix is simple: just declare `ptr` as a `char *` to begin with.
2022-08-23 22:54:15 +00:00
Eric Engestrom
3ff3d59ed9 atomic: fix atomic_add_unless() fallback's return value
According to the kernel documentation:
  Returns non-zero if @v was not @u, and zero otherwise.

Fixes: 63fc571863 ("atomic: add atomic_add_unless()")
Closes: https://gitlab.freedesktop.org/mesa/drm/issues/17
Signed-off-by: David Shao <davshao@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>

[Eric: fix its callers to maintain current behaviour]
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
2022-08-23 22:49:34 +00:00
Matthieu Herrb
cf54ebf6cf Remove unused 3rd parameter to open(2)
The 3rd parameter is only used with the O_CREAT flag

Signed-off-by: Matthieu Herrb <matthieu@herrb.eu>
2022-08-23 22:43:38 +00:00
Eric Engestrom
a64a176cfd meson: simplify some more build options by using features
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-08-23 18:52:16 +01:00
Eric Engestrom
26eb15165b meson: convert auto combos into proper features
Allows users to easily enable everything (eg. packagers), or select just
the drivers they want with something like:
    -D auto-features=disabled -D amdgpu=enabled

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-08-23 18:52:16 +01:00
Eric Engestrom
4a7706b2a4 ci: drop dead script since e722ba9f67
Noticed-by: Michel Daenzer <michel@daenzer.net>
2022-08-23 17:54:58 +01:00
Eric Engestrom
502f64cb30 meson: fix value of auto for a bunch of drivers
You can't have an error if your driver is requested by you're missing
a dep, but then happily build that driver without the dep in `auto`.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
2022-08-22 21:06:22 +01:00
Eric Engestrom
3e3874d50d ci: bump images tags to take !255 into effect
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-08-22 18:53:08 +01:00
Eric Engestrom
f32db9d354 ci/freedesktop: bump python version of docutils package as 3.8 no longer exists 2022-08-22 18:50:04 +01:00
Eric Engestrom
1637d8b020 ci: fix the tested meson version
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-08-22 17:41:18 +01:00
Eric Engestrom
24163f40d3 ci: remove system meson before installing the pip one
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-08-22 17:40:42 +01:00
Simon Zeni
46d1e99a5d build: make tests optional
Building the project as a meson subproject, meson inherits the warning level
from the parent project. Making the tests optional bypasses that issue and
reduces build time.

Signed-off-by: Simon Zeni <simon@bl4ckb0ne.ca>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-08-18 09:58:41 +00:00
Likun Gao
003eb2a554 tests/amdgpu: add sdma slow copy linear hang test
Issue slow copy linear for sdma to trigger SDMA hang test.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
2022-08-15 06:10:15 +00:00
Likun Gao
3c04686ae5 tests/amdgpu: add sdma corrupted header hang test
Issue corrupted header for sdma to trigger SDMA hang test.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
2022-08-15 06:10:15 +00:00
Flora Cui
f1b897ec83 tests/amdgpu: add dispatch/draw test for gfx11
Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
2022-08-15 06:10:15 +00:00
Flora Cui
cc3c80c6ae tests/amdgpu: refactor dispatch/draw test
Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
2022-08-15 06:10:15 +00:00
Hawking Zhang
176e6ce6f3 tests/amdgpu: skip gfx CE subtest in gfx11
CE is not available in gfx11

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
2022-08-15 06:10:15 +00:00
Matt Roper
98794e2a0d lib: sync i915_pciids.h with kernel
This synchronizes with kernel commit 7835303982d1 ("drm/i915/mtl: Add
MeteorLake PCI IDs") to bring in the missing PCI IDs for several recent
platforms.

These days adding PCI IDs to libdrm doesn't really matter for real-world
system usage.  However there are still a few driver testing situations
where they're needed (such as the IGT dma-buf tests that still rely on
libdrm's bufmgr code).  At some point we should probably break that
final IGT dependency on libdrm so that these PCI ID resyncs won't be
necessary anymore, but that hasn't happened yet.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/5416
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
2022-08-03 22:48:27 +00:00
Stephan Lachnit
40fcca248b
build: set c_std to c11
Signed-off-by: Stephan Lachnit <stephanlachnit@debian.org>
2022-07-25 17:37:32 +02:00
Eric Curtin
512c8a88ca tests/util: Add simpledrm driver
Add an entry for the "simpledrm" driver, so that the test utilities
work with the simpledrm driver without passing the -M argument.

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Eric Curtin <ecurtin@redhat.com>
2022-07-22 13:25:53 +01:00
Ruijing Dong
6070e6a798 tests/amdgpu/vcn: add unified queue support in vcn4
add unified queue headers on the existing tests.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
2022-07-20 18:23:59 -04:00
Ruijing Dong
8be3042864 tests/amdgpu/vcn: align comments for AMDGPU_HW_IP_VCN_ENC
From VCN4, AMDGPU_HW_IP_VCN_ENC is re-used to support both encoding
and decoding jobs.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
2022-07-20 18:23:55 -04:00
James Zhu
e83aaae15e tests/amdgpu: enable vcn swRing test for version 4 and later
Enable vcn decode software ring test for version 4 and later.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
2022-07-20 18:23:45 -04:00
Alex Deucher
e214a6a6e8 amdgpu: update marketing names for 22.20
Add new marketing names.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-07-18 17:08:21 -04:00
Simon Ser
60cf6bcef1 build: bump version to 2.4.112
Signed-off-by: Simon Ser <contact@emersion.fr>
2022-07-06 10:43:38 +02:00
Simon Ser
3ee004ef52 xf86drmMode: introduce drmModeConnectorGetPossibleCrtcs
Nowadays, users don't really care about encoders except for retrieving
the list of CRTCs compatible with a connector. Introduce a new function
so that users no longer need to deal with encoders.

This is a re-do of [1], but with a slightly different API.

Signed-off-by: Simon Ser <contact@emersion.fr>

[1]: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/102
2022-07-02 22:22:49 +02:00
Simon Ser
0427c1f669 tests: use drmModeGetConnectorTypeName
Drop util_lookup_connector_type_name and use
drmModeGetConnectorTypeName instead.

Signed-off-by: Simon Ser <contact@emersion.fr>
2022-07-02 20:13:29 +00:00
Simon Ser
50f8d51773 xf86drmMode: introduce drmModeGetConnectorTypeName
User-space often needs to print the name of a connector type.
When a new connector type is added, all user-space programs need
to be updated to support the new connector type.

Expose a function to get a connector type name in libdrm.

The names are taken from the kernel [1].

[1]: https://cgit.freedesktop.org/drm/drm/tree/drivers/gpu/drm/drm_connector.c?h=4fc8cb47fcfdc93e274a1291757e478df4f9c39b#n83

Signed-off-by: Simon Ser <contact@emersion.fr>
2022-07-02 20:13:29 +00:00
Saleemkhan Jamadar
f7828dc180 tests/amdgpu/vcn:vcn encoder unit test
Add support for vcn encoder unit test

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
2022-06-11 12:13:26 -04:00
Sathishkumar S
0b21fcb214 tests/amdgpu: fix decode test failure on VCN2.5
For VCN2.5 wrong index was chosen, fix it.

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2022-06-11 12:13:03 -04:00
Simon Ser
f83ad09dc0 xf86drmMode: constify drmModeAtomicReq functions
This acts as an additional ABI guarantee, and improves
documentation for users.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Pekka Paalanen <pekka.paalanen@collabora.com>
2022-06-09 11:44:38 +02:00
Simon Ser
3bede5dbbc gen_table_fourcc: strip _MODIFIER suffix for INVALID
This is the only modifier printed with a "_MODIFIER" suffix. It
looks inconsistent when callers already print this word (e.g.
"modifier: INVALID_MODIFIER").

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marius Vlad <marius.vlad@collabora.com>
2022-06-08 14:02:48 +02:00
Dave Airlie
f801b07a60 build: bump version to 2.4.111
Signed-off-by: Dave Airlie <airlied@redhat.com>
2022-06-03 14:04:41 +10:00
Guchun Chen
362a93d1fb tests/amdgpu: use appropriate ring for different asics
Use compute ring in case of no gfx ring.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
2022-05-26 21:02:33 +08:00
Alex Deucher
3f266e57d0 amdgpu: add marketing names from 22.10
Add new marketing names

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-13 13:20:14 -04:00
Eleni Maria Stea
ae6d81da20 tests/modeprint: fix argument type
Replaced the type PRId64 with PRIu64 in a printf as the argument was
unsigned to fix the related compiler warning.

Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-05-09 15:54:20 +03:00
Eleni Maria Stea
4caec56fb8 modeprint, modetest, proptest: cast __u64 to uint64_t
It seems that __u64 values are defined differently across systems. In
glibc it's defined as unsigned long, in Linux kernel headers
(int-ll64.h) as unsigned long long, and on FreeBSD as uint64_t so it
matches glibc. A temporal solution is to cast all __u64 values to
uint64_t to avoid warnings on Linux, but ideally we'd like a better fix
in the future.

See also: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/212
for discussion.

Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
2022-05-09 15:53:56 +03:00
Eleni Maria Stea
c907d4ade1 xf86drm.c: fix C99 warning
Moved declaration to the top to resolve C99 compliance warning.

Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-05-09 14:56:11 +03:00
Karol Herbst
678a32b98f nouveau: add ioctl wrapper to check for dead channels
v2: explicitly set nr_push to 0 as well

Signed-off-by: Karol Herbst <kherbst@redhat.com>
2022-05-03 11:23:30 +00:00
Tejas Upadhyay
d95b12e7e3 intel: Add support for RPLP
Add RPLP platform support and PCIIDs

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
2022-04-21 23:04:33 +05:30
Matt Turner
62e25c8baa man: Add formatting to drmModeGetConnector reference
Signed-off-by: Matt Turner <mattst88@gmail.com>
2022-04-19 13:13:13 -07:00
Matt Turner
37d50e1cbf man: Fix some typos
Signed-off-by: Matt Turner <mattst88@gmail.com>
2022-04-19 13:10:50 -07:00
Daniel Stone
2b997bb4bb libkms: Remove libkms completely
libkms was a very early attempt at a KMS management library, that only
got as far as handling requests to create buffers. It has since been
superseded by GBM in doing this, which everyone uses, unlike libkms
which no-one uses.

Remove it from the tree to avoid any confusion.

Signed-off-by: Daniel Stone <daniels@collabora.com>
2022-04-15 22:40:29 +00:00
Flora Cui
85393adb12 tests/amdgpu: add dispatch test for gfx10
Signed-off-by: Flora Cui <flora.cui@amd.com>
2022-03-30 16:39:02 +08:00
Flora Cui
f2314a4871 tests/amdgpu: add draw test for gfx10
Signed-off-by: Flora Cui <flora.cui@amd.com>
2022-03-30 16:39:02 +08:00
Lu Jiacheng
7c28f52830 tests/amdgpu: Add test suite CP DMA 2022-03-09 15:05:04 +00:00
Alex Deucher
2e91f124a3 amdgpu: add marketing names from 21.50
Add new marketing names

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-02 11:51:08 -05:00
Alex Deucher
dce623f525 test/amdgpu: only disable deadlock tests on asics without GPU reset
Switch the logic to only disable the tests for asics which don't
have GPU reset support.  This way we don't need to update it
every time we add a new asic which does support it.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-02 16:10:41 +00:00
Andrey Grodzovsky
b47c057d69 tests/amdgpu/hotunplu: Enable hotunplug tests.
I tested with latest amd-staging-drm-next and after minor
fix for me all the testys pass. I bumped libdrm minor version
for this.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
2022-03-01 12:57:39 -05:00
Thierry Reding
8376362245 tests: tegra: Add VIC flip test
This test will attempt to use the VIC to blit one surface to another
and perform a vertical flip.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 16:06:49 +01:00
Thierry Reding
8c4887b4e1 tests: tegra: Add VIC blit test
This test will attempt to use the VIC to blit from one surface to
another.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 16:06:49 +01:00
Thierry Reding
e9ddc93d8e tests: tegra: Add VIC clear test
This test will attempt to use VIC to clear a surface.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 16:06:49 +01:00
Thierry Reding
26b872ebad tests: tegra: Add VIC 4.2 support
The Video Image Composer (VIC) 4.2 can be found on NVIDIA Tegra194 SoCs.
It uses a different class (C5B6) that is slightly incompatible with the
class found on earlier generations, although it is backwards compatible
with the class implemented on Tegra186 (B1B6).

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 16:06:49 +01:00
Thierry Reding
5217c5c747 tests: tegra: Add VIC 4.1 support
The Video Image Composer (VIC) 4.1 can be found on NVIDIA Tegra186 SoCs.
It uses a different class (B1B6) that is slightly incompatible with the
class found on earlier generations.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 16:06:49 +01:00
Thierry Reding
fa5dc0c925 tests: tegra: Add VIC 4.0 support
The Video Image Composer (VIC) 4.0 can be found on NVIDIA Tegra210 SoCs.
It uses a different class (B0B6) that is slightly incompatible with the
class found on earlier generations.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 16:06:49 +01:00
Thierry Reding
8215b29832 tests: tegra: Add VIC 3.0 support
The Video Image Composer (VIC) 3.0 can be found on NVIDIA Tegra124 SoCs.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:40:17 +01:00
Thierry Reding
2ddf703bc3 tests: tegra: Add VIC support
Implement a small abstraction interface to allow different versions of
VIC to be used transparently. An implementation will be chosen based on
the VIC version number reported by the DRM_TEGRA_IOCTL_OPEN_CHANNEL
IOCTL.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:40:15 +01:00
Thierry Reding
b707a71654 tests: tegra: Add syncpoint timeout test
This test can be used to purposefully trigger a job timeout.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:40:12 +01:00
Thierry Reding
637d6a46d3 tests: tegra: Add syncpt-wait test
This is a very simple sanity test to check whether or not a syncpt can
be incremented by a host1x client. This uses gr2d on Tegra20 through
Tegra114 and VIC on Tegra124 and later.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:40:11 +01:00
Thierry Reding
8f8e54d688 tests: tegra: Add gr2d-fill test
This test uses the IOCTLs for job submission and fences to fill a sub-
region of the screen to a specific color using gr2d.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:40:09 +01:00
Thierry Reding
37fbc4c892 tests: tegra: Add helper library for tests
This library provides helpers for common functionality needed by test
programs.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:40:06 +01:00
Thierry Reding
55bc688f11 tegra: Add syncpoint APIs
These new functions can be used to allocate and free syncpoints, as well
as wait for a syncpoint threshold to be reached. Jobs can also be waited
on if a syncpoint was attached to them.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:40:04 +01:00
Thierry Reding
4c18828e16 tegra: Add job and push buffer APIs
These new functions can be used to create a job on a given channel, add
commands to the job using its push buffer and submit the job.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:40:02 +01:00
Thierry Reding
b77af8ece6 tegra: Add channel APIs
These new functions can be used to open a channel to a given engine, map
and unmap buffer objects to that channel, and close the channel.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:40:01 +01:00
Thierry Reding
dece59037d tegra: Include private.h in list of source files
This makes sure that the proper dependencies are created and that the
file is distributed.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:39:59 +01:00
Thierry Reding
5f920e61c8 tegra: Update for new UABI
This new UABI is a more modern version that works better with both old
and recent chips.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:39:57 +01:00
Thierry Reding
37e9695d51 tegra: Install tegra-openclose test
Allow this simple test to be installed so that it can easily be run on a
target device.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:39:55 +01:00
Thierry Reding
69fa0dd940 tegra: Make API more consistent
Most functions in libdrm_tegra take as first parameter the object that
they operate on. Make the device and buffer object creation functions
follow the same scheme.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:39:53 +01:00
Thierry Reding
abe27b1757 tegra: Add PRIME support helpers
These helpers facilitate exporting and importing buffer objects to and
from PRIME file descriptors.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:39:15 +01:00
Thierry Reding
f7a77f6993 tegra: Add flink helpers
Add helpers to export and import buffer objects via flink names.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:39:09 +01:00
Thierry Reding
1842707183 tegra: Fix mmap() of GEM buffer objects
Store 64-bit offset values and use libdrm's built-in drm_mmap() function
instead of mmap() to ensure the full 64-bit offset is used.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:39:06 +01:00
Thierry Reding
e44e781603 tegra: Extract common buffer object allocation code
All of the buffer object allocation functions use the same boilerplate
code. Move that code into a separate function that can be reused.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:38:21 +01:00
Thierry Reding
bec2a28e98 tegra: Remove unused IOCTL implementations
The DRM_TEGRA_GEM_{GET,SET}_FLAGS and DRM_TEGRA_GEM_{GET,SET}_TILING
IOCTLs were badly designed and have since been obsoleted by framebuffer
modifiers. Remove these implementations to make it clear their usage is
discouraged.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 15:38:18 +01:00
Thierry Reding
bca42ae004 tegra: Indent according to .editorconfig
Reindent the sources according to the settings found in the newly added
.editorconfig.

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-02-23 14:41:16 +01:00
Sathishkumar S
d13ab997f5 tests/amdgpu: enable vcn test based on ip query
family_id checks can be removed and instead use ip major/minor version

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2022-02-19 18:10:01 -05:00
Sathishkumar S
1d92f32741 tests/amdgpu: enable jpeg test based on ip query
enable jpeg test if ip query is successful and avoid family_id
based checks, instead use ip major/minor version

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2022-02-19 18:09:53 -05:00
Samuel Pitoiset
56f81e6776 build: bump version to 2.4.110
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2022-02-16 11:00:13 +01:00
Daniel Stone
79fa377c8b drm/atomic: Stable sort for atomic request de-duplication
Atomic request property lists are defined to be de-duplicated: an atomic
request can contain multiple sets for the same property on the same
object, and only the last one will take effect.

drmModeAtomicCommit already sorts the property set by object and
property ID. We were relying on qsort to also sort by cursor - i.e.
pointer value - when object and property ID are equal, however whilst
glibc does this, the sort order is explicitly undefined when the
comparator is equal. Using the pointer is also not stable on all
implementations.

Add an explicit 'cursor' member to each property set which is used as
the tie-breaker comparator.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Fixes: #46
2022-02-04 06:16:28 +00:00
Dylan Baker
7aede93ef9 meson: use summary() instead of message
It's cleaner, it's nicer looking, and it's a nice builtin.

Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-01-20 10:20:47 -08:00
Dylan Baker
cc16120543 meson: use the modern interface for pkg.generate
This produces no differences in the generated output. I've had to
manually add `requires : 'libdrm'` to libdrm_intel, otherwise libdrm
ends up in `Requires.private` instead of `Requires`.

Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-01-20 10:20:40 -08:00
Dylan Baker
38c568775e meson: use cc.has_function_attribute instead of open coding
It's less code, and also allows meson to short circuit for compilers is
knows don't support this.

Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-01-20 10:08:23 -08:00
Dylan Baker
f9539d4128 meson: use cc.check_header instead of open coding
Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-01-20 10:08:23 -08:00
Dylan Baker
52b96a6fbf meson: use more standard formatting for better readability
Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-01-20 10:08:23 -08:00
Dylan Baker
eaf234c148 meson: switch to cc.get_supported_arguments
This is generally faster, as meson is able to parallelize the checks for
us.

This also removes the workaround for checking gcc/clang -Wno-*
arguments, which meson now handles internally so we don't need to handle
it ourselves.

Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-01-20 10:07:55 -08:00
Dylan Baker
6b0b493555 meson: switch the meson builtin for symbol visiblity
This allows meson to check if the compiler supports gnu style symbol
visibility, and apply the appropriate flags as necessary, rather than us
adding them by hand

Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2022-01-20 10:07:18 -08:00
Samuel Pitoiset
847be2651f tests/amdgpu: add a test for new CTX OP to get/set stable pstates
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2022-01-20 18:32:48 +01:00
Samuel Pitoiset
de84cdc563 amdgpu: implement new CTX OP to set/get stable pstates
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2022-01-20 18:32:46 +01:00
Samuel Pitoiset
94bc814416 amdgpu: update_drm.h for new CTX OP to set/get stable pstates
Based on agd5f/drm-next.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2022-01-20 18:32:44 +01:00
Eric Engestrom
63d06ad3c3 use standard __typeof__() instead of GNU extension typeof()
And switch to c_std=c99. This simplifies using libdrm as a meson
subproject for mesa.

v2: (dylan)
  - switch to c99 as the standard
  - Fix amdgpu security tests as well

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emma Anholt <emma@anholt.net>
2022-01-19 16:08:31 -08:00
Guchun Chen
fa80f49df8 tests/amdgpu: Add VCN test support for Biege Goby
Added Beige Goby chip id in vcn test.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-By: Veerabadhran Gopalakrishnan <Veerabadhran.gopalakrishnan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2022-01-14 09:25:18 -05:00
Tejas Upadhyay
440e2d7a34 intel: Add support for ADL-N
Add ADL-N platform support and PCIIDs

Align with kernel commit:
7e28d0b26759 ("drm/i915/adl-n: Enable ADL-N platform")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
2021-12-21 13:54:52 +00:00
Simon Ser
287cdb0390 releasing: s/master/main/
This default branch name has been changed. Update RELEASING
accordingly.

Signed-off-by: Simon Ser <contact@emersion.fr>
2021-12-21 13:07:01 +00:00
ravitejax
0c620c5766 intel: Add support for RPLS platform
Fixes: 3d8e59ce01 ("intel: sync i915_pciids.h with kernel")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
2021-12-21 14:59:23 +05:30
Raviteja Goud Talla
3d8e59ce01 intel: sync i915_pciids.h with kernel
Align with kernel commit:

52407c220c44c ("drm/i915/rpl-s: Add PCI IDS for Raptor Lake S")

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Raviteja Goud Talla <ravitejax.goud.talla@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2021-12-16 18:20:31 +05:30
Dylan Baker
d9188a7750 meson: add override_dependency when possible
This allows consumers of libdrm as a subproject to use the simpler
`dependency('libdrm', fallback : 'libdrm')` syntax, as the libdrm build
files already tell meson that they override a dependency called
"libdrm".

Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-12-14 00:20:40 +00:00
Dylan Baker
9324e4f054 meson: use dictionary kwargs
So we don't have to duplicate the libdrm library call just to not set
the version keyword for android

Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
2021-12-14 00:20:40 +00:00
Sathishkumar S
294b9c8322 tests/amdgpu: add jpeg tests support
v2:
- remove dec create/destroy msg as its not relevant to jpeg (Leo)
- enable the test for jpeg2/jpeg3 (Leo)
- validate checksum of result (Leo)
- add appropriate comments (Leo)

v3:
- linux style function definition indent (James)
- use multiline comment delimiter (Leo)

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2021-12-09 19:31:45 -05:00
Simon Ser
febfe0addd build: bump version to 2.4.109 2021-11-25 21:33:02 +01:00
Eleni Maria Stea
997edcd37f xf86drm: fix compiler warnings
Used casting to fix warnings about assigning different enum types to
variables. Used error checks in places where snprintf is called and
output might be truncated to fix gcc format-truncation warnings.

v2: Removed a change in drm.h (Simon Ser)
v3, v4: Removed unecessary braces in snprintf (Simon Ser)

Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
2021-11-25 20:28:33 +00:00
Bas Nieuwenhuizen
f70e8ae835 amdgpu: Add new function to get fd.
Dual purpose:
 - The drm fd dedupe functionality confuses the radeonsi
   amdgpu winsys if radeonsi isn't the first thing opening
   the device. By exposing the fd we can detect this case.
 - For a common mesa Vulkan sync objects implementation
   with syncobj. (notable: no buffer allocation)

Both shouldn't interferece with libdrm_amdgpu functionality
though it does somewhat piece the abstraction of the library.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3424
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5630
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2021-11-23 16:02:05 +00:00
Emmanuel Vadot
b40d0a7d6c ci: Add FreeBSD support
Use qemu to do CI on FreeBSD.
Not everything is compiled as all arm aren't supported on FreeBSD.
Same thing for Nouveau.
The tests aren't enable for now as they are all failing.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
2021-11-23 08:43:46 +00:00
Emmanuel Vadot
e722ba9f67 ci: Switch freedesktop/ci-templates
This switch to the latest ci-templates.
Most of the file is taken from the one in wayland.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
2021-11-23 08:43:46 +00:00
Simon Ser
57e0b0552e xf86drm: add drmGetDeviceFromDevId
This adds a function to get a drmDevicePtr from a dev_t identifier
of a device. This is useful for Wayland that uses these to identify
devices over the protocol.

This is done by taking the implementation of drmGetDevice2, and removing
the call to fstat to find the dev_t.

Signed-off-by: Scott Anderson <scott.anderson@collabora.com>
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2021-11-19 15:30:30 +01:00
suijingfeng
dd3d6dd321 radeon: remove duplicate declaration of struct radeon_bo_manager in radeon_bo.h
Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: suijingfeng <suijingfeng@loongson.cn>
2021-11-12 03:55:01 +00:00
Simon Ser
d76c387125 build: bump version to 2.4.108
Signed-off-by: Simon Ser <contact@emersion.fr>
2021-11-08 17:35:03 +01:00
Luigi Santivetti
e641e2a632 xf86drm: add iterator API for DRM/KMS IN_FORMATS blobs
Add support for parsing IN_FORMATS property blobs. Providing libdrm
with this functionality helps to standardise how user-space reads
kernel blobs and decreases duplication on the client side.

drmModeFormatModifierBlobIterNext() allows the caller to view
formats and associated modifiers given a valid property blob.
An example is available inside the libdrm unit test, modetest.c.

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-11-08 16:20:04 +00:00
Joshua Ashton
f256bb9afd amdgpu: Make marketing names consistent
Fixes sporadic (TM), capitalization, missing AMD suffixes and spacing.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
2021-11-04 06:03:49 +00:00
Alex Richardson
fda3d0010f Fix -Werror=format build errors on FreeBSD
On 64-bit FreeBSD targets uint64_t is generally defined as `unsigned long`
and not `unsigned long long`. Use the PRI macros to fix -Wformat.

Signed-off-by: Alex Richardson <Alexander.Richardson@cl.cam.ac.uk>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-11-02 10:44:30 +00:00
Christian König
d77ccdf3ba amdgpu: add amdgpu_stress utility v2
Simple yet useful command line utility to simulate memory pressure.

Already found quite a number of problems in TTM with that.

v2: replace spaces with tabs

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2021-10-20 15:15:30 +02:00
Simon Ser
dd3655ce73 man: refer to drmCloseBufferHandle instead of DRM_IOCTL_GEM_CLOSE
This function in libdrm core wraps DRM_IOCTL_GEM_CLOSE.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-10-06 09:03:21 +02:00
Simon Ser
751752d264 tegra: use drmCloseBufferHandle
Instead of manually calling drmIoctl, use the equivalent function
from libdrm core.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-10-06 09:03:21 +02:00
Simon Ser
bf23fe37be omap: use drmCloseBufferHandle
Instead of manually calling drmIoctl, use the equivalent function
from libdrm core.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-10-06 09:03:21 +02:00
Simon Ser
53ef4b37a1 nouveau: use drmCloseBufferHandle
Instead of manually calling drmIoctl, use the equivalent function
from libdrm core.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-10-06 09:03:21 +02:00
Simon Ser
7b67fec649 freedreno: use drmCloseBufferHandle
Instead of manually calling drmIoctl, use the equivalent function
from libdrm core.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-10-06 09:03:21 +02:00
Simon Ser
2fda5f9b0c exynos: use drmCloseBufferHandle
Instead of manually calling drmIoctl, use the equivalent function
from libdrm core.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-10-06 09:03:21 +02:00
Simon Ser
bd1f320bc0 etnaviv: use drmCloseBufferHandle
Instead of manually calling drmIoctl, use the equivalent function
from libdrm core.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-10-06 09:03:21 +02:00
Simon Ser
80f8fbd488 radeon: use drmCloseBufferHandle
Instead of manually calling drmIoctl, use the equivalent function
from libdrm core.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-10-06 09:03:21 +02:00
Simon Ser
7e13fe1dbf intel: use drmCloseBufferHandle
Instead of manually calling drmIoctl, use the equivalent function
from libdrm core.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-10-06 09:03:21 +02:00
Simon Ser
ef77e5e1eb amdgpu: use drmCloseBufferHandle
Instead of using a hand-rolled amdgpu_close_kms_handle function,
use the function from libdrm core, which does exactly the same
thing.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-10-06 09:03:21 +02:00
Dennis Tsiang
bd26b61cff xf86drm: Update drmGetFormatModifierNameFromArm to handle AFRC
Update drmGetFormatModifierNameFromArm function to handle AFRC
modifiers.

Signed-off-by: Dennis Tsiang <dennis.tsiang@arm.com>
2021-10-04 10:18:41 +00:00
Dennis Tsiang
d2875fe008 drm_fourcc: sync drm_fourcc with latest drm-next kernel
Update drm_fourcc.h to include latest changes from drm-next branch.
This brings in AFRC (Arm Fixed-Rate Compression) modifiers.

Generated using make headers_install.
Generated from drm-next branch commit 6880fa6

Signed-off-by: Dennis Tsiang <dennis.tsiang@arm.com>
2021-10-04 10:18:41 +00:00
Simon Ser
02ac4a0a36 xf86drmMode: simplify drm_property_type_is
No need to have two branches depending on DRM_MODE_PROP_EXTENDED_TYPE.
We can just use drmModeGetPropertyType instead.

This does introduce a slight change: previously, drm_property_type_is()
could be called with non-type flags such as IMMUTABLE. However no user
seems to do this (checked KWin/Mutter/Sway/Weston/Xorg).

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2021-09-27 15:02:03 +02:00
Simon Ser
bb709e6023 xf86drmMode: switch to standard inline qualifier
__inline is non-standard, inline is.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2021-09-27 15:01:59 +02:00
Simon Ser
e939bd1e8c xf86drmMode: make drm_property_type_is arg const
This function only needs read-only access to the property. This is
not a breaking ABI change.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2021-09-27 15:01:55 +02:00
Jason Ekstrand
f9c27a9e8c intel: Drop legacy execbuffer support
Execbuffer2 support was introduced to libdrm in b50964027b, 10 years
ago, and no driver has used the old execbuf path since.  There's no need
to support 10-year-old kernels.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-09-27 11:26:27 +00:00
Simon Ser
264e66b5e9 xf86drm: add GEM_CLOSE ioctl wrapper
We have wrappers for PRIME_HANDLE_TO_FD and PRIME_FD_TO_HANDLE,
but not for GEM_CLOSE. Add it so that callers don't need to
manually call drmIoctl.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
2021-09-27 12:57:02 +02:00
Tvrtko Ursulin
122ff0e878 intel: Do not assert on unknown chips in drm_intel_decode_context_alloc
There is this long standing nit of igt/tools/intel_error_decode asserting
when you feed it an error state from a GPU the local libdrm does not know
of.

To fix this I need a tweak in drm_intel_decode_context_alloc to make it
not assert but just return NULL (which seems an already possible return
value).

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2021-09-24 12:55:02 +00:00
José Roberto de Souza
02dd464bf6 intel: Sync pci ids
Sync libdrm with kernel, a new DG1 pci was added.
Commit 5f0d4214938d ("drm/i915/dg1: Add new PCI id")

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
2021-09-23 21:40:58 +00:00
Alex Deucher
a97f265c7d amdgpu: add new marketing name
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-20 15:10:08 -04:00
Alex Deucher
4529056e4f amdgpu: add marketing names from 21.30
Add new marketing names

Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-09-20 15:10:08 -04:00
ZhiJie.Zhang
d201a41d1a tests/modetest: get cursor width and height by drmGetCap
Should get cursor width and height by drmGetCap.

Signed-off-by: ZhiJie.Zhang <zhangzhijie@loongson.cn>
2021-09-02 09:26:17 +00:00
Tejas Upadhyay
a7892962e1 intel: sync ADL-S PCI IDs with kernel
Align with kernel commits:

c79b846f892d ("drm/i915/adl_s: Update ADL-S PCI IDs")
3f50033dd88a ("drm/i915/adl_s: ADL-S platform Update PCI ids for Mobile BGA")

Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
2021-08-24 12:49:19 +05:30
Eric Engestrom
1a4c0ec9ae xf86drm: fix mem leak in drm_usb_dev_path()
`sysfs_uevent_get()` returns a `strndup()`ed string, which must be `free()`d.

Fixes: bf63f8acdc ("libdrm: Handle usb_interface devices for usb parsing")
Reviewed-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2021-08-14 09:05:49 +01:00
Karol Herbst
1d29e1df8b nouveau: print bo address in the GPU/CPU vm and its size
v2: print bo->offset as 64 bit

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
2021-08-04 18:27:13 +02:00
Jordan Justen
8d0fb9b3f2
libdrm: NOTE! Default branch is now main
To update your local repository to use the new default branch, these
commands may help:

$ git fetch origin
$ git checkout master
$ git branch -m main
$ git branch --set-upstream-to=origin/main
$ git remote set-head origin --auto

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2021-08-02 15:31:26 -07:00
Mario Kleiner
149b99fe54 headers: drm: Sync with drm-next
Generated using make headers_install from the drm-next
tree - git://anongit.freedesktop.org/drm/drm
branch - drm-next
commit - 8a02ea42bc1d4c448caf1bab0e05899dad503f74

Some changes were omitted, e.g., to nouveau_drm.h, i915_drm.h, and
msm_drm.h, as the nouveau and i915 changes looked to me as if they
could break compatibility or require other compatibility fixes to
libdrm which i can not judge. msm_drm.h broke the build, as there
are definitely changes needed to libdrm's msm support code.

The shortlog below is edited to only list what corresponds to files
that are included here, because it looked safe to me.

The changes were as follows (shortlog from
b10733527bfd864605c33ab2e9a886eec317ec39..HEAD):

Aaron Liu (1):
      drm/amdgpu: add uapi to define yellow carp series

Alex Deucher (1):
      drm/amdgpu: add INFO ioctl support for querying video caps (v4)

Christian Gmeiner (1):
      drm/etnaviv: provide more ID values via GET_PARAM ioctl.

Felix Kuehling (1):
      drm/amdgpu: Add new placement for preemptible SG BOs

Jiawei Gu (1):
      drm/amdgpu: Add vbios info ioctl interface

Lionel Landwerlin (1):
      drm: fix drm_mode_create_blob comment

Mario Kleiner (1):
      drm/fourcc: Add 16 bpc fixed point framebuffer formats.

Nirmoy Das (1):
      drm/amdgpu: remove AMDGPU_GEM_CREATE_SHADOW flag

Noralf Trønnes (1):
      drm/uapi: Add USB connector type

Radhakrishna Sripada (1):
      drm/framebuffer: Format modifier for Intel Gen 12 render compression with Clear Color

Simon Ser (13):
      drm: improve kernel-docs in drm_mode.h
      drm: document drm_mode_get_connector
      drm: document drm_mode_modeinfo
      drm: document that user-space should force-probe connectors
      drm/doc: atomic implicitly enables other caps
      drm/doc: re-format drm.h file comment
      drm/doc: demote old doc-comments in drm.h
      drm/fourcc: fix Amlogic format modifier masks
      drm/uapi: document kernel capabilities
      drm/connector: demote connector force-probes for non-master clients
      drm: reference mode flags in DRM_CLIENT_CAP_* docs
      drm: clarify and linkify DRM_CLIENT_CAP_WRITEBACK_CONNECTORS docs
      drm: document minimum kernel version for DRM_CLIENT_CAP_*

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
2021-08-02 02:39:12 +00:00
Eric Anholt
e6fb9ccf2a meson: Don't build libkms for Android.
Nobody wants that that I know of.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2021-07-30 10:58:11 -07:00
Eric Anholt
a819b9ad3b meson: Build libdrm.so as an unversioned lib on Android.
Android vendor libraries don't have sonames, and libdrm.so shouldn't
either.  This lets a Mesa built against a libdrm.so built for Android
be copied directly to a Chrome OS ARC installation.

Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2021-07-30 10:58:11 -07:00
Aaron Liu
4ac7d6bf5d test/amdgpu: Bob to Alice copy should be TMZ in secure bounce test
SDMA copy from Alice to Bob is in TMZ mode. Therefore
SDMA copy back from Bob to Alice should be in TMZ mode too.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
2021-07-23 10:24:22 +08:00
Luben Tuikov
87a68fe9e4 tests/amdgpu: Fix TMZ secure bounce test
Fix the TMZ secure bounce test, in that Bob's
buffer has to be created encrypted (with the
encrypted flag set), so that when we copy from
Alice's buffer, which is also encrypted, to Bob's
buffer, the copy can be successful and the data
actually copied.

This fixes the test and it no longer fails. Tested
on Sienna Cichlid.

Cc: Alex Deucher <Alexander.Deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Aaron Liu <aaron.liu@amd.com>
Cc: Huang Rui <ray.huang@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Alex Deucher <Alexander.Deucher@amd.com>
2021-07-16 12:10:06 -04:00
Bas Nieuwenhuizen
9cef5dee3c Bump version to 2.4.107
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2021-07-02 03:12:30 +02:00
Alex Deucher
ab72fde87e amdgpu: update marketing names
From 21.20 release.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-29 21:06:42 -04:00
Marius Vlad
5d97031e8a README.rst: Include some notes about syncing uapi headers
Signed-off-by: Marius Vlad <marius.vlad@collabora.com>
2021-06-22 11:16:04 +00:00
Marius Vlad
65d8939808 xf86drm: Add support for decoding AMLOGIC format modifiers
Signed-off-by: Marius Vlad <marius.vlad@collabora.com>
2021-06-22 11:16:04 +00:00
Marius Vlad
9ae8f17d56 xf86drm: Add support for decoding AMD format modifiers
Signed-off-by: Marius Vlad <marius.vlad@collabora.com>
2021-06-22 11:16:04 +00:00
Marius Vlad
99a0522aef xf86drm: Add support for decoding Nvidia format modifiers
Signed-off-by: Marius Vlad <marius.vlad@collabora.com>
2021-06-22 11:16:04 +00:00
Marius Vlad
a04b674887 xf86drm: Add a vendor function to decode the format modifier
As format modifiers can be encoded in quite complex forms, the static
table previously added is not sufficient to retrieve, extract and decode
the token formats to a human-readable string.  This patch introduces a
vendor specific callback which could be used to perform an additional
search to match up with vendor encoding scheme, which, will be used
first, before resorting to searching the static table.

With it, add support for decoding the ARM format modifiers.

Signed-off-by: Marius Vlad <marius.vlad@collabora.com>
2021-06-22 11:16:04 +00:00
Marius Vlad
67e911977f xf86drm: Add a human readable representation for format modifiers
Introduces two new methods to retrieve a human readable representation of a
format modifier:

drmGetFormatModifierName() - returns a format modifier as a string,
from a token modifier
drmGetFormatModifierVendor() - returns the vendor as a string, from a
token modifier

and the fourcc_mod_get_vendor macro that returns the vendor.

New format modifiers added in drm_fourcc.h uapi kernel header should be
sync'ed up with libdrm and should include a human readable
representation for that format modifier, in order to display it
correctly as a string.

That happens with the help of a python script that reads up drm_fourcc
header file and outputs a static table comprised of token modifiers
alongside a vendor table (Suggested-by Simon Ser <contact@emersion.fr>).

The reason for doing it in libdrm is to have a unified place instead of each
user of libdrm having a way to keep track of the format modifiers.

With this patch, modetest has also been modified to make use of it.

Signed-off-by: Marius Vlad <marius.vlad@collabora.com>
2021-06-22 11:16:04 +00:00
Eleni Maria Stea
f287d1990b Conditionally include <linux/limits.h> and <sys/params.h> on Linux, BSD
<linux/limits.h> should be included conditionally for Linux only, also
SPECNAMELEN used conditionally when the OS is FreeBSD requires to
include <sys/params.h>.

Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2021-06-20 14:32:33 +03:00
Eleni Maria Stea
8bc56fe0fb _WANT_KERNEL_ERRNO must be defined in FreeBSD for ERESTART to be used
In FreeBSD's errno.h ERESTART is not defined by default, only when the
user requests the pseudo-errors returned inside the kernel to be
enabled. As a result the block where drmCommandWriteRead is
called returns compile error. Defined _WANT_KERNEL_ERRNO to fix it (see
FreeBSD's /usr/include/errno.h)

Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2021-06-20 09:20:08 +03:00
Eleni Maria Stea
90c9175c81 include <sys/types.h> in xf86drmMode when the OS is FreeBSD
<sys/types.h> need to be included in xf86drmMode.c for type u_int in
<sys/sysctl.h> (that is included when OS is FreeBSD) to be recognized.

Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2021-06-20 09:20:08 +03:00
Bas Nieuwenhuizen
085ee3e488 amdgpu: Add vamgr for capture/replay.
In Vulkan we have extensions to assist with capture in replay in a
world where addresses are returned to the application. This involves
creating buffers at the same VA during replay as they were during
capture.

By itself libdrm_amdgpu already has support for this, but there is
the obvious failure mode that if another buffer is already allocated
at that VA things fail spectacularly. This is an actual issue as
internal buffers, like winsys images or shader binaries also
participate in the same VA allocation.

To avoid this problem applications have to create buffers which
are going to be captured with a flag, and the implementation is to
separate VA allocation for those buffers to reduce the collision risk:

"Implementations are expected to separate such buffers in the GPU address
space so normal allocations will avoid using these addresses. Apps/tools
should avoid mixing app-provided and implementation-provided addresses for
buffers created with VK_BUFFER_CREATE_DEVICE_ADDRESS_CAPTURE_REPLAY_BIT,
to avoid address space allocation conflicts."

This patch implements that by adding a flag for these buffers and allocating
address space from the top of the address range instead of the bottom.

Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Christian König <christian.koenig@amd.com>
2021-06-15 13:08:20 +00:00
Andrey Grodzovsky
d615430c68 tests/amdgpu/hotunplug: Add hotunplug with exported fence
Disconnect device while fence is exported.
Also disable this test for sytem with single GPU.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Andrey Grodzovsky
93a4708ac0 tests/amdgpu/hotunplug: Add hotunplug with exported bo test
Disconnect device while BO is exported.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Andrey Grodzovsky
b5f611cc37 tests/amdgpu/hotunplug: Add unplug with cs test.
Same as simple test but while doing cs

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Andrey Grodzovsky
d4b780a735 test/amdgpu/hotunplug: Add test suite for GPU unplug
Add plug/unplug device and open/close device file
infrastructure.
Add basic test - unplug device while device file still
open. Close device file afterwards and replug the device.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Andrey Grodzovsky
d330f68c11 test/amdgpu: Add helper functions for hot unplug
Expose close device and add open device wich preserves
test index.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Andrey Grodzovsky
ae2e2bd68a tests/amdgpu: Fix valgrind warning
Struct access after free

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com
2021-06-09 20:27:09 +00:00
Rahul Kumar
140ce56dcb amdgpu: Added product name for E9390,E9560 and E9565 dgpu
Update marketing names.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-07 10:59:19 -04:00
Lang Yu
4e178807b9 Revert "tests/amdgpu: fix bo eviction test issue"
This reverts commit a5a400c958.

Bo evict test was disabled by default per below commit.
So still keep it as disabled.

1f6a85cc test/amdgpu: disable bo eviction test by default

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2021-06-01 12:56:24 +00:00
Tejas Upadhyay
4c8365183e intel: Add support for ADLP
Add ADLP platform support and PCIIDs

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Pankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Signed-off-by: Caz Yokoyama <caz.yokoyama@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
2021-05-20 12:01:25 +00:00
Dave Airlie
77b642b6de Bump version to 2.4.106
Signed-off-by: Dave Airlie <airlied@redhat.com>
2021-05-18 13:38:07 +10:00
Karol Herbst
cfbea78fdf nouveau: add debug option to sync pushbuffer submissions
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:41:16 +02:00
Karol Herbst
91c3eb1700 novueau: document debug flags
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:41:14 +02:00
Karol Herbst
17a51b0b31 nouveau: rework debugging so we can also dump into a file
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:41:12 +02:00
Karol Herbst
c0ae9cfa00 nouveau: make debug features accessible in normal builds
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:41:10 +02:00
Karol Herbst
2f04bd2d89 nouveau: mask push buffer length pushbuf_dump
nvc0 sets the NVC0_IB_ENTRY_1_NO_PREFETCH bit on some pushbuffers

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:41:09 +02:00
Karol Herbst
52fd2a2542 nouveau: fix crash in pushbuf_dump with an unmapped bo
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2021-05-06 19:40:57 +02:00
Eric Engestrom
bf08984682 ci: use base-devel tag of archlinux image instead of base and then installing base-devel after
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-04-30 10:13:37 +02:00
Eric Engestrom
b4847d97df ci: use archlinux/archlinux docker image instead of deprecated and now removed archlinux/base
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-04-30 10:13:37 +02:00
Bas Nieuwenhuizen
40f73d0b0b Revert "xf86drmMode: set FB_MODIFIERS flag when modifiers are supplied"
This reverts commit b362850689.

This breaks when the kernel driver does not support modifiers and the
application properly zeroes the modifiers.

Acked-by: Simon Ser <contact@emersion.fr>
2021-04-22 20:24:11 +02:00
Jinzhou Su
c7dc0465cf test/amdgpu: Add emit mem sync flag for test IB
In syncobj test, 3 threads will be created. Sometimes
the first gfx IB and the third sdma IB will use same
physical page. There will be risk that sdma engine will
read gfx IB in the same physical page. So better to flush
the cache before commit the sdma IB.

Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-19 14:04:22 +08:00
Huang Rui
67a64bb946 test/amdgpu: use tmz ids to check whether enable security tests
Using tmz ids that reported from kernel to decide whether enable
security tests.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2021-04-14 09:52:33 +02:00
James Zhu
3c02304c04 tests/amdgpu/vcn: update to support aldebaran
VCN is supported after AI family Arcturus.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2021-04-14 02:41:56 +00:00
Feifei Xu
7b844dabf9 tests/amdgpu:retire asic_id check on unsupported cases
Retire the asic_id check for AI family.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
2021-04-12 17:46:31 +08:00
Feifei Xu
991e95fd13 tests/amdgpu: update gfx9 BufferCopy/BufferClear
buffer_load/store_format_xyzw require 64bit vgpr_a[2].
The original parameter is one u32. Modify the shader binary to
fit the 64bit parameter.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Tested-by: Gang Long <Gang.Long@amd.com>
2021-04-09 15:11:08 +08:00
Leo Liu
6b4e956d29
Bump version to 2.4.105
Signed-off-by: Leo Liu <leo.liu@amd.com>
2021-04-07 09:54:11 -04:00
Leo Liu
1d13cc1032 amdgpu: add function of INFO ioctl for querying video caps
via the newly added uapi/amdgpu_drm interface

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-06 08:58:57 -04:00
Leo Liu
50c98335c7 amdgpu: sync up amdgpu_drm.h with latest from kernel
From drm-next:

commit 2cbcb78c9ee5520c8d836c7ff57d1b60ebe8e9b7
Merge: 06debd6e1b28 8c44390d8872
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Fri Mar 26 15:52:01 2021 +0100

    Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

    amd-drm-next-5.13-2021-03-23:

    amdgpu:
    ...

    UAPI:
    - amdgpu: Add a new INFO ioctl interface to query video capabilities
      rather than hardcoding them in userspace.  This allows us to provide
      fine grained asic capabilities (e.g., if a particular part is
      bandwidth limited, we can limit the capabilities).  Proposed userspace:
      https://gitlab.freedesktop.org/leoliu/drm/-/commits/info_video_caps
      https://gitlab.freedesktop.org/leoliu/mesa/-/commits/info_video_caps
    ...

    Danvet: A bunch of conflicts all over, but it seems to compile ... I
    did put the call to dc_allow_idle_optimizations() on a single line
    since it looked a bit too jarring to be left alone.

    Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
    From: Alex Deucher <alexander.deucher@amd.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20210324040147.1990338-1-alexander.deucher@amd.com

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2021-04-06 08:58:54 -04:00
Simon Ser
b362850689 xf86drmMode: set FB_MODIFIERS flag when modifiers are supplied
The kernel will always return EINVAL if modifiers are supplied but
the flag DRM_MODE_FB_MODIFIERS isn't set. That's a pretty nice
footgun.

Be a little more helpful and set the flag if the user has supplied
a modifier array.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2021-04-06 10:37:03 +02:00
Lang Yu
a5a400c958 tests/amdgpu: fix bo eviction test issue
On Raven2/Picasso, the default VRAM size is 2048M,
and the default GTT size is 3072M. If max_allocation
of VRAM exceeds half of GTT size, GTT memory can't
hold evicted bo from VRAM and bo in itself at the
same time. Then amdgpu_cs_list_validate will failed
with "Not enough memory for command submission" error.

NOTE:
The installed DRAM should be larger than 8GB,
if the VRAM size is 2048M.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2021-04-01 11:41:51 -04:00
Lang Yu
af871ec1a6 drm/tests/amdgpu: fix Metadata test failed issue
The unit of size_metadata is one byte not four bytes.
Enable Metadata test.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2021-04-01 11:41:49 -04:00
Simon Ser
6d821612d9 xf86drmMode: introduce drmModeGetPropertyType
We already have drm_property_type_is, but it's needlessly complicated
and doesn't cover all use-cases (requires the caller to provide a
type).

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2021-03-31 07:42:15 +00:00
Jinzhou Su
f5abbc3033 test/amdgpu: remove static varible in Syncobj test
In syncobj test, wait thread and signal thread create
simultaneously. The ptr for GFX IB and SDMA IP should be
operated separately. With static, there will be risk that
GFX NOP is in SDMA IB or SDMA NOP is in GFX IB, then GFX or
SDMA hang caused.

Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2021-03-24 11:34:04 -04:00
Ashutosh Dixit
cd3681976c intel: Keep libdrm working without pread/pwrite ioctls
The general direction at this time is to phase out pread/write ioctls and
not support them in future products. The ioctls have already been disabled
in i915 for future products. This means libdrm must handle the absence of
these ioctls. This patch does this by modifying drm_intel_gem_bo_subdata()
and drm_intel_gem_bo_get_subdata() to do the read/write using the
pread/pwrite ioctls first but when these ioctls are unavailable fall back
to doing the read/write using a combination of mmap and memcpy.

A similar solution was added to igt-gpu-tools in commit
ad5eb02eb3 ("lib/ioctl_wrappers: Keep IGT working without pread/pwrite
ioctls").

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2021-03-22 15:22:31 -07:00
Fang Tan
52f05d3d89 meson: use library() instead of shared_library().
This allows users to select the library type (static or shared)
using the Meson -Ddefault_library built-in option.

Issue: https://gitlab.freedesktop.org/mesa/drm/-/issues/45

Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Fang Tan <tanfang@uniontech.com>
2021-03-09 16:57:32 +08:00
Alistair Delva
7d6a175990 xf86drm: fix null pointer deref in drmGetBufInfo
If info.count is large, drmMalloc() / alloca() may fail, and the
resulting null pointer is not null checked before dereference.

Issue: https://gitlab.freedesktop.org/mesa/drm/-/issues/62

Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Alistair Delva <adelva@google.com>
2021-03-02 08:29:27 -08:00
Tejas Upadhyay
2e67fef5f6 intel: Add support for JSL
Add the PCI ID import for JSL.

V1 - Indentation
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2021-03-02 14:52:38 +05:30
Emil Velikov
a9bb32cfe1 xf86drm: cap number of reported devices by drmGetDevice(2)
Do as the documentation says - when devices non NULL, cap the reported
devices to max_devices. Otherwise we risk out-of-bound access
for users of the API.

v2:
 - Fix this w/o breaking the API

v3:
 - Drop local variables, flip inverted conditional (Simon)

Issue: https://gitlab.freedesktop.org/mesa/drm/-/issues/56
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-02-26 13:03:06 +00:00
Emil Velikov
06844b6eae Revert "xf86drm: cap number of reported devices by drmGetDevice(2)"
This reverts commit 8cb12a2528.

The commit fixed the OOB, yet it broke drmDevices2(0, NULL, 0) - aka we
did not return the total devices list.

Reviewed-by: Simon Ser <contact@emersion.fr>
2021-02-26 13:02:56 +00:00
Simon Ser
632f59fcbf xf86drm: warn about GEM handle reference counting
Users need to be careful when using drmPrimeHandleToFD or
drmPrimeFDToHandle directly. Mention GBM as a solution.

See [1] for an example mistake.

[1]: https://gitlab.freedesktop.org/drm/nouveau/-/issues/43#note_772661

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-02-26 13:01:04 +00:00
Simon Ser
523b3658aa xf86drmMode: add drmIsKMS
If a device has a primary node, it doesn't necessarily mean it's
suitable for KMS usage. For instance, render-only drivers also
expose primary nodes.

The check is extracted from Weston [1].

The motivation for this new function is two-fold:

- Avoid an unnecessary GETRESOURCES call. To check whether a
  primary node is suitable for KMS, we don't actually need to
  retrieve the object IDs we just need to check the counts.
- Avoid confusion in user-space and make sure user-space implements
  the check properly. For instance, wlroots doesn't [2]: it uses
  drmGetVersion which succeeds with render-only drivers.

[1]: https://gitlab.freedesktop.org/wayland/weston/-/blob/master/libweston/backend-drm/drm.c#L2689
[2]: a290d7a78d/backend/session/session.c (L268)

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Pekka Paalanen <pekka.paalanen@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2021-02-26 12:56:46 +01:00
Leo Liu
1225171bd5 amdgpu_drm: sync up with the latest amdgpu_drm.h based on drm-next (https://cgit.freedesktop.org/drm/drm)
What are these headers?
Adding currently missing stuff from https://cgit.freedesktop.org/drm/drm/tree/include/uapi/drm/amdgpu_drm.h based on
the latest commit there:

commit f730f39eb981af249d57336b47cfe3925632a7fd (HEAD -> drm-next, tag: drm-next-2021-02-19, origin/drm-next, origin/HEAD)
Merge: 4f8ad4045b38 81ce8f04aa96
Author: Dave Airlie <airlied@redhat.com>
Date:   Fri Feb 19 13:54:29 2021 +1000

    Merge tag 'drm-intel-next-fixes-2021-02-18' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

Which headers go where?
From https://cgit.freedesktop.org/drm/drm/tree/include/uapi/drm/amdgpu_drm.h to
https://cgit.freedesktop.org/mesa/drm/tree/include/drm/amdgpu_drm.h

When and which headers to update?
If the kernel uapi drm header changes, the header here should be sync-ed.

When and how to update these files
The steps for generating this patch:

 - Switch to freedesktop drm-next kernel branch (https://cgit.freedesktop.org/drm/drm);
 - Install the headers via `make headers_install';
 - Copy from kernel "include/uapi/drm/amdgpu_drm.h" to libdrm "include/drm/amdgpu_drm.h";
 - generate the patch;

The commits from drm-next (https://cgit.freedesktop.org/drm/drm) are:

Mauro Carvalho Chehab (1)
c45dd3bda1c809eb120452597097e14a96b58c1f drm/amdgpu: fix some kernel-doc markups

Huang Rui(3)
6fbcb00c7984fa7d49af2c361453c0397cdea400 drm/amdgpu: add TOC firmware definition
1e483203965bdab466af0739c1edf7da07da241d drm/amdgpu: add uapi to define van gogh memory type
f7b2cdb23abf62bc3d33c2e0b0009a09412ff475 drm/amdgpu: add uapi to define van gogh series

Pierre-Eric Pelloux-Prayer(1)
16c642ec3fe9a144fbe1e97dc56f13a6308f1381 drm/amdgpu: new ids flag for tmz (v2)

Yong Zhao(1)
130c88931f6cbdb4513d307b4a13fcfff08a8041 drm/amdgpu: Improve the MTYPE comments

Signed-off-by: Leo Liu <leo.liu@amd.com>
2021-02-21 16:48:39 -05:00
Tejas Upadhyay
3b6cfb20fb intel: add INTEL_ADLS_IDS to the pciids list
This enables drm_intel_bufmgr on ADLS

Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2021-02-18 10:44:10 +00:00
Tejas Upadhyay
9086ff9daf intel: sync i915_pciids.h with kernel
Align with kernel commits:

0883d63b19bb ("drm/i915/adl_s: Add ADL-S platform info and PCI ids")
04057a1afc75 ("drm/i915: Sort EHL/JSL PCI IDs")
0e8e272f1368 ("drm/i915/ehl: Remove invalid PCI ID")
605f9c290c1a ("drm/i915: Sort ICL PCI IDs")
514dc424ce4f ("drm/i915: Sort CNL PCI IDs")
32d4ec9a1681 ("drm/i915: Sort CFL PCI IDs")
df3478af1d73 ("drm/i915: Sort CML PCI IDs")
cd988984cbea ("drm/i915: Sort KBL PCI IDs")
b04d36f73771 ("drm/i915: Sort SKL PCI IDs")
9c0b2d30441b ("drm/i915: Sort HSW PCI IDs")
79033a0a7898 ("drm/i915: Ocd the HSW PCI ID hex numbers")
cfb3db8fdae2 ("drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments")
03e399020cd2 ("drm/i915: Add SKL GT1.5 PCI IDs")
812f044df08c ("drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT")
194909a32aed ("drm/i915: Reclassify SKL 0x192a as GT3")
82e84284ab7d ("drm/i915: Update Haswell PCI IDs")
24ea098b7c0d ("drm/i915/jsl: Split EHL/JSL platform info and PCI ids")
b50b7991b739 ("drm/i915/dg1: add more PCI ids")
d452bd091e16 ("drm/i915: break TGL pci-ids in GT 1 & 2")
f2bde2546b81 ("drm/i915: Remove dubious Valleyview PCI IDs")
0883d63b19bb ("drm/i915/adl_s: Add ADL-S platform info and PCI ids")
04057a1afc75 ("drm/i915: Sort EHL/JSL PCI IDs")
0e8e272f1368 ("drm/i915/ehl: Remove invalid PCI ID")
605f9c290c1a ("drm/i915: Sort ICL PCI IDs")
514dc424ce4f ("drm/i915: Sort CNL PCI IDs")
32d4ec9a1681 ("drm/i915: Sort CFL PCI IDs")
df3478af1d73 ("drm/i915: Sort CML PCI IDs")
cd988984cbea ("drm/i915: Sort KBL PCI IDs")
b04d36f73771 ("drm/i915: Sort SKL PCI IDs")
9c0b2d30441b ("drm/i915: Sort HSW PCI IDs")
79033a0a7898 ("drm/i915: Ocd the HSW PCI ID hex numbers")
cfb3db8fdae2 ("drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments")
03e399020cd2 ("drm/i915: Add SKL GT1.5 PCI IDs")
812f044df08c ("drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT")
194909a32aed ("drm/i915: Reclassify SKL 0x192a as GT3")
82e84284ab7d ("drm/i915: Update Haswell PCI IDs")
24ea098b7c0d ("drm/i915/jsl: Split EHL/JSL platform info and PCI ids")
b50b7991b739 ("drm/i915/dg1: add more PCI ids")
d452bd091e16 ("drm/i915: break TGL pci-ids in GT 1 & 2")

Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Reviewed-by: Landwerlin, Lionel G <lionel.g.landwerlin@intel.com>
2021-02-18 10:12:28 +00:00
Alex Deucher
869ef0e4b2 amdgpu: update marketing names
From 20.45 release.

Acked-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-15 10:07:15 -05:00
Victor Hugo Vianna Silva
a43cac24db Avoid some compiler errors for tests/util/pattern.c
- Remove one unused variable.
- Convert two int-s into 'unsigned int'.
Motivated by a failed build of Chromium.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Victor Hugo Vianna Silva <victor.vianna10@gmail.com>
2021-02-10 21:14:47 +00:00
Emil Velikov
8cb12a2528 xf86drm: cap number of reported devices by drmGetDevice(2)
Do as the documentation says - cap the number of reported devices to the
requested amount - aka max_devices. Otherwise we risk out-of-bound access
for users of the API.

Issue: https://gitlab.freedesktop.org/mesa/drm/-/issues/56
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
2021-02-10 19:29:27 +00:00
Sonny Jiang
19f0a9cb87 tests/amdgpu/vcn: clean abundant codes
Remove useless codes.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2021-01-23 15:31:00 -05:00
James Zhu
2315bcddd6 tests/amdgpu: add vcn test support for dimgrey_cavefish
add dimgrey_cavefish chip id in vcn test

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2021-01-23 15:31:00 -05:00
Tao Zhou
10377d661a tests/amdgpu: add vcn test support for navy_flounder
add navy_flounder chip id in vcn test

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
2021-01-23 15:31:00 -05:00
Fabio Estevam
5f85a6d98b tests/util: Add mxsfb-drm driver
Add an entry for the "mxsfb-drm" driver, so that the test utilities
work with the mxsfb driver without passing the -M argument.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2021-01-22 11:17:58 +01:00
Heiko Becker
62b9a3eee9 meson: Also search for rst2man.py
That's what upstream docutils installs by default.

Signed-off-by: Heiko Becker <heirecka@exherbo.org>
2021-01-21 11:27:30 +01:00
Valentin Churavy
10dd3eb6d5 Use dep_rt in amdgpu/meson.build
The amdgpu implementation uses `clock_gettime` so it needs to check whether it needs to link
against `-librt`.

Signed-off-by: Valentin Churavy <v.churavy@gmail.com>
2021-01-11 13:40:39 -05:00
Simon Ser
a55042e2c6
Bump version to 2.4.104
Signed-off-by: Simon Ser <contact@emersion.fr>
2021-01-11 17:18:20 +01:00
Antonin Décimo
cdd14e92e9 headers: drm: Sync with drm-next
Generated using make headers_install from the drm-next
tree - git://anongit.freedesktop.org/drm/drm
branch - drm-next
commit - b10733527bfd864605c33ab2e9a886eec317ec39

The changes were as follows (shortlog from
14d2bd53a47a7e1cb3e03d00a6b952734cf90f3f):

core: (drm_mode.h)

Alexander A. Klimov (1):
      drm: Replace HTTP links with HTTPS ones

Noralf Trønnes (1):
      drm: Add SPI connector type

Oleg Vasilev (1):
      drm: report dp downstream port type as a subconnector property

Simon Ser (1):
      drm: document that blobs are ref'counted

Uma Shankar (3):
      drm: Add HDR source metadata property
      drm: Fixed doc warnings in drm uapi header
      drm: Fix docbook warnings in hdr metadata helper structures

core: (drm_fourcc.h)

Adam Jackson (1):
      drm/fourcc: Fix undefined left shift in DRM_FORMAT_BIG_ENDIAN macros

Bas Nieuwenhuizen (2):
      drm/fourcc: Add AMD DRM modifiers.
      drm/fourcc: Fix modifier field mask for AMD modifiers.

Ben Davis (2):
      drm: drm_fourcc: add NV15, Q410, Q401 YUV formats
      drm: drm_fourcc: Add uncompressed AFBC modifier

Brian Starkey (1):
      drm: drm_fourcc: Add generic alias for 16_16_TILE modifier

Dave Airlie (1):
      Merge tag 'amd-drm-next-5.11-2020-11-05' of git://people.freedesktop.org/~agd5f/linux into drm-next

Dhinakaran Pandiyan (2):
      drm/framebuffer: Format modifier for Intel Gen-12 render compression
      drm/framebuffer: Format modifier for Intel Gen-12 media compression

James Jones (1):
      drm: Generalized NV Block Linear DRM format mod

Maarten Lankhorst (1):
      Backmerge remote-tracking branch 'drm/drm-next' into drm-misc-next

Matteo Franchin (1):
      drm/fourcc: Add AXBXGXRX106106106106 format

Mika Kahola (1):
      uapi/drm/drm_fourcc.h: Note on platform specificity for format modifiers

Neil Armstrong (2):
      drm/fourcc: Add modifier definitions for describing Amlogic Video Framebuffer Compression
      drm/fourcc: fix Amlogic Video Framebuffer Compression macro

Raymond Smith (1):
      drm/fourcc: Add Arm 16x16 block modifier

Simon Ser (4):
      drm/fourcc: document modifier uniqueness requirements
      drm: deprecate DRM_FORMAT_MOD_NONE
      drm/fourcc: add table describing AMD modifiers bit layout
      drm/fourcc: fix AMD modifiers PACKERS field doc

Signed-off-by: Antonin Décimo <antonin.decimo@gmail.com>
2021-01-11 16:12:38 +00:00
Simon Ser
4f0fe66369
Remove outdated comments about stdint.h
We include stdint.h unconditionally in the header. We don't require
users to include it manually before xf86drmMode.h.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-01-11 17:08:01 +01:00
Simon Ser
b82ed182ca
Remove definitions duplicated from drm_mode.h
I don't exactly know why these were duplicated before. Maybe libdrm
didn't always vendored drm_mode.h from the kernel? In any case, we now
do, so instead of having copy-pasted definitions, just include our
vendored version which cannot be outdated.

Contrary to what the comment says, drm.h doesn't include drm_mode.h, so
we need to add the include.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2021-01-11 17:05:47 +01:00
Emmanuel Vadot
d034db142d tests/amdgpu: Fix on FreeBSD
FreeBSD have endian.h under the sys directory.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
2020-12-12 11:34:17 +00:00
Luben Tuikov
d4fdeaf19b tests/amdgpu: Fix a typo
Fix a typo: "TZM" --> "TMZ"

Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2020-12-11 16:51:35 -05:00
Nicolas Caramelli
1a2b1a6cac tests/modetest: remove bracket in dump_connectors()
Signed-off-by: Nicolas Caramelli <caramelli.devel@gmail.com>
2020-12-11 16:35:20 +00:00
Simon Ser
31dc14840f xf86drmMode.h: use ANSI C99 arrays
This avoids the use of a GNU-specific extension in public headers. Also
see [1].

[1]: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/80#note_707458

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
2020-12-10 09:45:39 +00:00
Simon Ser
df373424c5 Document drmModeConnection
Signed-off-by: Simon Ser <contact@emersion.fr>
2020-12-10 09:24:42 +00:00
Simon Ser
05b0a955d3
man: convert to reStructuredText
DocBook makes it hard to write and maintain docs. Hopefully
reStructuredText can make this less painful.

The man pages were converted from DocBook to reStructuredText via
Pandoc:

    pandoc -s -f docbook -t rst -o man/drm.7.rst man/drm.xml

And then manual editing to fixup e.g. references to other man pages. To
compare the result with the DocBook version, this command was used:

    rst2man man/drm-kms.7.rst | man -l -

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2020-12-10 10:17:19 +01:00
Lubomir Rintel
9a7afcf198 tests/etnaviv_2d_test: check whether the rendering is correct
Instead of always dumping the rendered picture, check whether it matches
the expectations. This makes more sense for automated testing.

Retain the ability to dump the picture instead of checking it when a
file name is given as an argument. This also removes use of a hardcoded
file name in a world writable directory, which is an unsafe thing to
do anyway.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2020-12-09 16:00:51 +01:00
Lubomir Rintel
9638207005 tests/etnaviv_2d_test: pick the 2D core
Run the test on a core capable of 2D rendering instead of hardcoding to
core zero.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2020-12-09 16:00:47 +01:00
Lubomir Rintel
f35acf6d3f tests/etnaviv_2d_test: explain the errors
Just so that it's obvious what failed and why.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2020-12-09 16:00:43 +01:00
Thong Thai
fc479e133e tests/amdgpu/vcn: update to not use asic_id for Renoir
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-06 14:41:14 +00:00
Dave Airlie
5dea8f56ee Bump version to 2.4.103
Signed-off-by: Dave Airlie <airlied@redhat.com>
2020-11-04 13:19:09 +10:00
Lucas Stach
c2e940a8be tests/util: Add imx-dcss driver
This makes the test utilities work with the i.MX DCSS driver without the
necessity of using the -M argument.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2020-10-28 10:56:18 +01:00
Paul Gofman
ad7cf9d75c xf86drm.c: Use integer logarithm.
log() is affected by FP control word and can provide inaccurate result.

Fixes Killer Instinct under Wine not being able to find AMD vulkan
device.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Paul Gofman <pgofman@codeweavers.com>
2020-10-28 09:18:47 +10:00
Tianci.Yin
3e9f211303 tests/amdgpu: disable VCN test if no VCN ring available(v2)
If KMD has no VCN support, remove the VCN test.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tianci.Yin <tianci.yin@amd.com>
2020-10-23 16:22:11 +08:00
Carsten Haitzler
3ec26b03ee tests: add komeda to list of modules to look for for testing
komeda is one of the supported GPUs in the kernel tree so this adds it
to libdrm modules to look for in tests.

Signed-off-by: Carsten Haitzler <carsten.haitzler@arm.com>
2020-10-16 15:14:45 +01:00
Alex Deucher
ce1387b591 amdgpu: only enable security tests on raven family
It's the only asic with support at the moment.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:47:05 -04:00
Luben Tuikov
253e0383a3 tests/amdgpu: Secure bounce test (v4)
Implement secure bounce test. Steps implemented
as outlined by Christian K.

v2: Remove gpu_info; add comment describing
    the purpose and steps of the test.
v3: Parameterize "secure" in amdgpu_bo_lcopy() and
    amdgpu_bo_move(). Set them both to 0.
    Allocate buffer Bob to be non-TMZ.
v4: Fix an off-by-one bug which was causing
    the test to segfault.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:47:00 -04:00
Luben Tuikov
18a0291273 tests/amdgpu: Remove forward declarations
Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:55 -04:00
Aaron Liu
24b9c9ca47 test/amdgpu: enable security suite tests
This patch enables security suite tests.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:50 -04:00
Aaron Liu
eb1a17039f test/amdgpu: add drm version checking for security suite
Adding drm version checking for security suite.
drm version need to be at least 3.37.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:45 -04:00
Aaron Liu
238acd6f3d tests/amdgpu: add test to submit a sdma command with secure context
This patch add test to submit a sdma command with secure context.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:40 -04:00
Aaron Liu
38c44cccdc tests/amdgpu: add atomic dma command to verify the secure buffer (v2)
DMA's atomic behavir is unlike GFX,If the comparing data is not
equal to destination data,
For GFX, loop again till gfx timeout(system hang).
For DMA, loop again till timer expired and then send interrupt.
So testcase can't use interrupt mechanism.
We take another way to verify. When the comparing data is not
equal to destination data, overwrite the source data to the destination
buffer. Otherwise, original destination data unchanged.
So if the bo_cpu data is overwritten, the result is passed.

Steps:
1. use linear write packet to write 0xdeadbeaf to secure buffer,
2. use atmoic packet and ATOMIC_CMPSWAP_RTN_32 opcode to compare
the cmp_data(0xdeadbeaf) to the written data which has been encrypted.

v2: add the case of (dest_data != cmp_data).

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:34 -04:00
Aaron Liu
00087856fc tests/amdgpu: add test to submit a gfx command with secure context
This patch is to test the command submission with secure context.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:29 -04:00
Aaron Liu
5de99b1fa6 tests/amdgpu: add atomic_mem cp_packet to verify the secure buffer
Secure buffer is only able to be read with trusted ip block.
So we need use GFX ip to read it back instead of CPU.
Steps:
1. use write_data packet to write 0xdeadbeaf to secure buffer,
2. use atmoic_mem packet and ATOMIC_CMPSWAP_RTN_32 opcode to compare
the cmp_data(0xdeadbeaf) to the written data which has been encrypted.
If the result is equal, then overwrite the src_data(0x12345678) to the
secure buffer and return directly. Otherwise loop again until gfx timeout
and the secure buffer data unchanged.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:22 -04:00
Aaron Liu
b352ef44b8 tests/amdgpu: expand secure param for exec_cs_helper (v2)
This patch expands secure param for amdgpu_test_exec_cs_helper_raw.
The flag is transfered to kernel with cs.

v2: squash in change from context to IB flag

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:16 -04:00
Huang Rui
0cefd4cecd tests/amdgpu: add device handle as input param for exec_cs_helper and write_linear_helper (v4)
This patch is to add add device handle as input param for exec_cs_helper
and write_linear_helper.

Because they are needed in security tests.

v2: fix typo that basic tests should be un-secure.
v3: refine the function implementation.
v4: remove amdgpu_cs_ctx_create3 calling.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:11 -04:00
Huang Rui
76ceb8b806 tests/amdgpu: expand write linear helper for security (v3)
This patch expand write linear helper for security to submit the command
with secure context.

v2: refine the function implementation.
v3: remove amdgpu_cs_ctx_create3.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:05 -04:00
Huang Rui
cfe55a0451 tests/amdgpu: add secure buffer allocation test for invisible VRAM
This patch is to add secure buffer allocation test for invisible VRAM.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:46:00 -04:00
Huang Rui
e63b775e5a tests/amdgpu: add secure buffer allocation test for system memory
This patch is to add secure buffer allocation test for system memory.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:45:50 -04:00
Huang Rui
2c0e4991d7 tests/amdgpu: add security test suite (v2)
This patch is to add a new test suite to store security tests.
In Raven+ asics, it will support TMZ (trust memory zone), and it is
page-based protection feature.

v2: remove tests/amdgpu/Makefile.am and update to
tests/amdgpu/meson.build

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:45:41 -04:00
Alex Deucher
2420768d02 amdgpu: sync up amdgpu_drm.h with latest from kernel
From drm-next:

commit c41219fda6e04255c44d37fd2c0d898c1c46abf1
Merge: e20bb857dea2 d96536f0fe69
Author: Dave Airlie <airlied@redhat.com>
Date:   Thu May 21 10:44:32 2020 +1000

    Merge tag 'drm-intel-next-fixes-2020-05-20' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

    Fix for TypeC power domain toggling on resets (Cc: stable).
    Two compile time warning fixes.

    Signed-off-by: Dave Airlie <airlied@redhat.com>
    From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20200520123227.GA21104@jlahtine-desk.ger.corp.intel.com

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:45:31 -04:00
Le Ma
6e10ac07c8 tests/amdgpu: disable unsupported test cases for Arcturus
Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:45:27 -04:00
Le Ma
bbaec1283f tests/amdgpu: move arcturus asic check function to common place
Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:45:22 -04:00
James Zhu
70c97212b8 tests/amdgpu/vcn: add Arcturus decode test support
Add Arcturus decode test support only

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:45:17 -04:00
Le Ma
236a139f09 tests/amdgpu: disable gfx engine basic test cases for Arcturus
Since Arcturus has no gfx pipeline(CPG), cases below is not suitable:
  - Command submission Test (GFX)
  - Command submission Test (Multi-Fence)
  - Sync dependency Test

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:45:11 -04:00
Le Ma
301b4b64d0 tests/amdgpu: create Active function for basic test suite
Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:44:58 -04:00
Le Ma
ba0d45eca6 tests/amdgpu: add function to check Asic is Arcturus
Since Arcturus has no gfx engine, add function to blacklist gfx related test.

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-15 13:44:34 -04:00
Alex Deucher
5de99aebba amdgpu: add marketing names from 20.40
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-10-05 11:33:10 -04:00
Tapani Pälli
bb7433c1c6 intel: add INTEL_DG1_IDS to the pciids list
This enables drm_intel_bufmgr on DG1 and allows us to pass dmabuf
import/export related tests with Piglit.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2020-09-30 13:37:48 +03:00
sitanliu
77687f8d6e amdgpu: add device IDs for Raven, Picasso and Renoir 2020-09-03 23:51:28 +08:00
Adam Miszczak
a9591d66fe intel: sync i915_pciids.h with kernel
Add DG1 and clean-up VLV PCI IDs.

Align with kernel commits:
f2bde2546b81 ("drm/i915: Remove dubious Valleyview PCI IDs")
fd38cdb81105 ("drm/i915/dg1: Add DG1 PCI IDs")

Signed-off-by: Adam Miszczak <adam.miszczak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2020-08-27 09:06:04 +00:00
Jeremy Cline
5bd6a7659e man: Update the bug URL to gitlab.freedesktop.org
Point users to the GitLab issue tracker instead of Bugzilla, which is no
longer used.

Signed-off-by: Jeremy Cline <jcline@redhat.com>
2020-08-27 08:10:12 +00:00
sunil kumar dora sermsity
a84caff71b intel: Add PCI ID support to RKL platform
Missing RKL PCI ID preventing below test cases to succeed on RKL Platform.
    igt@kms_frontbuffer_tracking
    igt@kms_draw-crc
    igt@kms_big_fb

    Signed-off-by: sunil kumar dora sermsity <sunilx.kumar.dora.sermsity@intel.com>
    Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
2020-08-21 20:02:53 +00:00
Pavan Kumar Ramayanam
0a1aefe560 amdgpu: Add Device IDs for Embedded Raven2 platforms
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Pavan Kumar Ramayanam <pavan.ramayanam@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-08-19 22:30:23 -04:00
José Roberto de Souza
669e1087ab intel: sync i915_pciids.h with kernel
Two new patches landed in kernel adding new PCI ids:
123f62de419f ("drm/i915/rkl: Add RKL platform info and PCI ids")
52797a8e8529 ("drm/i915/ehl: Add new PCI ids")

Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
2020-07-08 10:44:53 -07:00
Leo Liu
f449081628 tests/amdgpu: clear the extension flag
This is workaround of firmware issue, and the change has no impact
on the legacy HW.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
2020-06-18 10:08:23 -04:00
Leo Liu
f806d438d6 tests/amdgpu: clear msg decode flag
It is not used for VCN from VCN1, but VCN3 use it
for other feature, so clear it, because we don't
use the feature for now

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
2020-06-18 10:08:23 -04:00
Leo Liu
7b9d4bbdd5 tests/amdgpu: add VCN3.0 regs support
VCN3.0 has its own set of internal regs

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
2020-06-18 10:08:23 -04:00
Heiko Thiery
c7d8941288 xf86drm.c: fix build failure
./xf86drm.c: In function 'drmNodeIsDRM':
../xf86drm.c:2825:7: error: "__FreeBSD__" is not defined [-Werror=undef]
 #elif __FreeBSD__
       ^
../xf86drm.c: In function 'drmGetMinorNameForFD':
../xf86drm.c:2938:7: error: "__FreeBSD__" is not defined [-Werror=undef]
 #elif __FreeBSD__
       ^
../xf86drm.c: In function 'drmParsePciBusInfo':
../xf86drm.c:3258:7: error: "__FreeBSD__" is not defined [-Werror=undef]
 #elif __FreeBSD__
       ^
../xf86drm.c: In function 'drmParsePciDeviceInfo':
../xf86drm.c:3427:7: error: "__FreeBSD__" is not defined [-Werror=undef]
 #elif __FreeBSD__
       ^
../xf86drm.c: In function 'drmGetDeviceNameFromFd2':
../xf86drm.c:4305:7: error: "__FreeBSD__" is not defined [-Werror=undef]
 #elif __FreeBSD__
       ^

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
2020-06-06 07:16:45 +02:00
Eric Engestrom
5ab6031699 core: use O_RDONLY instead of ambiguous 0 flag
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
2020-05-28 17:17:26 +02:00
Alex Deucher
9fbae6f6ad amdgpu: add marketing names from 20.10
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-05-27 17:16:28 -04:00
Dave Airlie
bb70ab82fd Bump version to 2.4.102
Signed-off-by: Dave Airlie <airlied@redhat.com>
2020-05-27 06:33:09 +10:00
Emil Velikov
bf602a2d67 modetest: Add a new "-r" option to set a default mode
This option finds all connected connector and then sets its preferred
mode on it. If no preferred mode is available, first mode is used.

This option must be set w/o any mode or plane.

This allows for a quick test on all connected outputs.

Loosely based on the work by Ezequiel Garcia <ezequiel@collabora.com>

Changes since Ezequiel's work:
 - implement atomic codepath
 - set all connectors
 - pick correct crtc
 - don't set -r by default
 - nearly identical output in atomic and non-atomic codepaths

v2:
 - Use the crtc->crtc_id, instead of the plane's current crtc_id

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:09:35 +01:00
Emil Velikov
a04c8abb86 modetest: reorder atomic path alike the non-atomic
Makes the code a tiny bit more symmetrical.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:09:35 +01:00
Emil Velikov
e341176d9f modetest: don't error out of final AtomicCommit
The very final drmModeAtommicCommit tears down the existing mode/plane
setup. Following it we clean up other misc state laying around.

Chances are that it will not fail, but in the extremely unlikely case it
does, there's nothing one can do.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:09:35 +01:00
Emil Velikov
3d88c993a4 modetest: factor out atomic pageflip test
Move the hunk of code into a function, making the overall flow easier to
follow and providing some symmetry to the non-atomic path.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:09:35 +01:00
Emil Velikov
d928cd803a modetest: push pipe_resolve_connectors() to set_mode
The function is closely related to pipe_find_crtc_and_mode() so we might
as well keep them together.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:09:35 +01:00
Emil Velikov
3b9585d88e modetest: move pipe_resolve_connectors() further up
Move the function above set_mode, since we'll be using it from there as
of next commit.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:09:35 +01:00
Emil Velikov
bdb9b82cf7 modetest: unify {,atomic_}set_mode()
Instead of duplicating the exact same code across the two functions,
fold them into one.

For some strange reason git diff may show atomic_clear_mode() as changed
The function in untouched, despite the misleading output.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:09:35 +01:00
Emil Velikov
544fab624d modetest: get the crtc_id from the pipe_arg
Makes the code shorter and easier to read.

Currently if the user has not set the crtc_id, we fetch the crtc yet do
not "bother" setting the id - do so.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:09:35 +01:00
Emil Velikov
336c04220c modetest: introduce and use get_crtc_by_id() and get_crtc_mask()
Let's make the code shorter, this avoid crashes (when drmModeGetCrtc()
fails) by using a couple of helpers. As get_resources() considers the
drmModeGetCrtc() fail non-fatal, we might as well handle it properly.

v2: Add a comment above the unreachable abort() (Eze)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:09:14 +01:00
Emil Velikov
ef58af6dfc modetest: close the device on exit
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:04:01 +01:00
Emil Velikov
53fde76ce3 modetest: remove drmMode{,Plane}Res
There's no point in keeping these around since we already fetch the
complete data set. Add respective count_ variables and greatly simplify
the existing code.

Extra brownie points for:
 - using the inverse order in free_resources()
 - don't memory leak the connector properties
 - free the properties themselves, instead of only the objects

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:03:52 +01:00
Emil Velikov
823669c6c0 modetest: add and use bo_fb_create() helper
Flesh out the bo_create + drmModeAddFB2 dance into a helper and use it.
Currently we're duplicating that in 4 places, many of which leaking et
al.

As a bonus point this highlights that the atomic_set_plane() seems tad
buggy. That'll be fixed with separate commit.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:03:41 +01:00
Emil Velikov
900ed60848 modetest: set atomic cap, _only_ when needed
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:03:32 +01:00
Emil Velikov
69f25d6a29 modetest: move basic args check before open()
Don't bother opening the device node, if the args combination is invalid

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:03:27 +01:00
Emil Velikov
24c0c44c8d modetest: remove cursor/page_flipping_supported stubs
The two functions have been stubs for ages. The alluded generic ioctls
never came to be, assumingly because all new drivers support those.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:03:18 +01:00
Emil Velikov
9ffcbf5cd9 modetest: simplify "dump all" logic
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com>
Tested-by: Ezequiel Garcia <ezequiel@collabora.com>
2020-05-19 21:02:45 +01:00
Jose Maria Casanova Crespo
c997baf590 meson: require valgrind 3.10.0 to enable it with freedreno
Freedreno uses VALGRIND_ENABLE_ADDR_ERROR_REPORTING_IN_RANGE that was
introduced in Valgrind 3.10.0

Raspbian Buster includes Valgrind 3.7.0, so when valgrind is installed
as freedreno is build by default the build becomes broken. So lets
require 3.10 to enable valgrind when freedreno is built.

v2: Keep the arguments listed in the same order (Emil Velikov)

Closes: https://gitlab.freedesktop.org/mesa/drm/-/issues/37
Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-05-07 02:57:55 +00:00
Karol Herbst
bfa782c5f6 nouveau: sync up with nouveau_abi16.h and nouveau_drm.h
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-06 23:17:48 +02:00
Boram Park
7915b0a68d drm mode : fix memory leak when freeing drmModePropertyPtr
Closes: https://gitlab.freedesktop.org/mesa/drm/-/issues/5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2020-05-05 11:47:18 +01:00
Emmanuel Vadot
5aa83dd6fa libdrm: drmGetDeviceNameFromFd: Always return /dev/dri/ node for FreeBSD
Since we now always returns the /dev/dri/ node for
drmGet<nodetype>DeviceNameFromFd, be consistant with the names returned
in drmGetDeviceNameFromFd.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
2020-05-04 21:19:58 +02:00
Emmanuel Vadot
f52e2b20ed libdrm: drmGetMinorNameFromFd: Fix FreeBSD variant
Fix the FreeBSD variant by getting the node type represented by fd to deduce
the target minor name.
We then return the full /dev/dri/<minorname><id> version.

Fix: #41
Fixes: 6818a50b12
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
2020-05-04 21:19:58 +02:00
Karol Herbst
5ec177b398 nouveau: fix compile error with -DDEBUG on newer gcc
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2020-05-04 11:58:10 +02:00
Nicholas Bishop
05727548a1 libdrm: intel: add DRM_RDWR flag in drm_intel_bo_gem_export_to_prime
This is similar to b81d44d587: the
DRM_RDWR flag is needed for mmap to work.

Signed-off-by: Nicholas Bishop <nicholasbishop@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-30 11:12:37 +00:00
Nicholas Bishop
dd562b1efd intel: properly escape sed pattern for tests
The sed was incorrectly modifying e.g. "nicholasbishop" to
"nicholasbop". The updated pattern will only match `.sh` at the end of
the string.

Signed-off-by: Nicholas Bishop <nicholasbishop@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-27 15:53:58 +00:00
Leo Liu
fd7f3746e3 tests/amdgpu/vcn: add Renoir VCN2.0 decode support
Renoir is the same family as Raven, but it's with VCN2.0,
so it has to use VCN2.0 reg set

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-By: Thong Thai <thong.thai@amd.com>
2020-04-26 11:39:19 -04:00
Scott Anderson
bf63f8acdc libdrm: Handle usb_interface devices for usb parsing
Currently the code expects that the device found at
/sys/char/$maj:$min/device for USB devices is a "usb_device". However,
at least for some devices, such as for the udl driver, they are instead
a "usb_interface".

A usb_interface is a child of the usb_device we're interested in, so we
walk up one in the /sys path to get there.

For example, with a USB device I have, trimmed to show the relevant
information:
```
$ udevadm info /dev/dri/card1
P: /devices/pci0000:00/0000:00:01.3/0000:02:00.0/usb1/1-4/1-4:1.0/drm/card1
E: DEVTYPE=drm_minor
$ udevadm info /sys/devices/pci0000:00/0000:00:01.3/0000:02:00.0/usb1/1-4/1-4:1.0
E: DEVTYPE=usb_interface
E: DRIVER=udl
$ udevadm info /sys/devices/pci0000:00/0000:00:01.3/0000:02:00.0/usb1/1-4
E: DEVTYPE=usb_device
E: DRIVER=usb
E: BUSNUM=001
E: DEVNUM=009
```

Signed-off-by: Scott Anderson <scott@anderso.nz>
2020-04-24 08:53:53 +00:00
Mikhail Golubev
57df07572c xf86drm: Check non-absolute path only for virtio based devices
This fixes bug in drmParseSubsystemType() that cases situation when
subsequent call to readlink() from get_subsystem_type() will result in
EACCESS.

Signed-off-by: Mikhail Golubev <mikhail.golubev@opensynergy.com>
2020-04-24 08:24:46 +00:00
Peter Seiderer
9001c93b7f tests/amdgpu: needs atomic_ops
Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Acked-by: Alex Deucher alexander.deucher@amd.com
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-22 23:54:36 -04:00
Emil Velikov
cf1afec017 tests: install drmdevice
Just like the other tests (tools really) install drmdevice. It is a
simple tool which is useful for basic check/testing.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
2020-04-21 18:50:23 +01:00
Emmanuel Vadot
1600fe1130 tests/nouveau/threaded: adapt ioctl signature for FreeBSD
FreeBSD also use (int, unsigned long int, ...) like GLIBC.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:26:54 +02:00
Emmanuel Vadot
e321dd7a4d libdrm: Implement drmParsePciDeviceInfo for FreeBSD
The FreeBSD kernel expose a pseudo-device /dev/pci to obtain information
about present PCI device.
Uee the PCIOCGETCONF ioctl on this device to look up the desired device
information.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:26:54 +02:00
Emmanuel Vadot
44bcf9c0ce libdrm: get_pci_path is Linux only so add an ifdef
Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:26:54 +02:00
Emmanuel Vadot
379113724f libdrm: Add get_sysctl_pci_bus_info for FreeBSD
The FreeBSD drm driver expose a sysctl hw.dri.%d.busid which contain
the busid.
Use this sysctl to parse the busid information based on the major/minor
that allow us to implement FreeBSD support for drmParsePciBusInfo.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:26:54 +02:00
Emmanuel Vadot
bb584b8fd2 libdrm: drmCheckModesettingSupported: fix for FreeBSD
FreeBSD only support up to 10 GPUs not 16.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:26:54 +02:00
Emmanuel Vadot
24e68525dc libdrm: drmCheckModesettingSupported: Fix for FreeBSD
Remove some useless busid rewritting.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:26:54 +02:00
Emmanuel Vadot
13c9de39a6 libdrm: drmGetDeviceNameFromFd2: Add FreeBSD variant
The FreeBSD variant of drmGetDeviceNameFromFd can already handle
the different node type so just call it.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:26:54 +02:00
Emmanuel Vadot
41f3a7b3e5 libdrm: Default to PCI for FreeBSD
FreeBSD have some support for DRM on !PCI device but no code is currently
upstream. Default to PCI for now.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:26:54 +02:00
Emmanuel Vadot
57c50cfc45 libdrm: drmGetMinorNameForFD: Add FreeBSD variant
Use the FreeBSD variant function to obtain the minor name and the
device node.
Return the correct path based on where the node is (drm/ versus dri/).

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:26:54 +02:00
Emmanuel Vadot
6818a50b12 libdrm: drmGetDeviceNameFromFd: Add FreeBSD variant
Get the major/minor via fstat and after checking that this is a drm node
construct the full device node name using devname.
Note that we should be able to use fdevname to avoid calling fstat + devname
but for some reason it doesn't work on drm node (probably due to how the device
node are created in the linux compat code for drm on FreeBSD).

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:26:54 +02:00
Emmanuel Vadot
c55a1e564c libdrm: drmGetMinorType: Add FreeBSD version
Resolve the minor type based on the device node path.
The minor type is either in /dev/drm/X where X is the type or
in a Linux-compatible device node in /dev/dri/
This means we need the major number on FreeBSD so add it to the function
arguments.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 19:25:36 +02:00
Emmanuel Vadot
4fbcc9a6a7 xf86drm: Remove ifdef for FreeBSD and DRM_MAJOR
FreeBSD devfs only provides on the fly generated major/minor.
The major number is irrelevant for FreeBSD so remove the special case.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 18:39:48 +02:00
Emmanuel Vadot
1c8d2b73a6 libdrm: drmNodeIsDRM: Add FreeBSD variant
FreeBSD devfs have on the gly generated major minor so we cannot use them
to test if the device is a drm node.
Instead get the devfs node name and test if it is in a subdirectory "drm/"
or "dri/".
Historycally DRM device on FreeBSD are created in /dev/drm/ and link are
present in /dev/dri/ for compatibility reason.

Signed-off-by: Emmanuel Vadot <manu@FreeBSD.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-04-21 18:39:48 +02:00
Eric Engestrom
1f8ada8023 meson: don't detect <sys/sysctl.h> on Linux
The header is not required on Linux, and is in fact deprecated in glibc 2.30+

Reported-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Cc: Niclas Zeising <zeising@daemonic.se>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Niclas Zeising <zeising@daemonc.se>
2020-04-20 23:48:08 +00:00
James Zhu
8cef557062 tests/amdgpu/vcn: add dummy feedback message
Latest VCN firmware has feedback header check.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2020-04-16 16:01:37 -04:00
Timo Aaltonen
27fa47a738 Bump version to 2.4.101 2020-04-03 14:39:47 +03:00
Pierre-Eric Pelloux-Prayer
b9bf42d3e1 amdgpu: increase cpu_map_count storage size
Mesa expects to be able to map the same buffer, without unmapping it.
This leads to problem on long-running program.

On the other hand, libdrm uses cpu_map_count as a refcount and expects
its value to decrease so it can unmap buffers.

The previoulsy proprosed fix (https://patchwork.freedesktop.org/patch/258005/)
stopped increased the counter when it went past INT_MAX.

This commit instead proposes to use a larger type to store cpu_map_count.
The outcome is the same: long running apps will not crash, only the
implementation differs.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1423
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2020-03-23 13:18:01 +01:00
Swathi Dhanavanthri
bb4e154d3d intel: sync i915_pciids.h with kernel
Changes:
3882581753d1 ("drm/i915/tgl: Add new PCI IDs to TGL")

Signed-off-by: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com>
Reviewed-by: Timo Aaltonen <timo.aaltonen@canonical.com>
2020-03-23 13:51:19 +02:00
Daniel Stone
665c0f7fd8 Add DRM_MODE_CONNECTOR_WRITEBACK to xf86drmMode.h
xf86drmMode.h currently duplicates the connector-type definitions from
drm_mode.h. Add DRM_MODE_CONNECTOR_WRITEBACK, which is only visible
through a client cap, from drm_mode.h.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
2020-03-17 12:19:10 +00:00
Michel Dänzer
fe06ee2054 tests: Only copy con->modes[0] if it exists
con->modes can be NULL. Fixes crash in that case.

Closes: https://gitlab.freedesktop.org/mesa/drm/issues/34
Reviewed-by: Daniel Stone <daniels@collabora.com>
2020-02-27 12:21:09 +01:00
Vasyl Vavrychuk
8a73372e62 xf86drm: fix subsystem type lookup for virtio mmio-based devices
Currently the code assumes that a virtio based device is always located
on the PCI bus.

Modify the parser to make it check the device's parent directory to
determine on which bus it is located.

Output for virtio-pci is the PCI bus.
Output for virtio-mmio is the Platform bus.

Signed-off-by: Vasyl Vavrychuk <vasyl.vavrychuk@opensynergy.com>
Signed-off-by: Mikhail Golubev <Mikhail.Golubev@opensynergy.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
2020-02-24 21:53:41 +00:00
Vasyl Vavrychuk
c4eae71d7e xf86drm: generalize the device subsystem type parsing code
Move the code, which used to get the device subsystem type from a device
path in sysfs, to a separate function to be reusable.

Signed-off-by: Vasyl Vavrychuk <vasyl.vavrychuk@opensynergy.com>
Signed-off-by: Mikhail Golubev <Mikhail.Golubev@opensynergy.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
2020-02-24 21:53:41 +00:00
Eric Engestrom
2c0a01261d tests: drop redundant and slow random test
Suggested by Emil [1]:
> Feel free to drop the random test altogether. It's an old public API
> no active users (pretty ancient code uses it) and the in-tree users
> drmSL and drmHash already have respective tests.

This test takes minutes to run, while all the other tests combined take
barely more than a second.

Dropping it also helps the CI by avoiding random timeouts when `random`
takes more than the 4 minutes (!) we've allowed for it.

[1] https://gitlab.freedesktop.org/mesa/drm/merge_requests/26#note_390066

Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-02-15 12:14:00 +00:00
Huang Rui
a42eb3dfde amdgpu: clean up the cs structure variable
This patch is to use generic variables as the input of amdgpu_cs_submit_raw2.
Because amdgpu_cs_submit_one won't handle IOCTL directly.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2020-02-12 19:55:22 +08:00
Huang Rui
c483259248 amdgpu: remove the un-used chunk_array
This array won't be used.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2020-02-12 19:55:16 +08:00
Huang Rui
cf9eb78a89 amdgpu: use amdgpu_cs_submit_raw2 in amdgpu_cs_submit
So far, amdgpu_cs_submit_raw2 is mainly used for upper layer (Mesa), however,
amdgpu_cs_submit is used for current all unit tests. Our intention is that the
unit tests can actually verify the API which is really used.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2020-02-12 19:55:09 +08:00
Huang Rui
fca0849af3 amdgpu: use alloca for dependencies and sem_dependencies
Use alloca instead of malloc, then we don't need free them at the end of this
function.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2020-02-12 19:52:37 +08:00
Daniel Stone
d8731e9eec Add drmModeGetFB2
Add a wrapper around the getfb2 ioctl, which returns extended
framebuffer information mirroring addfb2, including multiple planes and
modifiers.

Changes since v7:
 - add new symbols to core-symbol.txt (Eric Engestrom)

Changes since v5:
 - style change

Changes since v4:
 - Set fb_id at init instead of memclear() and set (Eric Engestrom)

Changes since v3:
 - remove unnecessary null check in drmModeFreeFB2 (Daniel Stone)

Changes since v2:
 - getfb2 ioctl has been merged upstream
 - sync include/drm/drm.h in a seperate patch

Changes since v1:
 - functions should be drm_public
 - modifier should be 64 bits
 - update ioctl number

Signed-off-by: Juston Li <juston.li@intel.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2020-02-12 10:23:44 +11:00
Juston Li
63d914d479 include/drm: sync up drm.h
a) delta: Adds DRM_IOCTL_MODE_GETFB2
  b) Generated using make headers_install
  c) Taken from drm-next-misc:
        commit 3ff4c24bdb1f494c217c80348f9db4896043ed81
        Author: Lyude Paul <lyude@redhat.com>
        Date:   Fri Jan 17 17:47:48 2020 -0500

        drm/dp_mst: Fix indenting in drm_dp_mst_topology_mgr_set_mst()

Signed-off-by: Juston Li <juston.li@intel.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
2020-02-12 10:23:44 +11:00
Alex Deucher
5c8ff57732 amdgpu: add new marketing names from 19.50
Add new marketing names.

Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-02-01 12:12:19 -05:00
Imre Deak
933729720b intel: drm_intel_bo_gem_create_from_* on platforms w/o HW tiling
Platforms without a HW detiler doesn't support the get_tiling IOCTL.
Fix the drm_intel_bo_gem_create_from_* functions assuming the default
no-tiling, no-swizzling setting for the GEM buffer in this case.

v2:
- Add the missing gem handle IOCTL parameter. (Eric)

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
2020-01-28 15:32:39 +02:00
Eric Engestrom
074947ee4b meson: always define whether headers exist
Combined with -Wundef (added in 75758d2ccf & enforced in ba17673eed),
this provides absolute safety against #ifdef typos.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-01-23 17:00:12 +00:00
Eric Engestrom
077e64292c meson: add symbols check for core libdrm
All the libdrm_* submodules have symbols checks, no reason to keep core
libdrm wild.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2020-01-23 16:55:04 +00:00
Ezequiel Garcia
07d48a4c00 modetest: Fix segmentation fault
When a mode is set with just a connector "-s foo",
we get a nasty segmentation fault. Fix it.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2020-01-21 17:56:23 +00:00
John Stultz
899da0f486 libdrm: modetest: Allow selecting modes by index
Often there are many similar modes, which cannot be selected
via modetest due to its simple string matching.

This change adds a mode index in the display output, which can
then be used to specify a specific modeline to be set.

Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: Rob Clark <robdclark@chromium.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: John Stultz <john.stultz@linaro.org>
[emil: rebase]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2020-01-21 17:56:23 +00:00
Luben Tuikov
c9d4540bf6 tests/amdgpu: Fix buffer overflow (v3)
This patch fixes the following warning:
-Wformat-overflow=

v2: Use the correct strlcat(3).
v3: Use strncat(3) and remove libbsd dependency.

Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2020-01-08 13:21:40 -05:00
Luben Tuikov
29a5a85dae tests/amdgpu: Fix unused function warning (v2)
This patch fixes:
-Wunused-function

v2: Always enable amdgpu_ras_test().

Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2020-01-08 13:20:57 -05:00
Luben Tuikov
cb3d067587 tests/amdgpu: Fix various warnings (v2)
This patch fixes the following warnings:
-Wformat=
-Wmaybe-uninitialized
-Wmisleading-indentation
-Wstringop-truncation
-Wunused-function
-Wunused-variable

It also removes forward declarations and moves
global functions to the bottom, keeping locals
at the top, in ras_tests.c.

v2: Fix compilation.

Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2020-01-08 13:18:50 -05:00
Marek Olšák
9ebfac15a5 Revert "tests/amdgpu: Fix various warnings"
This reverts commit fb1634583f.
2020-01-07 14:44:47 -05:00
Marek Olšák
54b982dc6a Revert "tests/amdgpu: Fix unused function warning (v2)"
This reverts commit 4ff499cd85.
2020-01-07 14:44:47 -05:00
Marek Olšák
b9600be207 Revert "tests/amdgpu: Fix buffer overflow (v3)"
This reverts commit 680542ce08.
2020-01-07 14:44:47 -05:00
Luben Tuikov
7fdebb02ff tests/amdgpu: Proper format for "-l"
Proper format for command line option "-l",
listing the supported and unsupported tests:

1) Add an aligned column header.

2) Align all fields into columns.

3) Fixed length fields, come before the last
column, which is a variable length field.

4) Variable length field, which is the name of the
test, goes in the last column.

5) If a suite is disabled, do not iterate over its
tests, as they'd naturally be all disabled.

Now the output looks like this:
$sudo ./amdgpu_test -l
 What: ID:   Status: Name
Suite:  1:  ENABLED: Basic Tests
 Test:  1:  ENABLED: Query Info Test
 Test:  2:  ENABLED: Userptr Test
 Test:  3: DISABLED: bo eviction Test
 Test:  4:  ENABLED: Command submission Test (GFX)
 Test:  5:  ENABLED: Command submission Test (Compute)
 Test:  6:  ENABLED: Command submission Test (Multi-Fence)
 Test:  7:  ENABLED: Command submission Test (SDMA)
 Test:  8:  ENABLED: SW semaphore Test
 Test:  9: DISABLED: Sync dependency Test
 Test: 10: DISABLED: Dispatch Test (Compute)
 Test: 11: DISABLED: Dispatch Test (GFX)
 Test: 12: DISABLED: Draw Test
 Test: 13: DISABLED: GPU reset Test
Suite:  2:  ENABLED: BO Tests
 Test:  1:  ENABLED: Export/Import
 Test:  2: DISABLED: Metadata
 Test:  3:  ENABLED: CPU map/unmap
 Test:  4:  ENABLED: Memory alloc Test
 Test:  5:  ENABLED: Memory fail alloc Test
 Test:  6:  ENABLED: Find bo by CPU mapping
Suite:  3: DISABLED: CS Tests
Suite:  4: DISABLED: VCE Tests
Suite:  5:  ENABLED: VCN Tests
 Test:  1:  ENABLED: VCN DEC create
 Test:  2:  ENABLED: VCN DEC decode
 Test:  3:  ENABLED: VCN DEC destroy
 Test:  4:  ENABLED: VCN ENC create
 Test:  5:  ENABLED: VCN ENC decode
 Test:  6:  ENABLED: VCN ENC destroy
Suite:  6: DISABLED: UVD ENC Tests
Suite:  7: DISABLED: Deadlock Tests
Suite:  8:  ENABLED: VM Tests
 Test:  1:  ENABLED: resere vmid test
 Test:  2:  ENABLED: unaligned map
 Test:  3:  ENABLED: vm mapping test
Suite:  9: DISABLED: RAS Tests
Suite: 10:  ENABLED: SYNCOBJ TIMELINE Tests
 Test:  1:  ENABLED: syncobj timeline test
$_

Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2020-01-07 14:38:36 -05:00
Luben Tuikov
680542ce08 tests/amdgpu: Fix buffer overflow (v3)
This patch fixes the following warning:
-Wformat-overflow=

v2: Use the correct strlcat(3).
v3: Use strncat(3) and remove libbsd dependency.

Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2020-01-07 14:38:36 -05:00
Luben Tuikov
4ff499cd85 tests/amdgpu: Fix unused function warning (v2)
This patch fixes:
-Wunused-function

v2: Always enable amdgpu_ras_test().

Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2020-01-07 14:38:36 -05:00
Luben Tuikov
fb1634583f tests/amdgpu: Fix various warnings
This patch fixes the following warnings:
-Wformat=
-Wmaybe-uninitialized
-Wmisleading-indentation
-Wstringop-truncation
-Wunused-function
-Wunused-variable

It also removes forward declarations and moves
global functions to the bottom, keeping locals
at the top, in ras_tests.c.

Signed-off-by: Luben Tuikov <luben.tuikov@amd.com>
2020-01-07 14:38:36 -05:00
Yifan Zhang
ed96524001 tests/amdgpu: fix a amdgpu_test hang issue on some platforms.
The computer ring test name mis-match in different files,
thus may be set with TRUE on wrong platforms.

Change-Id: I0b918ff8faf08c9c9f1ad55f4dcd18f66b956901
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-12-30 20:25:52 -05:00
Scott Anderson
c70bd7b705 meson: Replace 'config.h' with config_file
This fixes an issue with libdrm failing to build when used as a meson
subproject. Using 'config.h' directly will cause it to possibly refer to
the wrong file.

By using `@0@.format(config_file)`, it will be transformed into the
correct relative path, e.g. `./config.h` in normal build,
`./subprojects/libdrm/config.h` in subproject build.

Signed-off-by: Scott Anderson <scott@anderso.nz>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2019-12-17 23:07:53 +00:00
Eric Engestrom
edafcf18e5 add a minimal .gitignore back
It was entirely deleted along with autotools, but adding this simple one
will cover most people's needs.

Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2019-12-17 22:37:39 +00:00
Eric Engestrom
6d3f06f666 gitlab-ci: rename build folder to simply build
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2019-12-17 22:29:11 +00:00
José Roberto de Souza
4c31d1181b intel: sync i915_pciids.h with kernel
Changes:
651cc835d5f6 ("drm/i915: Add new EHL/JSL PCI ids")
b6a8781a447c ("drm/i915/cml: Remove unsupport PCI ID")
8717c6b7414f ("drm/i915/cml: Separate U series pci id from origianl list.")

v2: added the latest CML changes

Cc: James Ausmus <james.ausmus@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2019-12-17 13:27:46 -08:00
Devarsh Thakkar
7f82714522 modetest: Use floating vrefresh while dumping mode
Add function to derive floating value of vertical
refresh rate from drm mode using pixel clock,
horizontal total size and vertical total size.

Use this function to find suitable mode having vrefresh
value which is matching with user provided vrefresh value.

If user doesn't provide any vrefresh value in args then
update vertical refresh rate value in pipe args using this
function.

Also use this function for printing floating vrefresh while
dumping all available modes.

This will give more accurate picture to user for available modes
differentiated by floating vertical refresh rate and help user
select more appropriate mode using suitable refresh rate value.

V4:
1) While setting mode, print mode name and vrefresh using struct
   drmModeModeInfo instead of struct pipe_args.
2) Revert back to using a float value instead of float *
   for vrefresh arg in connector_find_mode().

V3:
1) Change name of function used to derive refresh rate.

V2:
1) Don't use inline function for deriving refresh rate from mode.
2) If requested mode not found, print refresh rate only
   if user had provided it in args.

Signed-off-by: Devarsh Thakkar <devarsh.thakkar@xilinx.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2019-12-11 17:47:31 +02:00
Flora Cui
31a6ec141a tests/amdgpu: add gfx ring bad slow draw test
for gfx9

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-12-09 15:46:53 -05:00
Flora Cui
5e1f6533a0 tests/amdgpu: add gfx ring draw hang test
for gfx9

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-12-09 15:46:53 -05:00
Flora Cui
71b9e68d99 tests/amdgpu: add bad slow dispatch test
add gfx/compute bad slow dispatch test for gfx9

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-12-09 15:46:53 -05:00
Flora Cui
d72b9189c4 tests/amdgpu: add dispatch hang test
add compute/gfx dispatch hang test for gfx9

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-12-09 15:46:53 -05:00
Flora Cui
67017ea07e tests/amdgpu: update draw test for gfx9
Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-12-09 15:46:53 -05:00
changzhu
d93856fe82 tests/amdgpu: enable dispatch/draw tests for Renoir
It can run dispatch/draw tests on new renoir chips. So it needs to
enable dispatch/draw tests for Renoir again.

Change-Id: I3a72a4bbfe0fc663ee0e3e58d8e9c304f513e568
Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
Reviewed-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
2019-12-09 15:46:53 -05:00
Thomas Petazzoni
8c51195039 xf86atomic: require CAS support in libatomic_ops
Since AO_compare_and_swap_full() is used by libdrm, AO_REQUIRE_CAS
must be defined before including <atomic_ops.h> so that we are sure
that CAS support will be provided. This is necessary to make sure that
the AO_compare_and_swap_full() function will be provided on all
architectures, including the ones that don't have built-in CAS support
such as SPARCv8.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2019-12-06 21:57:12 +00:00
Lauren Post
8c1185d22c Add ARM support into xf86drm.h
This provides support for Xorg interface.  Without this the vivante
samples will hang during close requiring a reboot

[Adapted from yocto project]
Upstream-Status: Pending
Signed-off-by: Lauren Post <lauren.post@freescale.com>
Signed-off-by: Evan Kotara <evan.kotara@freescale.com>
[Thomas: change CAS code to only be used on ARMv6/ARMv7, and not
ARMv4/ARMv5, which don't support ldrex/strex. If no CAS implementation
is provided libdrm falls back to a system call for locking/unlocking.]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
---
Changes v1 -> v2:
  - add comment explaining exclusion of ARMv4/ARMv5 and lower
2019-12-05 22:35:58 +01:00
Peter Seiderer
8de2696213 meson.build: fix intel atomics detection
Use the stronger compiler.link() test (instead of the weaker
compiler.compile()) to fix the intel atomics detection.

Fixes false positive in case of sparc compile (buildroot toolchain).

Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-12-05 13:25:30 +00:00
Alex Deucher
02e1d0ff8b amdgpu: add new marketing names from 19.30
Add new marketing names.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-12-04 17:26:44 -05:00
Pierre-Eric Pelloux-Prayer
325a063ab5 gitlab-ci: update to current ci-templates master
To workaround skopeo issues.

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
2019-12-03 16:17:14 +01:00
Ross Burton
cd77f114ca tests/nouveau/threaded: adapt ioctl signature
POSIX says ioctl() has the signature (int, int, ...) but glibc has decided to
use (int, unsigned long int, ...) instead.

Use a #ifdef to adapt the replacement function as appropriate.

Signed-off-by: Ross Burton <ross.burton@intel.com>

[Taken from https://raw.githubusercontent.com/openembedded/openembedded-core/master/meta/recipes-graphics/drm/libdrm/musl-ioctl.patch]
Signed-off-by: Peter Seiderer <ps.report@gmx.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-28 22:01:34 +01:00
xinxu@loongson.cn
0287602015 tests/amdgpu/basic_tests.c: change BUFFER_SIZE used in Userptr Test adjust to PAGE_SIZE
Userptr Test will fail on PAGE_SIZE bigger than BUFFER_SIZE(8 * 1024)

Signed-off-by: xinxu <xinxu@loongson.cn>


(cherry picked from commit fb7dfdc5fb58795365b70117c3eb625f2edb8f06)
2019-11-25 21:23:43 -05:00
Devarsh Thakkar
a2d588fe12 modetest: Add support for setting mode having floating vertical refresh rate
For the scenario where user may require to modeset with a mode
supporting a fractional value for vertical refresh-rate,
appropriate mode can be selected by searching for mode
having matching fractional vertical refresh rate using
below equation.

vrefresh = (1000 * pixel clock) / (htotal * vtotal) Hz.

We do this way since driver doesn't return float value of vrefresh
as it use int for vrefresh in struct drm_mode_info, but we can derive
the actual value using pixel clock, horizontal total size and
vertical total size values.

So for e.g. if user want to select mode having 59.94 Hz as refresh rate
then with this patch it be can done as shown in below command,
given there is an appropriate mode is available :

modetest -M xlnx -s 39:1920x1080-59.94@BG24 -v

NOTE: Above command was tested on xilinx DRM driver with DP
monitor which was supporting mode having 59.94 Hz refresh rate.

V2: Update commit message
V3: Update with below changes as per review comments :
  1) Use epsilon for vrefresh comparison
  2) Use implicit type-casting wherever possible
V4: Keep patch version history on main commit message

Signed-off-by: Devarsh Thakkar <devarsh.thakkar@xilinx.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2019-11-25 16:13:43 +02:00
Eric Engestrom
9d48895425 gitlab-ci: add PowerPC build
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
2019-11-23 00:37:06 +00:00
Eric Engestrom
a39c34e64a gitlab-ci: add aarch64 & armhf builds
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
2019-11-15 03:10:56 +00:00
Eric Engestrom
202d10a9e2 gitlab-ci: add x86 (32 bits) build
Suggested-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
2019-11-15 03:07:21 +00:00
Eric Engestrom
55be53d65f gitlab-ci: set up cross build infra
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
2019-11-15 03:05:53 +00:00
Eric Engestrom
1128fa10d6 gitlab-ci: drop arch build down to daily builds
Suggested-by: Michel Dänzer <michel@daenzer.net>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-12 23:37:41 +00:00
Simon Ser
d5682defcd Fix missing stdlib includes in xf86drmMode.h
Including xf86drmMode.h results in undefined references to uint32_t
and ssize_t. Include the stdlib headers that define them to allow the
file to be included without xf86drm.h.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-12 00:16:58 +00:00
Eric Engestrom
73d826be4d meson: drop old symbols check environment
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
dbd4320ad6 tegra: convert to new symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
451e054328 radeon: convert to new symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
0cfa21d55e omap: convert to new symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
574778100e nouveau: convert to new symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
35fa20f1fd libkms: convert to new symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
1386b99027 intel: convert to new symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
6c819350af freedreno: convert to new symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
2763cd390e exynos: convert to new symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
ff832d734b etnaviv: convert to new symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
791297e94d amdgpu: convert to new symbols check
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
303cf6bbf3 meson: import Mesa's symbols check script
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Eric Engestrom
a7996fda4c freedreno: drop leftover symbol from the export list
Fixes: 09cbccff55 ("freedreno: remove deprecated ringmarker API")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-11-11 22:57:14 +00:00
Chunming Zhou
0a7ad7df14 libdrm: wrap new flexible syncobj query interface v2
v2: nit-picks fix

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Christian König <Christian.Koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
For the xf86drm.[ch] part : Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-10-26 03:11:14 +00:00
Chunming Zhou
07f6717595 sync up drm.h
a) delta: drm: use pad as flags in drm_syncobj_timeline_array.
    b) Generated using make headers_install.
    c) Generated from origin/drm-misc-next commit 949561eb85bcee10248e7da51d44a0325d5e0d1b"

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
2019-10-26 03:11:14 +00:00
Eric Engestrom
c69c9c4f4e gitlab-ci: pre-build containers to improve CI run time and reliability
Shaves about 50% off the build time on both debian and arch builds.
(yeah, I know, it's very small anyway compared to mesa, but we might
 want to add more things in the future)

This also makes the build no longer dependent on external websites:
once the image is build, only fdo-internal services are used.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
2019-10-20 20:08:57 +01:00
Eric Engestrom
fc933651b1 Revert "Revert "libdrm: remove autotools support""
The external tooling issue has been fixed, so we can delete autotools
again :)
2019-10-18 18:05:45 +01:00
Marek Olšák
0190f49a13 Bump the version to 2.4.100 for autotools 2019-10-16 17:35:55 -04:00
Marek Olšák
51e3bb5665 Revert "libdrm: remove autotools support"
This reverts commit f057dc91e9.
2019-10-16 17:33:28 -04:00
Marek Olšák
05734951d6 Bump the version to 2.4.100 2019-10-16 15:27:05 -04:00
Marek Olšák
00320d7d68 amdgpu: add amdgpu_cs_query_reset_state2 for AMDGPU_CTX_OP_QUERY_STATE2
This is a better GPU reset query.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-10-15 15:20:38 -04:00
Marek Olšák
9a61cf4e0e include: update amdgpu_drm.h
Generated from kernel commit:
    815fb4c9d7da862 "drm/amdgpu: return tcc_disabled_mask to userspace"

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
2019-10-15 14:30:31 -04:00
Nirmoy Das
3b0a41d93b test/amdgpu: don't free unused bo handle
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-10-15 13:18:12 +02:00
Eric Engestrom
f057dc91e9 libdrm: remove autotools support
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2019-10-14 16:07:20 +00:00
Eric Engestrom
e4f090f3c2 RELEASING: update instructions to use meson instead of autotools
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2019-10-14 15:57:26 +00:00
Eric Engestrom
dddeff5028 *-symbols-check: let meson figure out how to execute the scripts
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-10-04 09:43:00 +01:00
Emil Velikov
9b1e084253 *-symbols-check: use normal shell over bash
None of the tests are bash specific. Tested with bash, zsh, dash, mksh
and ksh.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Tested-by: Niclas Zeising <zeising@daemonic.se>
Reviewed-by: Niclas Zeising <zeising@daemonic.se>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-10-04 09:42:46 +01:00
Niclas Zeising
4083e8f2c6 meson.build: Fix header detection on FreeBSD
FreeBSD requires sys/types.h for sys/sysctl.h, add it as part of the
includes when checking for headers.
Instead of splitting out the check for sys/sysctl.h from the other
header checks, just add sys/types.h to all header checks.

v2 [Emil]
 - add inline comment
 - drop bash/sh hunk

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Niclas Zeising <zeising@daemonic.se>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-10-04 09:36:07 +01:00
Niclas Zeising
7e46f4dc80 meson.build: Fix typo
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-09-28 12:04:57 +01:00
Le Ma
0c427545cd tests/amdgpu: add the missing deactivation case for dispatch test
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-18 07:54:26 -05:00
Guchun Chen
c51809fa67 amdgpu: add ras feature capability check in inject test
When running ras inject test, it's needed to be aligned
with kernel's ras enablement.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-16 07:57:10 -05:00
Guchun Chen
58fc6d6eae amdgpu: add ras inject unit test
Both UMC and GFX ras single_correctable
inject tests are added.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-16 07:57:10 -05:00
Guchun Chen
018169bfba amdgpu: delete test configuration file
Json package dependence is removed from amdgpu_test,
so this json configuration file is not needed any more.

Suggested-by: Christian König <christian.koenig@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-16 07:57:10 -05:00
Guchun Chen
cb637bc17b amdgpu: remove json package dependence
Except CUnit library, no additional external
library should be needed when compiling amdgpu_test.
This will keep this binary self containing.

Suggested-by: Christian König <christian.koenig@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-09-16 07:57:10 -05:00
Eric Engestrom
827a2a2042 meson: fix sys/mkdev.h detection on Solaris
On Solaris, sys/sysmacros.h has long-deprecated copies of major() & minor()
but not makedev().
sys/mkdev.h has all three and is the preferred choice.

Let's make sure we check for all 3 major(), minor() and makedev().

Fixes build failure with error:
../xf86drm.c: In function ‘drmOpenMinor’:
../xf86drm.c:454:30: error: implicit declaration of function ‘makedev’ [-Werror=implicit-function-declaration]
  454 |         return drmOpenDevice(makedev(DRM_MAJOR, minor), minor, type);
      |                              ^~~~~~~

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Tested-by: Alan Coopersmith <alan.coopersmith@oracle.com>
2019-09-14 22:22:03 +01:00
Anusha Srivatsa
10cd9c3da8 intel: sync i915_pciids.h with kernel
Add the new CML PCI IDS.

Align with kernel commit:
bfc4c359b2822 ("drm/i915/cml: Add Missing PCI IDs")

This is in sync with kernel header as of:
0747590267e7 ("drm-tip: 2019y-08m-30d-18h-03m-18s UTC integration manifest")

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
2019-09-06 13:12:14 -07:00
Guchun Chen
14922551aa amdgpu: add umc ras inject test configuration
Both umc single_correctable and multi_uncorrectable
inject types are added.

Signed-off-by: Dennis Li <dennis.li@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-08 12:20:27 -05:00
Guchun Chen
1ef1e4db96 tests/amdgpu/ras: refine ras inject test
Ras inject test framework is invalid with original codes,
so refine it to make it work on top of kernel ras inject
feature enablement.

Signed-off-by: Dennis Li <dennis.li@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-08 12:19:38 -05:00
Guchun Chen
0000162504 amdgpu: add gfx ras inject configuration file
This configuration file will be picked up when
running gfx ras inject tests by amdgpu_test tool.
For the time being, only add those tests that are
successfully trafficked. In addition, this file
can also be modified by user to add or delete ras
inject unit tests for different IP blocks/subblocks.

Signed-off-by: Dennis Li <dennis.li@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-08 12:19:06 -05:00
Le Ma
98996fd021 tests/amdgpu: divide dispatch test into compute and gfx
for better clarification

v2: accordingly change dispatch_test caller in gpu_reset test

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-02 22:08:01 -05:00
Flora Cui
b0f2d60ba7 tests/amdgpu: disable reset test for now
ASIC hang randomly.

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-02 22:07:18 -05:00
Rodrigo Vivi
6652cf8673 intel: Add support for EHL
Add the PCI ID import for EHL.

Cc: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2019-07-29 17:00:12 -07:00
Rodrigo Vivi
e4f164575c intel: add the TGL 12 PCI IDs and macros
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2019-07-29 17:00:08 -07:00
Lucas De Marchi
3bda60fd14 intel: sync i915_pciids.h with kernel
Straight copy from the kernel file, aligned with drm-intel-next-queued
commit cb823ed9915b ("drm/i915/gt: Use intel_gt as the primary object
for handling resets")

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2019-07-29 16:55:40 -07:00
Flora Cui
3aba0f3889 tests/amdgpu: add gpu reset test
1. perform gpu reset
2. perform dispatch test to verify gpu reset to a good state

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
2019-07-19 16:42:28 +08:00
Flora Cui
0247b19dc0 tests/amdgpu: fix for dispatch/draw test
1. skip test if there's no desired ring
2. clear shader buffer
3. update command buffer for gfx9

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2019-07-19 16:42:19 +08:00
Eric Engestrom
331e51e32f xf86drm: dedupe drmGetDeviceName() logic
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-07-03 13:06:21 +01:00
Eric Engestrom
6869e4cea7 xf86drm: use max size of drm node name instead of arbitrary size
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-07-03 13:06:21 +01:00
Eric Engestrom
0d5ea07736 xf86drm: dedupe #defines
Adapted from a local patch carried by DragonFlyBSD:
bc056f88f7/graphics/libdrm/files/patch-xf86drm.h

Patch is sadly uncredited (a bot authored the commit), so I can't credit
the author here either.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-07-03 13:06:21 +01:00
Jonathan Gray
293b95e815 xf86drm: open correct render node on non-linux
drm render nodes have the same major as drm primary devices but offset
the minor by a base of 128.

I expected the name of the device to have numbering starting at 0 when
these non-linux codepaths were added (before OpenBSD had render nodes).

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2019-07-03 12:28:15 +01:00
Jonathan Gray
13e2c35603 xf86drm: test for render nodes before primary nodes
Unlike Linux the OpenBSD primary "drm" device name is substring of the
"drmR" render node device name and strncmp() tests resulted in render
nodes being flagged as primary nodes.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2019-07-03 12:26:54 +01:00
Ilia Mirkin
dcc586c66c tests/util: fix incorrect memset argument order
Make it actually clear the LUT.

Reported-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2019-07-03 00:19:39 -04:00
Marek Olšák
b2103fa325 Bump version to 2.4.99 2019-07-02 14:36:25 -04:00
Michel Dänzer
1ec0df8a25 amdgpu: Rename fd_mutex/list to dev_mutex/list
Seems to better reflect what they're for.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-07-01 11:32:05 +02:00
Michel Dänzer
a1bde9b6d8 amdgpu: Add BO handle to table in amdgpu_bo_create
Simplifies its callers.

dev->bo_table_mutex is now always held when amdgpu_bo_create is called
(this was already the case in amdgpu_bo_import).

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-07-01 11:31:59 +02:00
Michel Dänzer
b12282db9c amdgpu: Pass file descriptor directly to amdgpu_close_kms_handle
And propagate drmIoctl's return value.

This allows replacing all remaining open-coded DRM_IOCTL_GEM_CLOSE
ioctl calls with amdgpu_close_kms_handle calls.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2019-07-01 11:31:51 +02:00
Marek Vasut
cecedcb8a1 etnaviv: Fix double-free in etna_bo_cache_free()
The following situation can happen in a multithreaded OpenGL application.
A BO is submitted from etna_cmd_stream #1 with flags set for read.
A BO is submitted from etna_cmd_stream #2 with flags set for write.
This triggers a flush on stream #1 and clears the BO's current_stream
pointer. If at this point, stream #2 attempts to queue BO again, which
does happen, the BO will be added to the submit list twice. The Linux
kernel driver correctly detects this and warns about it with "BO at
index %u already on submit list" kernel message.

However, when cleaning the BO cache in etna_bo_cache_free(), the BO
which was submitted twice will also be free()d twice, this triggering
a glibc double free detector.

The fix is easy, even if the BO does not have current_stream set,
iterate over current streams' list of BOs before adding the BO to it
and verify that the BO is not yet there.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
2019-06-28 16:17:19 +02:00
Michel Dänzer
46cb2aa1ed amdgpu: Update amdgpu_bo_handle_type_kms_noimport documentation
To reflect current reality.

Reviewed-by: Christian König <christian.koenig@amd.com>
2019-06-25 17:59:10 +02:00
Michel Dänzer
e246114c46 amdgpu: Move union declaration to top of amdgpu_cs_ctx_override_priority
Avoids compiler warning:

../../amdgpu/amdgpu_cs.c: In function 'amdgpu_cs_ctx_override_priority':
../../amdgpu/amdgpu_cs.c:155:2: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
  union drm_amdgpu_sched args;
  ^~~~~

Reviewed-by: Christian König <christian.koenig@amd.com>
2019-06-25 17:58:31 +02:00
Lucas Stach
8849aa87fb etnaviv: drop etna_bo_from_handle symbol
There is no implementation and also no users, so there is no point
in keeping it in the API.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
2019-06-24 16:21:07 +02:00
Ilia Mirkin
08bd098d84 util: fix include path for drm_mode.h
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2019-06-22 14:56:49 -04:00
Ilia Mirkin
f2da507a04 modetest: add FP16 format support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 13:34:36 -04:00
Ilia Mirkin
5d0e9dec3f modetest: add the ability to specify fill patterns on the commandline
Instead of hacking the binary every time, we can now specify directly.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 13:34:33 -04:00
Ilia Mirkin
bfc469f241 modetest: add C8 support to generate SMPTE pattern
This includes logic to configure the LUT accordingly.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 13:34:29 -04:00
Ilia Mirkin
557d1a2e6f modetest: add an add_property_optional variant that does not print errors
As new features are added and others are declared to be legacy, it's
nice to be able to implement fallbacks. As such, create a
property-setting variant that does not generate errors which can very
well be entirely expected.

Will be used for gamma control in a future change.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 13:34:25 -04:00
Ilia Mirkin
78ea933460 modetest: don't pretend that atomic mode includes a format
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 13:34:20 -04:00
Ilia Mirkin
def955c09e util: add cairo drawing for 30bpp formats when available
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 13:34:14 -04:00
Ilia Mirkin
b59d14e7fc util: add fp16 format support
This change adds support for all current patterns.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 13:34:08 -04:00
Ilia Mirkin
e5442195fb util: add gradient pattern
The idea is to have a horizontal pattern split into two with the top and
bottom halves having different precision. This allows one to see whether
10bpc support is working properly or not, as there are many pieces to
the puzzle beyond the basic format support (gamma ramps, bpc encodings,
etc).

This is really only useful on 10bpc formats, but we also add support for
8bpc formats to ease testing. In the future, this could be applied to
16bpc formats as well.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 13:34:05 -04:00
Ilia Mirkin
32401fe5ce util: fix MAKE_RGBA macro for 10bpp modes
We need to shift the values up, otherwise we'd end up with a negative
shift. This works for up-to 16-bit components, which is fine for now.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 13:33:55 -04:00
Ilia Mirkin
8d27deced9 util: add C8 format, support it with SMPTE pattern
This also adds a helper to generate a color LUT, which has to be used in
conjunction with the C8 indexed format.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2019-06-22 13:29:54 -04:00
Leo Liu
0eaf5df553 tests/amdgpu/vcn: add VCN2.0 decode support
With different register offsets from VCN1.0

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-06-21 12:46:21 -04:00
Tao Zhou
dbab346bb1 libdrm/amdgpu: add new vram type (GDDR6) for navi10
AMDGPU_VRAM_TYPE_GDDR6 is a new vram type for navi10

Reviewed-by: Tim Writer <Tim.Writer@amd.com>
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-06-21 12:46:18 -04:00
Hawking Zhang
9f2e558ca3 libdrm/amdgpu: add new member in drm_amdgpu_device_info for navi10
pa_sc_tile_steering_override is a new member introduced for gfx10

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-06-21 12:46:12 -04:00
Huang Rui
74efcc7b9f amdgpu: add navi family id
Reviewed-by: Tim Writer <Tim.Writer@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-06-21 12:46:06 -04:00
Chunming Zhou
5db0f7692d enable syncobj test depending on capability
Feature is controlled by DRM_CAP_SYNCOBJ_TIMELINE drm capability.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2019-06-11 15:55:33 +02:00
Chunming Zhou
f3e6d22baa update drm.h
a) delta: only DRM_CAP_SYNCOBJ_TIMELINE
   b) Generated using make headers_install.
   c) Generated from origin/drm-misc-next commit 982c0500fd1a8012c31d3c9dd8de285129904656"

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Suggested-by: Michel Dänzer <michel@daenzer.net>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2019-06-11 15:54:06 +02:00
Michel Dänzer
922d929942 amdgpu: Add amdgpu_cs_syncobj_transfer to amdgpu-symbol-check
Fixes make check. Trivial.
2019-05-16 14:43:22 +02:00
Chunming Zhou
7ab471ed85 add syncobj timeline tests v3
v2: drop DRM_SYNCOBJ_CREATE_TYPE_TIMELINE, fix timeout calculation,
    fix some warnings
v3: add export/import and cpu signal testing cases

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-16 12:07:18 +02:00
Chunming Zhou
6a72661c33 wrap transfer interfaces
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-16 12:07:18 +02:00
Chunming Zhou
6bb5cc174b expose timeline signal/export/import interfaces v2
v2: adapt to new one transfer ioctl

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-16 12:07:18 +02:00
Chunming Zhou
12712eb6e3 add timeline signal/transfer ioctls v2
v2: use one transfer ioctl

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-16 12:07:18 +02:00
Chunming Zhou
46f930d962 wrap syncobj timeline query/wait APIs for amdgpu v3
v2: symbos are stored in lexical order.
v3: drop export/import and extra query indirection

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-16 12:07:18 +02:00
Chunming Zhou
ec6ae51e80 add timeline wait/query ioctl v2
v2: drop export/import

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-16 12:07:18 +02:00
Chunming Zhou
642ec7fc34 add cs chunk for syncobj timeline
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-05-16 12:07:18 +02:00
Seung-Woo Kim
b39377d66a xf86drm: Fix possible memory leak with drmModeGetPropertyPtr()
In drmModeGetPropertyPtr(), from upper error path, it calls free
but with just next error path, it does not call. Fix the possible
memory leak.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-05-03 12:47:42 +01:00
Seung-Woo Kim
6a7d1329db tests/libkms-test-plane: fix possbile memory leak
The pointer p aquired with drmModeGetPlane() is not free in error
path. Fix possible memory leak by calling drmModeFreePlane() in
the error path.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
2019-04-25 11:08:21 +01:00
Hemant Hariyani
357ef59882 libdrm: omap: Add DRM_RDWR flag to dmabuf export
Allows mmap on dmabuf fd with MAP_SHARED and PROT_WRITE.

This fixes boot failures with Android (likely w/ closed source
user-space drivers) that were caused due to mmap() returning
error.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Alistair Strachan <astrachan@google.com>
Cc: Marissa Wall <marissaw@google.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
[picked and updated commitmsg from http://git.ti.com/cgit/cgit.cgi/android/external-libdrm.git/]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Alistair Strachan <astrachan@google.com>
[jstultz: Tweaked commit message]
Signed-off-by: John Stultz <john.stultz@linaro.org>
2019-04-25 10:58:27 +01:00
Adrian Salido
763f646d7f libdrm: reduce number of reallocations in drmModeAtomicAddProperty
When calling drmModeAtomicAddProperty allocation of memory
happens as needed in increments of 16 elements. This can be very
slow if there are multiple properties to be updated in an Atomic
Commit call.

Increase this to as many as can fit in a memory PAGE to avoid
having to reallocate memory too often.

Also this patch has a small one line perf tweak in
drmModeAtomicDuplicate() to only memcpy items to the cursor
position in order avoid copying the entire item array if its
mostly empty.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Alistair Strachan <astrachan@google.com>
Cc: Marissa Wall <marissaw@google.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[jstultz: Expanded commit message]
Signed-off-by: John Stultz <john.stultz@linaro.org>
2019-04-25 10:58:16 +01:00
Prabhanjan Kandula
225d73fd3b libdrm: Avoid additional drm open close
Avoid additional drm device open and close.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Alistair Strachan <astrachan@google.com>
Cc: Marissa Wall <marissaw@google.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
2019-04-25 10:57:59 +01:00
John Stultz
51553dd0e0 libdrm: amdgpu: Initialize unions with memset rather than "= {0}"
Clang complains when initializing unions using "= {0}"
so instead use memset.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Alistair Strachan <astrachan@google.com>
Cc: Marissa Wall <marissaw@google.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
2019-04-25 10:57:26 +01:00
Sean Paul
ebbb8f9cbf libdrm: Use mmap64 instead of __mmap2
__mmap2 isn't supported on all platforms, mmap64 is the right way
to do this in android.

Also folds in a fix from Stéphane Marchesin <marcheu@chromium.org>

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Alistair Strachan <astrachan@google.com>
Cc: Marissa Wall <marissaw@google.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[jstultz: Folded in Stéphane's fix]
Signed-off-by: John Stultz <john.stultz@linaro.org>
2019-04-25 10:55:13 +01:00
John Stultz
818033deff libdrm: Android.mk: Add minimal Android platform check
Add a check to error out on Android version K(4.4) or
lower.

This is due to dependency added in a previous commit on mmap64,
which was introduced with Android L.

Cc: Sean Paul <seanpaul@chromium.org>
Cc: Alistair Strachan <astrachan@google.com>
Cc: Marissa Wall <marissaw@google.com>
Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
2019-04-25 10:55:02 +01:00
Emil Velikov
be3b07617f Bump the version to 2.4.98
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2019-04-19 16:31:38 +01:00
Bas Nieuwenhuizen
232dc3305d amdgpu: Add context priority override function.
This way we can override the priority of a single context using a
master fd.

Since we cannot usefully create an amdgpu device of a master fd
without the fd deduplication kicking in this takes a plain fd.

This can be used by e.g. radv to get high priority contexts using
a master fd from the primary node or a lease.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2019-04-18 10:39:32 +02:00
Lubomir Rintel
0b474eab3d tests/util: Add armada-drm driver
This makes the test utilities work with the Armada driver without the
necessity of using the -M argument.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-04-17 18:52:04 +01:00
Emil Velikov
439a4c0361 Revert "libdrm: Fix issue about differrent domainID but same BDF"
This reverts commit 56c21f877b.

There were issues pointed out during review that were not addressed.
Would love to have this re-land, once those are addressed.
2019-04-17 18:31:31 +01:00
Fritz Koenig
f8f8b2b9b0 tests/modetest: add QCOM_COMPRESSED to supported modifiers list
Signed-off-by: Fritz Koenig <frkoenig@google.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-04-17 18:28:08 +01:00
Eric Engestrom
360292c7ab fix various typos
Saw a couple of typos fixes in the patch DragonFlyBSD carries [1], so
I ran codespell (a spell checker for code) on the whole repo.

[1] https://github.com/DragonFlyBSD/DPorts/blob/master/graphics/libdrm/files/patch-xf86drm.c

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-04-17 18:23:25 +01:00
Eric Engestrom
ad8bec1ed8 amdgpu/tests: drop unused local vars
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-04-17 18:18:10 +01:00
Pan, Xinhui
fcf80e2fd7 amdgpu: Fix a structure initialization issue
struct drmPciBusInfo has been aligned to 6 bytes. So memcmp will access
the last byte which is not initialized.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-12 11:38:41 -05:00
Ayan Halder
210bfdf8f8 headers: Sync with drm-next
Generated using make headers_install from the drm-next
tree - git://anongit.freedesktop.org/drm/drm
branch - drm-next
commit - 14d2bd53a47a7e1cb3e03d00a6b952734cf90f3f

The changes were as follows :-

core: (drm.h, drm_fourcc.h, drm_mode.h)
- Added 'struct drm_syncobj_transfer', 'struct drm_syncobj_timeline_wait' and 'struct drm_syncobj_timeline_array'
- Added various DRM_IOCTL_SYNCOBJ_ ioctls
- Added some new RGB and YUV formats
- Added 'DRM_FORMAT_MOD_VENDOR_ALLWINNER'
- Added 'SAMSUNG' and Arm's 'AFBC' and 'ALLWINNER' format modifiers
- Added 'struct drm_mode_rect'

i915:
- Added struct 'struct i915_user_extension' and various 'struct drm_i915_gem_context_'
- Added different modes of per-process Graphics Translation Table

Changes from v1:-
- Removed the changes to 'msm_drm.h' as it breaks the build for 'freedreno' platform.

Signed-off-by: Ayan Kumar halder <ayan.halder@arm.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2019-04-12 16:33:38 +01:00
xinhui pan
b4fbc6d70c drm/amdgpu: support test mask
support per device test mask. Skip inject test on non-server card.

Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-04 13:45:19 -05:00
xinhui pan
b21d23e3ba amdgpu: add ras tests
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-04 13:44:37 -05:00
Alex Deucher
028cbfff63 amdgpu: update amdgpu_drm.h from drm-next for 5.2
From drm-next commit b4e4538a0ab5079ae5dc401970e11f0ff2ba13a7

Adds support for:
- RAS queries
- context priority updates
- CS chunks support for scheduled dependencies
- IB flag for GDS max wave id

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-04-04 13:42:16 -05:00
Gurchetan Singh
4835d74cc1 virtgpu: Update kernel header
Generated using make headers_install.

This brings in the in/out fence support for explicit
synchronization.

v2: don't use experimental kernel branch

Signed-off-by: Gurchetan Singh <gurchetansingh@chromium.org>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2019-04-03 20:11:55 -04:00
Anusha
ae836decb4 intel: sync i915_pciids.h with kernel
Add CML and EHL PCI IDs, and one more for ICL. This is in sync with
kernel header as of b024ab9b2d3a ("drm/i915/bios: iterate over child
devices to initialize ddi_port_info")

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2019-03-25 14:34:13 -07:00
Cui, Flora
a85b31c973 tests/amdgpu: minor fix for dispatch/draw test
1. clear cmd buffer
2. make amdgpu_memcpy_dispatch_test static
3. tab/space fix

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-20 21:38:52 -05:00
Cui, Flora
852a9d20ad tests/amdgpu: add memcpy draw test
add memcpy draw test for gfx9

Signed-off-by: Flora Cui <flora.cui@amd.com>
Tested-by: Rui Teng <rui.teng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-18 10:49:52 -05:00
Cui, Flora
00dd9b72a1 tests/amdgpu: add memset draw test
add memset draw test for gfx9

Signed-off-by: Flora Cui <flora.cui@amd.com>
Tested-by: Rui Teng <rui.teng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-18 10:49:52 -05:00
Cui, Flora
c1ced0bafd tests/amdgpu: add memcpy dispatch test
add memcpy dispatch test for gfx9

Signed-off-by: Flora Cui <flora.cui@amd.com>
Tested-by: Rui Teng <rui.teng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-18 10:49:52 -05:00
Cui, Flora
8db4e2db41 tests/amdgpu: add memset dispatch test
add memset dispatch test for gfx9
v2: disable dispatch test for other ASICs

Signed-off-by: Flora Cui <flora.cui@amd.com>
Tested-by: Rui Teng <rui.teng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-18 10:49:52 -05:00
Cui, Flora
8c6dbd7938 tests/amdgpu: add deadlock test for sdma
deadlock test for sdma will cause gpu recoverty.
disable the test for now until GPU reset recovery could survive at least
1000 times test.

v2: add modprobe parameter

Reviewed-and-tested-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-18 10:49:52 -05:00
Alex Deucher
c8bc69a165 amdgpu: add marketing name for AMD Radeon VII
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-03-18 10:49:52 -05:00
Andreas Baierl
4735ca71af xf86drm: Fix segmentation fault while parsing device info
This fixes a bug, which was introduced with commit ee798b98
"xf85drm: de-duplicate drmParse{Platform.Host1x}{Bus,Device}Info".
where accessing *compatible[i] with i>0 results in a segfault.

Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Fixes: ee798b9847 "xf85drm: de-duplicate drmParse{Platform.Host1x}{Bus,Device}Info"
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
[Eric: add the same fix to the free() below]
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-03-12 11:55:31 +00:00
Tapani Pälli
0b032a645e libkms: update list of intel_drivers for Android build
Add new iris driver, remove deprecated ilo driver.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-03-11 09:12:41 +02:00
Seung-Woo Kim
d54e546852 configure.ac fix build error for config.h in autotools
After the commit 0926f0af54 ("meson,configure: include config.h
automatically"), there is build error for autotools because
config.h is not included. Fix the error by adding "-include
config.h" to CPPFLAGS instead of CFLAGS from configure.ac.

Reference: https://bugs.freedesktop.org/show_bug.cgi?id=106561
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 0926f0af54 "meson,configure: include config.h automatically"
2019-02-26 10:39:36 +00:00
Emily Deng
56c21f877b libdrm: Fix issue about differrent domainID but same BDF
For multiple GPUs which has the same BDF, but has different domain ID,
the drmOpenByBusid will return the wrong fd when startx.

The reproduce sequence as below:
1. Call drmOpenByBusid to open Card0, then will return the right fd0, and the
fd0 is master privilege;
2. Call drmOpenByBusid to open Card1. In function drmOpenByBusid, it will
open Card0 first, this time, the fd1 for opening Card0 is not master
privilege, and will call drmSetInterfaceVersion to identify the
domain ID feature, as the fd1 is not master privilege, then drmSetInterfaceVersion
will fail, and then won't compare domain ID, then return the wrong fd for Card1.

Solution:
First loop search the best match fd about drm 1.4.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-22 16:02:12 -05:00
Eric Engestrom
1592d471bb gitlab-ci: fix archlinux builds
base/archlinux has been replaced with archlinux/base, which is
maintained directly by the archlinux community.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-02-19 11:59:12 +00:00
Eric Engestrom
e09f327765 freedreno: revert bad freedreno/atomic_ops commits
This reverts 6d2379857b "xf86atomic: #undef internal define"
and b541d21a0a "freedreno: remove always-defined #ifdef".

I didn't realise at the time that freedreno/freedreno_ringbuffer.h gets
installed, and then used by Mesa for instance. These two commits were
fine in libdrm, but broke Mesa which needs to use struct fd_ringbuffer
but doesn't need to access ::refcnt. The hack that I removed serves to
keep the struct at the correct size while only exposing the ::refcnt
member within libdrm.

Fixes: 6d2379857b "xf86atomic: #undef internal define"
Fixes: b541d21a0a "freedreno: remove always-defined #ifdef"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2019-02-19 09:50:26 +00:00
Eric Engestrom
eba6609b7b xf86drm: fix return type for drmIsMaster()
Xserver has struct members named `bool`, which means the last commit
breaks its build with errors like this:

  error: two or more data types in declaration specifiers
  Bool bool;
       ^

Fix this by making it return a 0/1 integer, with the same semantic as
the boolean it was before.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=109587
Fixes: 17dfe3ac93 "xf86drm: Add drmIsMaster()"
Cc: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-02-08 18:52:36 +00:00
Christopher James Halse Rogers
17dfe3ac93 xf86drm: Add drmIsMaster()
We can't use drmSetMaster to query whether or not a drm fd is master
because it requires CAP_SYS_ADMIN, even if the fd *is* a master fd.

Pick DRM_IOCTL_MODE_ATTACHMODE as a long-deprecated ioctl that is
DRM_MASTER but not DRM_ROOT_ONLY as the probe by which we can detect
whether or not the fd is master.

This is useful for code that might get master by open()ing the drm device
while no other master exists, but can't call drmSetMaster itself because
it's not running as root or is in a container, where container-root isn't
real-root.

v2: Use the AUTH_MAGIC request rather than MODE_ATTACHMODE, as it's more
    clearly related to master status.

v3: [Emil] Don't expose internals, check for -EACCES.

Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v2)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-02-07 17:43:01 +00:00
Rodrigo Vivi
70a1ae89be intel: sync i915_pciids.h with kernel
Straight copy from the kernel file.

Add more PCI Device IDs for Coffee Lake, Ice Lake,
and Amber Lake. It also include a reorg on Whiskey Lake IDs.

Align with kernel commits:

5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
c0c46ca461f1 ("drm/i915/aml: Add new Amber Lake PCI ID")
c1c8f6fa731b ("drm/i915: Redefine some Whiskey Lake SKUs")

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-02-04 10:45:53 -08:00
Emil Velikov
ee798b9847 xf85drm: de-duplicate drmParse{Platform.Host1x}{Bus,Device}Info
The functions are virtually identical, fold them up.

v2: foo -> tmp_name (Eric)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-02-04 15:28:55 +00:00
Emil Velikov
3df8a7f01a xf86drm: fallback to MODALIAS for OF less platform devices
Some devices can lack OF data or it may not be available in the uevent
file. Fallback to the MODALIAS data in those cases.

We strip any leading "MODALIAS=.*:" thus the resulting information is
compatible with existing code in Mesa.

v2: foo -> tmp_name

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Lucas Stach <l.stach@pengutronix.de> (v1)
2019-02-04 15:26:32 +00:00
Alex Deucher
6415bd3ced amdgpu: add some raven marketing names
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-02-01 00:26:48 -05:00
Marek Olšák
b7a7a90336 Bump the version to 2.4.97 2019-01-22 11:18:47 -05:00
Marek Olšák
f19afaa519 amdgpu: add a faster BO list API
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-01-16 16:39:25 -05:00
Marek Olšák
98cff551b0 amdgpu: update amdgpu_drm.h
it's in kernel 5.0

Reviewed-by: Christian König <christian.koenig@amd.com>
2019-01-16 11:57:18 -05:00
Alex Deucher
cfab2fc33d amdgpu: update to latest marketing names from 18.50
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-01-10 10:15:59 -05:00
Eric Engestrom
403f3c92fd README: reflow the project description to improve readability
Also, move the sentence about "who would use libdrm" into its own paragraph,
as it is something people discovering libdrm will want to know.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-01-03 18:41:32 +00:00
Eric Engestrom
6d2379857b xf86atomic: #undef internal define
Thanks to the #error just above, any file including this header can only
see one state for this macro: defined, with the value `1`.
Let's just #undef it once we're done using it in here so that other
files don't misconstrue any meaning to it.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-01-03 18:36:46 +00:00
Eric Engestrom
b541d21a0a freedreno: remove always-defined #ifdef
While at it, let's include xf86atomic.h explicitly, instead of relying
on some other file accidentally including it before including this file.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-01-03 18:36:26 +00:00
Mauro Rossi
597725e951
android: Fix 32-bit app crashing in 64-bit Android
Seemingly the 64-bit int is always aligned to 8 in LP64.
But this is not hold in LP32.

Consequently sizeof(gralloc_drm_handle_t) are different
between LP64 (which is 18 ints) and LP32 (which is 16 ints).
As a result, 32-bit apps will crash in 64-bit OS since the
checking handle->base.numInts != GRALLOC_GBM_HANDLE_NUM_INTS
is true.

Fix it by always aligning 64-bit int to 8. Besides, to avoid
additional padding, just exchange the order of data_owner
and modifier. It aligns modifier to 8 natually.
This makes gralloc_drm_handle_t fit in 16 ints perfectly.

(v2) gralloc_drm_handle.h patch now applied in gralloc_handle.h
     and GRALLOC_HANDLE_VERSION updated to 4

Reported-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
2018-12-18 21:18:19 +01:00
Lucas De Marchi
2c02f1e610 gitignore: add _build
This is the directory used by meson/autotools (at least in the
.gitlab-ci configuration) so ignore the whole dir.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2018-12-17 12:49:55 -08:00
Lucas De Marchi
d8e615f975 gitignore: sort file
LANG=C sort -u .gitignore | sponge .gitignore

This way it's easier to keep track of the entries.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2018-12-17 12:49:55 -08:00
Leo Liu
866ada1b37 tests/amdgpu/vcn: fix the nop command in IBs
Just make them properly i.e. put 0 to the Nop reg

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-12-14 12:21:12 -05:00
François Tigeot
8f2e09251e libdrm: Use DRM_IOCTL_GET_PCIINFO on DragonFly
It is a cleaner and less fragile way to get PCI IDs than the one
currently used by local DPorts patches.

Signed-off-by: François Tigeot <ftigeot@wolfpond.org>
2018-12-13 20:39:02 -05:00
François Tigeot
200e9e98a2 xf86drm: implement drmParseSubsystemType for DragonFly
Like on OpenBSD, the DragonFly BSD kernel only contains
pci drm drivers.

Signed-off-by: François Tigeot <ftigeot@wolfpond.org>
2018-12-13 20:39:02 -05:00
Andrey Grodzovsky
ba45adb2a1 amdgpu/test: Enable deadlock test for CI family (gfx7)
I retested GPU recovery with  Bonaire ASIC and it works.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
2018-12-11 15:41:06 -05:00
Christian König
b28b823762 amdgpu: add VM test to exercise max/min address space
Make sure the kernel doesn't crash if we map something at the minimum/maximum address.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-12-05 14:41:17 +01:00
Eric Anholt
89700ab0aa drm: Attempt to parse SPI devices as platform bus devices.
For ARM systems with tinydrm displays attached to SPI, the bus name is
/spi but we have platform device info for the rest.  Fixes
eglInitialize() failures on hx8357d since the EGL_EXT_device_drm
changes.

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2018-11-19 20:36:13 -08:00
Eric Anholt
9b28c5aea3 Avoid hardcoded strlens in drmParseSubsystemType().
Having people count characters is error-prone, when we could just have
a computer do it.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-11-19 20:36:02 -08:00
Eric Engestrom
e642f480b8 tests: skip drmdevice test if the machine doesn't have any drm device
Error message was invalid too, negative values aren't the number of
devices, they're errno error codes.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2018-11-11 18:39:57 +00:00
Eric Engestrom
8c1fddc640 meson: fix typo in compiler flag
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-11-09 10:59:11 +00:00
Eric Engestrom
0f2f38bf06 xf86drmHash: remove unused loop variable
Reported-by: Jan Vesely <jano.vesely@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
2018-11-09 10:59:11 +00:00
Andrey Grodzovsky
0be850441f amdgpu/test: Disable deadlock tests for all non gfx8/9 ASICs.
Since only for those ASICs gpu reset is enabled by deafult.
Also update disable message and fix identation .

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-02 16:22:49 -04:00
Andrey Grodzovsky
b3dec018df amdgpu/test: Add illegal register and memory access test v2
Illegal access will cause CP hang followed by job timeout and
recovery kicking in.
Also, disable the suite for all APU ASICs until GPU
reset issues for them will be resolved and GPU reset recovery
will be enabled by default.

v2:
Add KV to deasbled APUs list and add comments regarding
necessary kernel amdgpu paramteres to run the tests.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-11-01 14:57:49 -04:00
Daniel Vetter
9d07fbf593 doc: Rename README&CONTRIBUTING to .rst
Looks much neater on the gitlab UI, e.g. on my personal libdrm fork:

https://gitlab.freedesktop.org/danvet/drm

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2018-10-17 17:17:19 +02:00
Rob Clark
5a3bdc7add Bump to version 2.4.96
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-16 10:32:43 -04:00
Rob Clark
f94075c3c5 freedreno/msm: fix c90 warning
Wasn't really sure how to switch the silly -Wdeclaration-after-statement
flag off on a per directory basis.  So make the code uglier instead.
2018-10-14 11:23:17 -04:00
Rob Clark
b730f5c8c5 freedreno/kgsl: fix build
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-14 11:23:03 -04:00
Rob Clark
032258b7f7 freedreno/msm: handle ring-reloc to other stateobjs
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 17:24:12 -04:00
Rob Clark
413a49a068 freedreno/msm: simplify msm_ringbuffer_flush()
Now that it doesn't have to deal with ringmarkers we can simplify the
reloc handling.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 17:23:54 -04:00
Rob Clark
880871b378 freedreno/msm: use hashtable to track submit.cmds table
With streaming stateobjs to upload uniforms, the submit.cmds table gets
much larger, and iterating over it for each ring to ring reloc starts
getting expensive.

TODO if we have flag to pass when constructing parent rb, we could
avoid dynamically allocating this and bo_table in get_cmd() or bo2idx

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 17:23:35 -04:00
Rob Clark
5c4722e907 freedreno/msm: simplify emit_reloc_ring() vfunc
Now that it doesn't have to deal with the ringmarker case, we can make
some simplifications.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 17:23:12 -04:00
Rob Clark
96b625240c freedreno/msm: remove reset of linked rings
The msm_cmd isn't refcount'd, so with stateobj rb's that have
independent lifecycle, this is no longer a safe thing to do.
Really, now that there is a bo-cache for rb's, fd_ringbuffer_reset()
should be deprecated because it adds a bunch of pointless complexity.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 17:22:49 -04:00
Rob Clark
09cbccff55 freedreno: remove deprecated ringmarker API
It's usage in mesa was removed more than two years ago.  And it stands
in the way of some optimizations needed to reduce the overhead of hw
stateobjs (ie. CP_SET_DRAW_STATE, where the # of cmds in the submit
ioctl goes up significantly).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 17:22:20 -04:00
Rob Clark
33faf339c3 freedreno/msm: support suballocation for stateobj rb's
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 17:21:53 -04:00
Rob Clark
bf001648a9 freedreno: add flags param for rb creation
For now, we want a way for gallium to be able to provide hints for the
upcoming rb suballocation.  But could be useful for other things down
the road.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 17:20:43 -04:00
Rob Clark
a8a0061926 freedreno: expose refcnt'ing on ringbuffers
Move this out of msm_ringbuffer backend so that the gallium driver can
refcnt rb's

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 17:18:43 -04:00
Rob Clark
566b1d9f93 freedreno/msm: get rid of ring_bo unref hack
Since 28328298 'freedreno: move ring_cache behind fd_bo_del()' this hack
is no longer necessary.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 17:12:22 -04:00
Rob Clark
f9dadcece6 xf86drmHash: remove redundant zero init
drmMalloc() is already calloc()

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-10-13 15:39:01 -04:00
Andrey Grodzovsky
21f1176458 amdgpu/test: Fix deadlock tests for AI and RV v2
Seems like AI and RV requires uncashed memory mapping to be able
to pickup value written to memory by CPU after the WAIT_REG_MEM
command was already launched.
.
Enable the test for AI and RV.

v2:
Update commit description.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-10-10 14:38:19 -04:00
Andrey Grodzovsky
eabc4cb35c amdgpu/test: Allow BO mapping flags to be passed in tests
v2:
Call amdgpu_bo_va_op_raw directly in amdgpu_bo_alloc_and_map_raw
Move amdgpu_bo_alloc_and_map_raw into C file to avoid including
unistd.h in amdgpu_test.h

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-10-10 14:38:19 -04:00
Thomas Hellstrom
f839258341 libdrm: Allow dynamic drm majors on linux
To determine whether a device node is a drm device node or not, the code
currently compares the node's major number to the static drm major device
number.

This breaks the standalone vmwgfx driver on XWayland dri clients,
https://cgit.freedesktop.org/mesa/vmwgfx
and any future attempt to introduce dynamic device numbers for drm.

So instead of checking for the device major, instead check for the presence
of the /sys/dev/char/<major>:<minor>/device/drm directory.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Dave Airlie <airlied@redhat.com>
2018-10-09 14:47:09 +02:00
Emil Velikov
4f1c765396 Bump to version 2.4.95
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2018-10-04 15:22:38 +01:00
Emil Velikov
86326a2c53 intel: include i915_pciids.h in the tarball
Fixes: 4e81d4f9c9 ("intel: add generic functions to check PCI ID")
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2018-10-04 15:22:30 +01:00
Emil Velikov
7dea956d38 Revert "Bump to version 2.4.95"
This reverts commit 6e50a309af.
2018-10-04 15:22:18 +01:00
Emil Velikov
6e50a309af Bump to version 2.4.95
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2018-10-04 15:08:17 +01:00
Ayan Kumar Halder
1b18f508c8 libdrm: headers: Sync with drm-next
Generated using make headers_install from the drm-next
tree - git://anongit.freedesktop.org/drm/drm
branch - drm-next
commit - 2dc7bad71cd310dc94d1c9907909324dd2b0618f

The changes were as follows :-

  core: (drm.h, drm_fourcc.h, drm_mode.h)
    - Added client capabilities for ASPECT_RATIO and WRITEBACK_CONNECTORS
    - Added Arm AFBC modifiers
    - Added BROADCOM's SAND and UIF modifiers
    - Added Qualcomm's modifiers
    - Added some picture aspect ratio and content type options
    - Added some drm mode flags
    - Added writeback connector id

  amdgpu:
    - Added GEM domain mask
    - Added some GEM flags
    - Added some hardware ip flags
    - Added chunk id and IB fence.
    - Added some query ids

  i915:
    -Added an IOCTL (I915_PARAM_MMAP_GTT_COHERENT)

  qxl:
    - Minor changes

  tegra:
    - Added some comments about struct drm_tegra* members
    - Modified DRM_IOCTL_TEGRA_CLOSE_CHANNEL

  vc4:
    - Added some members for 'struct drm_vc4_submit_cl'

Changes in v2:
    - Mentioned 'libdrm' in the commit header.

Changes in v3:
    - Removed the changes to radeon_drm.h, sis_drm.h and via_drm.h as suggested by
      Emil Velikov <emil.l.velikov@gmail.com>

Changes in v4:
    - Removed the changes to vmwgfx_drm.h as it caused a build break ie
      'make check' failed.

Change-Id: I018a06f65bf4a6a68400ab252b9cd05d041299b3
Signed-off-by: Ayan Kumar halder <ayan.halder@arm.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2018-10-04 14:51:09 +01:00
Emil Velikov
e08b7f2234 gitlab-ci: pass the correct toggles to configure
Trivial typos - s/admgpu/amdgpu/;s/vmwfgx/vmwgfx/

Fixes: 4a9030dc8b ("add gitlab-ci builds of libdrm")
Cc: Brian Starkey <brian.starkey@arm.com>
Reported-by: Brian Starkey <brian.starkey@arm.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-10-04 14:49:26 +01:00
Ezequiel Garcia
5775741d16 tests/util: Add support for sun4i-drm driver
This is the DRM driver for all Allwinner (sunxi) platforms.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-04 14:46:47 +01:00
Lucas De Marchi
f6b4737e2f android: make symbols hidden by default
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-04 14:42:54 +01:00
Emil Velikov
99c3540dd4 *-symbols-check: error out when using unset variables
It will make bugs like the one fixed with previous patch dead obvious.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-10-04 14:39:27 +01:00
Emil Velikov
660643e498 automake: set NM before running the tests
Set/export the NM variable since it may not be set already.

Fixes: 4f08bfe96d ("*-symbol-check: Don't hard-code nm executable")
Cc: Heiko Becker <heirecka@exherbo.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-10-04 14:39:06 +01:00
Daniel Stone
946fa21966 CI: Capture test logs as GitLab artifacts
GitLab CI already captures all the stdout/stderr output from the build
process as the log. However, some other important information is hidden
in other log files.

Taken from Wayland, capture logs from the configuration process as well
as from every check.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Cc: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Cc: Lucas De Marchi <lucas.de.marchi@gmail.com>
Cc: Eric Engeström <eric.engestrom@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
[Emil: use wildcard to match the artefacts]
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-04 14:37:07 +01:00
Stefan Agner
8d44918a7d modeprint: print encoder type
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-04 14:26:48 +01:00
Stefan Agner
eaed5c8825 modeprint: use libutil to lookup strings
Use libutil to lookup connector type names and state. This also
makes sure that the latest connector type addition "DPI" gets
printed correctly.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-10-04 14:26:16 +01:00
Eric Engestrom
4ec31fc31a freedreno: add missing drm_public
Fixes: 9a1470fb41 "freedreno: annotate public functions"
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-20 19:28:56 +01:00
Eric Engestrom
0785257462 omap: fix symbol annotations
Fixes: f3f7266d94 "omap: annotate public functions"
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
2018-09-20 19:28:09 +01:00
Eric Engestrom
ff8cb2402a radeon: add missing drm_public exports
Fixes: 9f45264815 "radeon: annotate public functions"
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108006
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2018-09-20 19:28:05 +01:00
Eric Engestrom
4b737cde8f nouveau: add missing drm_public exports
Fixes: d7320bfcdd "nouveau: annotate public functions"
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108006
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Dylan Baker <dylan@pnwbakers.com>
2018-09-20 18:23:52 +01:00
Eric Engestrom
a2920ea6a8 intel: add missing drm_public exports
Fixes: 36bb0ea47b "intel: annotate public functions"
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Mark Janes <mark.a.janes@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108006
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Tested-by: Dylan Baker <dylan@pnwbakers.com>
2018-09-20 18:23:19 +01:00
Lucas De Marchi
1e3fcc495b autotools: make symbols hidden by default
Now that symbols that should be exported are annotated accordingly, make
all the rest hidden by default.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
ba808253bc meson: make symbols hidden by default
Now that symbols that should be exported are annotated accordingly, make
all the rest hidden by default.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
67967e9b5c exynos: annotate public functions
while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

In which /tmp/a.txt contains the public symbols from
exynos-symbol-check. The idea here will be to switch the default
visibility to hidden so we don't export symbols we shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
d1db9dd200 tegra: annotate public functions
while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

In which /tmp/a.txt contains the public symbols from
tegra-symbol-check. The idea here will be to switch the default
visibility to hidden so we don't export symbols we shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
9f45264815 radeon: annotate public functions
while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

In which /tmp/a.txt contains the public symbols from
radeon-symbol-check. The idea here will be to switch the default
visibility to hidden so we don't export symbols we shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
f3f7266d94 omap: annotate public functions
while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

In which /tmp/a.txt contains the public symbols from
omap-symbol-check. The idea here will be to switch the default
visibility to hidden so we don't export symbols we shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
9a1470fb41 freedreno: annotate public functions
while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

In which /tmp/a.txt contains the public symbols from
freedreno-symbol-check. The idea here will be to switch the default
visibility to hidden so we don't export symbols we shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
3441a18c3a etnaviv: annotate public functions
while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

In which /tmp/a.txt contains the public symbols from
etnaviv-symbol-check. The idea here will be to switch the default
visibility to hidden so we don't export symbols we shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
26f9ce50e1 libdrm: annotate public functions
This was done with:
nm --dynamic --defined-only build/libdrm.so | \
	grep " T " | \
	grep -v _fini | grep -v _init | \
	cut -d' ' -f3 > /tmp/a.txt

while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

Then the alignment of function arguments were manually fixed all over.
The idea here will be to switch the default visibility to hidden so we
don't export symbols we shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
e15e3a65b8 amdgpu: annotate public functions
This was done with:
nm --dynamic --defined-only build/amdgpu/libdrm_amdgpu.so | \
	grep amdgpu_ | \
	cut -d' ' -f3 > /tmp/a.txt

while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		line=$((line-1))
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

Then the alignment of function arguments were manually fixed all over.
The idea here will be to switch the default visibility to hidden so we
don't export symbols we shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
d7320bfcdd nouveau: annotate public functions
This was done with:
nm --dynamic --defined-only build/nouveau/libdrm_nouveau.so | \
	grep nouveau_ | \
	cut -d ' ' -f3 > /tmp/a.txt

while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		line=$((line-1))
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

Then some corner cases were manually fixed. The idea here will be to
switch the default visibility to hidden so we don't export symbols we
shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
6229895cc5 libkms: annotate public functions
This was done with:
nm --dynamic --defined-only build/libkms/libkms.so | \
	grep kms_ | \
	cut -d' ' -f3 > /tmp/a.txt

while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

The idea here will be to switch the default visibility to hidden so we
don't export symbols we shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:45 -07:00
Lucas De Marchi
36bb0ea47b intel: annotate public functions
This was done with:
while read sym; do
	read f func line _ <<<$(cscope -d -L -1 $sym)
	if [ ! -z "$f" ]; then
		line=$((line-1))
		sed -i "${line}s/^/drm_public /" $f
	fi
done < /tmp/a.txt

Then some corner cases were manually fixed. "a.txt" above contains the
symbols collected from intel/intel-symbol-check. The idea here will be
to switch the default visibility to hidden so we don't export symbols we
shouldn't.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-19 22:46:44 -07:00
Eric Engestrom
a9463bdb01 headers/README: fix/add link to drm-next
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-18 19:39:22 +01:00
Christian König
b46945e2dc test/amdgpu: add GDS, GWS and OA tests
Add allocation tests for GDW, GWS and OA.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-18 14:56:40 +02:00
Christian König
864d4501b9 test/amdgpu: add proper error handling v2
Otherwise the calling function won't notice that something is wrong.

v2: check map result as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-18 14:56:22 +02:00
Christian König
c40bd3cbf8 amdgpu: remove invalid check in amdgpu_bo_alloc
The heap is checked by the kernel and not libdrm, to make it even worse
it prevented allocating resources other than VRAM and GTT.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-09-18 14:53:30 +02:00
Rob Clark
28328298ca freedreno: move ring_cache behind fd_bo_del()
So that it isn't bypassing normal refcnt'ing.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-09-14 13:41:44 -04:00
Rob Clark
3b64b54e32 freedreno: fix spelling typo
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-09-14 13:41:44 -04:00
Christian König
5bd5f7b25e tests/amdgpu: add unaligned VM test
Make a VM mapping which is as unaligned as possible.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-09-14 14:13:03 +02:00
Emil Velikov
473e2d2e67 intel: annotate the intel genx helpers as private
They're used internally and never meant to be part of the API.
Add the drm_private notation, which should resolve that.

v2: (Rodrigo) Add missing include.
v3: (Rodrigo) Keep includes grouped per Eric suggestion.

Cc: Eric Engestrom <eric.engestrom@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Fixes: 4e81d4f9c9 ("intel: add generic functions to check PCI ID")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-12 08:47:18 -07:00
Eric Engestrom
7f7c28dbd4 gitlab-ci: use templates to deduplicate the build commands
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-09-06 16:22:10 +01:00
Lucas De Marchi
c55f1b9b29 intel: get gen once for gen >= 9
We don't need to call IS_GEN() for each gen >= 9: we can rather use the
new intel_is_genx() helper to iterate the pciids array once.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-09-05 16:14:48 -07:00
Lucas De Marchi
584ca8fe53 intel: make gen9 use generic gen macro
The 2 PCI IDs that are used for the command line overrid mechanism
were left defined. The rest can be gone and then we just use the kernel
defines.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-09-05 16:14:41 -07:00
Lucas De Marchi
bf9df763d6 intel: make gen10 use generic gen macro
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-09-05 16:14:35 -07:00
Lucas De Marchi
8e7eb3bcfe intel: make gen11 use generic gen macro
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-09-05 16:14:27 -07:00
Lucas De Marchi
4e81d4f9c9 intel: add generic functions to check PCI ID
This will allow platforms to reuse kernel IDs instead of manually
keeping them in sync. In most of the cases we only need to extend
IS_9XX().  Current platforms that fit this requirement can be ported
over to use this macro. Right now it's a nop since it doesn't have any
PCI ID added.

The i915_pciids.h header is in sync with kernel tree on
drm-tip 2018y-08m-20d-21h-41m-11s.

v2: - move to a separate .c so we can have the array in a single
      compilation unit
    - use a single array for all gens
    - add real functions to get or check gen by pciid
    - define our own pci device struct rather than inherit the one
      kernel uses: we can throw away most of the fields

v3: - add comment to keep ids sorted by gen
    - remove misleading comment about all gens

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-09-05 16:14:04 -07:00
Eric Engestrom
9030a0f453 xf86drm: rename "real_path" to "pci_path"
"real_path" was getting confusing when there are other *paths in the
same functions.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-09-05 18:28:23 +01:00
Eric Engestrom
564995316e xf86drm: merge get_normal_pci_path() into get_real_pci_path()
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-09-05 18:28:14 +01:00
Tom Anderson
b06d71bb22 Fix build with -std=c11
typeof() is a GNU extension that will only work when the compiler is passed
-std=gnu*.  __typeof__() works with -std=c*, however.
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-05 13:09:29 +01:00
Eric Engestrom
4a9030dc8b add gitlab-ci builds of libdrm
It currently does 4 builds: 2 using Meson and 2 using Autotools, 2 using
the latest dependencies on ArchLinux and 2 using very old dependencies
on Debian (including manually building libpciaccess to have the oldest
version supported, to make sure it keeps being supported).

All the build options are turned on for both Meson and Autotools.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2018-09-04 15:41:31 +01:00
Daniel Vetter
4d87c2e203 Add basic CONTRIBUTING file
I picked up a bunch of the pieces from wayland's version:

https://gitlab.freedesktop.org/wayland/wayland/blob/master/CONTRIBUTING.md

The weston one is fairly similar. Then I rather massively trimmed it
down since in reality libdrm is a bit a dumping ground with very few
real rules. The commit rights and CoC sections I've copied verbatim
from igt respectively drm-misc. Weston/Wayland only differ in their
pick of how many patches you need (10 instead of 5). I think for
libdrm this is supremely relevant, since most everyone will get their
commit rights by contributing already to the kernel or mesa and having
commit rights there already.

Anyway, I figured this is good to get the rules documented, even if
there's mostly not many rules.

Note: This references maintainers in a MAINTAINERS file, which needs
to be created first.

Note: With the gitlab migration the entire commit rights process is
still a bit up in the air. But gitlab commit rights and roles are
hierarchical, so we can do libdrm-only maintainer/commiter roles
("Owner" and "Developer" in gitlab-speak). This should avoid
conflating libdrm roles with mesa roles, useful for those pushing to
libdrm as primarily kernel contributors.

v2: Comments from Emil:
- Recommend subject prefix.
- Fix copypaste fumbles, this isn't igt/wayland ...

v3: Comments from Marek:
- libdrm moved to mesa, update the document. Atm the entire account
  request situation is entirely not clear for gitlab and mesa
  projects, so that's a bit up in the air. Also, should probably send
  an announcement to dri-devel@, which didn't happen.
- amd folks don't submit their patches to dri-devel, document that.
  Probably applies to other drivers too.

v4: Comments from Rob:
- Also include kernel/userspace in the commit counts criteria, due to
  libdrm's special role as a glue library.

v5: Summarize the irc discussion on gitlab roles in the commit message
a bit.

v6: Some grammer stuff from Eric E.

v7: Use --local in git config (Eric E.)

Cc: Dave Airlie <airlied@gmail.com>
Cc: Michel Dänzer <michel@daenzer.net>
Cc: Emil Velikov <emil.velikov@collabora.com>
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com> (v4)
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com> (v6)
Acked-by: Emil Velikov <emil.l.velikov@gmail.com> (v6)
Acked-by: Marek Olšák <marek.olsak@amd.com> (v5)
Acked-by: Dave Airlie <airlied@redhat.com>
References: https://gitlab.freedesktop.org/wayland/weston/blob/master/CONTRIBUTING.md
References: https://01.org/linuxgraphics/gfx-docs/maintainer-tools/drm-misc.html#commit-rights
References: https://cgit.freedesktop.org/drm/igt-gpu-tools/tree/CONTRIBUTING#n54
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2018-09-04 14:15:26 +02:00
Qiang Yu
580bd83fb4 amdgpu: amdgpu_bo_inc_ref don't return dummy int
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-09-03 12:37:32 +02:00
Qiang Yu
937d62ea69 amdgpu: add amdgpu_bo_inc_ref() function.
For Pro OGL be able to work with upstream libdrm.

Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-09-03 10:55:53 +02:00
Junwei Zhang
f177251088 amdgpu: add error return value for finding bo by cpu mapping (v2)
If nothing is found, error should be returned.

v2: udpate the error value different from parameter check

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2018-09-01 11:57:34 +02:00
Michel Dänzer
f3d90e8db4 amdgpu-symbol-check: Add amdgpu_find_bo_by_cpu_mapping
Fixes: 4d454424e1 ("amdgpu: add a function to find bo by cpu mapping
                      (v2)"
2018-08-27 11:50:55 +02:00
Emil Velikov
bcb9d976cd xf86drm: fallback to normal path when realpath fails
Earlier commit reworked our sysfs handling to use realpath.
Sadly that backfired since the Firefox sandboxing mechanism rejects
that. Despite the files/folders being in the allowed list, of the
sandboxing mechanism.

Oddly enough, the Chromium sandboxing doesn't complain about any of
this.

Since there are no Firefox releases with the fix, add a temporary
solution which falls back to the original handling.

Sadly, this won't work for virgl.

v2: drop return type - function cannot return NULL (Eric)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107516
Fixes: a02900133b ("xf86drm: introduce a get_real_pci_path() helper")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-08-24 13:37:33 +01:00
Kristian H. Kristensen
8389c54548 Bump to version 2.4.94 2018-08-23 14:38:37 -07:00
Tanmay Shah
f0c642e8df libdrm: add msm drm uapi header
msm_drm.h file Generated using make headers_install.

Generated from
tree - git://people.freedesktop.org/~airlied/linux
branch - drm-next
commit - 6d08b06e67cd117f6992c46611dfb4ce267cd71e

Remove freedreno/msm/msm_drm.h to maintain only
one copy of msm_drm.h and change freedreno Makefile
and meson.build file accordingly.

v2: Remove private freedreno/msm/msm_drm.h
v3: meson.build update
v3: README update (by anholt)

Signed-off-by: Tanmay Shah <tanmay@codeaurora.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-08-23 08:48:45 -07:00
Junwei Zhang
f31fd57c60 amdgpu: add a function to create amdgpu bo internally (v4)
a helper function to create and initialize amdgpu bo

v2: update error handling: add label and free bo
v3: update error handling: separate each error label
v4: update error handling and rebase

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-08-17 12:55:11 +02:00
Junwei Zhang
3d8b6ea664 amdgpu: free flink bo in bo import
Fix potential memory leak when handle flink bo in bo import.
Free the flink bo after bo import and in error handling.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-08-17 12:54:36 +02:00
Michel Dänzer
c6493f360e amdgpu: Eliminate void* arithmetic in amdgpu_find_bo_by_cpu_mapping
Arithmetic using void* pointers isn't defined by the C standard, only as
a GCC extension. Avoids compiler warnings:

../../amdgpu/amdgpu_bo.c: In function ‘amdgpu_find_bo_by_cpu_mapping’:
../../amdgpu/amdgpu_bo.c:554:48: warning: pointer of type ‘void *’ used in arithmetic [-Wpointer-arith]
   if (cpu >= bo->cpu_ptr && cpu < (bo->cpu_ptr + bo->alloc_size))
                                                ^
../../amdgpu/amdgpu_bo.c:561:23: warning: pointer of type ‘void *’ used in subtraction [-Wpointer-arith]
   *offset_in_bo = cpu - bo->cpu_ptr;
                       ^

v2: Use uintptr_t instead of char*, don't change function signature
    (Junwei Zhang)

Fixes: 4d454424e1 ("amdgpu: add a function to find bo by cpu mapping
                     (v2)")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-08-17 09:12:42 +02:00
Likun Gao
cc472c5bb3 amdgpu: Disable deadlock test suite for RV
disable deadlock test suite for RV

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-08-16 13:45:20 -05:00
Christian König
bc4c9f4422 amdgpu: fix off by one in handle_table_insert
Stupid me, max_key must always be larger than key.

Signed-off-by: Christian König <christian.koenig@amd.com>
Bugzilla: https://bugs.freedesktop.org/107552
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-08-16 08:50:04 +02:00
Michel Dänzer
1e12c16d76 amdgpu: Use uint32_t i in amdgpu_find_bo_by_cpu_mapping
The compiler points out that an int doesn't work as intended if
dev->bo_handles.max_key > INT_MAX:

../../amdgpu/amdgpu_bo.c: In function ‘amdgpu_find_bo_by_cpu_mapping’:
../../amdgpu/amdgpu_bo.c:550:16: warning: comparison of integer expressions of different signedness: ‘int’ and ‘uint32_t’ {aka ‘unsigned int’} [-Wsign-compare]
  for (i = 0; i < dev->bo_handles.max_key; i++) {
                ^
../../amdgpu/amdgpu_bo.c:558:8: warning: comparison of integer expressions of different signedness: ‘int’ and ‘uint32_t’ {aka ‘unsigned int’} [-Wsign-compare]
  if (i < dev->bo_handles.max_key) {
        ^

Fixes: 4d454424e1 ("amdgpu: add a function to find bo by cpu mapping
                     (v2)")
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-08-15 10:34:59 +02:00
Rodrigo Vivi
6e30031788 intel: Add a new CFL PCI ID.
One more CFL ID added to spec.

Align with kernel commit d0e062ebb3a4 ("drm/i915/cfl:
Add a new CFL PCI ID.")

v2: fix commit subject.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
2018-08-14 16:06:54 -07:00
Rob Clark
879d7c0298 freedreno: fix use-after-free with stateobj rb's
We could be dropping last reference in ->flush(), so clear the entry in
the parent rb's table to avoid deref'ing after free'd.

Also, ring_bo_del()'s use of ring_cache expects that it is dropping the
last reference.  So drop our ref to the stateobj's ring_bo first.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-08-08 14:31:17 -04:00
Rob Clark
a43940eb91 freedreno: don't leak stateobj rb refs
One stateobj can be emitted multiple times in a single cmdstream, but
only the first time is a cmd entry added to the parent.  Since it will
be only unref'd once after flush, we should only ref it the first time
it is emitted (ie. the time it is added to cmd table).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-08-08 14:31:17 -04:00
Junwei Zhang
f4f61e5ec8 tests/amdgpu: add test for finding bo by CPU mapping
Add a test for API to query bo by CPU mapping

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-08-08 12:37:49 +02:00
Junwei Zhang
4d454424e1 amdgpu: add a function to find bo by cpu mapping (v2)
Userspace needs to know if the user memory is from BO or malloc.

v2: update mutex range and rebase

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-08-08 12:37:49 +02:00
Junwei Zhang
f49dccbb24 amdgpu: add bo from user memory to handle table
When create bo from user memory, add it to handle table
for future query.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-08-08 12:37:49 +02:00
Benjamin Gaignard
f693c468c1 tests/util: Add support for stm module
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-08-07 15:40:35 +01:00
Mike Lothian
649d4e60fa libdrm: Fix amdgpu build failure
Use the correct files to build libdrm_amdgpu.

Signed-of-by: Mike Lothian <mike@fireburn.co.uk>
Fixes: d6cb0ee408 ("amdgpu: remove the hash table implementation")
Cc: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-08-07 13:58:21 +01:00
Benjamin Gaignard
93220283cb tests/modetest: Add atomic support
If "-a" option is set this make modetest use atomic API instead
of legacy API.

Test the frame rate ("-v") it does a loop and swap between two
framebuffer for each active planes.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-08-07 13:39:20 +01:00
Christian König
cbf0bb7f19 amdgpu: always add all BOs to handle table
This way we can always find a BO structure by its handle.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-and-Tested-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-08-07 13:27:39 +02:00
Christian König
d6cb0ee408 amdgpu: remove the hash table implementation
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-and-Tested-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-08-07 13:27:33 +02:00
Christian König
9a38e850a5 amdgpu: use handle table for flink names
Instead of the hash use the handle table.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-and-Tested-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-08-07 13:27:28 +02:00
Christian König
bde850bc32 amdgpu: use handle table for KMS handles
Instead of the hash use the handle table.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-and-Tested-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-08-07 13:27:22 +02:00
Christian König
52370cc6eb amdgpu: add handle table implementation v2
The kernel handles are dense and the kernel always tries to use the
lowest free id. Use this to implement a more efficient handle table
by using a resizeable array instead of a hash.

v2: add handle_table_fini function, extra key checks,
    fix typo in function name

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-and-Tested-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-08-07 13:27:16 +02:00
Christian König
7aa1a51133 amdgpu: stop using the hash table for fd_tab
We have so few devices that just walking a linked list is probably
faster.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-and-Tested-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-08-07 13:26:59 +02:00
Marek Olšák
87fdbfb62f configure.ac: bump version to 2.4.93 2018-07-31 21:26:11 -04:00
Rob Clark
716ab859c3 freedreno/msm: "stateobj" support
Adds support for "state object" cmdstream buffers which can be
constructed once, and re-used many times.  This enables the use
for CP_SET_DRAW_STATE packets on newer hardware, to lower the
CPU overhead.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-07-30 12:18:58 -04:00
Rob Clark
04190a912e freedreno: slight reordering
Splitting code-motion out from next patch.  Once we add stateobj rb's
this loop could add new entries to bos table, so it needs to be before
we set req.bos/req.nr_bos.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-07-30 12:18:58 -04:00
Rob Clark
2932a03180 freedreno: small cleanup
Make cheezy growable array thing less open-coded before adding more.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-07-30 12:18:58 -04:00
Rob Clark
fcbf206aa2 freedreno: add fd_ringbuffer_new_object()
Add new API for reusable "state objects" which can be re-used multiple
times.  Backend implementation for msm will follow.  (Probably not
needed to support this for any device that uses kgsl backend, since this
is mostly useful for a5xx+.)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-07-30 12:18:58 -04:00
Mariusz Ceier
4519db23ef xf86drm: Fix error path in drmGetDevice2
In drmGetDevice2 when no local device is found or when
drm_device_has_rdev filters out all devices, *device might be left
uninitialized causing drmGetDevice2 to not return error - since
it's only returned when *device == NULL.

Above leads to crash in the firefox in system with amdgpu.

With this change firefox displays:

libGL error: MESA-LOADER: failed to retrieve device information
libGL error: unable to load driver: amdgpu_dri.so
libGL error: driver pointer missing
libGL error: failed to load driver: amdgpu
libGL error: MESA-LOADER: failed to retrieve device information
libGL error: unable to load driver: amdgpu_dri.so
libGL error: driver pointer missing
libGL error: failed to load driver: amdgpu

and doesn't crash.

Bugzilla: https://bugs.freedesktop.org/107384
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Mariusz Ceier <mceier+mesa-dev@gmail.com>
2018-07-30 12:21:32 +02:00
Marek Olšák
9c979e0ec4 amdgpu: add amdgpu_bo_handle_type_kms_noimport
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-07-25 17:21:44 -04:00
Emil Velikov
68bd236aa4 drmdevice: print the correct host1x information
While fairly close, the host1x and platform are two separate things.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2018-07-24 16:27:57 +01:00
Emil Velikov
8a3a8c15e2 drmdevice: convert the tabbed output into a tree
Making the output a little bit easier to parse by human beings.

v2: Add extra whitespace (Eric)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Robert Foss <robert.foss@collabora.com> (v1)
Reviewed-by: Robert Foss <robert.foss@collabora.com> (v1)
Reviewed-by: Eric Engestrom <eric@engestrom.ch> (v1)
2018-07-24 16:27:52 +01:00
Emil Velikov
33b035722b tests/drmdevice: add a couple of printf headers
Add a few printf statements, which should make the output easier to
parse.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2018-07-24 16:27:50 +01:00
Emil Velikov
c64dc00fd9 tests/drmdevices: install alongside other utilities
It's mildly useful program, to ship it when the user wants the "tests"
installed. Obviously the "tests" in the name is a misnomer.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2018-07-24 16:27:37 +01:00
Emil Velikov
3988580e4c xf86drm: Add drmDevice support for virtio_gpu
The GPU almost exclusively lives on the PCI bus, so we expose it as a
normal PCI one.

This allows all existing drmDevice users to work without any changes.

One could wonder why a separate typeset is not introduced, alike say
host1x. Unlike host1x the PCI/platform distinction for virtio provides
no extra information. Plus if needed we can add the separate set at a
later stage.

Here are a few 'features' that virtio seems to be missing:
 - provides extra information on top the plaform devices
 - supports a range of GPU devices
 - is considered hardware description (DT)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2018-07-24 16:25:05 +01:00
Emil Velikov
a02900133b xf86drm: introduce a get_real_pci_path() helper
Introduce a helper which gets the real sysfs path for the given pci
device.

In other words, instead opening the /sys/dev/char/*/device symlink, we
opt for the actual /sys/devices/pci*/*/

It folds three (nearly identical) snprintf's and paves the way of adding
extra devices (see next patch) a piece of pie.

v2: use a caller (on stack) provided real_path (Eric)

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Robert Foss <robert.foss@collabora.com> (v1)
Reviewed-by: Robert Foss <robert.foss@collabora.com> (v1)
Reviewed-by: Eric Engestrom <eric@engestrom.ch> (v1)
2018-07-24 16:24:45 +01:00
Emil Velikov
95b262f019 xf86drm: Allocate drmDevicePtr's on stack
Currently we dynamically allocate 16 pointers and reallocate more as
needed.

Instead, allocate the maximum number (256) on stack - the number is
small enough and is unlikely to change in the foreseeable future.

This allows us to simplify the error handling and even shed a few bytes
off the final binary.

v2:
 - add a define & description behind the magic 256
 - report error to strerr and skip when over 256 device nodes

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Robert Foss <robert.foss@collabora.com> (v1)
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch> (v1)
2018-07-24 16:24:31 +01:00
Emil Velikov
f808fee90d xf86drm: Fold drmDevice processing into process_device() helper
Don't duplicate the nearly identical code across the two call sites.
It improves legibility and the diff stat seems nice.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2018-07-24 16:24:26 +01:00
Emil Velikov
56e72d3f2e xf86drm: introduce drm_device_has_rdev() helper
Currently we match the opened drmDevice fd with each drmDevice we
process.

Move that after all the devices are processed and folded, via the
drm_device_has_rdev(). This makes the code easier to follow and allows
us to unify the massive process loop across drmGetDevice2 and
drmGetDevices2. That in itself is coming with a later commit.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2018-07-24 16:24:14 +01:00
Emil Velikov
7f52a0ebf7 xf86drm: drmGetDevice2: error out if the fd has unknown subsys
Currently one can open() any /dev node. If it's unknown
drmParseSubsystemType() will return an error.

Track that and bail as needed.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2018-07-24 16:24:04 +01:00
Christian König
4fa33e45e6 amdgpu: make sure to set CLOEXEC on duplicated FDs
Otherwise we leak file descriptors into child processes.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2018-07-17 16:48:08 +02:00
Michel Dänzer
7e4501027c Revert "amdgpu: don't call add_handle_to_table for KMS BO exports"
This reverts commit fe0488aa13.

It caused messages like

 amdgpu 0000:23:00.0: bo 000000007dce0b3e va 0x0000101800-0x000010181f conflict with 0x0000101800-0x0000101820

in dmesg, and eventually a Xorg crash while running piglit.

Evidently, such BOs can actually be re-imported by other means than via
a KMS handle.
2018-07-11 15:43:59 +02:00
Marek Olšák
fe0488aa13 amdgpu: don't call add_handle_to_table for KMS BO exports
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
2018-07-10 23:26:23 -04:00
José Roberto de Souza
7164abebec intel: Introducing Amber Lake platform
Amber Lake uses the same gen graphics as Kaby Lake, including a id
that were previously marked as reserved on Kaby Lake, but that now is
moved to AML page.

So, let's just move it to AML macro that will feed into KBL macro
just to keep it better organized to make easier future code review
but it will be handled as a KBL.

This is a copy of merged i915's
commit e364672477a1 ("drm/i915/aml: Introducing Amber Lake platform")

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-06-20 16:39:53 -07:00
José Roberto de Souza
591c1d72ab intel: Introducing Whiskey Lake platform
Whiskey Lake uses the same gen graphics as Coffe Lake, including some
ids that were previously marked as reserved on Coffe Lake, but that
now are moved to WHL page.

So, let's just move them to WHL macros that will feed into CFL macro
just to keep it better organized to make easier future code review
but it will be handled as a CFL.

This is a copy of merged i915's
commit b9be78531d27 ("drm/i915/whl: Introducing Whiskey Lake platform")

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-06-20 16:39:53 -07:00
Rob Clark
22b3efbe9b freedreno: add user ptr to fd_ringbuffer
Something for users of fd_ringbuffer to use as they see fit.  (For now,
just so mesa can add some debugging state.)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-06-18 13:07:17 -04:00
Jan Vesely
c1f2d9b900 amdgpu: Destroy fd_hash table when the last device is removed.
Fixes memory leak on module unload.
Analogous to mesa commit of the same name.
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-25 12:12:00 -04:00
Jan Vesely
52ef6fbaf1 amdgpu/util_hash_table: Add helper function to count the number of entries in hash table
Analogous to the mesa commit of the same name.
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-25 12:12:00 -04:00
Jan Vesely
712fa0f3f4 amdgpu: Take a lock before removing devices from fd_tab hash table.
Close the file descriptors under lock as well.
v2: close fds after removing from hash table

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-05-25 12:12:00 -04:00
Michel Dänzer
35615697f7 Always pass O_CLOEXEC when opening DRM file descriptors
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-05-22 18:05:19 +02:00
Kevin Strasser
f34b6942ec xf86drm: Be sure to closedir before return
removed in commit bb45ce4e3a

Adding it back as it is still needed in the case where we don't find a
match.

Signed-off-by: Kevin Strasser <kevin.strasser@intel.com>
Fixes: bb45ce4e3a "libdrm: Use readdir instead of readdir_r to
                             avoid build warnings"$
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-05-21 15:06:48 +01:00
Rob Clark
cb592ac816 bump version for release
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-05-09 18:03:45 -04:00
Rob Clark
c5a6568184 freedreno: add fd_pipe refcounting
In mesa/gallium, a pipe_fence can outlive the pipe_context it was
created from.  But to wait on the fence we need to know the submit-
queue (ie. the fd_pipe).

The most straightforward way to fix this is to add reference counting
to the fd_pipe and let the fence hold a reference to the pipe (rather
than hanging on to the context, which might have been destroyed before
the fence).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-05-09 07:40:29 -04:00
Paulo Zanoni
1ac3ecde2f intel: add support for ICL 11
Add the PCI IDs and the basic code to enable ICL.  This is the current
PCI ID list in our documentation.

Kernel commit: d55cb4fa2cf0 ("drm/i915/icl: Add the ICL PCI IDs")

v2: Michel provided a fix to IS_9XX that was broken by rebase bot.
v3: Fix double definition of PCI IDs, update IDs according to bspec
    and keep them in the same order and rebase (Lucas)

Cc: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
2018-05-01 14:30:25 -07:00
Michel Dänzer
bc9c789073 amdgpu: Deinitialize vamgr_high{,_32}
Fixes memory leaks.

Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
2018-04-27 16:42:26 +02:00
Matt Atwood
50426f3e17 Intel: Add a Kaby Lake PCI ID
Based on kernel commit '672e314b21dc ("drm/i915/kbl: Add KBL GT2 sku")'

v2: name change M -> ULX, add enumeration in KBL ULX
v3: add entry to IS_KABYLAKE

Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-04-24 13:05:34 -07:00
Xiaojie Yuan
d4b4c51437 amdgpu: enlarge the maximum number of cards supported
128 is the maximum number of cards that the kernel can support
at the moment.

Change-Id: I155b7b21635306d8ecc440b85fb8954501ab5599
Signed-off-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-04-19 16:48:51 +02:00
James Zhu
cb850ceb0f tests/amdgpu: add vce mv tests support and sets
Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
2018-04-06 09:35:14 -04:00
John Stultz
35affe89d5
libdrm: gralloc_handle.h: Fix build issue with Android
In trying to integrate the new gralloc_handle.h with the
drm_hwcomposer, I started seeing the following compilation
errors:

In file included from external/drm_hwcomposer/platformdrmgeneric.cpp:28:
external/libdrm/android/gralloc_handle.h:108:9: error: cannot initialize return object of type 'native_handle_t *' (aka 'native_handle *') with an lvalue of type 'struct gralloc_handle_t *'
        return handle;
               ^~~~~~
1 error generated.

This seems to be due to the gralloc_handle_create() definition
needs to return a native_handle_t * type, rather then a
gralloc_handle_t *, which is what the code actually returns.

After talking w/ Rob Herring, having the code return the
native handle should be the proper fix, so that is what
this patch changes.

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Stefan Schake <stschake@gmail.com>
Cc: Robert Foss <robert.foss@collabora.com>
Cc: Sean Paul <seanpaul@google.com>
Cc: Rob Herring <robh@kernel.org>

Signed-off-by: John Stultz <john.stultz@linaro.org>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
2018-04-03 10:19:21 +02:00
Daniel Stone
8ec043ecea headers: Update README
Nouveau has made a very deliberate choice to hide its actual kernel ABI
behind libdrm. i915 is no longer out of date.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-30 16:11:01 +01:00
Daniel Stone
8e535dd214 headers: Sync with drm-next
Taken from the drm-next pull for 4.17-rc1 (694f54f680f7), and manually
reconciled:

  core:
    - Dropped DRM_MODE_TYPE_ALL and DRM_MODE_FLAG_ALL; these are purely
      internal details of the bits accepted by the currently running
      kernel, and can not be generally relied on by userspace
    - Add HDCP flags
    - Note CTM entry representation is sign-magnitude format, not
      two's-complement
  amdgpu:
    - Add QUERY_STATE2 context op
    - Add VCN firmware version query
  etnaviv:
    - Add more GPU feature flags
  i915:
    - Add caps, params and ioctls for PMU / perf-stream
    - Add support for explicit fencing
  nouveau:
    - Add TILE_COMP layout
  vc4:
    - Add perfmon ioctls
  virtgpu:
    - Add capset-fix param
  vmware:
    - Add handle-close ioctl and explicit-fencing support

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-30 16:10:03 +01:00
Rex Zhu
2fa58c77fb headers: sync up amdgpu_drm.h with drm-next
Add sensor_info type
AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK
AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
2018-03-30 10:50:27 +08:00
Emil Velikov
4dfa458979 Revert "libdrm: intel/Android.mk: Filter libdrm_intel library requirements on x86/x86_64"
This reverts commit ed07718ae7.

The commit added a guard since libpciaccess may be missing on some
setups. As of last commit there are no traces of the project, from
Android POV.

Hence, we can revert this workaround - which caused similar breakage to
the one it's trying to fix. This time in Mesa.

Cc: Rob Herring <rob.herring@linaro.org>
Acked-by: John Stultz <john.stultz@linaro.org>
2018-03-28 17:08:32 +01:00
Tomasz Figa
bb0fd5f3b3 intel: Do not use libpciaccess on Android
This patch makes the code not rely anymore on libpciaccess when compiled
for Android to eliminate ioperm() and iopl() syscalls required by that
library. As a side effect, the mappable aperture size is hardcoded to 64
MiB on Android, however nothing seems to rely on this value anyway, as
checked be grepping relevant code in drm_gralloc and Mesa.

Cc: Rob Herring <rob.herring@linaro.org>
Signed-off-by: Tomasz Figa <tfiga@google.com>
[Emil Velikov: rebase against master. add missing __func__, Eric]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: John Stultz <john.stultz@linaro.org>
2018-03-28 17:08:32 +01:00
Eric Engestrom
00aa37443f xf86drmMode: merge successive mutually-exclusive #ifs
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-22 18:27:02 +00:00
John Stultz
bb45ce4e3a libdrm: Use readdir instead of readdir_r to avoid build warnings
Building libdrm under AOSP, we see the following build warning:
external/libdrm/xf86drm.c:2861:12: warning: 'readdir_r' is deprecated: readdir_r is deprecated; use readdir instead [-Wdeprecated-declarations]
    while (readdir_r(sysdir, pent, &ent) == 0 && ent != NULL) {
           ^

Building on Linux with glibc produces the same warning.
Thus, this patch replaces readdir_r with readdir.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102031
Cc: Robert Foss <robert.foss@collabora.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Stefan Schake <stschake@gmail.com>
Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil Velikov: remove unused variables, Eric]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-03-22 16:47:47 +00:00
Stefan Schake
32ee9c0e05 android: Add missing include exports
They were set for the static library but not the shared variant.

Signed-off-by: Stefan Schake <stschake@gmail.com>
Acked-by: John Stultz <john.stultz@linaro.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-22 16:47:05 +00:00
Gowtham Tammana
d930ef82b2 omap: add Android build support
Add Android.mk file to build libdrm_omap library.

Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-03-22 16:43:38 +00:00
Satyajit
b81d44d587 libdrm: amdgpu: Adding DRM_RDWR flag in amdgpu_bo_export
Currently while exporting prime handle to fd read write access is
not granted. mmap fails because of this. mmap was not supported on
prime initially.
Here is link to related discussion
https://lists.freedesktop.org/archives/dri-devel/2017-February/131840.html

Adding the DRM_RDWR flag in amdgpu_bo_export to support mmap.

Signed-off-by: Satyajit <satyajit.sahu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2018-03-22 09:59:07 +01:00
Eric Engestrom
361d4bffd3 meson: drop unnecessary variable
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-20 18:19:54 +00:00
Eric Engestrom
edaca475e8 meson: move line to allow using config earlier
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-20 18:19:50 +00:00
Eric Engestrom
56f6d3d48d meson: drop unneeded dependency to libudev
libdrm only needed libudev for a few days 3 years ago,
between fde4969176 and its revert 5b0e76f143.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-20 18:19:44 +00:00
Eric Engestrom
0926f0af54 meson,configure: include config.h automatically
This will prevent any more missing `#include "config.h"` bug, at the
cost of having to recompile some files that didn't need to be when
changing build options.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-20 18:19:26 +00:00
Eric Engestrom
431f1a147e meson: replace if(compiles) have=true with have=compiles
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-03-20 14:31:18 +00:00
Eric Engestrom
07585200e9 meson,configure: always define UDEV
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-03-20 14:31:14 +00:00
Eric Engestrom
e8d3d885b1 meson,configure: always define HAVE_VISIBILITY
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-03-20 14:31:07 +00:00
Eric Engestrom
1a44bbae73 meson,configure: always define HAVE_OPEN_MEMSTREAM
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-03-20 14:30:27 +00:00
Inki Dae
32e0370e36 tests: fix memory leak issue
Fixed memory leak issue to drmModeRes and drmModePlaneRes objects.

These objects were allocated by drmModeGetResources and
drmModeGetPlaneResources functions but not freed properly.

So this patch frees them by calling drmModeFreeResources
drmModeFreePlaneResources functions at failure case.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-03-20 14:14:51 +00:00
John Stultz
ed07718ae7 libdrm: intel/Android.mk: Filter libdrm_intel library requirements on x86/x86_64
When building AOSP after updating libdrm project to the
freedesktop/master branch, I've seen the following build errors:

external/libdrm/intel/Android.mk: error: libdrm_intel
(SHARED_LIBRARIES android-arm64) missing libpciaccess
(SHARED_LIBRARIES android-arm64) You can set
ALLOW_MISSING_DEPENDENCIES=true in your environment if this is
intentional, but that may defer real problems until later in the
build.

Using ALLOW_MISSING_DEPENDENCIES=true when building allows
things to function properly, but is not ideal.

So basically, while I'm not including the libdrm_intel package
into the build, just the fact that the Android.mk file references
libpciaccess which isn't a repo included in AOSP causes the build
failure.

So it seems we need some sort of conditional filter in the
Android.mk to skip over it if we're not building for intel.

Cc: Chad Versace <chad.versace@linux.intel.com>
Cc: Marissa Wall <marissaw@google.com>
Cc: Sean Paul <seanpaul@google.com>
Cc: Dan Willemsen <dwillemsen@google.com>
Cc: Tomasz Figa <tfiga@google.com>
Cc: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-03-18 23:18:36 -05:00
Seung-Woo Kim
dff690ac31 tests/exynos: remove dead condition
There is already condition checking input values between 2 and 4096
so condition checking 0 is always false. Remove the dead condition.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-03-15 16:30:14 +00:00
Eric Engestrom
a58490de0d meson: detect alloca.h
amdgpu makes use of it

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-03-14 11:50:08 +00:00
Eric Engestrom
2bd461e32a meson: make it easy to add headers to check
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-03-14 09:47:39 +00:00
Dylan Baker
0663dbd3ef meson: don't use compiler.has_header
Meson's compiler.has_header is completely useless, it only checks that a
header exists, not whether it's usable. This creates problems if a
header contains a conditional #error declaration, like so:

> #if __x86_64__
> # error "Doesn't work with x86_64!"
> #endif

Compiler.has_header will return true in this case, even when compiling
for x86_64. This is useless.

Instead, we'll do a compile check so that any #error declarations will
be treated as errors, and compilation will work.

Fixes compilation on x32 architecture.

Gentoo Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=649746
meson bug: https://github.com/mesonbuild/meson/issues/2246
CC: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-03-13 11:30:51 -07:00
Eric Engestrom
5236de6cc1 meson: use pkg-config to detect libatomic_ops
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-03-09 17:12:02 +00:00
Sabre Shao
a5329cd990 drm/amdgpu: Remove IB count checking
Signed-off-by: Sabre Shao <Sabre.Shao@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-03-08 20:06:28 -05:00
Marek Olšák
666d59d86b Revert "amdgpu:support 16 ibs per submit for PAL/SRIOV"
This reverts commit 924f856a90.

Wrong patch.
2018-03-08 20:04:01 -05:00
Qiang Yu
924f856a90 amdgpu:support 16 ibs per submit for PAL/SRIOV
to support SRIOV and MCBP, need 16 IBs per submit

Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-03-08 15:01:23 -05:00
Eric Engestrom
28370370af freedreno: add missing symbols to symbol-check
Fixes: 1384c08123 "freedreno: add interface to get buffer address"
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2018-03-08 17:54:07 +00:00
Daniel Stone
45eee3fd44 drm/atomic: Refuse to add invalid objects to requests
Object and property IDs cannot be zero. Prevent them from being added to
the request stream at all, rather than breaking at commit time.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2018-03-07 17:19:29 +00:00
Rodrigo Vivi
7b12381723 intel/intel_chipset.h: Sync Cannonlake IDs.
Let's sync CNL ids with Spec and kernel.

Sync with kernel commit '3f43031b1693 ("drm/i915/cnl:
Add Cannonlake PCI IDs for another SKU.")' and
commit 'e3890d05b342 ("drm/i915/cnl: Sync PCI ID with Spec.")'

Cc: James Ausmus <james.ausmus@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
2018-03-05 15:13:05 -08:00
Rob Clark
85ae22af0f bump version for release
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-03-05 15:55:51 -05:00
Eric Engestrom
7a58c21f3e meson: add configuration summary
The message block printed is the same as the one in configure.ac

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-03-05 17:34:01 +00:00
Michel Dänzer
a1a13d2002 tests/amdgpu: Fix misspellings of "suite"
Acked-by: Christian König <christian.koenig@amd.com>
2018-03-02 12:19:11 +01:00
Chunming Zhou
1f6a85cc37 test/amdgpu: disable bo eviction test by default
if some system has no swap space and memory is less, than the test
could fail.
And bo eviction test takes much more time in some system, which effects
automation test result and efficiency.
So disable it by default now, only be used by developer manually.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2018-03-02 10:32:22 +08:00
Christian König
bca585b02f amdgpu: fix "add AMDGPU_VA_RANGE_HIGH"
The range is stored as exclusive, not inclusive. Subtracts one to get
the inclusive interval for the calculation. This fixes crashes when 32bit
addresses are in use.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2018-02-28 20:04:32 +01:00
Christian König
ff0da7b323 amdgpu: add AMDGPU_VA_RANGE_HIGH
Return high addresses if requested and available.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-28 13:27:43 +01:00
Christian König
cd8a80493b amdgpu: mostly revert "use the high VA range if possible v2"
This reverts commit 07ea20d5be.

Unfortunately it turned out that this change broke some corner cases in
Mesa.

Revert it for now, but keep the high range in separate VA managers.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-02-28 13:27:38 +01:00
Rob Clark
1384c08123 freedreno: add interface to get buffer address
Needed for clover/OpenCL.  Fortunately the kernel interface is already
in place.

Include a stub _put_iova() so mesa can tell us when it no longer needs
the buffer to be pinned.  There is no kernel interface for this (yet),
but at least if we want to unpin buffers we won't need mesa changes.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-02-26 14:04:56 -05:00
Heiko Becker
4f08bfe96d *-symbol-check: Don't hard-code nm executable
Helpful if your nm executable has a prefix based on the
architecture, for example.

Signed-off-by: Heiko Becker <heirecka@exherbo.org>
Cc: Timo Gurr <timo.gurr@gmail.com>
[Eric: v2: rebase and add Meson support]
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-23 17:53:08 +00:00
Rob Herring
009634e493 android: fix gralloc_handle_create() problems
There's a number of problems with gralloc_handle_create starting with it
doesn't even compile. More importantly, it doesn't really create (i.e.
allocate) a handle. It allocates a native_handle_t, copies it to a
struct gralloc_handle_t on the stack and returns the struct (not a ptr).
So the caller still has to allocate a struct gralloc_handle_t to hold
the returned struct.

Rework gralloc_handle_create() to allocate a new handle and return the
pointer to the allocated handle. Callers should free the handle with
native_handle_close() and native_handle_delete(). In the interest of
making gralloc_handle_t opaque, return a native_handle_t ptr instead.

Reviewed-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-02-20 14:16:16 -06:00
Rob Herring
86c62e49c8 android: add helper to convert buffer_handle_t to gralloc_handle_t ptr
Clients frequently need to convert a buffer_handle_t (aka
native_handle_t *) to a gralloc_handle_t ptr. This is a simple cast, but
add an inline function to do the conversion.

Reviewed-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-02-20 14:16:05 -06:00
Rob Herring
652bcea5a6 android: fix mis-named alloc_handle_t
Fix a typo where alloc_handle_t should be gralloc_handle_t. One still
remains in gralloc_handle_create, but a subsequent commit will fix that
along with other problems in gralloc_handle_create.

Reviewed-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-02-20 14:15:58 -06:00
Rob Herring
5db7bf41b2 android: revert making handle magic and version members const
Const members are problematic for dynamically allocating struct
gralloc_handle_t, so just drop the const modifier.

Reviewed-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2018-02-20 14:15:38 -06:00
Jonathan Gray
9eb6c8a6b1 meson/configure.ac: pthread-stubs not present on OpenBSD
pthread-stubs is no longer required on OpenBSD and has been removed.
libpthread parts involved moved to libc.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
[Eric: add meson equivalent]
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-02-20 15:05:20 +00:00
Igor Gnatenko
9411f8ea03 meson: do not use cairo/valgrind if disabled
-Dcairo-tests=false currently results into enabling cairo support if it
was found. Same for valgrind.

v2:
* Use underscore-prefixed variables to not change type of variable
* Use empty array for "fake" dependency instead of real empty object

v3:
* Fix typo

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Igor Gnatenko <ignatenko@redhat.com>
2018-02-20 10:02:50 +00:00
Andrey Grodzovsky
33a2851ab9 amdgpu: Fix mistake in initial hole size calculation.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2018-02-19 09:32:17 -05:00
Thierry Reding
ab5aaf6c8e drm/tegra: Sanitize format modifiers
The existing format modifier definitions were merged prematurely, and
recent work has unveiled that the definitions are suboptimal in several
ways:

  - The format specifiers, except for one, are not Tegra specific, but
    the names don't reflect that.
  - The number space is split into two, reserving 32 bits for some
    "parameter" which most of the modifiers are not going to have.
  - Symbolic names for the modifiers are not using the standard
    DRM_FORMAT_MOD_* prefix, which makes them awkward to use.
  - The vendor prefix NV is somewhat ambiguous.

Fortunately, nobody's started using these modifiers, so we can still fix
the above issues. Do so by using the standard prefix. Also, remove TEGRA
from the name of those modifiers that exist on NVIDIA GPUs as well. In
case of the block linear modifiers, make the "parameter" smaller (4
bits, though only 6 values are valid) and don't let that leak into any
of the other modifiers.

Finally, also use the more canonical NVIDIA instead of the ambiguous NV
prefix.

This is based on commit 5843f4e02fbe86a59981e35adc6cabebee46fdc0 from
Linux v4.16-rc1 and also updates modetest to use the new defines.

Acked-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-02-19 14:58:57 +01:00
Thierry Reding
b3c4c79e16 drm/fourcc: Fix fourcc_mod_code() definition
Avoid compiler warnings when the val parameter is an expression.

This is based on commit 5843f4e02fbe86a59981e35adc6cabebee46fdc0 from
Linux v4.16-rc1.

Acked-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-02-19 14:56:20 +01:00
Marek Olšák
e87a87925e RELEASING: mention meson 2018-02-17 20:25:02 +01:00
Marek Olšák
a05f5ac302 meson: bump the version number 2018-02-17 20:20:33 +01:00
Marek Olšák
36c816fbee configure.ac: bump version to 2.4.90 2018-02-17 04:28:42 +01:00
Robert Foss
e75e0ea2e3
android: Change gralloc_handle_t members to be fixed width
In order to lessen future alignment issues, lets switch to
fixed width integers where possible.

This excludes the data_owner since it is a pid_t which
in theory could be larger than 32 bits.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-02-14 17:33:58 +01:00
Robert Foss
8e00d5ffbd
android: Remove member name from gralloc_handle_t
The name member of gralloc_handle_t is no longer needed and has been removed.
The version field has also been bumped.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-02-14 17:33:57 +01:00
Robert Foss
ed0ed55f3e
android: Mark gralloc_handle_t magic variable as const
Mark magic member of gralloc_handle_t as const.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-02-14 17:33:57 +01:00
Robert Foss
76cd0af399
android: Add version variable to gralloc_handle_t
The version variable will be used for versioning of this
struct and the corresponding accessor functions.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-02-14 17:33:57 +01:00
Robert Foss
a4b6fd651f
android: Move gralloc handle struct to libdrm
This struct is used in mesa and drm_hwcomposer.
Versions of if have been implemented in several grallocs:
drm_gralloc, gbm_gralloc, minigbm and intel-minigbm.

Other than the 1:1 move of the struct a new generic name
has been chosen and variables have had comments added to them.

Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-02-14 17:33:57 +01:00
Michel Dänzer
03f80b9f6a amdgpu: Add amdgpu_query_sw_info to amdgpu-symbol-check
Fixes make check. Trivial.
2018-02-12 15:47:55 +01:00
Marek Olšák
ad5b702fec amdgpu: add amdgpu_query_sw_info for querying high bits of 32-bit address space
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-02-09 20:30:16 +01:00
Dylan Baker
deb59781fc meson: include headers in root directory in ext_libdrm
Which is used in wraps.

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2018-02-09 08:52:14 -08:00
Chunming Zhou
69f9faeee6 amdgpu: clean up non list code path for vamgr v2
v2: Add missing "goto out"

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2018-02-09 17:28:32 +08:00
Michel Dänzer
fa35b51f63 Revert "amdgpu: clean up non list code path for vamgr"
This reverts commit 41b94a3fb6.

It caused crashes with radeonsi in at least glxgears and Xorg.
2018-02-08 09:50:53 +01:00
Chunming Zhou
09642c073e tests/amdgpu: add bo eviction test
for(( i=1; i < 100; i++))
do
     echo "Hello, Welcome $i times "
     sudo ./amdgpu_test -s 1 -t 5
done

with above stricpt, run in two terminals, will reproduce Felix's swap leeking issue.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2018-02-08 15:03:47 +08:00
Chunming Zhou
41b94a3fb6 amdgpu: clean up non list code path for vamgr
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-02-08 14:52:23 +08:00
Chunming Zhou
d07be74a4a amdgpu: fix inefficient vamgr algorithm
issue: UMD allocates top 4GB, but don't do anything, just reserve top 4GB space,
but the performance of VP13 drops from 162fps to 99fps.

root cause:
our va hole list of vamgr is too long by time going.

fix:
reusing old hole as much as possible can make the list shortest.

result:
performance recovers as non-list path, next patch will remove non-list code path.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-02-08 14:35:47 +08:00
Chunming Zhou
bde3b9b689 fix return value for syncobj wait
otherwise -ETIME is missed.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2018-02-07 11:23:01 +08:00
Bas Nieuwenhuizen
b1e63d9ee6 drm: Fix 32-bit drmSyncobjWait.
Otherwise we get an EFAULT, at least on a 64-bit kernel.

Fixes: 2048a9e7 "drm: add drmSyncobjWait wrapper"
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-02-06 18:15:32 +01:00
Dylan Baker
9e34ad590e meson: fix libdrm_nouveau pkgconfig include directories
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-31 09:15:27 -08:00
Emil Velikov
10e85a8b7f tests/amdgpu: add missing config.h include
Otherwise we'll end up without the macros set during configure stage.
And effectively error out in sanity tests such as the mmap static
assert.

To reproduce, do a multilib build - 32bit build on 64bit machine.

Cc: Fabio Pedretti <pedretti.fabio@gmail.com>
Cc: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Fixes: 33dcc29f7c ("amdgpu: Add VMID reservation per GPU context test.")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104819
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-31 15:57:58 +00:00
Eric Engestrom
ba17673eed meson,configure: turn undefined preprocessor tokens warnings into errors
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-31 11:23:00 +00:00
Eric Engestrom
440e6ad070 exynos/tests: use #ifdef for never-defined token
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-31 11:22:57 +00:00
Eric Engestrom
0db36bdec8 configure: always define HAVE_LIBDRM_ATOMIC_PRIMITIVES and HAVE_LIB_ATOMIC_OPS
Fixes #if undefined warnings

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-31 11:22:53 +00:00
Eric Engestrom
7797751cf7 xf86drmHash: remove always-false #if guards
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-31 11:22:47 +00:00
Eric Engestrom
75758d2ccf meson,configure: add warning when using undefined preprocessor tokens
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-31 11:22:32 +00:00
Eric Engestrom
8177d73bdb meson: cleanup whitespace
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-29 16:18:52 +00:00
Eric Engestrom
2d50a404f6 xf86atomic: fix -Wundef warning
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 16:18:52 +00:00
Eric Engestrom
5457e0082d meson: sort HAVE_* defines
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
1d7bbf8520 always define HAVE_VALGRIND
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
d2b0a4ec70 always define HAVE_CAIRO
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
ec53f4808c always define HAVE_FREEDRENO_KGSL
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
ee47329bef meson,configure: always define HAVE_{INTEL,VMWGFX,NOUVEAU,EXYNOS,VC4,RADEON}
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
540827cc7d meson,configure: remove unused HAVE_ETNAVIV define
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
2cd9105db6 meson,configure: remove unused HAVE_FREEDRENO define
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
052ef66f06 meson,configure: remove unused HAVE_TEGRA define
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
de9be0bebf meson,configure: remove unused HAVE_OMAP define
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
c56db628c7 configure: remove unused HAVE_INSTALL_TESTS define
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
a7434d3618 configure: remove unused HAVE_CUNIT define
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
52689eebeb meson: add missing HAVE_RADEON
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
44867b0eef tests/etnaviv: drop unused return 0
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
28052ad589 tests/util: drop unused parameters
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
256cdc02a8 tests/util: fix signed/unsigned comparisons
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
80f33f4529 tests/amdgpu: drop unused variables
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
c6fcd176e8 tests/amdgpu: add parentheses to make operation priority explicit
While at it, align with the other half on the next line.

Cc: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-29 15:41:52 +00:00
Eric Engestrom
089d45456b remove unnecessary double-semicolon
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2018-01-29 15:41:52 +00:00
Rob Clark
6f0f6cee5e freedreno: clamp priority based on # of rings
In case of a kernel that is new enough to support multiple submit-
queues, but with an adreno generation which doesn't support multiple
prioritized ringbuffers, we'd attempt to open a submit-queue with
prio=1 (medium), which is rejected by the kernel.

This could happen either w/ an older mesa (which uses fd_pipe_new())
or a newer mesa which defaults to prio=1 if no pipe context priority
flags are set.

The simple answer to fix both cases is to clamp the requested priority
according to the number of rings.  This might not do exactly what you
want, if we hypothetically had 2 rings (it would result in requested
medium priority being high priority instead of low priority).  But the
number of rings (for hw gen's that support this) is purely a software
construct, so the easy answer there is to have the kernel advertise at
least 3 rings if it supports more than one.  There isn't really any
reason to do otherwise.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2018-01-26 15:29:10 -05:00
Michel Dänzer
82aef5f0cb amdgpu: Disable VM test suite by default for SI ASICs
Hangs my Cape Verde.

Acked-by: Christian König <christian.koenig@amd.com>
2018-01-26 15:25:17 +01:00
Michel Dänzer
8e75f5a145 amdgpu: Disable deadlock test suite by default for SI ASICs
Hangs my Cape Verde.

Acked-by: Christian König <christian.koenig@amd.com>
2018-01-26 15:25:17 +01:00
Andrey Grodzovsky
429bb5820d amdgpu: Fix segfault in deadlock test.
If amdgpu_cs_query_fence_status terminates prematurely the BO
sometimes is unmapped before helper thread writes a vlaue
into it causing a segfault.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
2018-01-26 07:45:48 -05:00
Andrey Grodzovsky
5e239f3e3d amdgpu: Update deadlock test to not assert on ECANCELED
Kernel will abort jobs for guilty (causing GPU hang) context
with -ECANCELED don't assert if that the case.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2018-01-26 07:45:34 -05:00
Dylan Baker
5df936718d meson: set the minimum version correctly
Currently we ask for 0.42, but we actually require 0.43 because we pass
file objects as arguments to tests. If someone needs version 0.42 it
wouldn't be hard, just a lot of replacing files() with strings.

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-25 10:29:52 -08:00
Dylan Baker
7e28d73af0 meson: set proper pkg-config version for libdrm_freedreno
Copy and paste error from exynos.

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-25 10:29:31 -08:00
Seung-Woo Kim
6736ad45d8 modetest: Fix to check return value of asprintf()
There is warning about ignoring return value of 'asprintf'. Fix to
check return value of asprintf().

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-25 10:39:30 +00:00
Christian König
1cc17744b9 amdgpu: fix high VA mask
That constant needs to be 64bits.

Fixes: amdgpu: use the high VA range if possible v2

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-23 11:17:43 +01:00
Christoph Haag
3509e7cd2b meson: fix the install path of amdgpu.ids
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-18 10:13:43 -08:00
Michel Dänzer
032bb3b11d amdgpu: Symlink .editorconfig to tests/amdgpu
In order to use consistent editorconfig settings in both amdgpu
directories.

Reviewed-by: Christian König <christian.koenig@amd.com>
2018-01-18 10:12:37 +01:00
Michel Dänzer
6fe93b8000 amdgpu: Don't dereference device_handle after amdgpu_device_deinitialize
Fixes use after free:

==2537== Invalid read of size 4
==2537==    at 0x1162C9: suite_deadlock_tests_enable (deadlock_tests.c:101)
==2537==    by 0x10B157: amdgpu_disable_suits (amdgpu_test.c:421)
==2537==    by 0x10B157: main (amdgpu_test.c:560)
==2537==  Address 0x5e44f24 is 452 bytes inside a block of size 1,016 free'd
==2537==    at 0x4C2BE1B: free (vg_replace_malloc.c:530)
==2537==    by 0x504CD8B: amdgpu_device_reference (amdgpu_device.c:164)
==2537==    by 0x504CD8B: amdgpu_device_deinitialize (amdgpu_device.c:307)
==2537==    by 0x1162BB: suite_deadlock_tests_enable (deadlock_tests.c:97)
==2537==    by 0x10B157: amdgpu_disable_suits (amdgpu_test.c:421)
==2537==    by 0x10B157: main (amdgpu_test.c:560)
==2537==  Block was alloc'd at
==2537==    at 0x4C2CC05: calloc (vg_replace_malloc.c:711)
==2537==    by 0x504CA5E: amdgpu_device_initialize (amdgpu_device.c:212)
==2537==    by 0x116298: suite_deadlock_tests_enable (deadlock_tests.c:93)
==2537==    by 0x10B157: amdgpu_disable_suits (amdgpu_test.c:421)
==2537==    by 0x10B157: main (amdgpu_test.c:560)

Reviewed-by: Christian König <christian.koenig@amd.com>
2018-01-16 16:57:57 +01:00
Michel Dänzer
57d3d4c968 amdgpu: Don't print error message if parse_one_line returned -EAGAIN
It means it just didn't find an entry for the GPU in the amdgpu.ids file.

Fixes spurious

 amdgpu_parse_asic_ids: Cannot parse ASIC IDs: Resource temporarily unavailable

error messages in that case.

Reported-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-15 10:01:39 +01:00
Dylan Baker
fd9bcb73e9 README: Add note about meson
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-12 09:40:48 -08:00
Dylan Baker
cc86cbfb1c autotools: Include meson.build files in tarball
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-12 09:40:48 -08:00
Dylan Baker
5f7deb5078 Add meson build system
This patch adds a complete meson build system, including tests and
install. It has the necessary hooks to allow it be used as a subproject
for other meson based builds such as mesa.

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-and-tested-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2018-01-12 09:40:48 -08:00
Hawking Zhang
f115de819b tests/amdgpu: execute copy linear on all the available rings
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-12 12:17:24 -05:00
Hawking Zhang
cbbb8a332d tests/amdgpu: execute const fill on all the available rings
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-12 12:15:40 -05:00
Hawking Zhang
168dbe9a0e tests/amdgpu: execute write linear on all the available rings
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2018-01-12 12:12:40 -05:00
Anuj Phogat
d3cb588315 intel: Add more Coffeelake PCI IDs
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2018-01-11 10:29:02 -08:00
Christian König
de807d1a74 test/amdgpu: fix compiler warnings
SWAP_32() should mask first and then shift.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-09 17:15:13 +01:00
Christian König
07ea20d5be amdgpu: use the high VA range if possible v2
Retire the low range on Vega10 this frees up everything below 0xffff800000000000 for HMM.

v2: keep the 32bit range working.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-09 17:15:09 +01:00
Christian König
0a3c01f4ad headers: sync up amdgpu_drm.h with drm-next
Sync up amdgpu changes from drm-next.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-09 17:15:06 +01:00
Christian König
a8e436de5d amdgpu: fix 32bit VA manager max address
The range is exclusive not inclusive.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-09 17:15:02 +01:00
Seung-Woo Kim
ad3152fa69 amdgpu: fix not to add amdgpu.ids when building without amdgpu
The amdgpu.ids is only required when building with amdgpu support.
Fix not to add it without amdgpu.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2018-01-08 18:32:46 +01:00
Dave Airlie
831036a6f6 configure.ac: bump version for release 2017-12-18 11:24:34 +10:00
Keith Packard
d4331dda5b drm: Add CrtcGetSequence and CrtcQueueSequence IOCTLs [v2]
These provide a crtc-id based interface to get the current sequence
(frame) number and to queue an event to be delivered at a specific sequence.

v2: Remove FIRST_PIXEL_OUT flag. This has been removed from the
    proposed kernel API

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-18 10:04:02 +10:00
Keith Packard
c417153538 drm: Add drm mode lease ioctl wrappers [v3]
drmModeCreateLease
drmModeListLessees
drmModeGetLease
drmModeRevokeLease

Changes for v2:

Remove lessee id from GetLease
Remove lessor_id from ListLeases
Add revoke
Renumber to track kernel rebase on drm-next

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-18 10:04:02 +10:00
Bas Nieuwenhuizen
5889f6ba1a amdgpu: Add syncobj reset & signal wrappers.
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-18 09:51:50 +10:00
Bas Nieuwenhuizen
1abccedc4d drm: Add drmSyncobjReset & drmSyncobjSignal wrappers.
anv already uses the ioctls but does not use libdrm, so these were
not wrapped yet.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-12-18 09:51:50 +10:00
Lucas Stach
7d984e6094 etnaviv: fix BO cache to properly work with different flags
Currently if the oldest BO in a bucket has different flags than what we
look for we'll miss the cache.Fix this by iterating over the cached BOs
until we find the oldest one with matching flags. This improves the hit
ratio for some of the buckets.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-12-15 19:40:10 +01:00
Andrey Grodzovsky
4f8e426884 tests/amdgpu: Add return CUE_SUCCESS to suite_vcn_tests_clean.
fixes: 806d080360 (amdgpu: Use new suite/test disabling functionality.)
    bug: https://bugs.freedesktop.org/show_bug.cgi?id=104280

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-12-15 13:30:53 -05:00
Christian Gmeiner
6a6b7432bf etnaviv: support performance monitor requests
Add etna_cmd_stream_perf(..) to submit perform requests.
Userspace can submit pmrs via submit ioctl to sample perfmon
signals.

v3:
 - mark perfmon bos as RW

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2017-12-15 19:10:01 +01:00
Christian Gmeiner
305c1d113c etnaviv: add permon support
Query all domains and their signals and provide it this information
via struct etna_perfmon and the corresponding api functions.

v2:
 - code style changes
 - etna_perfmon_create(..): add missing clean up in error case

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2017-12-15 19:09:51 +01:00
Christian Gmeiner
8d8ab9812c etnaviv: sync uapi header
Import the etnaviv header changes from kernel commit 05916bed1 (drm-next)

The drm_etnaviv_gem_submit structure was extended to include performance
monitor requests. Also two new ioctls got added to be able to readout
performance monitor domains and their signals.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
2017-12-15 19:09:43 +01:00
Andrey Grodzovsky
7f2993948c amdgpu: Remove dummy CU_ASSERT_EQUAL.
Fixes test failure on rhel.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Qiang Yu <Qiang.Yu@amd.com>
2017-12-12 09:25:50 -05:00
Michel Dänzer
47419a1497 amdgpu.ids: Refresh from AMD 17.40 release
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2017-12-05 15:58:20 +01:00
Michel Dänzer
f05a2b4cb1 amdgpu: Only remember the device's marketing name
There's no point in keeping around the full table of marketing names,
when amdgpu_get_marketing_name only ever returns the device's marketing
name.

Acked-by: Slava Abramov <slava.abramov@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-05 12:50:20 +01:00
Michel Dänzer
5219809a32 amdgpu: Simplify error handling in parse_one_line
* Move empty/commented line check before the strdup and return -EAGAIN
  directly
* Initialize r = -EAGAIN and remove redundant assignments
* Set r = -ENOMEM if last strdup fails, and remove redundant goto

Acked-by: Slava Abramov <slava.abramov@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-05 12:49:13 +01:00
Michel Dänzer
85c6b0b00a amdgpu: Clean up amdgpu_parse_asic_ids error handling
* Move error message printing into amdgpu_parse_asic_ids and make it
  return void
* Print only "Invalid format" error message if parse_one_line returns
  -EINVAL
* Use strerror instead of printing the (negative) error code in hex

Acked-by: Slava Abramov <slava.abramov@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-12-01 16:52:01 +01:00
Andrey Grodzovsky
bc21168fa9 amdgpu: Add explicit dependency test.
The test is as following:

1) Create context A & B
2) Send a command submission using context A which fires up a compute shader.
3) The shader wait a bit and then write a value to a memory location.
4) Send a command submission using context B which writes another value to the same memory location, but having an explicit dependency on the first command submission.
5) Wait with the CPU for both submissions to finish and inspect the written value.

Test passes if the value seen in the memory location after both submissions is from command B.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2017-11-30 14:51:12 -05:00
Michel Dänzer
f71e95108d amdgpu: Add amdgpu_cs_create_syncobj2 to amdgpu-symbol-check
Fixes make check. Trivial.
2017-11-30 15:52:50 +01:00
David Mao
1749d56ea0 amdgpu: Adding amdgpu_cs_create_syncobj2 to create syncobj as signaled initially
Signed-off-by: David Mao <david.mao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-11-29 22:05:25 -05:00
Andrey Grodzovsky
aeab24aa9e amdgpu: Dynamicly disable BO suite "Metadata" test.
Disable the test instead of doing  #ifdef 0

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-11-29 10:31:10 -05:00
Andrey Grodzovsky
1a129004a8 amdgpu: Switch amdgpu CS tests enabling to the new way.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-11-29 10:31:00 -05:00
Rob Herring
0ab36dafaf Android: disable warnings causing errors
AOSP master has changed the build default to -Werror making all the
warnings errors. Override that with -Wno-error.

Signed-off-by: Rob Herring <robh@kernel.org>
2017-11-27 13:38:29 -06:00
Andrey Grodzovsky
18ffe485cd amdgpu: Disable deadlock test suite for Vega 10
The test stalls the CP, until RCA is done the test is
disabled to not disrupt regression testing.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
2017-11-15 23:28:45 -05:00
Andrey Grodzovsky
9ad9b7e91e amdgpu: Add memory over allocation test.
Allocates 1 TB of memory. Test is disabled by default
since it's triggers OOM killer.

v2:
FIx the test to only alloc the BO and assert if return value
not equal to -ENOMEM and remove test disable on start.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-11-14 14:26:25 +01:00
Andrey Grodzovsky
818a0d4245 amdgpu: Move memory alloc tests in bo suite.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-11-13 18:20:27 +01:00
Andrey Grodzovsky
806d080360 amdgpu: Use new suite/test disabling functionality.
Switch from disabling tests during run to using the new disable
API.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-11-13 18:20:22 +01:00
Andrey Grodzovsky
864219425d amdgpu: Add functions to disable suites and tests.
Suits are diasbled based on hooks they provide (e.g incompatible
ASIC or missing blocks). Single tests are diasbled explicitly.
Suit or test can be forced to execute even if disabled by adding -f
flag after specifying suit [test] ids.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-11-13 18:20:05 +01:00
Eric Anholt
21885876af headers: Drop outdated node about a delta in drm_mode.h.
Fixed in 9433b702fc ("headers: Sync drm{,_mode}.h with the kernel")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-11-10 12:10:19 -08:00
Eric Anholt
f696698e02 headers: Sync up kernel changes to use kernel types instead of stdint.h.
This pulls in pieces of drm-next d65d31388a23 ("Merge tag
'drm-misc-next-fixes-2017-11-07' of
git://anongit.freedesktop.org/drm/drm-misc into drm-next")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-11-10 12:10:17 -08:00
Eric Anholt
59808bcacd headers: Sync up mga_drm.h from drm-next.
The kernel started using the struct from drm.h instead of the typedef.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-11-10 12:10:15 -08:00
Eric Anholt
8affa26995 headers: Sync up some comment spelling and whitespace fixes from drm-next.
This pulls in pieces of drm-next d65d31388a23
("Merge tag 'drm-misc-next-fixes-2017-11-07' of
git://anongit.freedesktop.org/drm/drm-misc into drm-next")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-11-10 12:10:13 -08:00
Eric Anholt
8d34bba212 headers: Sync up some header guard changes from drm-next.
This pulls in pieces of drm-next d65d31388a23
("Merge tag 'drm-misc-next-fixes-2017-11-07' of
git://anongit.freedesktop.org/drm/drm-misc into drm-next")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-11-10 12:10:12 -08:00
Eric Anholt
e38de51799 headers: Sync vc4 header from drm-next.
This updates the header with the contents from drm-next d65d31388a23
("Merge tag 'drm-misc-next-fixes-2017-11-07' of
git://anongit.freedesktop.org/drm/drm-misc into drm-next")

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-11-10 12:10:09 -08:00
Christian König
931f01964a Revert "amdgpu: fix 32bit VA manager max address"
This reverts commit 944f6665de.

Accidentially pushed an imcomplete patch.

Signed-off-by: Christian König <christian.koenig@amd.com>
2017-11-09 10:36:10 +01:00
Christian König
0c2481edf7 Revert "amdgpu: use the high VA range if possible"
This reverts commit 6c0ea4b0c5.

Accidentially pushed an incomplete patch.

Signed-off-by: Christian König <christian.koenig@amd.com>
2017-11-09 10:35:44 +01:00
Christian König
6c0ea4b0c5 amdgpu: use the high VA range if possible
This frees up the low range for HMM.

Signed-off-by: Christian König <christian.koenig@amd.com>
2017-11-08 16:12:56 +01:00
Christian König
944f6665de amdgpu: fix 32bit VA manager max address
The range is exclusive not inclusive.

Signed-off-by: Christian König <christian.koenig@amd.com>
2017-11-08 16:12:29 +01:00
Christian König
a844925c8a amdgpu: sanitize 64bit VA manager
Adding the extra reservation of the 32bit space to the 64bit manager is
complete nonsense and just a waste of memory and CPU cycles.

Signed-off-by: Christian König <christian.koenig@amd.com>
2017-11-08 16:11:40 +01:00
Christian König
4b4ccaac2e amdpgu: fix coding style in amdgpu_vamgr.c
No functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
2017-11-07 15:13:30 +01:00
Emil Velikov
cfe0ae5355 freedreno: add the API fd_pipe_new2 to the symbol test
As kindly spotted by `make check'

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-11-07 11:21:32 +00:00
Inki Dae
be40710f06 exynos: change the license to X11/MIT
Change GPL license of Exynos related code to X11/MIT.

I'd like to keep a consistent license across all Exynos code
because License checker notices two more licenses exist
in libdrm.

For the license change I need to get your agree - all committers.
So please give me Acked-by if you agree with me.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
Acked-by: Hyungwon Hwang <human.hwang@samsung.com>
Acked-by: SooChan Lim <sc1.lim@samsung.com>
Acked-by: Sangjin LEE <lsj119@samsung.com>
Acked-by: Boram Park <boram1288.park@samsung.com>
Acked-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Acked-by: Joonyoung Shim <jy0922.shim@samsung.com>
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: Jan Vesely <jan.vesely@rutgers.edu>
2017-11-07 11:19:58 +00:00
Rob Clark
7064b2eae9 freedreno: submit-queue context priority
With a new-enough kernel to support prioritized submit-queues, we can
expose priority level support to mesa.  Open a submit queue associated
with the fd_pipe and pass it's id back to SUBMIT ioctl.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2017-11-04 17:23:20 -04:00
Rob Clark
62e0767b81 freedreno: sync uapi header (driver version 1.3.0)
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2017-11-04 17:23:20 -04:00
Marek Olšák
2fe4c07b38 configure.ac: bump version for release 2017-11-03 17:28:58 +01:00
Andrey Grodzovsky
f3091bac21 amdgpu: Fix wrappers for AMDGPU_VM IOCTL.
Rmove amdgpu_context_handle from the interface and use
amdgpu_device_handle instead. Uupdate VMID reservation test
accordingly.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-11-03 13:07:30 +01:00
Marek Olšák
b617f059ad configure.ac: bump version for release 2017-10-31 15:49:12 +01:00
Marek Olšák
76c325ee7d amdgpu: fix 32-bit build 2017-10-31 15:48:23 +01:00
Marek Olšák
a4b487cd80 configure.ac: bump version for release 2017-10-31 02:11:20 +01:00
Andrey Grodzovsky
33dcc29f7c amdgpu: Add VMID reservation per GPU context test.
The test will Reserve a VMID, submit a command and
unreserve the VMID.

v2:
Wrappers names were changed.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-10-27 18:26:08 +02:00
Andrey Grodzovsky
9b38ea82fc amdgpu: Add wrappers for AMDGPU_VM IOCTL.
v2:
Rename wrappers to match the IOCTL naming, fix
identation and fix make check error.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-10-27 18:25:53 +02:00
Dave Airlie
61ff9779e3 drm/syncobj: fix some whitespace issues
These had tabs, just remove them.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-25 07:44:31 +01:00
Dave Airlie
0d889201d1 drm: sync drm headers from drm-next.
This updates the headers with the contents in drm-next
at 62884cd386b876638720ef88374b31a84ca7ee5f

This adds leasing and aspect ratio.
2017-10-25 16:38:13 +10:00
Marek Olšák
e580be90e8 configure.ac: bump version to 2.4.85 2017-10-21 00:26:24 +02:00
Marek Olšák
f579747485 amdgpu: add padding to the fence to handle ioctl
copied from Dave's kernel patch.
2017-10-21 00:20:00 +02:00
Tobias Jakobi
09be54122f Add const qualifier to arguments of drmModeAddFB2()
Both drmModeAddFB2() and drmModeAddFB2WithModifiers() have some
arguments that are just pointers to uint32_t in disguise. These
are not modified (just copied) in the function, so we can add a
const qualifier here.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-10-20 23:38:54 +02:00
Andres Rodriguez
35bc82cee9 amdgpu: implement context priority for amdgpu_cs_ctx_create2 v3
Add a new context creation function that allows specifying the context
priority.

A high priority context has the potential of starving lower priority
contexts. The current kernel driver implementation allows only apps
that hold CAP_SYS_NICE or DRM_MASTER to acquire a priority above
AMDGPU_CTX_PRIORITY_NORMAL.

v2: corresponding changes for kernel patch v2
v3: Fixed 'make check' symbol error

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 21:51:02 +02:00
Andres Rodriguez
bcae7226a1 headers: Sync amdgpu_drm.h with drm-next
Generated using make headers_install from:
airlied/drm-next 282dc83 Merge tag 'drm-intel-next-2017-10-12' ...

Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-20 21:21:07 +02:00
Ville Syrjälä
ba68d7bf60 modetest: Allow full testing of primary planes
Allow the user to override the default configuration set by setcrtc
for the primary plane. On some hardware primary planes can be freely
positioned/sized, and it'd be nice if we can actually test that feature.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2017-10-19 19:16:16 +03:00
Kristian H. Kristensen
511c71c868 modetest: Decode IN_FORMATS plane blob property
This teaches modetest about the new IN_FORMATS blob and decodes the
blob to show supported formats and modifiers.

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
2017-10-18 12:32:40 -07:00
Marek Olšák
290d29d979 configure.ac: bump version to 2.4.84 2017-10-12 20:48:54 +02:00
Marek Olšák
c74d461404 amdgpu: add amdgpu_cs_fence_to_handle
v2: update amdgpu-symbol-check

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2017-10-12 20:35:57 +02:00
Marek Olšák
59aa57b363 amdgpu: add amdgpu_cs_syncobj_wait
v2: update amdgpu-symbol-check

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2017-10-12 20:35:57 +02:00
Marek Olšák
2048a9e727 drm: add drmSyncobjWait wrapper
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2017-10-12 20:35:57 +02:00
Marek Olšák
b6e24501a1 amdgpu: add sync_file import and export functions
v2: update amdgpu-symbol-check

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2017-10-12 20:35:57 +02:00
Marek Olšák
ad4df736a9 include: sync drm.h and amdgpu_drm.h with airlied/drm-next 2017-10-12 20:35:57 +02:00
Dave Airlie
d27fd2d023 headers: sync syncobj ioctl defines.
This syncs the drm.h header with my drm-next branch as of
bb7a9c8d712f37385a706a594d6edf6e6d2669d0

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-11 10:41:25 +10:00
Rob Herring
965133914b headers: sync DRM_MODE_ROTATE/REFLECT defines from kernel v4.14-rc1
Add the new DRM_MODE_ROTATE_* and DRM_MODE_REFLECT_* defines from v4.14-rc1
kernel.

Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2017-10-09 09:22:35 -05:00
Rob Herring
011fd913b4 Android: move libraries to /vendor
As part of Treble project in Android O, all the device specific files have
to be located in a separate vendor partition. This is done by setting
LOCAL_PROPRIETARY_MODULE (the name is misleading). This change will not
break existing platforms without a vendor partition as it will just move
files to /system/vendor.

Signed-off-by: Rob Herring <robh@kernel.org>
2017-10-09 09:22:35 -05:00
James Zhu
2ecafcae8a tests/amdgpu: fix uvd enc data corruption issue
In uvd encode parameter package, parameters input_pic_luma_pitch and
input_pic_chroma_pitch should be picture width align with hardware alignment.
The hardware alignment is 16 for amdgpu family earlier than AMDGPU_FAMILY_AI,
and 256 for later than and including AMDGPU_FAMILY_AI.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2017-10-06 09:40:06 -04:00
James Zhu
657b09438b tests/amdgpu: add new uvd enc support check
Query hardware IP information to find out if there are uvd encode rings
ready for use in kernel driver.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2017-10-06 09:40:06 -04:00
Andrey Grodzovsky
670db97dc3 amdgpu: Add deadlock detection test suit.
Adding initial tests for locks detection when SW
scheduler FIFO is full.

The test works by submitting a batch of identical commands which make the CP
stall waiting for condition to become true. The condition is later satisfied
form a helper thread. Other events that happen during this time
might create deadlock situations. One such example is GPU reset
triggered by this stall when  amdgpu_lockup_timeout != 0.

v2:
Increase the delay from 2 to 100 ms.
Comment out the compute test until it's working.
Typos fix.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-10-04 10:50:02 +02:00
Christian König
736ef0b61c amdgpu: make userptr unit test more interesting
Do a fork() to force some MMU callbacks.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-04 10:47:49 +02:00
Marek Olšák
1dd84e01a9 amdgpu: print error messages when amdgpu_device_initialize is failing
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-28 22:48:26 +02:00
Anuj Phogat
7c71188610 intel: Change a KBL pci id to GT2 from GT1.5
See Mesa commit 9c588ff

Cc: Matt Turner <mattst88@gmail.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2017-09-21 14:40:41 -07:00
Eric Engestrom
76418c244d freedreno/kgsl: fix pointer-to-int cast
Fixes this warning:

freedreno/kgsl/kgsl_ringbuffer.c: In function ‘kgsl_ringbuffer_flush’:
freedreno/kgsl/kgsl_ringbuffer.c:149:19: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
   req.timestamp = (uint32_t)kgsl_ring->bo->hostptr;
                   ^

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2017-09-15 17:06:29 +01:00
Philipp Zabel
6dca9387d2 etnaviv: prevent deadlock in error path
If drmPrimeFDToHandle fails in etna_bo_from_dmabuf, the function must
not return with the table_lock mutex held. Unlock the mutex in the error
path.

Based on ceb70a6b10 ("freedreno: prevent deadlock in error path").

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-09-14 10:36:07 +01:00
Jan Vesely
d55d0804f9 amdgpu: Do not write beyond allocated memory when parsing ids
Fixes crash when/usr/share/libdrm/amdgpu.ids contains ASIC_ID_TABLE_NUM_ENTRIES + 1 entries.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102432
Fixes: 7e6bf88cac (amdgpu: move asic id table to a separate file)
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2017-09-04 23:48:54 -04:00
Alex Deucher
05a830d382 tests/amdgpu: add missing header to SOURCES
Fixes the tarball generation.

fixes: 9d133dd087 (tests/amdgpu: add uvd encode unit tests)
bug: https://bugs.freedesktop.org/show_bug.cgi?id=102391
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-31 10:23:18 -04:00
Daniel Stone
f19dbb79fe configure.ac: Bump version to 2.4.83 2017-08-24 12:31:30 +01:00
Philipp Zabel
99d3f8253c etnaviv: fix etna_bo_from_name
Look up BOs from the name table using the name parameter instead of
req.handle (which at this point is always zero).

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2017-08-21 14:04:05 +01:00
Chih-Wei Huang
a0531e76f6 android: amdgpu: fix build break
Define two macros to avoid building errors.

Fixes: 7e6bf88cac (amdgpu: move asic id table to a separate file)

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2017-08-21 13:05:13 +01:00
Chih-Wei Huang
e5ce5c6807 android: add rules to build amdgpu.ids
Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
2017-08-21 13:05:13 +01:00
Jan Vesely
20138ea997 drmsltest: Check expected neighbours
Fixes: 7d8c946408
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-08-21 13:05:13 +01:00
Boyuan Zhang
9d133dd087 tests/amdgpu: add uvd encode unit tests
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2017-08-16 16:16:50 -04:00
Jason Ekstrand
7ec689a540 drm: Pull new modifier uapi into drm_fourcc and drm_mode
Reviewed-by: Daniel Stone <daniels@collabora.com>
2017-08-15 07:50:46 -07:00
Monk Liu
687d250797 amdgpu: merge and cleanup amdgpu_bo_free
since bo_reference and bo_internal_free are
all only used by bo_free, so we just merge them
together

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-08 12:16:20 -04:00
Monk Liu
2a89ae5d7a amdgpu: fix race issue between two bo functions(v2)
there is race issue between two threads on amdgpu_bo_reference and
amdgpu_bo_import, this patch tends to fix it by moving the
pthread_mutex_lock out of bo_free_internal and move to bo_reference
to cover the update_reference part.

The mutex_unlock in bo_import should also cover bo refcount
increasement.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-08 12:00:11 -04:00
Monk Liu
4d24415594 amdgpu: fix missing mutex unlock before return
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-07 15:00:06 -04:00
Eric Engestrom
ceb70a6b10 freedreno: prevent deadlock in error path
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2017-08-07 14:16:41 +01:00
Eric Engestrom
6338e452c9 freedreno/msm: remove dead error path
`ring` cannot be non-null, so the label reduces to a simple return.
Then, there is no point initialising `ring` just to overwrite it before
anyone reads it.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2017-08-07 14:16:41 +01:00
Eric Engestrom
ac2b806c45 freedreno: remove dead error path
`pipe` cannot be non-null, so the label reduces to a simple return.
Then, there is no point initialising `pipe` just to overwrite it before
anyone reads it.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2017-08-07 14:16:41 +01:00
Flora Cui
e2b6785c5a test/amdgpu: fix test failure for SI
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-04 08:27:06 -04:00
Hawking Zhang
4d0e05eb2a tests/amdgpu: bypass VCE tests on raven
raven doesn't support VCE

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-04 08:25:00 -04:00
Hawking Zhang
517df5f513 tests/amdgpu: bypass UVD CS tests on raven
raven doesn't support UVD decode

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-08-04 08:24:51 -04:00
Jan Vesely
0167e6836e amdgpu: Add FX-9800P Bristol Ridge iGPU id
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2017-08-02 11:22:13 -04:00
Eric Engestrom
053ad38487 radeon: add fallthrough annotation
GCC 7 started warning when a switch case has neither a `break` nor
a "fallthrough" comment.
Let's be explicit that we meant to fall through here.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2017-08-01 18:29:28 +01:00
Emil Velikov
3876bc246a xf86drm: continue with next device if drmProcessUsbDevice fails
Analogous to previous commit (and the rest of the codebase), simply
discard the device if we cannot parse it.

Fixes: f8484ccbd1 ("xf86drm: Add USB support")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-07-20 12:25:27 +01:00
Gurchetan Singh
5226b52773 xf86drm: continue after drmProcessPlatformDevice failure
On ChromeOS devices, readdir() processes the directory in
the following order:

-NAME-              -TYPE-
.                    n/a
..                   n/a
vgem                 n/a
card1           DRM_BUS_PLATFORM
renderD129      DRM_BUS_PLATFORM
card0             DRM_BUS_PCI
renderD128        DRM_BUS_PCI
controlD64        DRM_BUS_PCI

In drmGetDevices2, after drmProcessPlatformDevice fails for
/dev/dri/card1, we don't process the remaining directory entries.
As such, Vulkan fails to initialize since Mesa uses drmGetDevices2.
To fix this, continue if drmProcessPlatformDevice fails.

Fixes: 7b1f37f474 ("xf86drm: Add platform and host1x bus support")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil: correct the host1x platforms as well]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-07-20 12:23:58 +01:00
Lucas Stach
23e234a350 configure.ac: bump version for release
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2017-07-19 10:49:34 +02:00
Dave Airlie
e12af382b5 amdgpu: add new symbols to tests. 2017-07-19 00:40:38 +01:00
Dave Airlie
22790a65d4 drm/amdgpu: add new low overhead command submission API. (v2)
This just sends chunks to the kernel API for a single command
stream.

This should provide a more future proof and extensible API
for command submission.

v2: use amdgpu_bo_list_handle, add two helper functions to
access bo and context internals.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-07-19 00:33:14 +01:00
Dave Airlie
69532d0188 drm/amdgpu: add syncobj create/destroy/import/export apis
These are just wrappers using the amdgpu device handle.

Acked-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-07-19 00:32:53 +01:00
coypu
ac21401790 Remove redundant memclear
drmMalloc will zero out the memory for us

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-07-07 10:49:40 +01:00
Christian Gmeiner
2393acd144 etnaviv: submit full struct drm_etnaviv_gem_submit
It is safe to submit the full struct even on older kernels as such
kernels do not process the full struct. Without this change it
becomes quite challenging to extned the submit struct.

Freedreno has no special treatment too. See git commits
- freedreno: sync uapi header
- freedreno: add fence fd support

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Philipp Zabel <p.zabel@pengutronix.de>
2017-07-06 20:46:27 +02:00
Rodrigo Vivi
68da7812fc intel/intel_chipset: Move IS_9XX below IS_GEN10.
No functional change. Just organizing the code
so it gets clear for future platforms.

Paulo deserves credits becuase he was the one
that just noticed this IS_9XX was in the wrong position
after CNL patches got introduced.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2017-06-30 14:25:24 -07:00
Paulo Zanoni
3095cc8eab intel: add GEN10 to IS_9XX.
As far as I understand, IS_9XX should return true for it.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2017-06-30 08:30:48 -07:00
Ben Widawsky
5c490bd685 intel/gen10: Add missed gen10 stuff
This got lost on rebase, I believe

Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2017-06-30 08:30:43 -07:00
Rodrigo Vivi
80201d7067 intel: Add Cannonlake PCI IDs for Y-skus.
By the Spec all CNL Y skus are 2+2, i.e. GT2.

This is a copy of merged i915's
commit 95578277cbdb ("drm/i915/cnl: Add Cannonlake PCI IDs for Y-skus.")

v2: Add kernel commit id for reference.

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
2017-06-30 08:30:28 -07:00
Rodrigo Vivi
6b624bf3c3 intel: Add Cannonlake PCI IDs for U-skus.
Platform enabling and its power-on are organized in different
skus (U x Y x S x H, etc). So instead of organizing it in
GT1 x GT2 x GT3 let's also use the platform sku.

This is a copy of merged i915's
commit e918d79a5d0a ("drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.")

v2: Remove PCI IDs for SKU not mentioned in spec.
v3: Add kernel commit id for reference.

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
2017-06-30 08:30:08 -07:00
Anusha Srivatsa
4c98652cb5 intel: PCI Ids for U SKU in CFL
Add the PCI IDs for U SKU IN CFL by following the spec.

v2: Update IDs

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2017-06-29 10:51:29 -07:00
Anusha Srivatsa
2b48faf30e intel: PCI Ids for H SKU in CFL
Add the PCI IDs for H SKU IN CFL by following the spec.

v2: Update IDs

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2017-06-29 10:51:15 -07:00
Anusha Srivatsa
0733f376ae intel: PCI Ids for S SKU in CFL
Add the PCI IDs for S SKU IN CFL by following the spec.

v2: Update IDs.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2017-06-29 10:50:54 -07:00
Dave Airlie
fc4922793f libdrm: add drm syncobj create/destroy/import/export
These ioctls are now in drm next so add the first set of libdrm APIs.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-29 05:32:34 +10:00
Dave Airlie
3832374daf drm: update drm.h to latest in drm-next.
This syncs the drm.h header with my drm-next branch as of
6d61e70ccc21606ffb8a0a03bd3aba24f659502b.

It brings over the semaphore API changes.

Generated using make headers_install.
Generated from git://people.freedesktop.org/~airlied/linux drm-next commit 6d61e70ccc2.

[airlied: I split patch in two, split reviewed by across both]

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-29 05:31:23 +10:00
Dave Airlie
92b5b308ca amdgpu: sync amdgpu_drm with kernel.
This syncs the amdgpu_drm header with my drm-next branch as of
6d61e70ccc21606ffb8a0a03bd3aba24f659502b.

It brings over the VM and semaphore API changes.

Generated using make headers_install.
Generated from git://people.freedesktop.org/~airlied/linux drm-next commit 6d61e70ccc2.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-06-27 13:08:39 +10:00
Eric Anholt
b9549c954e headers: Update drm_fourcc and vc4_drm.h with new VC4 tiling UAPI.
Taken from make headers_install of drm-misc-next
(34c8ea400ff6383b028f63df2453914163afc07c)

Reviewed-by: Daniel Stone <daniels@collabora.com>
2017-06-22 10:49:00 +01:00
Xiaojie Yuan
7e6bf88cac amdgpu: move asic id table to a separate file
v2: fix an off by one error and leading white spaces
v3: use thread safe strtok_r(); initialize len before calling getline();
    change printf() to drmMsg(); add initial amdgpu.ids
v4: integrate some recent internal changes, including format changes
v5: fix line number for empty/commented lines; realloc to save memory;
    indentation changes
v6: remove a line error
v7: [Michel Dänzer]
* Move amdgpu.ids to new data directory
* Remove placeholder entries from amdgpu.ids
* Set libdrmdatadir variable in configure.ac instead of Makefile.am
  [Emil Velikov]
* Use isblank() instead of open-coding it [Emil Velikov]
* Don't leak asic_id_table memory if realloc fails [Emil Velikov]
* Check and bump table_max_size at the beginning of the while loop [Emil
  Velikov]
* Initialize table_max_size to the number of entries in data/amdgpu.ids
v8: [Michel Dänzer]
* Make sure amdgpu_asic_id.c gets rebuilt when amdgpu.ids changes

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
2017-06-13 10:21:39 +09:00
Michel Dänzer
87dac00db3 amdgpu: Add .editorconfig file for amdgpu coding style
The .editorconfig file in the toplevel directory doesn't match.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-06-13 10:20:16 +09:00
Michel Dänzer
57d67d55d3 tests/amdgpu: s/uvd_messages.h/decode_messages.h/ in Makefile.am
Fixes make distcheck with amdgpu enabled.

Fixes: ec65d19809 ("tests/amdgpu: rename uvd messages to decode
                      messages")

Trivial.
2017-06-12 17:16:47 +09:00
Tom St Denis
b6f450e065 tests/amdgpu: Fix device_id option
The device_id option [-d] was badly broken.  This commit fixes
the width (was 8 is now 16 bits) as well as enables searches
without specifying a bus id.  It was also comparing "dev" from
the bus field which is not the PCI device id.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
2017-06-06 12:14:13 -04:00
Leo Liu
16444e1061 tests/amdgpu: implement vcn dec unit tests
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2017-06-05 10:41:13 -04:00
Leo Liu
c1f5eea50f tests/amdgpu: add vcn tests support and sets
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2017-06-05 10:41:13 -04:00
Leo Liu
01096f2122 tests/amdgpu: move decode sum to common
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2017-06-05 10:41:13 -04:00
Leo Liu
1851f1b57a tests/amdgpu: separate decode messages
AVC decode messages will be common with VCN decode

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2017-06-05 10:41:13 -04:00
Leo Liu
ec65d19809 tests/amdgpu: rename uvd messages to decode messages
It will be shared with VCN decode

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2017-06-05 10:41:13 -04:00
Eric Engestrom
48aac8c6ef headers: sync drm_sarea.h with airlied/drm-next
Adds the C++ extern guards from
ebbb0e5cfd2ceb1150b1 drm: add extern C guard for the UAPI headers

Generated using `make headers_install` from airlied/drm-next
at commit 2a1720376adda5ecf8e636fbfb05339c7dad1c55

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-03 23:39:22 +01:00
Eric Engestrom
1b8db17779 headers: sync drm_fourcc.h with airlied/drm-next
This adds a bunch of modifiers stuff, as well as a few new formats.
Includes the following changes:
ebbb0e5cfd2ceb1150b1 drm: add extern C guard for the UAPI headers
b9fb2a21ac8058965a6b drm_fourcc: Document linear modifier
af913418261d6d3e7a29 drm_fourcc: Fix DRM_FORMAT_MOD_LINEAR #define
fd056f05b9fcba35b77e drm: add fourcc codes for 16bit R and RG
73f1a5858bf82f3bf232 drm/fourcc: add vivante tiled layout format modifiers
ba2b5277dc52cc96944d drm: add RGB formats with separate alpha plane
5e91144dd702d068b22a drm/tegra: Add tiling FB modifiers

Generated using `make headers_install` from airlied/drm-next
at commit 2a1720376adda5ecf8e636fbfb05339c7dad1c55

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-06-03 23:39:12 +01:00
Rob Herring
ce9e3ba6e2 Android: fix missing trailing \
In commit bbe998791d ("Android's major/minor/makedev live in
<sys/sysmacros.h>"), it didn't apply cleanly and I missed the trailing
\, so add it here.

Signed-off-by: Rob Herring <robh@kernel.org>
2017-05-28 09:34:13 -05:00
Elliott Hughes
bbe998791d Android's major/minor/makedev live in <sys/sysmacros.h>
Bug: https://github.com/android-ndk/ndk/issues/398

Signed-off-by: Rob Herring <robh@kernel.org>
2017-05-28 09:30:10 -05:00
Marek Olšák
81312f3730 Bump version to 2.4.81 2017-05-24 17:01:36 +02:00
Leo Liu
eeb51df3ce amdgpu/drm: add AMDGPU_HW_IP_VCN_ENC
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-05-23 17:43:46 -04:00
Leo Liu
5faee77272 amdgpu/drm: add AMDGPU_HW_IP_VCN_DEC
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-05-23 17:43:07 -04:00
Hawking Zhang
3f457d2a6e amdgpu: add raven family id
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-05-23 17:41:31 -04:00
Nicolai Hähnle
41be41f99e amdgpu: add missing extern "C" headers
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Xie <AlexBin.Xie@amd.com>
2017-05-16 15:45:45 +02:00
Adam Jackson
a2fa2e0869 Fix stray caller of drmCompareDevices
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-05-04 15:57:14 -04:00
Adam Jackson
7040fea028 configure: Fix the <sys/sysmacros.h> check
AC_HEADER_MAJOR only defines MAJOR_IN_SYSMACROS if major() is _not_
defined by <sys/types.h> alone. It is, but it warns, and that's ugly.
To fix this, push -Werror into CFLAGS when invoking AC_HEADER_MAJOR so
the warning makes the compilation test fail.

Reviewed-by: Emil Velikov <emil.velilkov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-05-04 14:36:55 -04:00
Adam Jackson
7c27cd7c5d Export drmDevicesEqual
drmCompareBusInfo was almost this already, but it wasn't exported, its
name didn't match its functionality, and while it almost looks like it
was usable for sorting due to memcmp it wouldn't work if you had
multiple bus types. I don't really want to think about defining a
sensible sort order for bus types, so let's at least make it less of a
trap for the caller.

Invert its boolean sense to be 'true if equal', rename it to describe
the types it actually operates on, and export.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velilkov@collabora.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-05-04 14:36:25 -04:00
Edward O'Callaghan
00aa2c1881 amdgpu: Use the canonical form in branch predicate
Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-03 21:36:02 +10:00
Eric Anholt
2ee1fd2470 Add the DPI encoder/connector types to KMS utils.
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2017-04-25 16:10:38 -07:00
Eric Anholt
d75a7ef1d7 Add pl111 as a KMS driver for utils.
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2017-04-25 16:10:33 -07:00
Ilia Mirkin
691a215799 modetest: fix printing of fourcc on BE machines
fourcc is not a string, it's a packed integer. This happens to work out
on LE, but gets reversed on BE.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2017-04-19 23:25:43 -04:00
Edward O'Callaghan
7cfcd5ef4b amdgpu/: concisely && consistently check null ptrs in canonical form
Be consistent and use the canonical form while sanity checking
null pointers, also combine a few branches for brevity.

v2: rebase on top of 'add amdgpu_cs_wait_fences' series.

Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-04-19 18:08:10 +10:00
Nicolai Hähnle
90c304584a amdgpu: add a test for amdgpu_cs_wait_fences
Signed-off-by: monk.liu <Monk.Liu@amd.com>
[v2: actually hook up the test case]
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-18 21:05:48 +02:00
Nicolai Hähnle
d8d45a4938 amdgpu: add the interface of waiting multiple fences
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
[v2: allow returning the first signaled fence index]
Signed-off-by: monk.liu <Monk.Liu@amd.com>
[v3:
 - cleanup *status setting
 - fix amdgpu symbols check
v4: simplify return from amdgpu_cs_wait_fences (suggested
    by Edward O'Callaghan)]
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com> (v1)
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> (v1)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-04-18 21:05:00 +02:00
Rob Clark
f45853802e freedreno: fix double-free on exit
Fixes: a07ae97 ("freedreno: fix device close issues")
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2017-04-15 14:43:17 -04:00
Christian Gmeiner
f02719c524 configure.ac: bump version for release
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-04-15 00:45:57 +02:00
Philipp Zabel
2f902a6844 etnaviv: add fence fd support
Add etna_cmd_stream_flush2 with in-fence fd and out-fence fd support for
explicit fencing.

v3: added etna_cmd_stream_flush2 to etnaviv/etnaviv-symbol-check

v2: renamed etna_cmd_stream_flush_explicit to etna_cmd_stream_flush2

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2017-04-12 11:58:38 +02:00
Philipp Zabel
26e51e413b etnaviv: sync uapi header
Import the etnaviv header changes from kernel commits 9ad59fea162c
("drm/etnaviv: submit support for in-fences") and 78ec187f64fa
("drm/etnaviv: submit support for out-fences") for fence fd support.

The drm_etnaviv_gem_submit structure was extended to include a flags
field, new flags for in-fence and out-fence fds and an input/output
fence fd field.

This is one-way backwards compatible because old userspace code passing
a short structure not including the flags field to new kernels will
cause the remaining fields to be zero-filled. New userspace code must
make sure to only pass the short structure to old kernels, though.

Not generated using make headers_install, since the drm/etnaviv_drm.h
uapi header is not installed yet by the kernel.
Copied from the airlied/drm-next commit 78ec187f64fa.

v2: improved commit message

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2017-04-12 11:58:33 +02:00
Eric Engestrom
3f1df25e0b intel: remove dead code
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
2017-04-10 17:17:12 +01:00
Tobias Jakobi
47521438eb exynos: add C++ support to exynos_drmif header
Add the usual extern "C" when compiling in C++ mode.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-04-08 21:33:30 +01:00
Marek Olšák
c9c77c3717 configure.ac: bump version for release 2017-04-08 21:58:46 +02:00
Samuel Pitoiset
047aba1697 amdgpu: allow to query GPU sensor related information
This exposes amdgpu_query_sensor_info().

v2: - add amdgpu_query_sensor_info() to the symbols list

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-07 17:58:54 +02:00
Daniel Stone
1142f9b30f configure.ac: bump version for release 2017-04-07 09:10:15 +01:00
Ander Conselvan de Oliveira
890d43a6a8 Add CRTC ID to vblank event
When using the atomic API, one request can span multiple CRTCs, however
one event is generated per CRTC. As we cannot disambiguate the CRTC with
user data (since we only have one piece of user data to pass in), newer
kernels can include the CRTC ID in the page flip event.

Add a new vfunc to dispatch vblank events carrying a CRTC ID to clients
who negotiate a higher interface version.

[daniels: Rebased, include new cap, call page_flip_handler if it is set
          but page_flip_handler2 isn't even on newer contexts, write a
	  commit message.]

v2: Split into separate commit.

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@intel.com>
2017-04-06 20:32:43 +01:00
Daniel Stone
e379c6a137 Headers: Sync drm{,_mode}.h with the kernel
Generated using make headers_install, based on drm-misc-next commit
5db06a8a98f515f67446a69c57577c4c363ec65d.

This clarifies the comments around modifiers such that they are
per-framebuffer rather than per-plane, adds the beginnings of aspect
ratio mode flags, link status properties, and updates the 'reserved'
field from vblank events to include the CRTC ID.

v2: Split into separate patch, pull in full kernel changes.
v3: Undo revert of connector-type enums, since it is not actually
    harmful.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-06 20:32:43 +01:00
Emil Velikov
0010d312db configure.ac: pthread-stubs is not a thing on GNU/kFreeBSD
As mentioned on the xcb mailing list, the platform uses the GLIBC
forwarding mechanism.

https://lists.freedesktop.org/archives/xcb/2016-November/010896.html

Reported-by: Andreas Boll <andreas.boll.dev@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
2017-04-05 18:11:25 +01:00
Eric Engestrom
10ca5e13a8 man: fix bug report instructions (third time's the charm)
Compile- and run-tested this time.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-04-04 18:07:29 +01:00
Eric Engestrom
294be2616e man: fix bug report instructions (for real this time)
/me derped, component libdrm doesn't exist under Mesa because it's in DRI.
While at it, give the full URL and make it https.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-04-04 17:38:38 +01:00
Eric Engestrom
33312e42a7 man: fix bug report instruction
Component "libdrm" doesn't exist (anymore?)

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-04-04 17:09:04 +01:00
Eric Engestrom
64423a7036 man/drm(7): fix typo
Reported-by: Oliver Kisielius <oliver.kisielius@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100559
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-04-04 17:00:23 +01:00
Marek Olšák
e61e999838 configure.ac: bump the version to 2.4.77 2017-04-04 11:36:00 +02:00
Emil Velikov
6312017266 configure.ac: bring back pthread-stubs check
Accidentally removed with earlier commit. Although rather than simply
adding the check for all platforms, use the same heuristics as we do in
mesa.

Namely: pthread-stubs is a thing only for BSD platforms. Everyone else
should have lightweight pthread API in their C runtime library.

Fixes: 4ecd1ef010 ("xf86drm: fix null termination of string buffer")
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2017-04-03 18:01:49 +01:00
Bernd Kuhls
6796859fcc tests/etnaviv: link against libdrm
Fixes link errors detected by buildroot autobuilders:

http://autobuild.buildroot.net/results/68a/68af62f4ab6944d326468818562c05fd5cc55b03/build-end.log

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100530
Signed-off-by: Bernd Kuhls <bernd.kuhls@t-online.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 17:57:22 +01:00
Erik Faye-Lund
e5053343de tegra: update symbol-check
I get a few more symbols in my build tegra-libraries, so let's
include these in the whitelist as well.

While we're at it, update the comment at the top.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 17:51:13 +01:00
Rob Herring
51a514c43f Android: disable pointer-arith and enum-conversion
Disable some more warnings from clang. These don't appear to be warnings
worth fixing.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 17:46:06 +01:00
Rob Herring
c4d673acdc Android: fix building of modetest and proptest
These tests depend on tests/util/ headers, but expect the include path
to be tests/.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 17:46:06 +01:00
Seung-Woo Kim
7b806e8789 xf86drm: remove memory leaks in drmGetBusid/drmGetReservedContextList
In error path of drmGetBusid() and drmGetReservedContextList(),
there are memory leaks for error path. So this removes them.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 17:46:06 +01:00
Seung-Woo Kim
2dc30dd527 tests/exynos: fix invalid code of error path in g2d test
This patch fixes invalid code of error path including NULL
deference and leak in g2d test.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 17:46:06 +01:00
Seung-Woo Kim
a398adba7c tests/exynos: remove unused-function build warning
The function g2d_blend_test() is blocked to call because of
feature unsafety. This patch blocks with proper feature name
and also blocks the function itself to remove build warning.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 17:46:06 +01:00
Seung-Woo Kim
762be6c210 exynos/fimg2d: remove unused-function build warning
The function g2d_reset() is not anymore used after the commit
e3c97d1a24 ("exynos/fimg2d: add g2d_validate_xyz() functions"),
so it should be removed.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 17:46:06 +01:00
Seung-Woo Kim
c9ef5c4a1c exynos: fix type-punned pointer build warning
As like the commit ecc2a09729 ("xf86drm: Fix type-punned pointer
build warning"), this fixes following build warning.

   exynos_drm.c: In function 'exynos_handle_event':
   exynos_drm.c:420:15: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
      e = (struct drm_event *) &buffer[i];
                  ^

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 17:46:06 +01:00
Emil Velikov
f5995751b0 amdgpu: add amdgpu_bo_va_op_raw to the symbol check
Otherwise the make check will rightfully fail.

Fixes: 4e369f25a9 ("amdgpu: add amdgpu_bo_va_op_raw")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 17:46:06 +01:00
Junwei Zhang
eead591107 amdgpu: add REPLACE and CLEAR checking for VA op (v2)
v2: fix indent

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 18:32:12 +02:00
Nicolai Hähnle
0a4626fead headers: the uint*_t vs. __u* discrepancy in amdgpu_drm is fixed
This was already done in commit 3dc002df3e ("amdgpu: sync amdgpu_drm.h
with kernel 4.11-rc2"), now update the README accordingly.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 18:32:09 +02:00
Nicolai Hähnle
f104148e40 headers: sync amdgpu_drm.h from airlied/drm-next
Changes include: PRT and preemption flags, sensor info, and some more
changes for Vega10.

Generated using make headers_install from airlied/drm-next commit
320d8c3d38739fa8e31a076b86cbdafcf8897d5e.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
2017-04-03 18:31:47 +02:00
Nicolai Hähnle
4e369f25a9 amdgpu: add amdgpu_bo_va_op_raw
This variant allows the caller full control over flags and size, and
allows passing a NULL bo (for PRT support).

Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: Jerry Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-04-03 10:11:24 +02:00
Christian Gmeiner
18fbd7f089 etnaviv: remove struct etna_specs
There is no need to cache spec values directly as library
users will cache them anyway.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2017-04-01 17:12:02 +02:00
Marek Olšák
8d61a9a923 configure.ac: bump version for release 2017-03-29 20:06:22 +02:00
Leo Liu
c7b5aaeb1f amdgpu_drm: add AMDGPU_HW_IP_UVD_ENC
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-03-27 21:45:50 +02:00
Christian König
f684bb109f amdgpu: stop reading CC_RB_BACKEND_DISABLE on Vega10
Follow up to 'drm: don't access deprecated register on Vega10'.

The same information is available in enabled_rb_pipes_mask and reading that
register can cause GRBM bus problems.

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-03-27 21:42:07 +02:00
Junwei Zhang
a784c38af7 tests/amdgpu: add Polaris12 support for cs test
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-27 21:42:07 +02:00
Leo Liu
f810e31bcf tests/amdgpu: add vce unit test support for vega10
swizzle mode needs reference and input picture luma and
chroma pitch aligned with 256

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-27 21:42:07 +02:00
Leo Liu
5a44f9e6c6 tests/amdgpu: add uvd unit test support for vega10
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-27 21:42:07 +02:00
Huang Rui
fee173dc77 tests/amdgpu: fix the count number for vega10
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-27 21:42:07 +02:00
Huang Rui
99908bfd4c amdgpu: don't read registers not present on Vega10
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-27 21:42:07 +02:00
Marek Olšák
c34b28ae9b amdgpu: update amdgpu_drm.h for Vega10
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-27 21:42:07 +02:00
Marek Olšák
3dc002df3e amdgpu: sync amdgpu_drm.h with kernel 4.11-rc2
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-27 21:42:07 +02:00
Rob Clark
a07ae97c75 freedreno: fix device close issues
Move closing the fd to after subclass ->destroy() (since it might want
to delete gem bo's, etc), and actually free() the fd_device object.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2017-03-23 15:22:30 -04:00
Rob Clark
d0dae26ca4 freedreno: valgrind support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2017-03-23 15:22:30 -04:00
Adam Jackson
b983b054d4 configure: Explicitly check for pkg-config at the top level
If you don't, then the first place the m4 expands is:

    if test "x$INTEL" != "xno"; then
	    PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10])
    fi

So on non-Intel architectures we never find it in the path, and all
subsequent PKG_CHECK_MODULESes fail. Boo autoconf.

Signed-off-by: Adam Jackson <ajax@redhat.com>
2017-03-23 12:07:03 -04:00
Rob Clark
2b7453f478 freedreno: fix potential use-after-free on a5xx+
Something that valgrind spotted:

==8441== Invalid read of size 4
==8441==    at 0x5DEE168: msm_ringbuffer_emit_reloc (msm_ringbuffer.c:506)
==8441==    by 0x5B48F0F: OUT_RELOCW (freedreno_util.h:241)
==8441==    by 0x5B48F0F: fd5_emit_blit (fd5_emit.h:131)
==8441==    by 0x5B48F0F: emit_gmem2mem_surf.isra.12 (fd5_gmem.c:450)
==8441==    by 0x5B4910F: fd5_emit_tile_gmem2mem (fd5_gmem.c:477)
==8441==    by 0x5B14943: render_tiles (freedreno_gmem.c:342)
==8441==    by 0x5B14943: fd_gmem_render_tiles (freedreno_gmem.c:416)
==8441==    by 0x5B0FBA7: batch_flush (freedreno_batch.c:281)
==8441==    by 0x5B0FBA7: fd_batch_flush (freedreno_batch.c:306)
==8441==    by 0x5B11FE7: fd_context_flush (freedreno_context.c:52)
==8441==    by 0x58AD783: st_glFlush (st_cb_flush.c:121)
==8441==    by 0x5751EE7: _mesa_make_current (context.c:1652)
==8441==    by 0x58E6A97: st_api_make_current (st_manager.c:811)
==8441==    by 0x5A2CE43: dri_unbind_context (dri_context.c:207)
==8441==    by 0x5A2C77F: driUnbindContext (dri_util.c:589)
==8441==    by 0x4AC8A67: MakeContextCurrent (glxcurrent.c:214)
==8441==  Address 0x6f5eb1c is 204 bytes inside a block of size 240 free'd
==8441==    at 0x4868F44: realloc (vg_replace_malloc.c:785)
==8441==    by 0x5DEE143: msm_ringbuffer_emit_reloc (msm_ringbuffer.c:502)
==8441==    by 0x5B48F0F: OUT_RELOCW (freedreno_util.h:241)
==8441==    by 0x5B48F0F: fd5_emit_blit (fd5_emit.h:131)
==8441==    by 0x5B48F0F: emit_gmem2mem_surf.isra.12 (fd5_gmem.c:450)
==8441==    by 0x5B4910F: fd5_emit_tile_gmem2mem (fd5_gmem.c:477)
==8441==    by 0x5B14943: render_tiles (freedreno_gmem.c:342)
==8441==    by 0x5B14943: fd_gmem_render_tiles (freedreno_gmem.c:416)
==8441==    by 0x5B0FBA7: batch_flush (freedreno_batch.c:281)
==8441==    by 0x5B0FBA7: fd_batch_flush (freedreno_batch.c:306)
==8441==    by 0x5B11FE7: fd_context_flush (freedreno_context.c:52)
==8441==    by 0x58AD783: st_glFlush (st_cb_flush.c:121)
==8441==    by 0x5751EE7: _mesa_make_current (context.c:1652)
==8441==    by 0x58E6A97: st_api_make_current (st_manager.c:811)
==8441==    by 0x5A2CE43: dri_unbind_context (dri_context.c:207)
==8441==    by 0x5A2C77F: driUnbindContext (dri_util.c:589)
==8441==  Block was alloc'd at
==8441==    at 0x4868F44: realloc (vg_replace_malloc.c:785)
==8441==    by 0x5DEE08B: msm_ringbuffer_emit_reloc (msm_ringbuffer.c:481)
==8441==    by 0x5B48F0F: OUT_RELOCW (freedreno_util.h:241)
==8441==    by 0x5B48F0F: fd5_emit_blit (fd5_emit.h:131)
==8441==    by 0x5B48F0F: emit_gmem2mem_surf.isra.12 (fd5_gmem.c:450)
==8441==    by 0x5B4909F: fd5_emit_tile_gmem2mem (fd5_gmem.c:465)
==8441==    by 0x5B14943: render_tiles (freedreno_gmem.c:342)
==8441==    by 0x5B14943: fd_gmem_render_tiles (freedreno_gmem.c:416)
==8441==    by 0x5B0FBA7: batch_flush (freedreno_batch.c:281)
==8441==    by 0x5B0FBA7: fd_batch_flush (freedreno_batch.c:306)
==8441==    by 0x5B11FE7: fd_context_flush (freedreno_context.c:52)
==8441==    by 0x58AD783: st_glFlush (st_cb_flush.c:121)
==8441==    by 0x5751EE7: _mesa_make_current (context.c:1652)
==8441==    by 0x58E6A97: st_api_make_current (st_manager.c:811)
==8441==    by 0x5A2CE43: dri_unbind_context (dri_context.c:207)
==8441==    by 0x5A2C77F: driUnbindContext (dri_util.c:589)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2017-03-21 10:03:55 -04:00
Chris Wilson
19c4cfc549 intel: Add handle to hashtable before freeing along an error path
drm_intel_gem_bo_free() unconditionally attempts to remove the handle
from the hashtable. This goes horribly wrong if we haven't already added
the bo to the hashtable.

Reported-by: Michael Thayer <michael.thayer@oracle.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-03-08 21:03:22 +00:00
Thomas Hindoe Paaboel Andersen
5ee9cb4b4b intel: avoid null pointer dereference
Move the dereference after the null check.
Fixes: 028715ee70 ("intel: Avoid the need for most overflow
                              checks by using a scratch page.")
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2017-02-28 13:38:09 +00:00
Eric Engestrom
1bf96af525 autogen.sh: run git commands in the (potentially) git dir
If the build dir is outside of the git dir, the order matters :)

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-28 13:34:26 +00:00
Eric Engestrom
a6cdfa5cd8 autogen.sh: don't print old git-config values
Old values are of no interest to the user, so let's reduce the spam
a bit by hiding those.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-28 13:34:26 +00:00
Emil Velikov
f6499b1153 headers: add explicit note against local changes in the README
Even with the step by step guide people sometimes get confused.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-02-14 01:35:56 +00:00
Chris Wilson
ec80fd36a7 intel: Move 48b support to bo_gem->kflags
Another boolean that can be set and used along side the other execobject
flags.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-02-11 11:05:42 +00:00
Chris Wilson
e0f05b2fad intel: Move is_softpin to obj->kflags
Use obj->kflags to set EXEC_OBJECT_PINNED when the object is softpinned,
and so remember to clear the softpin status when the object is freed
(and reused).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-02-11 11:02:06 +00:00
Alex Xie
fe7cb34eda amdgpu: vamgr can be a struct instead of a pointer
vamgr is an integral part of amdgpu_device. We don't need to calloc and free it.
This can save CPU time, reduce heap fragmentation.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
[Grazvydas Ignotas: rebase, correct a typo in commit message]
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-02 15:22:53 -05:00
Alex Xie
067e9a1d47 amdgpu: vamgr_32 can be a struct instead of a pointer
vamgr_32 is an integral part of amdgpu_device. We don't need to calloc and free it.
This can save CPU time, reduce heap fragmentation.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
[Grazvydas Ignotas: rebase, correct a typo in commit message]
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-02 15:22:45 -05:00
Alex Xie
7a03cdf6a7 amdgpu: Free/uninit vamgr_32 in theoretically correct order
vamgr_32 is a region inside general VAM range. It is better to free and
deinitialize it before general VAM range.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-02-02 15:22:07 -05:00
Emil Velikov
07edf5d905 Remove unused tests/drmstat.c
Earlier commit removed all the legacy 'tests' but a file was left
danglig.

Fixes: 0c80fddd1d "tests: remove useless legacy tests"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reported-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Andreas Boll <andreas.boll.dev@gmail.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2017-02-01 22:09:42 +00:00
Chad Versace
d4b8344363 Bump version for 2.4.75 release
For Intel explicit fencing.

Signed-off-by: Chad Versace <chadversary@chromium.org>
2017-01-28 11:14:18 +10:00
Dave Airlie
0ad0c12fd3 intel: fix make distcheck
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-01-28 11:13:59 +10:00
Dave Airlie
ab5a963556 Revert "Bump version for 2.4.75 release"
This reverts commit 736970c49b.
2017-01-28 11:13:40 +10:00
Chad Versace
736970c49b Bump version for 2.4.75 release
For Intel explicit fencing.

Signed-off-by: Chad Versace <chadversary@chromium.org>
2017-01-27 13:07:03 -08:00
Chris Wilson
dfd536c60d intel: Export a function to re-enable implicit synchronisation
Implicit synchronisation is the default behaviour of the kernel when
rendering with an execobject. It may be disabled with
drm_intel_gem_bo_disable_implicit_sync(), and then to restore it use
drm_intel_gem_bo_enable_implicit_sync().

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-01-27 20:25:04 +00:00
Chris Wilson
22cfd04311 intel: Clear execobject flags before preserving object in reuse cache
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-01-27 20:20:30 +00:00
Chris Wilson
c4b00767a7 intel: Support passing of explicit fencing from execbuf
Allow the caller to pass in an fd to an array of fences to control
serialisation of the execbuf in the kernel and on the GPU, and in return
allow creation of a fence fd for signaling the completion (and flushing)
of the batch. When the returned fence is signaled, all writes to the
buffers inside the batch will be complete and coherent from the cpu, or
other consumers. The return fence is a sync_file object and can be
passed to other users (such as atomic modesetting, or other drivers).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-01-27 20:00:38 +00:00
Chris Wilson
1bd35da961 intel: Allow the client to control implicit synchronisation
The kernel allows implicit synchronisation to be disabled on individual
buffers. Use at your own risk.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-01-27 20:00:38 +00:00
Chris Wilson
a3d715ee14 Import uapi/i915_drm.h from v4.10-rc5-950-g152d5750dda9
To sync with "drm/i915: Support explicit fencing for execbuf"
2017-01-27 20:00:38 +00:00
Alex Xie
8a89d5f620 amdgpu: A new option to run tests on render node
Tested:
1. As root, tests passed on primary.
2. As root, tests passed on render node.
   BO export/import test was skipped
3. As non-privileged user, tests failed on primary as expected.
4. As non-privileged user, tests passed on render node.
   BO export/import test was skipped

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:56:23 -05:00
Alex Xie
12dd7a2e9c amdgpu: A new option to choose which device to run most tests
This can be used to test multiple GPUs

v2: Use PCI bus ID and optional PCI device ID to choose device
    Add an option to display information of AMDGPU devices

Tested:
   ./amdgpu_test -p
   ./amdgpu_test
   ./amdgpu_test -b 1 #fail as expected
   ./amdgpu_test -b 6 #pass
   ./amdgpu_test -b -d 1 #fail as expected
   ./amdgpu_test -b -d 0 #pass

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:55:28 -05:00
Alex Xie
5e0f7c5c65 amdgpu: verify the tested device
Verify the vender ID and driver name.
Open all AMDGPU devices.
Provide an option to open render node.

Tested as root: PASS
Tested as non-privileged user:
All tests failed as expected

v2: Return value in the ene of function amdgpu_open_devices.
    Check the return value of amdgpu_open_devices.
    amdgpu_test is not for USB device for the time being.
    Get the name of node from function drmGetDevices2.
    Drop the legacy drmAvailable() from the test.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-27 11:53:26 -05:00
Tomasz Figa
8ef7e5b702 tests: Use -pthread in CFLAGS instead of -lpthread
-lpthread is not always a valid flag to pull pthread support, especially
on Android it will fail to link due to a missing libpthread.so. The more
generic way to build-in pthread support is to use the -pthread CFLAG, so
let's use it instead.

Signed-off-by: Tomasz Figa <tfiga@chromium.org>
[Emil Velikov: rebase on top of previous commit]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-01-27 16:18:02 +00:00
Emil Velikov
58459a57fa tests/nouveau: automake: fold C and CPP flags
Since we don't have any C++ souces this should be a no-op. Folding the
two seems to be the common practise throughout the repo.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-01-27 16:15:45 +00:00
Emil Velikov
9c924e8235 android: silence ~550 warnings
Analogous to the autoconf build add the following to the build

   -Wno-unused-parameter
   -Wno-missing-field-initializers

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2017-01-27 15:48:16 +00:00
Emil Velikov
ff38457e0f android: add note about command line defines and config.h
Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2017-01-27 15:48:16 +00:00
Emil Velikov
fc05e89b6f android: add HAVE_VISIBILITY to Android.common.mk
Currently only libdrm.so properly annotates its internal/private
symbols. By setting the macro every binary produced will be in the same
boat. This should give is smaller and more secure files

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2017-01-27 15:48:16 +00:00
Emil Velikov
03d2e91d00 android: introduce Android.common.mk to reduce boilerplate
... across the makefiles. Currently this isn't much but that will change
shortly.

As an added bonus this fixes all present and future cases where we've
forgotten to strip out the headers from LOCAL_SRC_FILES.

In a couple of cases (the tests) we start setting
LOCAL_EXPORT_C_INCLUDE_DIRS, which shouldn't be an issue.

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2017-01-27 15:48:16 +00:00
Emil Velikov
de5b41ef5a android: remove LOCAL_MODULE_TAGS := optional tag
Seems to be the default option since ~2009 with commit 2f31293ba78 "auto
import from //branches/cupcake/...@137197". Fleshed out from a larger
commit in the AOSP repo/fork.

Cc: Dan Willemsen <dwillemsen@google.com>
Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2017-01-27 15:47:13 +00:00
Thierry Reding
5403cb39c1 xf86drm: Reuse sysfs_uevent_get()
Recent patches for USB, platform and host1x bus support introduced the
sysfs_uevent_get() function that provides a generic way of parsing the
sysfs uevent file that is associated with each device in Linux.

Open-coded variants of this still exist in other places, so make those
reuse the new function to remove some code duplication.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-20 16:27:33 +01:00
Thierry Reding
13b99f2a89 tests/drmdevice: Add USB, platform and host1x support
Extend the drmdevice test with support for the newly added USB, platform
and host1x busses.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-20 16:27:33 +01:00
Thierry Reding
7b1f37f474 xf86drm: Add platform and host1x bus support
ARM SoCs usually have their DRM/KMS devices on the platform bus, so add
support for that to enable these devices to be used with the drmDevice
infrastructure.

NVIDIA Tegra SoCs have an additional level in the hierarchy and DRM/KMS
devices can also be on the host1x bus. This is mostly equivalent to the
platform bus.

v4:
- continue on error to process platform or host1x device

v3:
- guard Linux-specific sysfs parsing code with #ifdef __linux__

v2:
- be careful not to overflow the full name
- read compatible strings into device info

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-20 16:27:20 +01:00
Thierry Reding
f8484ccbd1 xf86drm: Add USB support
Allow DRM/KMS devices hosted on USB to be detected by the drmDevice
infrastructure.

v4:
- continue on error to process USB devices

v3:
- guard Linux-specific sysfs parsing code with #ifdef __linux__

v2:
- make sysfs_uevent_get() more flexible using a format string

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-01-20 16:25:53 +01:00
Thierry Reding
2e57bba870 xf86drm: Factor out drmDeviceAlloc()
Subsequent patches will add support for other bus types to drmDevice and
they will duplicate a lot of the code to allocate a drmDevice. Factor
out the common code so it can be reused.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-20 16:25:35 +01:00
Neil Armstrong
9e4c686aa3 tests/util: Add support for meson module
Add support for Amlogic Meson DRM driver merged for Linux 4.10.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-19 10:18:33 +01:00
Thierry Reding
ecc2a09729 xf86drm: Fix type-punned pointer build warning
CC       libdrm_la-xf86drmMode.lo
    ../xf86drmMode.c: In function 'drmHandleEvent':
    ../xf86drmMode.c:854:15: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
       e = (struct drm_event *)(&buffer[i]);
                   ^

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99350
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-18 08:34:53 +01:00
Thierry Reding
4bfbe4c69e xf86drmMode.h: Add DisplayPort MST and DPI encoders/connectors
This brings xf86drmMode.h in sync with include/drm/drm_mode.h.
Eventually we really should only have a single set of definitions rather
than duplicating this in two files.

v2: add DPI encoder and connector types introduced in Linux v4.7

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-18 08:34:49 +01:00
Thierry Reding
ab50ffbc70 xf86drmMode.h: Use consistent padding
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-18 08:34:36 +01:00
Fabio Estevam
5856a5868c README: Fix grammar
Fix two grammar issues:

- "standard  autotools  packages ---> "standard  autotools  package"
- "If you are install" ---> "If you are installing"

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-01-16 14:54:45 +00:00
Taro Yamada
4ecd1ef010 xf86drm: fix null termination of string buffer
The string written to the buffer by read() is not null-terminated,
but currently drmParsePciBusInfo() places null character only at the end of the buffer, not at the end of the
string.
As a result, the string passed to sscanf() contains an uninitialized value.

This patch changes to places null character at the end of the string.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99045
Signed-off-by: Taro Yamada <archer_ame@yahoo.co.jp>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2017-01-16 14:41:36 +00:00
Dongwon Kim
44f220ad62 intel: update global_name before HASH_ADD
bo->global_name should be updated first before a hash value
for the entry is calculated with it by HASH_ADD macro.

Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2017-01-15 20:15:37 +00:00
Alex Xie
e1ee01a758 amdgpu: Provide more specific error message if non-privileged user runs amdgpu_test
Before this change, the error message is:
"WARNING - Suite initialization failed..."
People might think this is a driver problem.

Tested with non-privileged user. Now the error message is like:
...
Error:Permission denied. Hint:Try to run this test program as root.
WARNING - Suite initialization failed for 'Basic Tests'.
...

Tested as root with no regression.

amdgpu_test uses CUnit. CUnit outputs warning message to stdout.
To be consistent, this commit outputs error message to stdout.

v2: Use strerror instead of %m. %m is a GNU C Library extension.
v3: Limit code and commit message within 80 characters per line.
    Update commit message.
    Remove a space before starting parenthesis in function call.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-01-13 10:35:43 -05:00
Thierry Reding
885624b0b9 Add .editorconfig
This encodes the indentation style for libdrm and can be used with
various editors. See http://editorconfig.org for instructions.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-12 22:40:59 +01:00
Thierry Reding
e17cad1994 xf86drm: Fix indentation
libdrm uses spaces for indentation. Fix the two inconsistent lines in
this file.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-01-12 22:40:41 +01:00
Jonathan Gray
eebefaf72c xf86drm: don't fatal on per device error in drmGetDevice[s]2
When iterating over all the device nodes if drmProcessPciDevice()
returned an error for any node the function would return an error,
ignoring any valid nodes.

The result of this on OpenBSD where drmProcessPciDevice() results in
device nodes being opened to issue ioctls to get pci data
was that data obtained from /dev/drm0 would be ignored if /dev/drm1
could not be opened.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
2016-12-24 17:06:58 +00:00
Jonathan Gray
e2e766d5ac xf86drm: add a non-sysfs version of drmGetDeviceNameFromFd2
Implement a generic drmGetDeviceNameFromFd2() to use on non-linux
systems without sysfs.

v2: remove min < base test as requested by Emil

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
2016-12-24 17:06:53 +00:00
Jonathan Gray
d5cf3f9831 xf86drm: adjust device node path for minor base
When constructing a path to a device node the minor number retrieved
from fstat needs to have the offset of the node type subtracted from it.
Control and render node types have the same major as the primary node
but each has their own block of minor types at fixed offsets.

v2: remove min < base test as requested by Emil

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
2016-12-24 17:06:49 +00:00
Ville Syrjälä
e3af5368b2 modetest: Allow the user to specify the plane ID
Devices can have multiple planes, so allow the user to choose between
them.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2016-12-19 15:14:07 +02:00
Seung-Woo Kim
a07cf7f08d libkms/exynos: fix memory leak in error path
This patch fixes memory leak in error path of exynos_bo_create().

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2016-12-14 17:10:51 +00:00
Emil Velikov
0645648dd0 autogen.sh: set format.subjectPrefix and sendemail.to if needed
Just set the rules automatically rather than asking each contributor to
update thing locally.

v2: Silence errors if run outside of git repo. (Eric)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2016-12-14 17:10:51 +00:00
Grazvydas Ignotas
3bc14c8cb9 xf86drm: fix sign-compare warning
xf86drm.c:3601:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     while (expected < sizeof(match)) {
                     ^

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-12-12 14:01:19 +00:00
Jonathan Gray
0825792723 xf86drm: implement an OpenBSD specific drmGetDevice2
DRI devices on OpenBSD are not in their own directory.  They reside in
/dev with a large number of statically generated /dev nodes.

Avoid stat'ing all of /dev on OpenBSD by implementing this custom path.

v2:
   - use drmGetMinorType to get node type
   - adapt to drmProcessPciDevice changes
   - verify drmParseSubsystemType type is PCI
   - add a comment describing why this was added

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-12-05 17:53:11 +00:00
Jonathan Gray
fd190564da xf86drm: implement drmParsePciBusInfo for OpenBSD
Implement drmParsePciBusInfo for OpenBSD by using the new
DRM_IOCTL_GET_PCIINFO ioctl.

v2: use drmGetMinorType to get node type instead of always
    using DRM_NODE_PRIMARY.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-12-05 17:53:05 +00:00
Jonathan Gray
c0ef1d0788 xf86drm: implement drmParsePciDeviceInfo for OpenBSD
Implement drmParsePciDeviceInfo for OpenBSD by using the new
DRM_IOCTL_GET_PCIINFO ioctl.

v2: adapt to drmParsePciDeviceInfo changes and use drmOpenMinor

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-12-05 17:53:00 +00:00
Jonathan Gray
d05b9f2dde xf86drm: implement drmParseSubsystemType for OpenBSD
Implement drmParseSubsystemType for OpenBSD by always returning
DRM_BUS_PCI.  No non-pci drm drivers are in the kernel and this is
unlikely to change anytime soon as the existing ones aren't permissively
licensed.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-12-05 17:52:53 +00:00
Jonathan Gray
f189011b36 xf86drm: implement drmGetMinorNameForFD for non-sysfs
Implement drmGetMinorNameForFD for systems without sysfs by
adapting drm_get_device_name_for_fd() from the Mesa loader.

v2: use type parameter to select dev name instead of always
    using DRM_DEV_NAME

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-12-05 17:52:46 +00:00
Emil Velikov
5c1c91b3d3 tests: automake: reorder makefile contents
Purely cosmetic changes.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-12-05 17:24:32 +00:00
Emil Velikov
0ec7252a1d configure: remove libudev checks
Library is no longer used.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-12-05 17:24:25 +00:00
Emil Velikov
9b05d40399 kms: remove commented out libudev code
Cc: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-12-05 17:24:03 +00:00
Emil Velikov
0c80fddd1d tests: remove useless legacy tests
All of these 'tests' cover UMS functionality which is neither being
worked on or actively maintained.

The only cases where developers touch UMS code is to unwrap it from the
KMS codepaths and ensure that those are secure.

Anyone who feels strong about having these around can revive them, but
in all honestly do consider _seriously_ what you're doing ;-)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-12-05 17:23:45 +00:00
Emil Velikov
b305238ceb tests/drmdevice: use drmGetDevice[s]2
Pass along DRM_DEVICE_GET_PCI_REVISION only when the individual nodes
are opened and update the printed messages accordingly.

v2: Attribute for the flag rename, call drmGetDevices2 w/o the flag.

v3: Keep drmParsePciDeviceInfo() hunk in previous patch.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-12-05 17:22:52 +00:00
Emil Velikov
11687bf418 xf86drm: introduce drmGetDevice[s]2
Relative to the original version, here one can provide a flags bitmask.
Currently only DRM_DEVICE_IGNORE_PCI_REVISION is supported.

Implementation detail:
If it's set, we will only parse the separate sysfs files and we won't
touch the config one. The latter awakes the device (causing delays)
which is the core reason why this API was introduced.

v2:
 - Initialize revision to 0xff if it's unread.
 - Change DRM_DEVICE_IGNORE_PCI_REVISION to DRM_DEVICE_GET_PCI_REVISION
 - Add explicit note that drmGetDevice[s]2 does not retrieve the
revision by default.

v3:
 - Correctly fold drmParsePciDeviceInfo() hunk in this patch.

Cc: Michel Dänzer <michel@daenzer.net>
Cc: Nicolai Hähnle <nhaehnle@gmail.com>
Cc: Mauro Santos <registo.mailling@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98502
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-12-05 17:21:56 +00:00
Emil Velikov
aae3f318d5 xf86drm: parse the separate sysfs files for vendor... info
Up-to recently (patch should land in 4.10) the kernel did not expose the
PCI device revision field as a separate sysfs file.

Thus one needed too parse the config file to retrieve it. This in
itself wakes up the device, which in some cases can be quite slow.

To avoid that, just check for the separate files and fall-back to the
original if kernel is not new enough.

v3: rework alongside drmGetDevice[s]2

Cc: Michel Dänzer <michel@daenzer.net>
Cc: Nicolai Hähnle <nhaehnle@gmail.com>
Cc: Mauro Santos <registo.mailling@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98502
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-12-05 17:21:23 +00:00
Emil Velikov
138d23117c xf86drm: add plumbing to not retrieve PCI device revision
Will be used with the drmGetDevice[s]2 API.

Cc: Michel Dänzer <michel@daenzer.net>
Cc: Nicolai Hähnle <nhaehnle@gmail.com>
Cc: Mauro Santos <registo.mailling@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98502
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-12-05 17:17:35 +00:00
Emil Velikov
b40a65d448 xf86drm: use maj/min in drmParsePciDeviceInfo()
Be consistent with drmParsePciBusInfo() and use solely the device
major/minor pair.

Cc: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-12-05 17:17:22 +00:00
Robert Bragg
dae413e438 Bump version for release 2016-11-29 10:42:38 +00:00
Eric Anholt
a8315834a9 vc4: Add new GETPARAMs that have been merged to drm-next.
Signed-off-by: Eric Anholt <eric@anholt.net>
2016-11-28 10:24:22 -08:00
Rob Clark
23d10b8244 freedreno: 64bit support
a5xx and later are 64bit devices.. make reloc's handle that.  A new
public symbol is introduced to avoid silent problems with new mesa and
old libdrm (since on 64b reloc consumes two dwords).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-11-26 12:51:38 -05:00
Christian Gmeiner
d15515aea3 etnaviv: add etna_pipe_wait_ns(..)
We need to pass through a timeout parameter to implement
pipe->fence_finish() properly. The new fxn accepts a timeout
in nanoseconds. Simplify etna_pipe_wait(..) by using
etna_pipe_wait_ns(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-11-24 20:08:50 +01:00
Christian Gmeiner
4f750ec756 etnaviv: change get_abs_timeout(..) to use ns.
Also update all callers.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-11-24 20:08:45 +01:00
Grazvydas Ignotas
1924b6704a libdrm: random typo fixes
Just some trivial boring typo fixes all over the tree.
READMEs and comments only.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-11-22 13:54:31 +00:00
Grazvydas Ignotas
1fc32f1cc5 tests: kms: fix shadowed declaration warning
There is no need to maintain the value in the shadowed variable from
what I can see.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-11-22 13:54:31 +00:00
Emil Velikov
37d790f7d4 xf86drm: introduce drmGetDeviceNameFromFd2
The original version considered only card devices, while this will pick
the device/node name regardless - card, control, renderD, other...

Current implementation is "linux" specific, in such that it relies on
sysfs/uevent file. At the same time this gives us the flexibility to
support any nodes even future ones, as long as they're within DRM_MAJOR.

Shamelessly copied from mesa, latter by: Gary Wong <gtw@gnu.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-22 13:54:23 +00:00
Emil Velikov
7e0bc3bf1c automake: make the build less chatty
Having the "Entering|Leaving directory X" messages it not required nor
useful in vast majority of the cases.

One can always have them printed by `make -w' or by overriding the
AM_MAKEFLAGS variable.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-11-22 13:54:23 +00:00
Michel Dänzer
911280cb4a intel: Add drm_intel_gem_context_get_id to intel-symbols-check
Fixes make check. Trivial.
2016-11-22 15:48:12 +09:00
Robert Bragg
770f6bc424 intel: Add a getter for the intel_context ctx_id
Exposing the u32 context ID makes it possible to define new drm kernel
interfaces based on the same IDs that e.g. execbuf uses to identify a
gem context, that aren't themselves abstracted by libdrm but need to be
used by libdrm/drm_intel_context based clients such as (parts of) i-g-t
or Mesa.

For example this can be used to configure an i915-perf stream to collect
metrics for a specific context.

v2: s/drm_intel_gem_context_get_context_id/drm_intel_gem_context_get_id/

Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
2016-11-21 16:33:55 +00:00
Christian Gmeiner
befb6429f0 etnaviv: add API to create etna_device from private dup() fd
Like etna_device_new() but creates it's own private dup() of the fd
which is close()d when the device is finalized.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
2016-11-20 15:58:28 +01:00
Christian Gmeiner
a14d6a6a43 etnaviv: add API to get drm fd from etna_device
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
2016-11-20 15:58:08 +01:00
Ben Widawsky
3e81f8b7b9 intel: Add Geminilake PCI IDs
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-11-18 15:57:55 -08:00
Emil Velikov
317bdff14a Bump version for release 2016-11-14 19:53:04 +00:00
Emil Velikov
f53d3542c1 xd86drm: read more than 128 bytes of uevent in drmParsePciBusInfo
Some platforms (such as Macs using OF) can have more information in the
uevent file thus reading only the first 128 might not be sufficient.

Bump it to 512, which "should be enough for everybody" ;-)

v2: Use sizeof(data)-1 over hardcoded number (Eric).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98629
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reported-by: Mingcong Bai <jeffbai@aosc.xyz>
Tested-by: Mingcong Bai <jeffbai@aosc.xyz> (v1)
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
2016-11-14 19:53:04 +00:00
Emil Velikov
de13ea3877 headers: Add README file
Since we're trying to standardise and make things more consistent in
the area, add a basic README which covers some of the more popular
topics.

v2:
 - Drop drm-misc (Daniel Vetter)
v3:
 - Elaborate on when and which headers to update
 - Add a list of headers and the respective "issues"
 - Add file to EXTRA_DIST

Cc: Dave Airlie <airlied@redhat.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v1)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-11-14 19:52:38 +00:00
Matt Turner
8cf431271a Bump version for release 2016-11-14 10:40:59 -08:00
Matt Turner
b91bcbf6ab freedreno: Add fd_ringbuffer_flush2 to symbol check. 2016-11-14 10:40:59 -08:00
Matt Turner
01db192f97 amdgpu: Add amdgpu_asic_id.h to Makefile.sources. 2016-11-14 10:40:59 -08:00
Matt Turner
51002c0440 intel: Add uthash.h to Makefile.sources. 2016-11-14 10:40:59 -08:00
Neil Roberts
319108f947 intel: Allow some codenames in INTEL_DEVID_OVERRIDE
As well as allowing a hexadecimal PCI ID number, the
INTEL_DEVID_OVERRIDE environment variable can now contain one of a few
short codenames. The codenames are stored in a small table to map them
to a corresponding PCI ID. This makes it easier to use without having
to look up the PCI IDs manually.

The PCI IDs used are the same as those chosen for the -p option of
run.c in shader-db but SKL has been added as well.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2016-11-14 10:40:58 -08:00
Junwei Zhang
670f1e4fda amdgpu: add the function to get the marketing name (v4)
This function is used to look up the marking name
for a specific board.

v2: agd: Squash in subsequent updates to the table.
v3: [Michel Dänzer]
* Make amdgpu_asic_id_table static, so it's not exported from
  libdrm_amdgpu.so.1
* Add amdgpu_get_marketing_name to amdgpu-symbols-check
* Fix indentation of second line of if statement
* Squash in another change removing redundant entries
* Change spelling of "RADEON" -> "Radeon"
* Remove "(TM)" from a minority of entries
v4: [Michel Dänzer]
* Use const char* instead of fixed size array for marketing_name (Emil
  Velikov)

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Flora Cui <Flora.Cui@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-07 17:44:27 +09:00
Rob Clark
e9eb44b45b freedreno: add fence fd support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-11-05 10:18:44 -04:00
Rob Clark
9270d984cd freedreno: sync uapi header
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-11-05 10:17:54 -04:00
Rob Clark
f803a45e74 add libsync.h helper
Rather than cut/pasting these couple ioctl wrappers everywhere, just
stuff them as static-inline into a header.

This is probably mostly used from mesa, but some drivers, test apps, etc
may also want to use it from libdrm.

v2: handle EINTR, add sync_accumulate() based on #dri-devel discussion,
    etc

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-11-05 10:16:46 -04:00
Alex Deucher
6493860d70 amdgpu: check parameters in amdgpu_query_gpu_info
Make sure they aren't NULL.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=97993

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-31 16:37:10 -04:00
Chris Wilson
fe4579e263 intel: Look prime handle up in handle hash table
A slightly confused copy'n'paste from the open path where we pass in
handle but use it as a global name, in the prime handle-from-fd pass we
pass in handle and do mean handle!

References: https://bugs.freedesktop.org/show_bug.cgi?id=98416
Fixes: 2f23bf1b7b89 ("intel: Migrate handle/name lookups from linear lists...")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-10-24 21:19:52 +01:00
Michel Dänzer
ec39fe07e7 intel: Add new symbols to intel-symbol-check
Fixes make check.

Trivial.
2016-10-24 11:14:36 +09:00
Chris Wilson
9e24d0c54b intel: Migrate handle/name lookups from linear lists to hashtables
Walking a linear list to find a matching PRIME handle or flinked name
does not scale and becomes a major burden with just a few objects.
That said, the fixed size hash is not much better, it just buckets the
look into a few separate chains rather than one long one.

References: https://bugs.freedesktop.org/show_bug.cgi?id=94631
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-10-22 09:32:54 +01:00
Chris Wilson
455e9b4917 intel: Export raw GEM mmap interfaces
Export a set of interfaces to allow the caller to have precise control
over mapping the buffer - but still provide caching of the mmaps between
callers.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-10-22 09:32:54 +01:00
Eric Anholt
2d8c01f256 Silence runtime complaints on platform devices
glxgears was spamming this 12 times at startup because of Mesa's
probing of the DRM device code, which doesn't support platform
devices.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-21 12:50:56 -07:00
Rob Herring
677cd97dc4 Return an -ENODEV from drmGetDevice() when no device was found.
Fixes crashes in Mesa on platform devices, which expected *device to
have a device when 0 was returned.

(code from a paste by Rob, commit message by anholt)

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-10-21 12:50:50 -07:00
Michel Dänzer
7dd28475f1 Add drmModePageFlipTarget
It supports the DRM_MODE_PAGE_FLIP_TARGET_* flags.

Acked-by: Daniel Vetter <daniel@ffwll.ch>
2016-10-19 18:31:37 +09:00
Michel Dänzer
9433b702fc headers: Sync drm{,_mode}.h with the kernel
Generated using make headers_install, based on linus master commit
b67be92feb486f800d80d72c67fd87b47b79b18e.

Acked-by: Daniel Vetter <daniel@ffwll.ch>
2016-10-13 16:53:36 +09:00
Rob Clark
a44c9c31b7 Bump version for release
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-10-03 20:46:19 -04:00
Leo Liu
207efb16ea tests/amdgpu: update vce encRefPic addr mode to tiled
Adapt to recent firmware update, it's also compatible with previous
firmware version

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-09-30 14:28:03 -04:00
Kristian H. Kristensen
abfa680dbd Add drmModeAddFB2WithModifiers() which takes format modifiers
The only other user of this feature open codes the ioctl. Let's add an
entry point for this to libdrm.

Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
2016-09-28 03:32:23 -07:00
The etnaviv authors
0659558f64 libdrm: add etnaviv tests
This adds the following basic unit tests:

- etnaviv_2d_test
  Let the 2D core render a defined pattern into a bo
  and store it as bmp.

- etnaviv_bo_cache_test
  Basic tests to validate the bo-cache behavior.

- etnaviv_cmd_stream_test
  Tests for the etna_cmd_stream API.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2016-09-17 15:05:33 +02:00
The etnaviv authors
95e2cc6a80 libdrm: add etnaviv drm support
Add the libdrm_etnaviv helper library to encapsulate etnaviv-specific
interfaces to the DRM.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Rob Herring <robh@kernel.org>
2016-09-17 15:05:25 +02:00
Michel Dänzer
2d00869599 intel: Add new symbols to intel-symbol-check
Fixes make check.

Trivial.
2016-09-08 15:19:49 +09:00
Yang Rong
98887140e3 intel: Export pooled EU and min no. of eus in a pool.
Update kernel interface with new I915_GETPARAM ioctl entries for
pooled EU and min no. of eus in a pool. Add a wrapping function
for each parameter. Userspace drivers need these values when decide
the thread count. This kernel enabled pooled eu by default for BXT
and for fused down 2x6 parts it is advised to turn it off.

But there is another HW issue in these parts (fused
down 2x6 parts) before C0 that requires Pooled EU to be enabled as a
workaround. In this case the pool configuration changes depending upon
which subslice is disabled and the no. of eus in a pool is different,
So userspace need to know min no. of eus in a pool.

V2: use return value as the query results.
    ret < 0 when error, ret = 0 when not support, and ret > 0 indicate
    query results.(Chris)
V3: Correct V2 errors.

Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-09-07 13:50:23 +01:00
Ronie Salgado
a625ba8d2d amdgpu: add SI support
v2: without the amdgpu_drm.h change

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2016-09-05 15:46:29 +02:00
Marek Olšák
c653779775 amdgpu: fix valgrind warnings caused by amdgpu_query_firmware_version 2016-09-05 15:43:22 +02:00
Marek Olšák
77bc69ae9c amdgpu: sync amdgpu_drm.h with the kernel
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2016-09-05 15:43:22 +02:00
Marek Olšák
39fff59962 radeon: sync radeon_drm.h with the kernel
the CIK tile mode definitions are moved out,
userspace doesn't use them

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2016-09-05 15:43:22 +02:00
Flora Cui
4462303700 amdgpu: expose the AMDGPU_GEM_CREATE_VRAM_CLEARED flag
With this flag specified, VRAM buffer will be cleared at
allocation time.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
2016-09-02 17:30:19 -04:00
Stéphane Marchesin
72a041694e modetest: Also print the pixel clock
This can be useful for debugging. xrandr prints it, so why not.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-01 16:02:46 +01:00
Daniel Kurtz
587e5a8179 modetest: add mediatek to module list
There is a mediatek drm kms driver: Add "mediatek" to the static
lists of driver names.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: JB Tsai <jb.tsai@mediatek.com>
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-09-01 16:02:19 +01:00
satsahu
3106a33fea modetest: Adding amdgpu to module list
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-29 12:52:25 -04:00
Rob Clark
b214b05ccd list: fix an issue with android build using clang
Sorry, I don't understand the android build system enough to say *which*
version of clang this effects, but either "clang-2812033" or
"clang-3016494" (probably the later).

But when 'sample' is undefined (ie. unitialized variable), the result is
not as well defined as it is with gcc.  Instead use a typeof() cast with
a defined value (ie. zero).

This fixes a crash that was reported on android.

Reported-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-08-02 16:22:45 -04:00
Eric Anholt
f19cd3a528 Simplify the RELEASING steps based on current release.sh.
Since release.sh creates and pushes a libdrm-$VERSION tag for us,
there's no need to also have the user manually generating a $VERSION
tag as well.

I also dropped the "optional" part of distcheck.  You shouldn't have
pushed master with a version bump that hasn't passed distcheck.

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-24 18:36:34 -07:00
Rob Clark
0caa84cb04 Bump version for release
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-23 09:25:48 -04:00
Andreas Boll
248b3343ce radeon: Fix typo in stderr message
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-23 09:45:53 +02:00
Andreas Boll
22263ca11a man: Fix typo
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-23 09:45:53 +02:00
Andreas Boll
7e9e373935 automake: Include virtgpu_drm.h in the release tarball
The plan is to use this version of virtgpu_drm.h in mesa and drop mesa's
local copy.
To actually use this header it needs to be shipped in the tarball.

This was missed in c745e541a9

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-23 09:45:53 +02:00
Andreas Boll
9af2ccdef3 virtgpu: Update kernel header
Generated using make headers_install.

This brings the C++ guard, proper include path for drm.h and the
switching to kernel types for fixed-with integers.

Generated from drm-next commit c11dea5b0290984fa48111957ba3fdc5b3bdae5a

Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-23 09:45:53 +02:00
Andreas Boll
a5446775f2 automake: Don't include Android Makefiles in the release tarball
Currently only some Android Makefiles are included in the release tarball.
To be more consistent one could either add the remaining files or don't
ship Android Makefiles altogether.

According to Emil the Android folk doesn't use our release tarballs.
Thus it makes sense to remove those files from distribution which also
means less work for maintenance in the future.

Suggested-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-23 09:45:53 +02:00
Andreas Boll
9d1ce35c68 radeon: Wire up radeon-symbol-check to make check
This was missed in 552de225bf

Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-23 09:45:53 +02:00
Rob Clark
feb1b39be1 freedreno: fix warnings
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Tested-by: Rob Herring <robh@kernel.org>
2016-07-21 14:11:05 -04:00
Rob Clark
1f1b61d491 freedreno: fix android build break
The 'deprecated' #define was causing problems with bionic system headers
which used __attribute__((deprecated)).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Tested-by: Rob Herring <robh@kernel.org>
2016-07-21 14:10:45 -04:00
Rob Clark
1af780cc27 freedreno: fix distcheck errors
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-21 10:54:49 -04:00
Rob Clark
b59ed18818 freedreno: move legacy kgsl related README
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
6a23bd4b3c freedreno/msm: use hashtable to track bo idx
Note: cache the last ring the bo was emitted on, to avoid excess
hashtable lookups.  We do this by tracking ring seqno to avoid
problems with dangling pointers.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
419a154dbe freedreno: support growable cmdstream buffers
The issue that userspace needed to solve is that there is ~two orders of
magnitude size difference in cmdstream buffers (both for gmem commands
and for draw commands), and that the previous practice of allocating
worst-case sizes is quite wasteful.  Previously a submit would be
constructed (for example) like:

  CMD  TARGET  DESCRIPTION
   g0    N     gmem/tiling commands
   b0    Y     binning commands
   d0    Y     draw commands

Which, after the one non-IB-target cmd buffer is inserted into the
kernel controlled ringbuffer, looks like (not to scale):

         b0:           d0:
        +-----+       +-----+
   IB1  | ... |       | ... |
        +-----+       +-----+
         ^             ^
         |             |
         +-----+       +-+---------+
         g0:   |         |         |
        +----+----+----+----+----+----+----
   IB0  | .. | IB | .. | IB | .. | IB | ...
        +----+----+----+----+----+----+----
         ^              tile0     tile1
         |
         +-----------+
  userspace          |
  ~~~~~~~~~~~~~~~~~~~|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  kernel             |
               ----+----+----
   ringbuffer  ... | IB | ...
               ----+----+----

Now, multiple physical cmdstream buffers per fd_ringbuffer are supported,
so this becomes:

  CMD  TARGET  DESCRIPTION
   g0    N
   ...   N     gmem/tiling commands
   gN    N
   b0    Y
   ...   Y     binning commands
   bN    Y
   d0    Y
   ...   Y     draw commands
   dN    Y

Which, after the non-IB-target cmd buffers (g0..gN) are inserted into
the kernel controlled ringbuffer, looks like:

             b0:      b1            d0:      d1
            +-----+  +-----+        +-----+  +-----+
       IB1  | ... |  | ... | ...    | ... |  | ... | ...
            +-----+  +-----+        +-----+  +-----+
             ^        ^              ^        ^
             |        |              |        |
             |        +-+            |  +-----+------+
             +-----+    |            |  |            |
                   |    |         +--+----------+    |
             g0:   |    |         |     |       |    |
            +----+----+----+----+----+----+---+----+----+----
       IB0  | .. | IB | IB | .. | IB | IB |.. | IB | IB |...
            +----+----+----+----+----+----+---+----+----+----
             ^                   tile0         tile1
             | to b0  to b1
             |   |      |          to|d0    to|d1
             |   |      +----+       |      +-+-----------+
             |   |           |       |      |             |
             |   +------+    |       +-+-------------+    |
             |    g1:   |    |         |    |        |    |
             |   +----+----+----+----+----+----+---+----+----+----
       IB0   |   | .. | IB | IB | .. | IB | IB |.. | IB | IB |...
             |   +----+----+----+----+----+----+---+----+----+----
             |    ^                   tileX         tileY
             |    |
             |    +-----------+
             +-----------+    |
      userspace          |    |
      ~~~~~~~~~~~~~~~~~~~|~~~~|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
      kernel             |    |
                   ----+----+----+----
       ringbuffer  ... | IB | IB | ...
                   ----+----+----+----

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
d93d697deb freedreno/msm: split out dump_submit() helper
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
1d1e01b235 list: add first/last entry macros
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
dd1f372001 freedreno/msm: split out cmd buffer tracking from ring
First step towards supporting a single logical ringbuffer mapping to
multiple physical cmd buffers, which will enable dynamically growing
ringbuffers.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
0d61529130 freedreno/msm: drop return from get_cmd()
Not actually needed.  It just needs to ensure that there is a
corresponding entry in the submit's cmds table.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
892141a321 freedreno/msm: use private bo-cache for ringbuffer bo's
Since they get vmap'd on the kernel side, they are a bit more costly.
Don't let them mingle with the riffraff.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
19b82b9817 freedreno: fix potential leak at free
If user has emit'd reloc's, and then resets or deletes the ring, we want
to drop the ref's that the ring holds to the bo's to avoid a leak.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
9e697c7499 freedreno: ocd
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
8a6a8512d4 freedreno: support either coarse or fine-grained bucket sizes
The normal bo cache uses some intermediate steps between power of two
jumps to reduce memory wastage.  But for a ringbuffer bo cache, we do
not need this.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
904f1361ae freedreno: expose kernel driver version
gallium needs to know if the kernel is new enough to support explicit
fencing, dynamically grown ringbuffers, etc.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
fe07584e05 freedreno: fix potential fd leak in error path
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
eb846d46bc freedreno: add madvise support
With a new enough drm/msm, we can let the kernel know about buffers that
are in the bo cache, so the kernel can free them under memory pressure.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
0c270df8df freedreno: sync uapi
(from drm-next for 4.8)

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
82780c87f9 freedreno: move bo-cache to it's own file
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
0b34b68307 freedreno: refactor bo-cache API
Split out interface to allocate from and release to bo-cache, and get
rid of direct usage of bucket level API from fd_bo/etc.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
b18b6e21fc freedreno: split out fd_bo_cache
Eventually we'll want a separate bo-cache for ringbuffer bo's, since
ringbuffer bo's get vmap'd on the kernel side, it is preferrable to
re-use them as ringbuffers rather than something else.  Plus should
help to add madvise support if it is a bit better decoupled from bo
allocation (next patch).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
2ca73c666a freedreno: add simpler ring-reloc
Provide a way to insert a reference (ie. OUT_IB()) to a target ring,
executing all the cmds in the target ring from the start.

Sometimes the ringmarker stuff is just overkill.  And it will won't
really work properly once we support multiple physical cmdstream buffers
per fd_ringbuffer.  So in the future the old ringmarker related APIs
will be deprecated in a few releases.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Rob Clark
73db0a0421 freedreno: rework internal ring->emit_reloc_ring()
No need for it to deal with ringmarkers.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-07-20 19:42:21 -04:00
Emil Velikov
681fd2ab6d tests/drmdevice: be move verbose when using open()
Print out the node we're attempting to open and a message if/why we fail
to do so.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-20 23:44:40 +01:00
Emil Velikov
dd58044530 tests/drmdevice: print out the full 'bus' and 'dev' strings
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-20 23:44:40 +01:00
Qiang Yu
6c056eecd5 drm: fix drmFreeDevices memory leak on multi GPU setups
When in multi GPU case, devices array may have some
NULL "hole" in between two devices. So check all
array elements and free non-NULL device.

Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-20 23:44:40 +01:00
Qiang Yu
3c20893daa drm: drmGetDevice return correct device on multi GPU setups
Currently drmGetDevice always returns the first device it finds under
/dev/dri/.

Move the target device to the start of the list during iteration. This
way during deduplication it'll preserve its place and will be returned
to the user.

v2: Keep the memory leak separate.
v3: Move the drmFoldDuplicatedDevices description

Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
[Emil Velikov: move drmFoldDuplicatedDevices description, add
changelog, reword commit message]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-07-20 23:38:35 +01:00
Eric Anholt
5d83081948 Bump version to 2.4.69 for release.
Signed-off-by: Eric Anholt <eric@anholt.net>
2016-07-20 11:43:04 -07:00
Eric Anholt
2212a6465d vc4: Update kernel headers for getparam addition.
This also brings over the C++ guard introduced recently in the kernel
headers.

Signed-off-by: Eric Anholt <eric@anholt.net>
2016-07-15 15:38:12 -07:00
Mike Frysinger
8c8d5dd76f pull in sys/sysmacros.h when available
This header provides major/minor/makedev funcs under most Linux C
libs.  Pull it in to fix building with newer versions that drop the
implicit include via sys/types.h.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94231
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2016-07-06 16:58:38 +01:00
Jan Vesely
50d3c85bdb xf86drm.c: Fix mix of tabs and spaces
Remove whitespace at the end of line.
2016-07-06 16:58:38 +01:00
Rob Herring
d342cd34ac Android: strip out header files from sources list
AOSP master now errors if LOCAL_SRC_FILES contains headers, so filter
out header files from the source lists.

Signed-off-by: Rob Herring <robh@kernel.org>
2016-07-06 16:58:38 +01:00
Rodrigo Vivi
7996a8707e intel: Removing PCI IDs that are no longer listed as Kabylake.
This is unusual. Usually IDs listed on early stages of platform
definition are kept there as reserved for later use.

However these IDs here are not listed anymore in any of steppings
and devices IDs tables for Kabylake on configurations overview
section of BSpec.

So it is better removing them before they become used in any
other future platform.

v2: Rebase.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2016-06-29 10:23:37 -07:00
Rodrigo Vivi
22b6e33fe2 intel: Add more Kabylake PCI IDs.
The spec has been updated adding new PCI IDs.

v2: Avoid using "H" instead of HALO to keep names uniform - DK.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2016-06-29 10:22:52 -07:00
Marek Olšák
625d1810ad radeon: use SAMPLE_SPLIT=2 for better MSAA perf on EG/CM
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-14 11:45:30 +02:00
Rob Clark
09bfd5c716 freedreno/msm: fix memory leak on ringbuffer free
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-06-13 09:49:54 -04:00
Nicolai Hähnle
9bdec97a19 xf86drm: ensure proper alignment of pointers in drmProcessPciDevice
Previously, (*device)->businfo.pci would end up misaligned, which results
in undefined behavior.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-06-10 20:15:15 +02:00
Qiang Yu
70b64073f7 drm: fix multi GPU drmGetDevices only return one device
When multi GPU present, after drmFoldDuplicatedDevices
merge same busid deveces, two different devices may be
seperated by zero in local_devices[]. The for loop
should check all local_devices instead of exit when
meet a zero.

Reviewed-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Qiang Yu <Qiang.Yu@amd.com>
2016-06-06 12:29:16 -04:00
Christian König
361d0a8898 amdgpu: fix fence status query
Not initializing the ip instance leads to sporadic fails in the tests.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-06-02 16:05:51 +02:00
Sonny Jiang
7aab852d4e tests/amdgpu: adapt to new polaris10/11 uvd fw
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-13 15:10:28 -04:00
Leo Liu
4e7ec72a1b tests/amdgpu: add interface to adapt firmware requirement
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-13 15:10:21 -04:00
Alex Deucher
3f5b31939c tests/amdgpu: expand write/copy tests to compute
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-13 15:10:16 -04:00
Alex Deucher
b7a51965e1 tests/amdgpu: expand write/copy tests to compute
Uses same packets as gfx.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-13 15:10:01 -04:00
Kenneth Graunke
fc09c5ab84 Bump version for release
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2016-04-27 17:53:00 -07:00
Michał Winiarski
e3623d34ca intel/skl: Add missing SKL PCI IDs
Used by production devices:
    Intel(R) HD Graphics 510
    Intel(R) HD Graphics 535
    Intel(R) Iris(TM) Graphics 550
    Intel(R) Iris(TM) Graphics P555

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-04-27 17:45:34 -07:00
Nicolas Dechesne
739b888602 freedreno: add dummy fd_bo_from_fbdev implementation when KGSL is disabled
Make sure that this function is defined (even empty/dummy) when KGSL support is
disabled, since it's part of the driver i/f and it was reported to cause symbols
issues when building against musl libc implementation.

Reported-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Nicolas Dechesne <nicolas.dechesne@linaro.org>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-04-21 09:40:32 -04:00
Daniel Vetter
cc9a53f076 headers: Update drm.h
This needs the kernel patch to make sure the C++ protection is in place.

Otherwise just new defines, using the right fixed-width types and
some shuffling in where stuff is defined (the DRM_CAP list moved, but
the #defines are the same).

Generated using make headers_install.

Generated fromd drm-misc commit 249c4f538b1aae55d41699f8bafc6cb762a7f48f

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-04-12 13:15:49 +02:00
Daniel Vetter
89cdda3d5f headers: Update drm_mode.h
Generated using make headers_install.

Only cosmetics&new definitions here now.

Generated fromd drm-misc commit 249c4f538b1aae55d41699f8bafc6cb762a7f48f

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-04-12 13:15:49 +02:00
Daniel Vetter
268ae7cae5 headers: Update drm_fourcc.h
Only real difference is switching to kernel types for fixed-width
integers, like we should.

Generated fromd drm-misc commit 249c4f538b1aae55d41699f8bafc6cb762a7f48f

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-04-12 13:15:49 +02:00
Daniel Vetter
f37b9a8edd headers: Update drm_sarea.h
Generated using make headers_install. Only difference is a new value
of SAREA_MAX for mips. Not that we ever shipped a dri1 driver on that
platform probably ...

Generated fromd drm-misc commit 249c4f538b1aae55d41699f8bafc6cb762a7f48f

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-04-12 13:15:49 +02:00
Daniel Vetter
7cba3bb75e headers: Update drm_i915.h
Generated using make header_install.

Generated fromd drm-intel-next-queued commit
55c561a708eec328822721233b1148119e80f5c3

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-04-12 13:15:49 +02:00
Daniel Vetter
1e5c590a24 tests/kms-steal-crtc: Use correct includes
It was relying on drm_fourcc.h providing <stdint.h>, which is silly.
Fix it.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2016-04-12 13:15:49 +02:00
Daniel Vetter
81506da8cf headers: Remove _DRM_GEM
This was purely a kernel-internal type used in a early patch version
to add GEM bo mmap support. It was never used in-kernel in merged code
nor in userspace. Nuke it to align with kernel headers.

For reference the kernel patch:

commit 05f51722a154e73019434bd020e50ddb941046c5
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Dec 11 11:34:32 2013 +0100

    drm/bufs: remove handling of _DRM_GEM mappings

    Gone with the new gem vma offset manager from David.

    We can also ditch the uapi header definition from the enum since
    userspace never used this. It ended up in there purely for historical
    reasons (for reusing the old drm mmap code essentially), not because
    userspace ever needed it.

    Cc: David Herrmann <dh.herrmann@gmail.com>
    Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
    Signed-off-by: Dave Airlie <airlied@redhat.com>

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-04-12 13:15:49 +02:00
Thierry Reding
65ea85d85c tegra: Sync with Linux kernel UAPI header
Update the UAPI header to the latest version in the Linux kernel. This
changes the struct drm_tegra_gem_mmap to properly handle offsets on 64-
bit architectures.

See commit bdf765071a8b ("drm/tegra: gem: Return 64-bit offset for
mmap(2)") in the Linux kernel (as of v4.1).

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-04-07 18:32:03 +01:00
Eric Engestrom
ce97507cfc xf86drm: Fix spelling mistakes
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-04-07 18:16:01 +01:00
Eric Engestrom
96f2907c85 tests: Fix spelling mistakes
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-04-07 18:15:59 +01:00
Eric Engestrom
723a6944c0 intel: Fix spelling mistakes
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-04-07 18:15:56 +01:00
Eric Engestrom
7b356f4b5e freedreno: Fix spelling mistakes
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-04-07 18:15:54 +01:00
Eric Engestrom
caef42bdfa exynos: Fix spelling mistake
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-04-07 18:15:52 +01:00
Eric Engestrom
0b3f9783df amdgpu: Fix spelling mistakes
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-04-07 18:15:45 +01:00
Emil Velikov
ea78c17854 proptest: print signed values correctly
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-03-28 22:15:03 +01:00
Gustavo Padovan
dfd8cd4611 modetest: print signed values correctly
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-03-28 22:13:29 +01:00
Gustavo Padovan
b5c0cf0fcb gitignore: ignore kms-steal-crtc and kms-universal-planes
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by; Emil Velikov <emil.l.velikov@gmail.com>
2016-03-28 22:12:54 +01:00
Gustavo Padovan
2e6f8f1dd5 tests: add virtio_gpu to the driver list
modetest was failing to work with driver because it wasn't in the
module list.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-03-28 22:12:33 +01:00
Rob Clark
49041c3613 freedreno: add support for FD_TIMESTAMP
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-03-13 12:27:30 -04:00
Rob Clark
67e7103cdb freedreno: update uapi
In drm-next.. needed for timestamp queries in mesa.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-03-13 12:27:06 -04:00
Rodrigo Vivi
ea07de92da intel: Adding missing Broxton PCI IDs.
These IDs were already part of the kernel since:

kernel commit 985dd4360fdf2533fe48a33a4a2094f2e4718dc0
Author: Imre Deak <imre.deak@intel.com>
Date:   Thu Jan 28 16:04:12 2016 +0200

    drm/i915/bxt: update list of PCIIDs

Cc: Venkateswarlu Vinjamuri <venkateswarlu.v.vinjamuri@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
2016-03-02 14:27:30 -08:00
Chih-Wei Huang
4274539673 android: add virgl to be a valid driver
To avoid the warning:

external/libdrm/libkms/Android.mk:17: invalid GPU drivers: virgl

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-02-25 17:03:20 +00:00
Thomas Hellstrom
db7202d180 vmwgfx: update uapi
The libdrm shipped vmwgfx_drm.h is obsolete and incorrect.
Update it to latest kernel version.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2016-02-24 10:08:28 +01:00
Sonny Jiang
99ede3e687 amdgpu/tests: fix tests for asics with one VCE instance
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-18 16:50:43 -05:00
Rob Clark
add8936031 add libdrm_vc4.pc to .gitignore
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-15 13:50:51 -05:00
Rob Clark
d49efb5584 Bump version for release
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-15 13:42:51 -05:00
Rob Clark
9b77443f63 freedreno: add support for FD_MAX_FREQ
Only msm backend supports this.  Sorry, if you are using kgsl, no
time-elapsed query for you.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-12 18:32:22 -05:00
Rob Clark
bc5497d061 freedreno: small refactor for get_param
Will simplify next commit.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-12 18:32:22 -05:00
Rob Clark
c47385ccda freedreno: update uapi
In drm-next.. needed for time-elapsed (and future perf ctrs) in mesa.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-02-12 18:32:22 -05:00
Ken Wang
f884af9b57 amdgpu: fix for submition with no ibs
Avoid a crash if no IBs are specified.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-04 12:26:43 -05:00
Alex Deucher
6950af4e84 tests/amdgpu: add a test for cp dma copy
Use the CP to copy data between buffers

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-04 12:24:15 -05:00
Alex Deucher
35c35ea66d tests/amdgpu: make amdgpu_command_submission_sdma_copy_linear generic
So it can be shared for CP tests.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-04 12:24:15 -05:00
Alex Deucher
0edc442560 tests/amdgpu: add a test for cp dma fill
Use the CP to fill to memory.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-04 12:24:15 -05:00
Alex Deucher
7c656ba72f tests/amdgpu: make amdgpu_command_submission_sdma_const_fill generic
So it can be shared for CP tests.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-04 12:24:15 -05:00
Alex Deucher
47c7e7a6dd tests/amdgpu: add a test for cp write data
Use the CP to write data to memory.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-04 12:24:15 -05:00
Alex Deucher
c5da5eade0 tests/amdgpu: make amdgpu_command_submission_sdma_write_linear generic
So it can be shared for CP tests.

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-04 12:23:43 -05:00
Alex Deucher
8be79be043 tests/amdgpu: make amdgpu_sdma_test_exec_cs() generic (v2)
Share with upcoming CP tests.

v2: drop unnecessary forward declaration

Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-04 12:22:20 -05:00
Sumit Semwal
682eaa05e6 android: enable building static version of libdrm
Android needs libdrm built statically for recovery;
enable that as well.

Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-02-04 13:22:50 +00:00
Emil Velikov
ca5017b69c libkms: add libdrm to Requires.private
Analogous to last two changes (amdgpu and radeon).

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-04 13:22:50 +00:00
Emil Velikov
31badf031c radeon: add libdrm to Requires.private
Equivalent to the amdgpu commit before. Additionally, when libdrm is
installed to a 'non-default' location, users of libdrm_radeon will fail
to build, as radeon_cs.h (and maybe others) won't have their
dependencies (drm.h radeon_drm.h) fulfilled.

Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-04 13:22:50 +00:00
Emil Velikov
87b3bf643d amdgpu: add libdrm as private requirement/dependency
Otherwise libdrm.so won't end up in the --libs, when one static links
libdrm_amdgpu.

Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2016-02-04 13:22:50 +00:00
Eric Anholt
3c717f61f8 vc4: Add headers and .pc files for VC4 userspace development.
The headers were originally written in Mesa, imported to the kernel,
and improved upon in vc4-gpu-tools.  These come from the v-g-t copies
and will replace the Mesa and v-g-t copies, and hopefully be used from
new tests in igt, as well.

v2: Fix linking against libdrm_intel instead of libdrm.
v3: Drop Libs and Cflags since they'll be inherited from libdrm.
v4: Switch to Requires.private.  I was wrong about standard practice,
    apparently only Intel was doing plain Requires (sorry to all
    involved).

Signed-off-by: Eric Anholt <eric@anholt.net>
2016-02-03 11:29:52 -08:00
Eric Anholt
0ad32e7ff4 util: Add support for vc4.
This lets allows using modetest for overlay plane testing.

Signed-off-by: Eric Anholt <eric@anholt.net>
2016-02-03 11:29:52 -08:00
Eric Anholt
eeb23de23b vc4: Add the DRM header file.
I'll build some libdrm C code soon, but for now this lets libdrm users
use vc4 ioctls.  Produced from headers_install of
1df59b8497f47495e873c23abd6d3d290c730505 (drm-next) in the kernel.

Signed-off-by: Eric Anholt <eric@anholt.net>
2016-02-03 11:29:44 -08:00
Emil Velikov
432e08de88 tests/kmstest: inverse the order of LDADD libraries
The utils library depends on libdrm. Flip the order, orderwise we might
error during link stage like below:

  CC       main.o
  CCLD     kmstest
/usr/bin/ld: ../../tests/util/.libs/libutil.a(libutil_la-kms.o):
undefined reference to symbol 'drmOpen'

Reported-by: Tom Stellard <thomas.stellard@amd.com>
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-01-27 23:12:09 +00:00
Kylie McClain
ff0c9caa8e tests: Include poll.h rather than sys/poll.h
sys/poll.h is a non-standard location of the poll.h header, and is
incorrect on non-glibc libcs. poll.h, however, is defined in SUS (v2)
and is more portable.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93764
http://pubs.opengroup.org/onlinepubs/007908799/xsh/poll.h.html
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-01-26 21:50:17 +00:00
Khem Raj
358615f416 tests: Include sys/select.h
Used in compliance with POSIX 2001/2008

Fixes errors e.g.
error: implicit declaration of function 'select'

and helps with missing definitions of FD_* defines

v2: conditionally include sys/select.h, include in every test where
needed.

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Reviewed-by: Thierry Reding <thierry.reding@gmail.com> (v1)
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-01-26 21:50:17 +00:00
Thierry Reding
1674147a14 tests: util: Fixup util_open() parameter order
util_open() takes a device parameter, followed by a module parameter.
The existing tests used the drmOpen() function, which uses a different
ordering of the parameters, and the old ordering was accidentally kept
during the conversion.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-01-26 21:50:17 +00:00
Stefan Agner
2ad5ea780b tests: add fsl-dcu-drm to modules
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-01-26 21:50:17 +00:00
Stefan Agner
0caf58a6cb kmstest: Use util_open()
Use the new util_open() helper instead of open-coding the method for
finding a usable device. While at it, make the command-line interface
more consistent with that of modetest by adding the -D and -M options.

Signed-off-by: Stefan Agner <stefan@agner.ch>
v2: correctly use util_open() - swap device, module
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-01-26 21:45:46 +00:00
Marcin Ślusarz
798022b61c configure.ac: don't detect disabled options dependencies
Currently with --disable-amdgpu --disable-valgrind --disable-cairo-tests
cunit, valgrind and cairo are still detected.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-01-24 13:18:10 +01:00
Damien Lespiau
3627f38da9 xf86drm: Bound strstr() to the allocated data
We are reading at most sizeof(data) bytes, but then data may not contain
a terminating '\0', at least in theory, so strstr() may overflow the
stack allocated array.

Make sure that data always contains at least one '\0'.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2016-01-22 15:50:17 +00:00
Michel Dänzer
db138b9ba1 radeon: Pass radeon_bo_open flags to the DRM_RADEON_GEM_CREATE ioctl
Not doing so makes it impossible for radeon_bo_open callers to set any
RADEON_GEM_* flags for the newly created BO.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-01-21 18:08:49 +09:00
Michel Dänzer
25712f1d35 amdgpu: Add new symbols to amdgpu-symbols-check
Fixes make check.

Trivial.
2016-01-20 15:59:08 +09:00
Junwei Zhang
6b79c66b84 amdgpu: list each entry safely for sw semaphore when submit ib
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-20 02:14:46 +01:00
Chunming Zhou
d4d4184363 tests/amdgpu: add semaphore test
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-20 02:14:46 +01:00
Marek Olšák
6afadeaf13 amdgpu: add semaphore support
the semaphore is a binary semaphore. the work flow is:
1. create sem
2. signal sem
3. wait sem, reset sem after signalled
4. destroy sem.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-20 02:14:46 +01:00
Chunming Zhou
f06c992819 amdgpu: validate user memory for userptr
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-20 02:14:46 +01:00
monk.liu
50386e09db amdgpu: drop address patching logics
we don't support non-page-aligned cpu pointer anymore

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-01-20 02:14:46 +01:00
Marek Olšák
5198f2b2e6 configure.ac: disable annoying warning -Wmissing-field-initializers
It warns for all "{}" initializers.

Reviewed-by: David Herrmann <dh.herrmann@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-01-20 02:14:03 +01:00
Ville Syrjälä
e342c0fc25 Fix memory leak with drmModeGetConnectorCurrent()
drmModeGetConnectorCurrent() must provide temporary storage for the
kernel to fill in at least one mode (asking for !=0 modes is how
you prevent the heavyweight probe in the kernel). Currently we malloc
that temp storage but we fail to free it before overwriting the
pointer with the address of the actual storage we use to store the
real mode list we get from the kernel in the second ioctl call.

Let's just keep the temporary storage on the stack and thus we avoid the
leak and also eliminate some pointless mallocs.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Fixes: 5ed5fa1060 ("mode: Retrieve only the current information for a Connector")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-01-07 17:40:33 +02:00
Rodrigo Vivi
242f77ce03 intel/kbl: Add Kabylake PCI ids
Also, following kernel definition Kabylake is skylake.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
2016-01-06 11:56:42 -08:00
Michał Winiarski
b38a4b2326 intel: Restore formatting of offsets in debug statements
Using lower_32_bits and upper_32_bits macros was accidentally dropped in:

    commit 8b4d57e7b7
    Author: Michał Winiarski <michal.winiarski@intel.com>
    Date:   Wed Sep 9 16:07:10 2015 +0200

	intel: Add support for softpin

Let's restore previous, more readable format.

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-12-22 01:58:33 -08:00
Ben Skeggs
f49bfd98b3 Bump version for release
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:40 +10:00
Ben Skeggs
f208f2afde nouveau: clean up nouveau.h, noting deprecated members/functions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:38 +10:00
Ben Skeggs
4291eea18f nouveau: add support for newer kernel interfaces
v2.
- leave client-provided pointer unmodified on sclass_get() failure

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:35 +10:00
Ben Skeggs
4c92a9d707 nouveau: add new interface to create a nouveau_device
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:33 +10:00
Ben Skeggs
4a68c5638e nouveau: remove nouveau_object_find()
No more internal users, and there's never been external users.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:30 +10:00
Ben Skeggs
4283e3f656 nouveau: make use of nouveau_drm::fd instead of nouveau_device::fd
The latter is deprecated, and will not be valid for newer clients.

v2.
- split out nouveau_object_find removal

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:28 +10:00
Ben Skeggs
cdf9029f5f nouveau: stack legacy nouveau_device on top of nouveau_drm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:24 +10:00
Ben Skeggs
b845d61de9 nouveau: introduce object to represent the kernel client
Because NVIF intentionally lacks some of the paths necessary to be
compatible with various mistakes we've made over the years, libdrm
needs to know whether a client has been updated and that it's safe
to make use of the new kernel interfaces.

Clients still using nouveau_device_open()/wrap() will be forced to
make use of ABI16 instead of NVIF.

v2.
- remove lib_version, nothing used it
- leave client-provided pointer unmodified on failure

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:20 +10:00
Ben Skeggs
f6b1b5b7c9 nouveau: add interfaces to query information about supported classes
This will expose functionality supported by newer kernel interfaces.

Current userspace uses the chipset to determine which classes are likely
exposed, which generally works pretty well, but isn't as flexible as it
could be.

Unfortunately, the G98:GF100 video code in Mesa is still relying on the
kernel exposing incorrect vdec classes on some chipsets.  The ABI16
kernel interfaces have a workaround for this in place, but that will no
longer be available once libdrm supports NVIF.

To prevent a regression when NVIF support is added, if there's no kernel
support for NVIF, libdrm will magic up a class list containing correct
vdec classes anyway instead of failing with -ENODEV.

v2.
- add description of abi16/vdec workaround
- add description of sclass/mclass
- leave client-provided pointer unmodified on abi16_sclass() failure

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:14 +10:00
Ben Skeggs
c00e1a92a2 nouveau: add interface to call an object's methods
This will expose functionality supported by newer kernel interfaces,
giving access to things such as ZBC controls, perfmon, etc.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:12 +10:00
Ben Skeggs
343d1ee83e nouveau: make it possible to init object in pre-allocated memory
Required for an upcoming patch, not exposed to library clients.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:10 +10:00
Ben Skeggs
0996ad0e12 nouveau: move object functions up, to avoid future foward decls
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:22:07 +10:00
Ben Skeggs
4a3cbf5c0a nouveau: move more abi16-specific logic into abi16.c
v2.
- add a comment about the (ab)use of nouveau_object::length
- add a comment about abi16_object() return values
v3.
- handle new client + old kernel for sw classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:21:56 +10:00
Ben Skeggs
d1ec093e4c nouveau: import and install a selection of nvif headers from the kernel
This commit also modifies the install path of the main libdrm_nouveau
header to be under a nouveau/ subdirectory.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-22 13:21:05 +10:00
Stefan Agner
0cfb6a3986 tests: remove missleading comments
The comment has been copied from modetest and is not applicable
for vbltest.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2015-12-18 17:44:27 +00:00
Thierry Reding
b020b02f84 vbltest: Use util_open()
Use the new util_open() helper instead of open-coding the method for
finding a usable device. While at it, this adds -D and -M command-line
options to vbltest to make its usage more consistent with its siblings
modetest and proptest.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-18 17:44:22 +00:00
Thierry Reding
6223481b8d proptest: Use util_open()
Use the new util_open() helper instead of open-coding the method for
finding a usable device. While at it, make the command-line interface
more consistent with that of modetest by adding the -D and -M options.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-18 17:44:18 +00:00
Thierry Reding
c26266fcd0 modetest: Use util_open()
Use the new util_open() helper instead of open-coding the method for
finding a usable device.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-18 17:44:16 +00:00
Thierry Reding
e744b02375 tests: Add helper to open a device/module
The new function util_open() encapsulates the standard method employed
by tests to open a device or module. There is a verbatim copy of this in
almost all test programs, with slight variations in the list of modules.
Moving this code into a common helper allows code reuse and makes tests
more consistent.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-18 17:44:13 +00:00
Thierry Reding
89cca28dfb tests: kms: Implement universal planes test
This small program allows universal planes to be tested. Currently this
isn't very flexible because it allows only the first plane of a given
type to be tested on the first CRTC. However it should be simple to
extend this with some additional command-line arguments.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-18 17:44:10 +00:00
Thierry Reding
e0ec59efb1 tests: kms: Implement CRTC stealing test
This test program sets a mode and framebuffer on a connector and cycles
through all CRTCs, moving the connector to each of them in turn. This is
useful to verify that CRTC stealing is properly handled in the DRM core
and drivers.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-12-18 17:44:08 +00:00
Thierry Reding
c13c504ed2 tests: Add libkms-test library
This library contains abstractions for KMS that help remove the need for
a lot of boilerplate in KMS test programs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-18 17:44:05 +00:00
Thierry Reding
ca6c5f8c81 proptest: Add Android support
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-18 17:44:03 +00:00
Thierry Reding
4664d657ea tests: Move name tables to libutil
These tables are duplicated in several places, so move them into libutil
so that they can be shared.

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-18 17:44:01 +00:00
Thierry Reding
1ec3c44bdd tests: Split helpers into library
Some of the helpers, such as the pattern drawing helpers or the format
lookup helpers, have potential to be reused. Move them into a separate
library to make it easier to share them.

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-18 17:43:40 +00:00
Tobias Jakobi
15d90ef350 exynos: bump version number
The Exynos API was extended quite a bit, so reflect this in the
version number.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
2015-12-18 17:42:54 +00:00
Tobias Jakobi
6689e4ee14 tests/exynos: add test for g2d_move
To check if g2d_move() works properly we create a small checkerboard
pattern in the center of the screen and then shift this pattern
around with g2d_move(). The pattern should be properly preserved
by the operation (but not the surrounding area).

Tested-by: Hyungwon Hwang <human.hwang@samsung.com>
Reviewed-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
[Emil Velikov: add g2d_move to the symbol check]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-18 17:42:54 +00:00
Tobias Jakobi
676462c43e exynos/fimg2d: add g2d_move
We already have g2d_copy() which implements G2D copy
operations from one buffer to another. However we can't
do a overlapping copy operation in one buffer.

Add g2d_move() which acts like the standard memmove()
and properly handles overlapping copies.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
2015-12-18 17:42:54 +00:00
Tobias Jakobi
51fd93bc38 exynos: fimg2d: add g2d_set_direction
This allows setting the two direction registers, which specify how
the engine blits pixels. This can be used for overlapping blits,
which happen e.g. when 'moving' a rectangular region inside a
fixed buffer.

Reviewed-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
2015-12-18 17:42:54 +00:00
Tobias Jakobi
1b32e5da44 tests/exynos: use XRGB8888 for framebuffer
This matches the G2D color mode that is used in the entire code.
The previous (incorrect) RGBA8888 would only work since the
Exynos mixer did its configuration based on the bpp, and not
based on the actual pixelformat.

Reviewed-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
2015-12-18 17:42:54 +00:00
Tobias Jakobi
58a39f6ba1 tests/exynos: add fimg2d event test
This tests async processing of G2D jobs. A separate thread is spawned
to monitor the DRM fd for events and check whether a G2D job was
completed.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
2015-12-18 17:42:54 +00:00
Tobias Jakobi
60df358196 exynos/fimg2d: add g2d_config_event
This enables us to pass command buffers to the kernel which
trigger an event on the DRM fd upon completion.
The final goal is to enable asynchronous operation of the
G2D engine, similar to async page flips.

Passing the event userdata pointer through the G2D context
was chosen to not change the current API (e.g. by adding
a userdata argument to each public functions).

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
2015-12-18 17:42:54 +00:00
Tobias Jakobi
2e4b9f08c7 tests/exynos: add fimg2d performance analysis
Currently only fast solid color clear performance is measured.
A large buffer is allocated and solid color clear operations
are executed on it with randomly chosen properties (position
and size of the region, clear color). Execution time is
measured and output together with the amount of pixels
processed.

The 'simple' variant only executes one G2D command buffer at
a time, while the 'multi' variant executes multiple ones. This
can be used to measure setup/exec overhead.

The test also serves a stability check. If clocks/voltages are
too high or low respectively, the test quickly reveals this.

Tested-by: Hyungwon Hwang <human.hwang@samsung.com>
Reviewed-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
2015-12-18 17:42:54 +00:00
Tobias Jakobi
2191ed904f exynos: Introduce exynos_handle_event()
Used to handle kernel events specific to the Exynos platform.
Currently only G2D events are handled.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
2015-12-18 17:42:54 +00:00
Kristian Høgsberg Kristensen
d6ffb99726 intel: Add drm_intel_bo_set_softpin_offset to intel-symbol-check
Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
2015-12-14 11:39:19 -08:00
Kristian Høgsberg Kristensen
3b7d971020 Add tests/drmdevice to .gitignore
Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
2015-12-14 11:39:17 -08:00
Michał Winiarski
8b4d57e7b7 intel: Add support for softpin
Softpin allows userspace to take greater control of GPU virtual address
space and eliminates the need of relocations. It can also be used to
mirror addresses between GPU and CPU (shared virtual memory).
Calls to drm_intel_bo_emit_reloc are still required to build the list of
drm_i915_gem_exec_objects at exec time, but no entries in relocs are
created. Self-relocs don't make any sense for softpinned objects and can
indicate a programming errors, thus are forbidden. Softpinned objects
are marked by asterisk in debug dumps.

Cc: Thomas Daniel <thomas.daniel@intel.com>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Zou Nanhai <nanhai.zou@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
2015-12-14 11:31:25 -08:00
Michel Thierry
5453f89b70 intel: add drm_intel_bo_use_48b_address_range to symbol-check test
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
2015-12-14 11:31:25 -08:00
Michel Thierry
3350add5cc intel: 48b ppgtt support (EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag)
Gen8+ supports 48-bit virtual addresses, but some objects must always be
allocated inside the 32-bit address range.

In specific, any resource used with flat/heapless (0x00000000-0xfffff000)
General State Heap (GSH) or Instruction State Heap (ISH) must be in a
32-bit range, because the General State Offset and Instruction State Offset
are limited to 32-bits.

The i915 driver has been modified to provide a flag to set when the 4GB
limit is not necessary in a given bo (EXEC_OBJECT_SUPPORTS_48B_ADDRESS).
48-bit range will only be used when explicitly requested.

Callers to the existing drm_intel_bo_emit_reloc function should set the
use_48b_address_range flag beforehand, in order to use full ppgtt range.

v2: Make set/clear functions nops on pre-gen8 platforms, and use them
    internally in emit_reloc functions (Ben)
    s/48BADDRESS/48B_ADDRESS/ (Dave)
v3: Keep set/clear functions internal, no-one needs to use them directly.
v4: Don't set 48bit-support flag in emit reloc, check for ppgtt type
    before enabling set/clear function, print full offsets in debug
    statements, using port of lower_32_bits and upper_32_bits from linux
    kernel (Michał)

References: http://lists.freedesktop.org/archives/intel-gfx/2015-July/072612.html
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
2015-12-14 11:31:19 -08:00
Kristian Høgsberg Kristensen
7d74a83d22 intel: Update i915_drm.h
Copy from drm-intel-nightly a307a3a81c2bf2883457e03abcf5c9520cf452c1.

Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
2015-12-14 11:30:10 -08:00
Chih-Wei Huang
42f2f92059 intel: add the missing <strings.h> include
It defines the prototype of ffs that fixes the building error
on Android 6.0 64-bit image.

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-12-01 16:48:17 +00:00
Tom St Denis
c05049b420 amdgpu: Make amdgpu_cs_calculate_timeout() return something sensible on error
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-20 19:21:48 -05:00
Jammy Zhou
9c15b4aacd amdgpu: fix overflow for timeout calculation
Set the timeout to AMDGPU_TIMEOUT_INFINITE when overflow happens

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-11-20 19:21:48 -05:00
Emil Velikov
8913cd95b2 configure.ac: test for the same atomic function as the one we use
Unlikely that we'll hit a case where __sync_fetch_and_add is present
while __sync_add_and_fetch isn't. Regardless let's keep things sane and
consistent.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-11-16 13:52:56 +00:00
Jonathan Gray
f4b83bff60 configure.ac: rework compiler builtin atomic tests
The libdrm autoconf test for atomics uses __sync_val_compare_and_swap with
the address of a function argument which triggers a gcc ICE on sparc64
with the OpenBSD system compiler.

Mark Kettenis pointed out that while other architectures probably spill the
argument onto the stack this is likely not the case on register window
architectures like SPARC and suggested passing a pointer as an argument
instead which avoids the ICE and allows the drm libraries requiring
atomics to build on sparc64 with the autoconf build.

Reported-by: Christian Weisgerber <naddy@openbsd.org>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Matthieu Herrb <matthieu@openbsd.org>
2015-11-16 13:45:37 +00:00
Michel Dänzer
c3deddd9c2 radeon: Handle surface offsets exceeding 32 bits correctly
The slice_size and bo_size fields were getting truncated to 32 bits.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-11-10 18:06:57 +09:00
Tvrtko Ursulin
ce3185d345 libdrm: Use userspace compatible type in fourcc_mod_code macro
__u64 should be used instead of u64.

Kernel headers originally pulled in:

commit 8983fe5497
Author: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Date:   Mon Aug 3 10:48:03 2015 +0100

    libdrm: Add framebuffer modifiers uapi

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: Rob Clark <robdclark@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-11-05 16:11:21 -05:00
Ben Widawsky
4309bfd9f8 intel: Cleanup SKL PCI ID definitions.
This removes ones which aren't used, and adds some new ones. I kept the original
names where possible.

Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-11-03 11:19:13 -08:00
Ben Widawsky
cad0e03f5a intel: Add SKL GT4 PCI IDs
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-11-03 11:19:06 -08:00
Tom St Denis
b176372af4 amdgpu: Cleanly handle ENOMEM on result in amdgpu_bo_list_create()
Move the allocation of result prior to the IOCTL so we can cleanly
backtrack if the allocation fails.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-22 12:36:55 -04:00
Tom St Denis
1a6a8f34a0 amdgpu: Fix use-after-free bug in vamgr_deinit
This patch fixes a use-after-free bug in the vamgr_deinit function.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-22 12:36:38 -04:00
Tom St Denis
988f31ecc2 amdgpu: Unlock mutex if base_required is invalid
In the function amdgpu_vamgr_find_va() the function would return
without unlocking the mutex if the base_required offset was below
the va managers base offset.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-10-22 12:35:14 -04:00
Dave Airlie
c745e541a9 drm: add virtgpu_drm.h
This is in drm-next now, so add to libdrm.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-10-21 09:21:07 +10:00
Matt Roper
ba5a6ecf81 xf86drm: Handle unrecognized subsystems safely in drmGetDevice[s]()
Both drmGetDevice() and drmGetDevices() currently print a warning when
they encounter an unknown (non-PCI) subsystem type for a device node,
but they still proceed to assume that the drmDevicePtr was initialized
and try to add it to the local device array.  Add a 'continue' to the
error case handling to bypass the rest of the processing for devices we
can't handle.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-10-20 18:45:23 +01:00
Matt Roper
cf0f036e3d xf86drm: Fix error handling for drmGetDevice()
Some of the error conditions in drmGetDevice() can lead to us calling
closedir(NULL) or leaking memory.  Fix these conditions the same way we
did for drmGetDevices() in commit:

        commit 8c4a1cbd98
        Author: Matt Roper <matthew.d.roper@intel.com>
        Date:   Wed Sep 30 09:30:51 2015 -0700

            xf86drm: Fix error handling for drmGetDevices()

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-10-20 18:44:58 +01:00
Michel Dänzer
3045523de2 Fix void pointer arithmetic in drmProcessPciDevice
Arithmetic on void pointers is a GCC extension.

  CC       libdrm_la-xf86drm.lo
../xf86drm.c: In function 'drmProcessPciDevice':
../xf86drm.c:3017:10: warning: pointer of type 'void *' used in arithmetic [-Wpointer-arith]
     addr += sizeof(drmDevice);
          ^
../xf86drm.c:3020:10: warning: pointer of type 'void *' used in arithmetic [-Wpointer-arith]
     addr += DRM_NODE_MAX * sizeof(void *);
          ^
../xf86drm.c:3023:14: warning: pointer of type 'void *' used in arithmetic [-Wpointer-arith]
         addr += max_node_str;
              ^
../xf86drm.c:3035:14: warning: pointer of type 'void *' used in arithmetic [-Wpointer-arith]
         addr += sizeof(drmPciBusInfo);
              ^

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 12:48:52 +09:00
Matt Roper
8c4a1cbd98 xf86drm: Fix error handling for drmGetDevices()
If the opendir() call in drmGetDevices() returns failure, we jump to an
error label that calls closedir() and then returns.  However this means
that we're calling closedir(NULL) which may not be safe on all
implementations.  We are also leaking the local_devices array that was
allocated before the opendir() call.

Fix both of these issues by jumping to an earlier error label (to free
local_devices) and guarding the closedir() call with a NULL test.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
[Emil Velikov: make the teardown symmetrical, remove the NULL check]
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-10-02 13:17:03 +01:00
Felix Janda
4031dc17bb xf86drm: include <limits.h> for PATH_MAX
fixes compilation error with musl libc and Solaris based platforms.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92082
Signed-off-by: Felix Janda <felix.janda@posteo.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-28 17:59:55 +01:00
Emil Velikov
f3c6740f0c xf86drm: remove makedev() hack/workaround
Back when this was introduced commit 569da5a42eb(Merged glxmisc-3-0-0)
sys/sysmacros.h was used instead of the respecive headers (as per the
manual).

We've been handling it correctly for a little while now - in Linux, BSD
and Solaris. Thus we can drop this workaround.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:59:45 +01:00
Tobias Jakobi
df21b293e9 exynos/fimg2d: remove g2d_context from public header
All functions from the public API only operation on
struct g2d_context*, so this shouldn't break too much.

Make the context private since we don't want the
user to modify its content directly. Also remove
the defines that were only used for fields of
g2d_context.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
2015-09-21 17:43:14 +01:00
Tobias Jakobi
ce4a4f6e21 exynos/fimg2d: add message prefix
Add a prefix to the messages printed to the console via
printf() and fprintf() so that one can easily see where
the message comes from.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:43:14 +01:00
Tobias Jakobi
bf666b5e99 exynos/fimg2d: make g2d_add_cmd() less heavy
The function currently checks for each added command
if an overflow of the corresponding command buffers
occurs, but none of the callers ever checks the
return value.

Since all callers are now converted to use
g2d_check_space() simplify the function.

(1) The overflow checks become asserts, so they're only
    active for debug builds. This is fine since
    g2d_add_cmd() is not part of the public API.

(2) Switch the return value to void.

(3) Explicitly state that the caller has to check
    buffer space before calling g2d_add_cmd().

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:43:14 +01:00
Tobias Jakobi
6a4479da71 exynos/fimg2d: remove superfluous initialization of g2d_point_val
The g2d_point_val union consists of two coordinates of 16
bits. Whenever this union is used though, both coordinates
are explicitly set. Hence prior initialization is unnecessary.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:43:14 +01:00
Tobias Jakobi
76d1c6b157 exynos/fimg2d: remove default case from g2d_get_blend_op()
We now validate the blending mode via g2d_validate_mode()
prior to feeding it to g2d_get_blend_op().

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:43:14 +01:00
Tobias Jakobi
e3c97d1a24 exynos/fimg2d: add g2d_validate_xyz() functions
The G2D headers define a number of modes through enums
(like e.g. color, select, repeat, etc.).

This introduces g2d_validate_select_mode() and
g2d_validate_blending_op() which validate a
select mode or blending operation respectively.

Use this together with g2d_check_space() in
g2d_{blend,scale_and_blend}().

For this we move parameter validation to the top and
also validate the select mode of the source image and
the requested blending operation before starting
command submission.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:43:14 +01:00
Tobias Jakobi
2362c88251 exynos/fimg2d: add g2d_check_space()
This is going to be used to check if the command buffers have
enough space left prior to actual submission of the commands.

Use this in g2d_{solid_fill,copy,copy_with_scale}().

For this the parameter validation before buffer space
checking so that we can exit early if it fails.
Also don't reset the G2D context in this situation since
the buffers are not partially submitted anymore.

The repeat mode in g2d_copy_with_scale() is checked first
to make computation of space easier.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:43:14 +01:00
Tobias Jakobi
9017619714 exynos/fimg2d: simplify base address submission in g2d_scale_and_blend()
Use g2d_add_base_addr() for source and destination base
address just like all other calls.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:43:14 +01:00
Tobias Jakobi
a8dc2e75cf exynos/fimg2d: fix empty buffer handling in g2d_flush()
Empty command buffers are no error, we just don't have
anything to do for flushing then.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:43:14 +01:00
Emil Velikov
cec65e2fcc Fix SunOS/NetBSD atomic macro
Reported-by: Evgeny Litvinenko <evgeny.v.litvinenko@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:43:14 +01:00
Emil Velikov
8990ed3199 tests/drmdevice: add drm{Get,Free}Device() example
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:43:11 +01:00
Emil Velikov
ccedf66b65 xf86drm: add drm{Get,Free}Device
Similar interface to the *Devices() ones but they obtain/free the
information of the opened device (as given by its fd).

Note there is a fair bit of duplication between the two Get functions,
and anyone interested is more than welcome to consolidate it.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:43:08 +01:00
Emil Velikov
fae59d7234 xf86drm: split out drmProcessPciDevice and drmFoldDuplicatedDevices
Will be reused in the next commit.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:43:06 +01:00
Emil Velikov
8415a00a3f xf86drm: warn on missing drmGetMinorNameForFD implementation
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:43:03 +01:00
Emil Velikov
291b2bb92c xf86drm: move ifdef __linux__ guards where needed
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:42:57 +01:00
Emil Velikov
5f68d31820 xf86drm: rework drmGetDevices()
Do a once off memory allocation for each drmDevice.

This allows us to ease the error handling and simplify the
de-duplication loop. As part of this we need to rework drmFreeDevice()
such so that it frees the relevant hunks, rather than leaving that to
the caller.

Some memory stats from the drmdevice test

before: 22 allocs, 22 frees, 66,922 bytes allocated
after:   9 allocs, 9 frees, 66,436 bytes allocated

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:42:53 +01:00
Emil Velikov
6c88173f7e util_math: add MAX3 macro
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:42:51 +01:00
Emil Velikov
bc2aca9e22 xf86drm: rename drmSameDevice to drmCompareBusInfo
Move away form the boolean name, change the return value
appropriately and check if either argument is NULL.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:42:48 +01:00
Emil Velikov
a250fceaaa xf86drm: move the final linux specific bits out of drmGetDevices
Third and final piece of making drmGetDevices less crazy/ugly.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:42:46 +01:00
Emil Velikov
ef5192e9c7 xf86drm: move platform details to drmParsePciDeviceInfo()
As with previous commit let's try to keep drmGetDevices clean of linux
specifics.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:42:43 +01:00
Emil Velikov
536e0deba3 xf86drm: flex platform specifics into drmParsePciBusInfo
This will allow one to reuse the core drmGetDevices implementation on
other platforms. Keeping all the platform specifics in ParseFoo.

On the plus side this saves a bit of code :)

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:42:40 +01:00
Emil Velikov
f098d1c130 tests/drmdevice: add new 'test'
A simple example of how to use/what is the new drm{Get,Free}Devices()
interface.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-21 17:42:37 +01:00
Emil Velikov
ed3c665548 xf86drmMode: smoke-test the atomic API
As going through the modetest patches for atomic support I've noticed
that if we pass NULL for the drmModeAtomicReqPtr argument we'll crash.

So let's handle things appropriately if the user forgot to check the
return value of drmModeAtomicAlloc and drmModeAtomicDuplicate or made a
typo somewhere along the way.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Rob Clark <robclark@freedesktop.org>
Cc: Daniel Stone <daniels@collabora.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:32:03 +01:00
Emil Velikov
00808a99d0 automake: set --enable-valgrind during make distcheck
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-21 17:32:03 +01:00
Rob Clark
14968e4cf6 freedreno: debug msg cleanup
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-19 12:12:27 -04:00
Rob Clark
76a1e97eae freedreno: drop exported dmabuf fd tracking
There is really no reason to keep around the fd, it just consumes an
extra file handle.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-19 12:12:04 -04:00
Rob Clark
691d14c9a8 freedreno: don't reuse exported buffers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-19 12:11:38 -04:00
Rob Clark
c349616763 Bump version for release
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-16 09:03:40 -04:00
Alan Coopersmith
94ecdcb8b1 Include <alloca.h> when needed before calling alloca
Fixes "error: implicit declaration of function 'alloca'" failures
when building on Solaris

Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-09-12 09:41:24 -07:00
Tvrtko Ursulin
8983fe5497 libdrm: Add framebuffer modifiers uapi
Sync up with new kernel features as per commits:

e3eb3250d84ef97b766312345774367b6a310db8
93b81f5102a7cd270a305c2741b17c8d44bb0629
b5ff6e1637b683d5996ae11ac29afe406c0bee90
8c4f83fb1e8bf317e894f62d17a63c32b7a6b75e
570655b09b065d2fff1b8ab9bdb8308f4c5a05a3

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: dri-devel@lists.freedesktop.org
Cc: Rob Clark <robdclark@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-09 11:15:17 -04:00
Michel Dänzer
a814152187 tests: Add -lm to LDADD for dristat
Fixes build failure due to unresolved log2.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-09 16:03:03 +01:00
Emil Velikov
7faedc9efc configure: remove -Wno-missing-field-initializers
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
23667f566a intel: ignore missing-field-initializers warnings
We're about to remove the -Wno flag from configure.ac which will lead
to a lot of unnecessary spam.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
a9e5880b3e nouveau: use designated initializers
Cc: nouveau@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
ae2cf4507c tests/amdgpu: ensure tests work by using c99 initializers
In the latest version of CUnit the fourth parameter of the CU_SuiteInfo
struct is pSetUpFunc rather than *pTests.

Seems like the CUnit ABI broke at some point, so let's the the robust
thing and use c99 designated initializers to correctly populate the
struct(s).

Cc: Leo Liu <leo.liu@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
f756877736 tests/amdgpu: annotate (most of) the vce templates as const data
The remaining two templates are modified on the fly, depending on the
type of test to be performed.

Cc: Leo Liu <leo.liu@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
05185fa054 tests/amdgpu: annotate the uvd message templates as const data
Cc: Leo Liu <leo.liu@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
150ebe49ac tests/amdgpu: reference the correct variable for memcpy
Cc: Leo Liu <leo.liu@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
6a6d668fad freedreno: annotate the device/bo/pipe/ringbuffer funcs as const data
Cc: freedreno@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
ec2b105492 radeon: cleanup bo/cs func tables
Annotate the data as static const and use C99 designated initializers.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
aecd5a1879 libkms: use static const for good measure
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
04e243262d modetest: annotate const data as such for good measure
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
6894f2340b amdgpu: remove unneeded -Wno-switch-enum flag
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
598294dde8 configure: enable -Wshadow when available
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-04 21:39:06 +01:00
Emil Velikov
0ec7f4423d intel: introduce to_bo_gem() helper
...to minimise misuse of bo_gem.
If the variable is declared at the top of the function and then used
for two (or more) different contexts this can cause confusion and errors.

Just introduce a wrapper, which can be used in a once off situations.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by Chris Wilson <chris@chris-wilson.co.uk>
2015-09-04 21:39:01 +01:00
Emil Velikov
94425f6272 intel: error out on has_error in exec2
Just like we do for the original exec()

v2: move bo_gem declaration to the top of the function.

Cc: intel-gfx@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by Chris Wilson <chris@chris-wilson.co.uk>
2015-09-04 21:38:56 +01:00
Emil Velikov
cf7e32bdf9 intel: resolve shadowing warnings
v2: keep the bo_gem declaration in exec2() within the loop (Chris)

Cc: intel-gfx@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by Chris Wilson <chris@chris-wilson.co.uk>
2015-09-04 21:38:51 +01:00
Emil Velikov
99722bfec6 modetest: fix shadowing warnings
No real issue here, but let's fix these so that real issues don't get
lost in the spam.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-04 21:36:42 +01:00
Emil Velikov
687cc66d46 vbltest: fix variable shadowing warning
Just remove the second (shadowing) declaration of ret.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-09-04 21:36:42 +01:00
Rob Clark
51b5ca9457 freedreno: add API to get drm fd from fd_device
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-04 11:08:04 -04:00
Rob Clark
eb7c2d5e63 drm: make individual drm_server_info fxns optional
For android / drm_gralloc, we want to hook up our own debug_print()
without bothering with the reset of it.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-09-04 08:40:57 -04:00
Rob Clark
7d98a93cec freedreno: don't take ownership of the dmabuf fd on import
EGL_EXT_image_dma_buf_import specifies that the importer retains
ownership of the fd, rather then the importee.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-03 14:56:02 -04:00
Jonathan Gray
949c325c50 amdgpu: use EINVAL instead of EBADMSG in amdgpu_bo_cpu_unmap()
EBADMSG is a streams errno.  OpenBSD does not implement streams and does
include the streams errnos, this commit fixes the build on OpenBSD.

None of the callers of this function check the return value for -EBADMSG.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
2015-09-02 10:00:25 -04:00
monk.liu
f17017b8e2 amdgpu: fix missing deinit on vamgr_32
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: monk.liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-09-02 09:52:12 -04:00
Varad Gautam
c3301d0134 freedreno: serialize drmPrimeFDToHandle under table_lock
fixes the prime sharing race condition described by
"intel: Serialize drmPrimeFDToHandle with struct_mutex".

we inline fd_bo_from_handle() into fd_bo_from_dmabuf() and allow locking.

Signed-off-by: Varad Gautam <varadgautam@gmail.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-31 11:54:23 -04:00
Varad Gautam
cc7db673fa freedreno: use drmPrime wrappers to import/export prime bo's
don't call drmIoctl() directly for prime bo's, use the wrappers instead.

v3: remove struct drm_prime_handle and split locking

Signed-off-by: Varad Gautam <varadgautam@gmail.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-31 11:53:53 -04:00
Thierry Reding
508a5f77fa omap: Initialize DMA BUF file descriptor to -1
Commit c86dabfc9f ("omap: zero is a valid fd number, treat it as
such") corrected checks for valid file descriptors, but the OMAP buffer
object code initializes the DMA-BUF file descriptor to 0 (as a result of
calloc()'ing the structure). Obviously this isn't going to work because
subsequent code will try to use file descriptor 0 (most likely stdin at
that point) as a DMA-BUF. It may also try and close stdin when a buffer
object is destroyed.

Fix this by initializing the DMA-BUF file descriptor to -1, properly
marking it as an invalid file descriptor.

Fixes: c86dabfc9f ("omap: zero is a valid fd number, treat it as such")
Reported-by: Robert Nelson <robertcnelson@gmail.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-26 15:15:54 +02:00
Christian König
a5ea0c64c5 amdgpu: serialize drmPrimeFDToHandle
Fixes the same problem as "intel: Serialize drmPrimeFDToHandle with struct_mutex".

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
2015-08-25 10:27:45 -04:00
Christian König
f6f25d67a9 amdgpu: remove sequence mutex
It's not used any more.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
2015-08-25 10:26:58 -04:00
Emil Velikov
1e66ee21ab Move -lm link flag to LIBADD
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-24 18:24:24 +01:00
Jérôme Glisse
51d72a619e drm: Add -lm to libdrm ldflags to fix build failure.
Last commit (b556ea127e) introduced
use of log2 which require -lm flag for the linker on quite few
distribution. Just add that flag to fix build.

Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
2015-08-24 13:16:56 -04:00
Emil Velikov
b556ea127e drm: add interface to get drm devices on the system v3
For mutiple GPU support, the devices on the system should be enumerated
to get necessary information about each device, and the drmGetDevices
interface is added for this. Currently only PCI devices are supported for
the enumeration.

Typical usage:
int count;
drmDevicePtr *foo;
count = drmGetDevices(NULL, 0);
foo = calloc(count, sizeof(drmDevicePtr));
count = drmGetDevices(foo, count);
/* find proper device, open correct device node, etc */
drmFreeDevices(foo, count);
free(foo);

v2: [Jammy Zhou]
 - return a list of devices, rather than nodes
v3: [Jammy Zhou]
 - fix the signed extension for PCI device info

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-24 17:36:28 +01:00
Mathias Tillman
5c42b5e36a drm: fix the usage after free
For readdir_r(), the next directory entry is returned in caller-allocted
buffer (pointered by pent here).

https://bugs.freedesktop.org/show_bug.cgi?id=91704

Signed-off-by: Mathias Tillman <master.homer@gmail.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-24 11:11:20 +02:00
Varad Gautam
1eba47a763 freedreno: get bo size for imported dma-buf
Signed-off-by: Varad Gautam <varadgautam@gmail.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-23 12:33:45 -04:00
Varad Gautam
425c8e5af7 freedreno: fill bo->fd when importing
Signed-off-by: Varad Gautam <varadgautam@gmail.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-23 12:33:24 -04:00
Varad Gautam
857c22e5ec freedreno: fix a bo cache segfault with imported bo's
Importing a bo whose handle is still in the bo cache crashes during cleanup.
Remove bo from cache when importing.

Signed-off-by: Varad Gautam <varadgautam@gmail.com>
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-23 12:33:09 -04:00
Rafał Sapała
cf40cf05a4 intel: Serialize drmPrimeFDToHandle with struct_mutex
It is possible to hit a race condition in create_from_prime, when trying
to import a BO that's currently being freed. In case of prime sharing
we'll succesfully get a handle, but fail on get_tiling call, potentially
confusing the caller (and requiring different locking scheme than with
sharing using flink). Wrap fd_to_handle with struct_mutex to force
a more consistent behaviour between prime/flink, convert fprintf to DBG
when handling errors.

(From Chris:
  The race is that the kernel returns us the same file-private handle as
  the first thread, but that first thread is about to call gem_close
  (thereby removing the handle from the file completely) and does so
  between us acquiring the handle and taking the mutex. If we take
  the mutex, then we acquire the refcnt on the bo prior to the first
  thread completing its unref (and so preventing the early close). Or we
  acquire the handle after the earlier close, in which case we are the new
  owner.
)

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Testcase: igt/drm_import_export/import-close-race-prime
Signed-off-by: Rafał Sapała <rafal.a.sapala@intel.com>
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
2015-08-21 14:43:23 +01:00
Hyungwon Hwang
6e84ada4cc modetest: remove the trailing white spaces
This patch removes the trailing white spaces.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
2015-08-20 17:11:15 +01:00
Hyungwon Hwang
4bac035c34 xf86drmMode: remove the trailing white spaces
This patch removes the trailing white spaces.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
2015-08-20 17:11:15 +01:00
Mauro Rossi
b201abe76b amdgpu: add Android build support
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-20 16:58:32 +01:00
Mauro Rossi
ae7f7b27a1 amdgpu: add Makefile.sources
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
[Emil Velikov: remove duplicate amdgpu.h from LIBDRM_AMDGPU_FILES]
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-20 16:56:51 +01:00
Rob Clark
ab2fadabde Bump version for release
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-18 11:56:50 -04:00
Rob Clark
04a118d800 freedreno: update freedreno-symbol-check
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-18 10:53:56 -04:00
Thierry Reding
5e5a3c48b8 libdrm: Make indentation consistent
Use tabs and spaces consistently to align function arguments on
subsequent lines with those of the first line.

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-18 10:48:51 +02:00
Thierry Reding
d2d361cddd libdrm: Remove gratuitous blank lines
Usage of blank lines can be a matter of taste, of course, but for these
we can surely all agree that they're not needed and inconsistent.

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-08-18 10:48:11 +02:00
Jammy Zhou
56d8dd6a9c amdgpu: make vamgr per device v2
Each device can have its own vamgr, so make it per device now.
This can fix the failure with multiple GPUs used in one single
process.

v2: rebase

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:29:26 -04:00
Jammy Zhou
ffa305d0fc amdgpu: add flag to support 32bit VA address v4
The AMDGPU_VA_RANGE_32_BIT flag is added to request VA range in the
32bit address space for amdgpu_va_range_alloc.

The 32bit address space is reserved at initialization time, and managed
with a separate VAMGR as part of the global VAMGR. And if no enough VA
space available in range above 4GB, this reserved range can be used as
fallback.

v2: add comment for AMDGPU_VA_RANGE_32_BIT, and add vamgr to va_range
v3: rebase to Emil's drm_private series
v4: fix one warning

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:26:26 -04:00
Jammy Zhou
102ab6f004 amdgpu: improve amdgpu_vamgr_init
Make it a generic function independent of the device info.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:21:38 -04:00
Rob Clark
15ba8768f7 freedreno: add fd_pipe_wait_timeout()
We need to pass through a timeout parameter to implement
pipe->fence_finish() properly.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-17 14:23:03 -04:00
Rob Clark
4413f191a0 freedreno/msm: dump out submit info on error
User should only see these with LIBGL_DEBUG=verbose.  But in case you
are hitting issues like "handle X at index Y already on submit list"
errors from the kernel, this gives some useful visibility for debug.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-17 10:35:08 -04:00
Rob Clark
9e34ee4f75 freedreno/msm: fix issue where same bo is on multiple rings
It should be a less common case, but it is possible for a single bo to
be on multiple rings, for example when sharing a buffer across multiple
pipe_context's created from same pipe_screen.

So rather than completely fall over in this case, fallback to slow-path
of looping over all bo's in the ring's bo-table (but retain the fast-
path of constant-lookup for the first ring the buffer is on).

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-17 10:35:08 -04:00
Rob Clark
2fa58ef8f4 freedreno/msm: reorg ringbuffer struct
Group the parts related to building out submit ioctl into their own
sub-struct.  Split out from next commit since it is just boring churn.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-08-17 10:10:34 -04:00
Michel Dänzer
2a34176123 tests/amdgpu: Remove unused local variable 'i'
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 18:54:33 +09:00
Michel Dänzer
25784d3af2 tests/amdgpu: Include config.h first
Fixes build failure on 32-bit because _FILE_OFFSET_BITS wasn't defined to
64.

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 18:41:11 +09:00
Thierry Reding
f05a74fb9c tests: modetest: Accept connector names in addition to connector IDs
Allow connector names to be used in the specification of the -s option.
This requires storing the string passed on the command-line so that it
can later be resolved to a connector ID (after the DRM device has been
opened).

Connector names are constructed from the connector type name and
connector type ID using the same format as used internally in the
Linux kernel.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-08-15 03:06:57 +03:00
Marek Olšák
f045da45fe Bump version for release 2015-08-14 14:19:29 +02:00
Emil Velikov
15350568cc amdgpu: add symbols check test
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:43:39 +01:00
Emil Velikov
bddf4df4a1 amdgpu: hide the final internal functions from global namespace
Thus the only symbols that we export are the ones officially provided by
the API.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:43:36 +01:00
Emil Velikov
b471818977 amdgpu/amdgpu_vamgr: hide private symbols from global namespace
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:43:33 +01:00
Emil Velikov
c19fa2b1ca amdgpu: squash trivial documentation typo
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:43:30 +01:00
Emil Velikov
a30da8e9b3 amdgpu: cosmetic chances in license boilerplate
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:43:27 +01:00
Emil Velikov
f4c2bfd63e amdgpu: add a bunch of missing config.h includes
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:43:24 +01:00
Emil Velikov
f4d14f147c amdgpu/util_hash_table: hide private symbols from global namespace
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:43:22 +01:00
Emil Velikov
5f0f6387a6 amdgpu/util_hash: hide private symbols from global namespace
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:43:19 +01:00
Emil Velikov
bf4826430a Force enable amdgpu for the dist build/check.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-13 17:42:04 +01:00
Alex Deucher
e57be77810 radeon: add new OLAND pci id
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-10 16:26:42 -04:00
Tapani Pälli
d7f58da11a modeprint: cleanup, remove compile warnings
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-10 11:28:33 +03:00
Tapani Pälli
f1468e8846 intel: wrap intel_bufmgr.h C code for C++ compilation/linking
We need this include in porting changes for the OpenGL ES
conformance suite.

v2: remove c_plusplus usage

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-10 11:26:16 +03:00
Tapani Pälli
1c205749fe remove usage of 'c_plusplus' preprocessor macro
Use only __cplusplus which is supported by the C++ standard.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-08-10 11:25:39 +03:00
Alex Deucher
c8df9e724e add a note about which version of cunit is fixed for debian/ubuntu
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-06 13:44:16 -04:00
Alex Deucher
e1f31d98a7 move up cunit workaround for ubuntu/debian
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-06 13:38:31 -04:00
Alex Deucher
b93594b1bf fix amdgpu cunit configure test harder
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-06 11:19:55 -04:00
Alex Deucher
11a390ea66 fix configuration when amdgpu is disabled
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-06 11:13:48 -04:00
Michel Dänzer
2978f5c37e amdgpu: Remove unused local variables bo_size/offset from amdgpu_cs_submit
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:50:38 -04:00
Jammy Zhou
d01c361af5 amdgpu: expose the PCI revision ID
The PCI revision ID can be used to differentiate ASICs.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:50:29 -04:00
Mario Kleiner
7d418f906c libdrm/amdgpu: Use private fd for amdgpu_device and winsys hash table to fix ZaphodHeads. (v2)
The amdgpu_device for a device node needs its own dup'ed fd, instead
of using the original fd passed in for a screen, to make multi-x-screen
ZaphodHeads configurations work on amdgpu.

The original fd's lifetime differs from that of the amdgpu_device, and from the
one stored in the hash. The hash key is the fd, and in order to compare hash
entries we fstat them, so the fd must be around for as long as the amdgpu_device
is.

This patch for libdrm/amdgpu is a translation of the radeon-winsys ZaphodHeads
fix for mesa's radeon-winsys, from mesa commit 28dda47ae4d974e3e032d60e8e0965c8c068c6d8

"winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads."

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

v2: Check for valid fd's being >= 0, because fd == 0 is in theory
    a valid, although unlikely, fd and fd == -1 would denote an
    invalid fd. Thanks to William Lewis for pointing this out.

Reported-by: William Lewis <minutemaidpark@hotmail.com>
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
2015-08-05 13:47:52 -04:00
Alexandr Akulich
399ac8bafa libdrm/amdgpu: Fixed drm.h include.
The include type changed from system to own.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alexandr Akulich <akulichalexander@gmail.com>
2015-08-05 13:47:52 -04:00
Michel Dänzer
d9b282593e amdgpu/tests: Cast CPU map argument of amdgpu_bo_alloc_and_map to void**
Silences incompatible pointer type compiler warnings.

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Michel Dänzer
84d099072f amdgpu/tests: Use buf_handle in amdgpu_bo_alloc_and_map() error paths
The compiler pointed out that bo has the wrong type.

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Leo Liu
d2cbe9ecbe amdgpu: add VCE harvesting instance query
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Ken Wang
9961900b8d test/amdgpu : fix a bug in VCE/UVD test introduced by previous change
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Jammy Zhou
8aeffcc1cf amdgpu: add amdgpu_bo_va_op for va map/unmap support v3
The following interfaces are changed accordingly:
- amdgpu_bo_alloc
- amdgpu_create_bo_from_user_mem

v2: update the interfaces
v3: remove virtual_mc_base_address from amdgpu_bo

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Jammy Zhou
95d0f35daf amdgpu: add flags parameter for amdgpu_va_range_alloc
The flags is added for extensibility to cover some special requirements
in the future, i.e, request VA range in the first 4GB of address space

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Ken Wang
926c805686 amdgpu : move management of user fence from libdrm to UMD
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Christian König
01e4546ff3 amdgpu: fix bs buffer size for vce test
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Jammy Zhou
872a5c714a tests/amdgpu: remove the duplicate IB allocation for VCE test
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Jammy Zhou
90e14d453a drm: fix the ALIGN macro to avoid value clamp
If the value is 64bit, but the alignment is 32bit type, the high 32bit
will be clamped with previous definition

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Michel Dänzer
95ecf91c7b amdgpu: Use drmIoctl in amdgpu_ioctl_wait_cs
This is safe now because the ioctl uses an absolute timeout.

This prevents amdgpu_cs_query_fence_status from returning early e.g.
when a signal is delivered, which in turn caused Mesa winsys code to
assume a BO was idle when it actually wasn't yet.

Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Christian König
5463d2e83a amdgpu: use common fence structure for dependencies as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Jammy Zhou
f91b56dc8c amdgpu: improve the amdgpu_cs_query_fence_status interface
make amdgpu_cs_query_fence reusable to support multi-fence query

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:52 -04:00
Sabre Shao
12802da74f amdgpu: add va range query interface
amdgpu_va_range_query interface is added so that client can query va
range supported by specific device.

Signed-off-by: Sabre Shao <Sabre.Shao@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Sabre Shao
23fab59ba5 amdgpu: add va allocation intefaces
Two new interfaces are added to support client request for
allocate virtual address without physical memory committed to.
The virtual address space can be managed by client itself.

Signed-off-by: Sabre Shao <Sabre.Shao@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Ken Wang
5b01908d1c amdgpu: add base_preferred parameter to amdgpu_vamgr_find_va
base_preferred parameter is added to amdgpu_vamgr_find_va
so UMD can specify preferred va address when allocating.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Marek Olšák
8097d08ee4 amdgpu: check the user fence only if the IP supports user fences
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:52 -04:00
Marek Olšák
67c994f057 drm/amdgpu: allow passing absolute timeouts to amdgpu_cs_query_fence_status
Useful when Mesa wants to wait for a lot of fences at the same time and
doesn't want to recalculate the relative timeout after every call.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:52 -04:00
Christian König
28462ebd25 amdgpu: remove reference to AMD specific error codes
We just have never defined any.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:51 -04:00
Christian König
558e1294f2 amdgpu: cleanup public interface style
Fix some style problems, adjust to a common indentation, reorder two
function definitions and remove stale comments.

No intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:51 -04:00
Christian König
4a9f5f2e1e gitignore: add some generated amdgpu files
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:51 -04:00
Christian König
0f37bc9029 amdgpu: add CS dependencies v2
This allows the driver to specify on which previous CS to wait.

v2: fix spelling in comment

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-08-05 13:47:51 -04:00
Alex Deucher
cf5646001e amdgpu: update to the latest kernel header
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Christian König
69827cd1f6 amdgpu: remove pointer arithmetic from command submission
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-08-05 13:47:51 -04:00
Jammy Zhou
bef8b6097c amdgpu: do NULL check for bo handle in amdgpu_bo_query_info
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:51 -04:00
Christian König
933091e1d6 amdgpu: cleanup VA IOCTL handling
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Christian König
804048ff65 amdgpu: remove flink export workaround v2
Alternative solution to Mareks patch to stop causing trouble with render nodes.

v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Christian König
9f16c733f1 amdgpu: explicitly unmap GPU mapping on BO destruction
That exercises the IOCTL and stops relying us on implicit unmapping.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Jammy Zhou
d273d84754 amdgpu: merge amdgpu_drm.h from kernel
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Jammy Zhou
7bbc1debaf amdgpu: cleanup gds specific alloc/free functions
amdgpu_bo_alloc/free can be used with GDS/OA/QWS domains specified

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Jammy Zhou
657245f7a3 amdgpu: add amdgpu_query_gds_info
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Marek Olšák
201b09a443 amdgpu: fix double mutex_unlock in amdgpu_bo_import
The handles array is used below, which is followed by another unlock,
so remove the first one.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Marek Olšák
7d7f25c938 amdgpu: fix valgrind warnings
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Marek Olšák
34e1250e37 amdgpu: use alloca and malloc in critical codepaths (v2)
And don't clear the memory when it's unnecessary.

v2: use malloc for arrays that can be big

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:51 -04:00
Marek Olšák
908f34e70c amdgpu: allow exporting KMS handles with render nodes
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:51 -04:00
Jack Xiao
b9ef29d1be amdgpu: add zero timeout check in amdgpu_cs_query_fence_status
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:51 -04:00
Marek Olšák
76af5c249f amdgpu: remove bo_handle from amdgpu_cs_ib_info, IBs should be in buffer list
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:51 -04:00
Marek Olšák
646f5411cf amdgpu: remove amdgpu_ib helpers
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Marek Olšák
194d5c2ee4 amdgpu: remove amdgpu_ib
Not useful if we're gonna use BO handles directly.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Marek Olšák
2a344a8d8a amdgpu: don't use amdgpu_cs_create_ib for allocation of the fence BO
amdgpu_cs_create_ib will go away.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Jammy Zhou
1041cfdc38 tests/amdgpu: manage IB in client side
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Jammy Zhou
40c5336043 amdgpu: get rid of IB pool management v3
v1: by Jammy Zhou
v2: remove bo wait when destroy IB by Jammy Zhou
v3: more cleanups by Marek

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang
ef9aa370bb amdgpu: add ib_start_alignment and ib_size_alignment for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang
cdd1edcae0 amdgpu: add ce_ram_size for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang
4bf29413a3 amdgpu: add vram_type and vram_bit_width for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang
fc9fc7dd11 amdgpu: add max_memory_clock for interface query
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:50 -04:00
Marek Olšák
745081395e amdgpu: rename GEM_OP_SET_INITIAL_DOMAIN -> GEM_OP_SET_PLACEMENT
No users.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:50 -04:00
Christian König
942a5dbe6c amdgpu: stop checking flag masks
The kernel is responsible for parameter checking, not libdrm.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
2015-08-05 13:47:50 -04:00
Leo Liu
0f4e6702ee tests/amdgpu: implement VCE unit tests
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Ken Wang
322d02d025 amdgpu: make vamgr global
This is the first sub-patch of va interface task, the va task is
about adding more va management interfaces for UMD, by design, the
vamgr should be per-process rather than per-device.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Jammy Zhou
ba1653eff8 tests/amdgpu: add shared IB submission test v2
v2: some function renaming

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:50 -04:00
Jammy Zhou
60e221c925 amdgpu: add IB sharing support v2
A new 'offset' flag is added to the amdgpu_cs_ib_info structure,
which can be used to specify location of PM4 packets to execute
in the IB buffer object

v2: remove the shared IB flag, etc

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:50 -04:00
Marek Olšák
7c50f0d984 amdgpu: add new AMDGPU_TILING flags
Copied from the kernel.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Christian König
12a23b1964 amdgpu: add helper for VM mapping v2
Less code and also provides the map_size parameter.

v2: Also set offset_in_bo, use *_handle defines.

Signed-off-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Christian König
d5c0b2a172 amdgpu: remove bo_vas hash table v2
Not used any more.

v2: Keep accidental removed lines.

Signed-off-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Jammy Zhou
7244698ddc amdgpu: add amdgpu_bo_list_update interface v2
v2: some minor improvement

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:50 -04:00
Jammy Zhou
3f1ca0f939 amdgpu: replace alloca with calloc v2
use heap memory instead of stack memory to avoid potential stack overflow
when a large number of resources are used for the bo_list.

v2: some minor improvement

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
8cf8ac1539 amdgpu: remove unused AMDGPU_IB_RESOURCE_PRIORITY
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
8a208ee8f9 amdgpu: fix the number of IB size enums
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:49 -04:00
Marek Olšák
2d588797f1 amdgpu: fix a valgrind warning
==10307== Conditional jump or move depends on uninitialised value(s)
==10307==    at 0xB9F4CFA: amdgpu_device_initialize (amdgpu_device.c:193)

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:49 -04:00
Marek Olšák
4b39a8e7cf amdgpu: implement amdgpu_cs_query_reset_state
v2: also return the number of hangs

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:49 -04:00
monk.liu
d3e7195066 amdgpu: fix vamgr_free_va logic
va+size will overflow if va equals to AMDGPU_INVALID_VA_ADDRESS, just
return when hit that condition

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
2015-08-05 13:47:49 -04:00
monk.liu
9066acf109 amdgpu: fix code alignment
Signed-off-by: monk.liu <monk.liu@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
241cf6d105 amdgpu: validate the upper limit of virtual address v2
Only 8GB virtual address space is used by default now

v2: use -ENOSPC for the error case

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
db126d1d8a amdgpu: reuse the kernel IB flags v2
v2: remove 'CE' from the preamble flag

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
d9c431dd02 amdgpu: add ctx_id for wait_cs
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: David Zhou <david1.zhou@amd.com>
2015-08-05 13:47:49 -04:00
Jack Xiao
7454779f9b amdgpu: fix round down/up page size error
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Monk Liu monk.liu@amd.com
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
14070057d8 amdgpu: fix 32-on-64 support (v2)
0xffffffff was appended to the higher 32bit with (intptr_t) when use
32bit libdrm_amdgpu.so with 64bit kernel, and it caused segmentation
fault for 32bit application.

v2: switch to uintptr_t

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
a4c8321179 amdgpu: remove AMDGPU_GEM_CREATE_CPU_GTT_UC
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:49 -04:00
Jammy Zhou
639c7de955 amdgpu: remove active_rb_pipes from amdgpu_gpu_info
The active RB pipes can be retrieved from enabled_rb_pipes_mask,
for which each bit indicates one active pipe if it is '1'.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:49 -04:00
monk.liu
3b50db9d9f amdgpu: fix segfault when resources are NULL
Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-05 13:47:49 -04:00
Christian König
c68d58aa14 amdgpu: compare the primary device names instead
Instead of taking a look at the device major/minor we
just compare the primary device name to figure out if
two fds are pointing to the same device.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
2015-08-05 13:47:49 -04:00
Christian König
6dc2eaf2cc amdgpu: add public bo list interface v3
v2: cleanup comments and function parameter
v3: rebased on internal branch

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:49 -04:00
Christian König
9c2afffedb amdgpu: cleanup public interface v2
Remove the mostly unused device parameter, for the few cases
where we really need it keep a copy in the context structure.

v2: rebased on internal branch

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:49 -04:00
monk.liu
9c3bec246e amdgpu: do not call BO_LIST ioctl when no resource referred
Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:49 -04:00
monk.liu
83d9369583 amdgpu: fix an error of bo_list handler
original method is just totally wrong, it loses the bo_list handler at
all after command stream accomplished

Signed-off-by: Monk.Liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:49 -04:00
monk.liu
cc01c3cb5a amdgpu: add missing mutex lock/unlock pair
Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:48 -04:00
monk.liu
2f2c8ac0f4 amdgpu: support non-page-aligned userptr
Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:48 -04:00
Alex Deucher
3c5fe78801 drm: add tests/amdgpu (v3)
This adds some basic unit tests for the new amdgpu driver.

v2: use common util_math.h
v3: implement suggestions from Emil
    replace malloc/memset with calloc
    make header guards all caps
    use posix_memalign rather than mem_align
    replace malloc with calloc for pm4 allocations
    make CU_SuiteInfo static
    fix Makefile.am
    fix fd numbering
    use drmGetVersion/drmFreeVersion rather than open coding it
    close fd, clean up CU registry on error

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:48 -04:00
Alex Deucher
0936139536 drm: add libdrm_amdgpu (v7)
This is the new ioctl wrapper used by the new admgpu driver.
It's primarily used by xf86-video-amdgpu and mesa.

v2: fix amdgpu_drm.h install
v3: Integrate some of the sugestions from Emil:
    clean up Makefile.am, configure.ac
    capitalize header guards
    fix _FILE_OFFSET_BITS with config.h
    use drm_mmap/drm_munmap
    Remove unused ARRAY_SIZE macro
    use shared list implementation
    use shared math implementation
    use drmGetNodeTypeFromFd helper
v4: remove unused tiling defines
v5: include amdgpu.h in Makefile.am
v6: update amdgpu_drm.h
v7: libdrm.h -> libdrm_macros.h

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:48 -04:00
Alex Deucher
a3c89dda5b drm: add util_math.h
Used by amdgpu, could be used by other components.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:48 -04:00
Alex Deucher
4ee0fa2f37 drm: consolidate common list implementations (v2)
This is used by radeon and freedreno and will be used
by amdgpu.  I looked at switching to libdrm_lists.h,
but it's pretty horrible.  E.g., DRMLISTFOREACHENTRYSAFE.

v2: remove missed list.h from tests/radeon/Makefile.am

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-05 13:47:48 -04:00
Kristian Høgsberg Kristensen
cd2f91e18d intel: Drop aub dumping functionality
We now have a separate tool for this in intel-gpu-tools and we don't
need to clutter up libdrm with this feature. We leave the entry points
in there to avoid breaking API/ABI.

Install intel-gpu-tools, then run (for example)

    $ intel_aubdump --output=trace.aub glxgears -geometry 500x500

See the intel_aubdump man page for more details.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen@intel.com>
2015-08-03 09:19:47 -07:00
Jonathan Gray
fc083322b0 xf86drm: use the correct device minor names on OpenBSD
Add defines for the device minor names and make use of them
in drmGetMinorName() so the correct paths will be used on OpenBSD.

v2: don't add new defines to xf86drm.h to keep them out of the API
    as requested by Emil.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-29 18:04:15 +01:00
Jonathan Gray
66c3afb75f xf86drm: correct the OpenBSD DRM_MAJOR define
As far as I can tell no OpenBSD platform ever used 81
for a drm major.  While the value was added to libdrm in 2003
or earlier drm didn't appear in OpenBSD till 2007.

Of the OpenBSD platforms that support drm amd64/macppc/sparc64
use a major of 87, i386 uses 88.

v2: rearrange ifdefs as suggested by Emil.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-29 18:04:15 +01:00
Jonathan Gray
1d3b823650 xf86drmMode: Implement drmCheckModesettingSupported() for OpenBSD
This is implemented with kms ioctls so it could also be used as a
generic fallback.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-29 18:04:15 +01:00
Emil Velikov
d1f321fdf9 man: remove .man_fixup workaround
The whole thing is quite messy - the file is used to indicate that the
man pages were correctly generated prior to applying the "fixup" (alias)

At the same time we use a rule with the same name, to create the same
file if the generation has failed.

In other words - it attempts to create the file either way. So there is
little point in it and we can remove it.

Spotted while attempting to build with bmake which kindly blocked on the
following (non compliant construct)

.man_fixup: | $(miscman_DATA)

Cc: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-29 18:04:15 +01:00
Chris Wilson
1a6efaf68e drm: Detect no-op drmModeAtomicRequest and return early
If the number of items to process in the request is zero, we can forgo
duplicating, sorting the request and feeding it into the kernel and
instead report success immediately.  This prevents a NULL dereference of
the sorted->items for the no-op request.

Fixes: ed44e0b958
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Rob Clark <robclark@freedesktop.org>
Cc: Daniel Stone <daniels@collabora.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-28 18:09:06 +01:00
Joonyoung Shim
293f8fac0a Build vbltest irrespective of the presence of libudev.
The vbltest doesn't have any dependency of LIBUDEV.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-20 22:13:55 +01:00
Emil Velikov
c08655271a Consistently check the fd value
Follow the approach used through the rest of the project.

Suggested-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2015-07-16 16:41:53 +01:00
Emil Velikov
c1cd3d9388 xf86drm: fix incorrect fd comparison in drmOpenOnce{,WithType}
Spotted by looking for similar "let's assume fd == 0 is invalid" bugs.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2015-07-16 16:41:49 +01:00
Emil Velikov
c86dabfc9f omap: zero is a valid fd number, treat it as such
Equivalent to the previous patch.

Cc: Rob Clark <robdclark@gmail.com>
Suggested-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2015-07-16 16:41:42 +01:00
Emil Velikov
ea1786416c freedreno: zero is a valid fd number, treat it as such
Abeit quite unlikely to get hit by this bug here, let just fix it.

v2: Correct conditional (do not call ioctl(DRM_IOCTL_PRIME_HANDLE_TO_FD)
when we already have the fd).
v3: Fix kgsl_pipe.c, suggested by Thierry.

Cc: freedreno@lists.freedesktop.org
Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thierry Reding <thierry.reding@gmail.com>
2015-07-16 16:41:38 +01:00
Alan Coopersmith
dfed5e18f3 include <sys/types.h> & <sys/mkdev.h> directly for major() and minor()
Linux seems to pick these up via another header, but Solaris needs them
explicitly included, or we get undefined symbol errors for major & minor.

v2: use headers documented in makedev(3C) man page instead of sysmacros.h

Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>

v3 [Emil Velikov]: include sys/mkdev.h only when available.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-13 19:38:28 +01:00
Julien Cristau
fc8c3e23fb Fix headers inclusion in xf86drmMode.c
Add sys/sysctl.h to get sysctlbyname declaration on kFreeBSD

Updated by Thorsten “mirabilos” Glaser <t.glaser@tarent.de>
to add autoconf check and only include <sys/sysctl.h> if it
is detected by configure as it’s unusable on Linux/x32 (and
others, e.g. other new architectures).

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-07-11 21:21:07 +01:00
Anuj Phogat
5ba34e1aee Set alignment value in drm_intel_add_validate_buffer()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
2015-07-06 15:38:05 -07:00
Anuj Phogat
5c68f9f6f9 i965/gen9: Pass alignment as function parameter in drm_intel_gem_bo_alloc_internal()
In case of YF/YS tiled buffers libdrm need not know about the tiling
format because these buffers don't have hardware support to be tiled
or detiled through a fenced region. But, libdrm still need to know
about buffer alignment restrictions because kernel uses it when
resolving the relocation.

Mesa uses drm_intel_gem_bo_alloc_for_render() to allocate Yf/Ys buffers.
So, use the passed alignment value in this function to initialize the
align variable in drm_intel_bo. Note that we continue ignoring the
alignment value passed to drm_intel_gem_bo_alloc() to follow the
previous behavior.

V2: Add a condition to avoid allocation from cache. (Ben)
V3: Make no changes in cache allocation strategy. Just update the alignment.
    Update the aperture size estimate including the alignment. (Ben, Chris)
V4: Move aperture size adjustments inside drm_intel_bo_gem_set_in_aperture_size()
    Don't split sentences across the one-line header and the changelog. (Chris)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2015-07-06 15:36:59 -07:00
Emil Velikov
676c806d02 configure: default --enable-valgrind to auto
... as the help text says.

Reported-by: Jasper St. Pierre <jstpierre@mecheye.net>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-06-30 14:01:16 +01:00
341 changed files with 49281 additions and 13203 deletions

23
.editorconfig Normal file
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@ -0,0 +1,23 @@
# To use this config with your editor, follow the instructions at:
# http://editorconfig.org
root = true
[*]
charset = utf-8
insert_final_newline = true
[*.{c,h}]
indent_style = space
indent_size = 4
[{Makefile.*,*.mk}]
indent_style = tab
[*.m4]
indent_style = space
indent_size = 2
[{meson.build,meson_options.txt}]
indent_style = space
indent_size = 2

97
.gitignore vendored
View file

@ -1,96 +1 @@
bsd-core/*/@
bsd-core/*/machine
*~
*.1
*.3
*.5
*.7
*.flags
*.ko
*.ko.cmd
*.la
*.lo
*.log
*.mod.c
*.mod.o
*.o
*.o.cmd
*.sw?
*.trs
.depend
.deps
.libs
.tmp_versions
.*check*
.*install*
Makefile
Makefile.in
TAGS
aclocal.m4
autom4te.cache
build-aux
bus_if.h
compile
config.guess
config.h
config.h.in
config.log
config.status
config.sub
configure
configure.lineno
cscope.*
depcomp
device_if.h
drm.kld
drm_pciids.h
export_syms
i915.kld
install-sh
libdrm/config.h.in
libdrm.pc
libdrm_intel.pc
libdrm_nouveau.pc
libdrm_radeon.pc
libdrm_omap.pc
libdrm_exynos.pc
libdrm_freedreno.pc
libkms.pc
libtool
ltmain.sh
mach64.kld
man/.man_fixup
mga.kld
missing
mkinstalldirs
opt_drm.h
pci_if.h
r128.kld
radeon.kld
savage.kld
sis.kld
stamp-h1
tdfx.kld
via.kld
tests/auth
tests/dristat
tests/drmsl
tests/drmstat
tests/getclient
tests/getstats
tests/getversion
tests/hash
tests/lock
tests/openclose
tests/random
tests/setversion
tests/updatedraw
tests/modeprint/modeprint
tests/modetest/modetest
tests/name_from_fd
tests/proptest/proptest
tests/kmstest/kmstest
tests/vbltest/vbltest
tests/radeon/radeon_ttm
tests/exynos/exynos_fimg2d_test
man/*.3
/build*

265
.gitlab-ci.yml Normal file
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@ -0,0 +1,265 @@
# This is the tag of the docker image used for the build jobs. If the
# image doesn't exist yet, the containers stage generates it.
#
# In order to generate a new image, one should generally change the tag.
# While removing the image from the registry would also work, that's not
# recommended except for ephemeral images during development: Replacing
# an image after a significant amount of time might pull in newer
# versions of gcc/clang or other packages, which might break the build
# with older commits using the same tag.
#
# After merging a change resulting in generating a new image to the
# main repository, it's recommended to remove the image from the source
# repository's container registry, so that the image from the main
# repository's registry will be used there as well.
.templates_sha: &template_sha c6aeb16f86e32525fa630fb99c66c4f3e62fc3cb # see https://docs.gitlab.com/ee/ci/yaml/#includefile
include:
- project: 'freedesktop/ci-templates'
ref: *template_sha
file:
- '/templates/debian.yml'
- '/templates/freebsd.yml'
- '/templates/ci-fairy.yml'
variables:
FDO_UPSTREAM_REPO: mesa/libdrm
FDO_REPO_SUFFIX: "$BUILD_OS/$BUILD_ARCH"
stages:
- "Base container"
- "Build"
.ci-rules:
rules:
- when: on_success
# CONTAINERS
.os-debian:
variables:
BUILD_OS: debian
FDO_DISTRIBUTION_VERSION: trixie-slim
FDO_DISTRIBUTION_PACKAGES: 'build-essential docbook-xsl libatomic-ops-dev libcairo2-dev libcunit1-dev libpciaccess-dev meson ninja-build pkg-config python3 python3-pip python3-wheel python3-setuptools python3-docutils valgrind'
# bump this tag every time you change something which requires rebuilding the
# base image
FDO_DISTRIBUTION_TAG: "2026-04-27.0"
.debian-x86_64:
extends:
- .os-debian
variables:
BUILD_ARCH: "x86-64"
.debian-aarch64:
extends:
- .os-debian
variables:
BUILD_ARCH: "aarch64"
.debian-armv7:
extends:
- .os-debian
variables:
BUILD_ARCH: "armv7"
FDO_DISTRIBUTION_PLATFORM: linux/arm/v7
.os-freebsd:
variables:
BUILD_OS: freebsd
FDO_DISTRIBUTION_VERSION: "14.2"
FDO_DISTRIBUTION_PACKAGES: 'meson ninja pkgconf libpciaccess textproc/py-docutils cairo'
# bump this tag every time you change something which requires rebuilding the
# base image
FDO_DISTRIBUTION_TAG: "2025-05-22.0"
.freebsd-x86_64:
extends:
- .os-freebsd
variables:
BUILD_ARCH: "x86_64"
# Build our base container image, which contains the core distribution, the
# toolchain, and all our build dependencies. This will be reused in the build
# stage.
x86_64-debian-container_prep:
extends:
- .ci-rules
- .debian-x86_64
- .fdo.container-build@debian
stage: "Base container"
variables:
GIT_STRATEGY: none
aarch64-debian-container_prep:
extends:
- .ci-rules
- .debian-aarch64
- .fdo.container-build@debian
tags:
- aarch64
stage: "Base container"
variables:
GIT_STRATEGY: none
armv7-debian-container_prep:
extends:
- .ci-rules
- .debian-armv7
- .fdo.container-build@debian
tags:
- aarch64
stage: "Base container"
variables:
GIT_STRATEGY: none
FDO_BASE_IMAGE: "arm32v7/debian:$FDO_DISTRIBUTION_VERSION"
x86_64-freebsd-container_prep:
extends:
- .ci-rules
- .freebsd-x86_64
- .fdo.qemu-build@freebsd@x86_64
stage: "Base container"
variables:
GIT_STRATEGY: none
# Core build environment.
.build-env:
variables:
MESON_BUILD_TYPE: "-Dbuildtype=debug -Doptimization=0 -Db_sanitize=address,undefined"
# OS/architecture-specific variants
.build-env-debian-x86_64:
extends:
- .fdo.suffixed-image@debian
- .debian-x86_64
- .build-env
needs:
- job: x86_64-debian-container_prep
artifacts: false
.build-env-debian-aarch64:
extends:
- .fdo.suffixed-image@debian
- .debian-aarch64
- .build-env
variables:
# At least with the versions we have, the LSan runtime makes fork unusably
# slow on AArch64, which is bad news since the test suite decides to fork
# for every single subtest. For now, in order to get AArch64 builds and
# tests into CI, just assume that we're not going to leak any more on
# AArch64 than we would on ARMv7 or x86-64.
ASAN_OPTIONS: "detect_leaks=0"
tags:
- aarch64
needs:
- job: aarch64-debian-container_prep
artifacts: false
.build-env-debian-armv7:
extends:
- .fdo.suffixed-image@debian
- .debian-armv7
- .build-env
tags:
- aarch64
needs:
- job: armv7-debian-container_prep
artifacts: false
.build-env-freebsd-x86_64:
variables:
# Compiling with ASan+UBSan appears to trigger an infinite loop in the
# compiler shipped with FreeBSD 13.0, so we only use UBSan here.
# Additionally, sanitizers can't be used with b_lundef on FreeBSD.
MESON_BUILD_TYPE: "-Dbuildtype=debug -Db_sanitize=undefined -Db_lundef=false"
extends:
- .fdo.suffixed-image@freebsd
- .freebsd-x86_64
- .build-env
needs:
- job: x86_64-freebsd-container_prep
artifacts: false
# BUILD
.do-build:
extends:
- .ci-rules
stage: "Build"
variables:
GIT_DEPTH: 10
script:
- meson setup build
--fatal-meson-warnings --auto-features=enabled
-D udev=true
- ninja -C build
- ninja -C build test
- DESTDIR=$PWD/install ninja -C build install
artifacts:
when: on_failure
paths:
- build/meson-logs/*
.do-build-qemu:
extends:
- .ci-rules
stage: "Build"
script:
# Start the VM and copy our workspace to the VM
- /app/vmctl start
- scp -r $PWD "vm:"
# The `set +e is needed to ensure that we always copy the meson logs back to
# the workspace to see details about the failed tests.
- |
set +e
/app/vmctl exec "pkg info; cd $CI_PROJECT_NAME ; meson setup build --fatal-meson-warnings --auto-features=enabled -D etnaviv=disabled -D nouveau=disabled -D valgrind=disabled && ninja -C build"
set -ex
scp -r vm:$CI_PROJECT_NAME/build/meson-logs .
/app/vmctl exec "ninja -C $CI_PROJECT_NAME/build install"
mkdir -p $PREFIX && scp -r vm:$PREFIX/ $PREFIX/
# Finally, shut down the VM.
- /app/vmctl stop
artifacts:
when: on_failure
paths:
- build/meson-logs/*
# Full build and test.
x86_64-debian-build:
extends:
- .build-env-debian-x86_64
- .do-build
aarch64-debian-build:
extends:
- .build-env-debian-aarch64
- .do-build
armv7-debian-build:
extends:
- .build-env-debian-armv7
- .do-build
# Daily build
meson-arch-daily:
rules:
- if: '$SCHEDULE == "arch-daily"'
when: on_success
- when: never
image: archlinux/archlinux:base-devel
before_script:
- pacman -Syu --noconfirm --needed
cairo
cunit
libatomic_ops
libpciaccess
meson
valgrind
python-docutils
extends: .do-build
x86_64-freebsd-build:
extends:
- .build-env-freebsd-x86_64
- .do-build-qemu

97
Android.bp Normal file
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@ -0,0 +1,97 @@
//
// Copyright © 2011-2012 Intel Corporation
//
// Permission is hereby granted, free of charge, to any person obtaining a
// copy of this software and associated documentation files (the "Software"),
// to deal in the Software without restriction, including without limitation
// the rights to use, copy, modify, merge, publish, distribute, sublicense,
// and/or sell copies of the Software, and to permit persons to whom the
// Software is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice (including the next
// paragraph) shall be included in all copies or substantial portions of the
// Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
// FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
// IN THE SOFTWARE.
//
subdirs = ["*"]
build = ["Android.sources.bp"]
cc_defaults {
name: "libdrm_defaults",
cflags: [
// XXX: Consider moving these to config.h analogous to autoconf.
"-DMAJOR_IN_SYSMACROS=1",
"-DHAVE_VISIBILITY=1",
"-DHAVE_LIBDRM_ATOMIC_PRIMITIVES=1",
"-Wall",
"-Werror",
"-Wno-deprecated-declarations",
"-Wno-format",
"-Wno-gnu-variable-sized-type-not-at-end",
"-Wno-implicit-function-declaration",
"-Wno-int-conversion",
"-Wno-missing-field-initializers",
"-Wno-pointer-arith",
"-Wno-unused-parameter",
"-Wno-unused-variable",
],
export_system_include_dirs: ["."],
}
cc_library_headers {
name: "libdrm_headers",
vendor_available: true,
host_supported: true,
defaults: ["libdrm_defaults"],
export_include_dirs: ["include/drm", "android"],
apex_available: [
"//apex_available:platform",
"com.android.virt",
],
}
genrule {
name: "generated_static_table_fourcc_h",
out: ["generated_static_table_fourcc.h"],
srcs: ["include/drm/drm_fourcc.h"],
tool_files: ["gen_table_fourcc.py"],
cmd: "python3 $(location gen_table_fourcc.py) $(in) $(out)",
}
// Library for the device
cc_library {
name: "libdrm",
recovery_available: true,
vendor_available: true,
host_supported: true,
defaults: [
"libdrm_defaults",
"libdrm_sources",
],
generated_headers: [
"generated_static_table_fourcc_h",
],
export_include_dirs: ["include/drm", "android"],
cflags: [
"-Wno-enum-conversion",
"-Wno-pointer-arith",
"-Wno-sign-compare",
"-Wno-tautological-compare",
],
apex_available: [
"//apex_available:platform",
"com.android.virt",
],
}

View file

@ -1,47 +0,0 @@
#
# Copyright © 2011-2012 Intel Corporation
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# the rights to use, copy, modify, merge, publish, distribute, sublicense,
# and/or sell copies of the Software, and to permit persons to whom the
# Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
# IN THE SOFTWARE.
#
LOCAL_PATH := $(call my-dir)
include $(CLEAR_VARS)
# Import variables LIBDRM_{,H_,INCLUDE_H_,INCLUDE_VMWGFX_H_}FILES
include $(LOCAL_PATH)/Makefile.sources
LOCAL_MODULE := libdrm
LOCAL_MODULE_TAGS := optional
LOCAL_SRC_FILES := $(LIBDRM_FILES)
LOCAL_EXPORT_C_INCLUDE_DIRS := \
$(LOCAL_PATH) \
$(LOCAL_PATH)/include/drm
LOCAL_C_INCLUDES := \
$(LOCAL_PATH)/include/drm
LOCAL_CFLAGS := \
-DHAVE_VISIBILITY=1 \
-DHAVE_LIBDRM_ATOMIC_PRIMITIVES=1
include $(BUILD_SHARED_LIBRARY)
include $(call all-makefiles-under,$(LOCAL_PATH))

12
Android.sources.bp Normal file
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@ -0,0 +1,12 @@
// Autogenerated with Android.sources.bp.mk
cc_defaults {
name: "libdrm_sources",
srcs: [
"xf86drm.c",
"xf86drmHash.c",
"xf86drmRandom.c",
"xf86drmSL.c",
"xf86drmMode.c",
],
}

25
Android.sources.bp.mk Normal file
View file

@ -0,0 +1,25 @@
# Usage: make -f path/to/Android.sources.bp.mk NAMES=<> >Android.sources.bp
#
# It will read the Makefile.sources in the current directory, and
# write <NAME>_FILES to stdout as an Android.bp cc_defaults module.
.PHONY: all
all:
@# Do nothing
include Makefile.sources
empty :=
indent := $(empty) $(empty)
$(info // Autogenerated with Android.sources.bp.mk)
$(foreach NAME,$(NAMES), \
$(eval lower_name := $(shell echo $(PREFIX)$(NAME) | tr 'A-Z' 'a-z')) \
$(info ) \
$(info cc_defaults {) \
$(info $(indent)name: "$(lower_name)_sources",) \
$(info $(indent)srcs: [) \
$(foreach f,$(filter %.c,$($(NAME)_FILES)), \
$(info $(indent)$(indent)"$(f)",)) \
$(info $(indent)],) \
$(info }))

105
CONTRIBUTING.rst Normal file
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@ -0,0 +1,105 @@
Contributing to libdrm
======================
Submitting Patches
------------------
Patches should be sent to dri-devel@lists.freedesktop.org, using git
send-email. For patches only touching driver specific code one of the driver
mailing lists (like amd-gfx@lists.freedesktop.org) is also appropriate. See git
documentation for help:
http://git-scm.com/documentation
Since dri-devel is a very busy mailing list please use --subject-prefix="PATCH
libdrm" to make it easier to find libdrm patches. This is best done by running
git config --local format.subjectprefix "PATCH libdrm"
The first line of a commit message should contain a prefix indicating what part
is affected by the patch followed by one sentence that describes the change. For
examples:
amdgpu: Use uint32_t i in amdgpu_find_bo_by_cpu_mapping
The body of the commit message should describe what the patch changes and why,
and also note any particular side effects. For a recommended reading on
writing commit messages, see:
http://who-t.blogspot.de/2009/12/on-commit-messages.html
Your patches should also include a Signed-off-by line with your name and email
address. If you're not the patch's original author, you should also gather
S-o-b's by them (and/or whomever gave the patch to you.) The significance of
this is that it certifies that you created the patch, that it was created under
an appropriate open source license, or provided to you under those terms. This
lets us indicate a chain of responsibility for the copyright status of the code.
For more details:
https://developercertificate.org/
We won't reject patches that lack S-o-b, but it is strongly recommended.
Review and Merging
------------------
Patches should have at least one positive review (Reviewed-by: tag) or
indication of approval (Acked-by: tag) before merging. For any code shared
between drivers this is mandatory.
Please note that kernel/userspace API header files have special rules, see
include/drm/README.
Coding style in the project loosely follows the CodingStyle of the linux kernel:
https://www.kernel.org/doc/html/latest/process/coding-style.html?highlight=coding%20style
Commit Rights
-------------
Commit rights will be granted to anyone who requests them and fulfills the
below criteria:
- Submitted a few (5-10 as a rule of thumb) non-trivial (not just simple
spelling fixes and whitespace adjustment) patches that have been merged
already. Since libdrm is just a glue library between the kernel and userspace
drivers, merged patches to those components also count towards the commit
criteria.
- Are actively participating on discussions about their work (on the mailing
list or IRC). This should not be interpreted as a requirement to review other
peoples patches but just make sure that patch submission isn't one-way
communication. Cross-review is still highly encouraged.
- Will be regularly contributing further patches. This includes regular
contributors to other parts of the open source graphics stack who only
do the oddball rare patch within libdrm itself.
- Agrees to use their commit rights in accordance with the documented merge
criteria, tools, and processes.
To apply for commit rights ("Developer" role in gitlab) send a mail to
dri-devel@lists.freedesktop.org and please ping the maintainers if your request
is stuck.
Committers are encouraged to request their commit rights get removed when they
no longer contribute to the project. Commit rights will be reinstated when they
come back to the project.
Maintainers and committers should encourage contributors to request commit
rights, as especially junior contributors tend to underestimate their skills.
Code of Conduct
---------------
Please be aware the fd.o Code of Conduct also applies to libdrm:
https://www.freedesktop.org/wiki/CodeOfConduct/
See the gitlab project owners for contact details of the libdrm maintainers.
Abuse of commit rights, like engaging in commit fights or willfully pushing
patches that violate the documented merge criteria, will also be handled through
the Code of Conduct enforcement process.
Happy hacking!

View file

@ -1,3 +1,4 @@
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/obj/include/libdrm)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/obj/include/freedreno)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/obj/SHARED_LIBRARIES/libdrm_*intermediates)
$(call add-clean-step, rm -rf $(PRODUCT_OUT)/obj/STATIC_LIBRARIES/libdrm_*intermediates)

View file

@ -1,125 +0,0 @@
# Copyright 2005 Adam Jackson.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# on the rights to use, copy, modify, merge, publish, distribute, sub
# license, and/or sell copies of the Software, and to permit persons to whom
# the Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
include Makefile.sources
ACLOCAL_AMFLAGS = -I m4 ${ACLOCAL_FLAGS}
AM_DISTCHECK_CONFIGURE_FLAGS = \
--enable-udev \
--enable-libkms \
--enable-intel \
--enable-radeon \
--enable-nouveau \
--enable-vmwgfx \
--enable-omap-experimental-api \
--enable-exynos-experimental-api \
--enable-freedreno \
--enable-freedreno-kgsl\
--enable-tegra-experimental-api \
--enable-install-test-programs \
--enable-cairo-tests \
--enable-manpages
pkgconfigdir = @pkgconfigdir@
pkgconfig_DATA = libdrm.pc
if HAVE_LIBKMS
LIBKMS_SUBDIR = libkms
endif
if HAVE_INTEL
INTEL_SUBDIR = intel
endif
if HAVE_NOUVEAU
NOUVEAU_SUBDIR = nouveau
endif
if HAVE_RADEON
RADEON_SUBDIR = radeon
endif
if HAVE_OMAP
OMAP_SUBDIR = omap
endif
if HAVE_EXYNOS
EXYNOS_SUBDIR = exynos
endif
if HAVE_FREEDRENO
FREEDRENO_SUBDIR = freedreno
endif
if HAVE_TEGRA
TEGRA_SUBDIR = tegra
endif
if BUILD_MANPAGES
if HAVE_MANPAGES_STYLESHEET
MAN_SUBDIR = man
endif
endif
SUBDIRS = \
. \
$(LIBKMS_SUBDIR) \
$(INTEL_SUBDIR) \
$(NOUVEAU_SUBDIR) \
$(RADEON_SUBDIR) \
$(OMAP_SUBDIR) \
$(EXYNOS_SUBDIR) \
$(FREEDRENO_SUBDIR) \
$(TEGRA_SUBDIR) \
tests \
$(MAN_SUBDIR)
libdrm_la_LTLIBRARIES = libdrm.la
libdrm_ladir = $(libdir)
libdrm_la_LDFLAGS = -version-number 2:4:0 -no-undefined
libdrm_la_LIBADD = @CLOCK_LIB@
libdrm_la_CPPFLAGS = -I$(top_srcdir)/include/drm
AM_CFLAGS = \
$(WARN_CFLAGS) \
$(VALGRIND_CFLAGS)
libdrm_la_SOURCES = $(LIBDRM_FILES)
libdrmincludedir = ${includedir}
libdrminclude_HEADERS = $(LIBDRM_H_FILES)
EXTRA_DIST = Android.mk
klibdrmincludedir = ${includedir}/libdrm
klibdrminclude_HEADERS = $(LIBDRM_INCLUDE_H_FILES)
if HAVE_VMWGFX
klibdrminclude_HEADERS += $(LIBDRM_INCLUDE_VMWGFX_H_FILES)
endif
copy-headers :
cp -r $(kernel_source)/include/uapi/drm/*.h $(top_srcdir)/include/drm/
commit-headers : copy-headers
git add include/drm/*.h
git commit -am "Copy headers from kernel $$(GIT_DIR=$(kernel_source)/.git git describe)"

View file

@ -1,35 +0,0 @@
LIBDRM_FILES := \
xf86drm.c \
xf86drmHash.c \
xf86drmHash.h \
xf86drmRandom.c \
xf86drmRandom.h \
xf86drmSL.c \
xf86drmMode.c \
xf86atomic.h \
libdrm_macros.h \
libdrm_lists.h
LIBDRM_H_FILES := \
xf86drm.h \
xf86drmMode.h
LIBDRM_INCLUDE_H_FILES := \
include/drm/drm.h \
include/drm/drm_fourcc.h \
include/drm/drm_mode.h \
include/drm/drm_sarea.h \
include/drm/i915_drm.h \
include/drm/mach64_drm.h \
include/drm/mga_drm.h \
include/drm/nouveau_drm.h \
include/drm/qxl_drm.h \
include/drm/r128_drm.h \
include/drm/radeon_drm.h \
include/drm/savage_drm.h \
include/drm/sis_drm.h \
include/drm/tegra_drm.h \
include/drm/via_drm.h
LIBDRM_INCLUDE_VMWGFX_H_FILES := \
include/drm/vmwgfx_drm.h

41
README
View file

@ -1,41 +0,0 @@
libdrm - userspace library for drm
This is libdrm, a userspace library for accessing the DRM, direct
rendering manager, on Linux, BSD and other operating systes that
support the ioctl interface. The library provides wrapper functions
for the ioctls to avoid exposing the kernel interface directly, and
for chipsets with drm memory manager, support for tracking relocations
and buffers. libdrm is a low-level library, typically used by
graphics drivers such as the Mesa DRI drivers, the X drivers, libva
and similar projects. New functionality in the kernel DRM drivers
typically requires a new libdrm, but a new libdrm will always work
with an older kernel.
Compiling
---------
libdrm is a standard autotools packages and follows the normal
configure, build and install steps. The first step is to configure
the package, which is done by running the configure shell script:
./configure
By default, libdrm will install into the /usr/local/ prefix. If you
want to install this DRM to replace your system copy, pass
--prefix=/usr and --exec-prefix=/ to configure. If you are building
libdrm from a git checkout, you first need to run the autogen.sh
script. You can pass any options to autogen.sh that you would other
wise pass to configure, or you can just re-run configure with the
options you need once autogen.sh finishes.
Next step is to build libdrm:
make
and once make finishes successfully, install the package using
make install
If you are install into a system location, you will need to be root to
perform the install step.

63
README.rst Normal file
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@ -0,0 +1,63 @@
libdrm - userspace library for drm
----------------------------------
This is libdrm, a userspace library for accessing the DRM, direct rendering
manager, on Linux, BSD and other operating systems that support the ioctl
interface.
The library provides wrapper functions for the ioctls to avoid exposing the
kernel interface directly, and for chipsets with drm memory manager, support
for tracking relocations and buffers.
New functionality in the kernel DRM drivers typically requires a new libdrm,
but a new libdrm will always work with an older kernel.
libdrm is a low-level library, typically used by graphics drivers such as
the Mesa drivers, the X drivers, libva and similar projects.
Syncing with the Linux kernel headers
-------------------------------------
The library should be regularly updated to match the recent changes in the
`include/uapi/drm/`.
libdrm maintains a human-readable version for the token format modifier, with
the simpler ones being extracted automatically from `drm_fourcc.h` header file
with the help of a python script. This might not always possible, as some of
the vendors require decoding/extracting them programmatically. For that
reason one can enhance the current vendor functions to include/provide the
newly added token formats, or, in case there's no such decoding
function, to add one that performs the tasks of extracting them.
For simpler format modifier tokens there's a script (gen_table_fourcc.py) that
creates a static table, by going over `drm_fourcc.h` header file. The script
could be further modified if it can't handle new (simpler) token format
modifiers instead of the generated static table.
Compiling
---------
To set up meson:
meson builddir/
By default this will install into /usr/local, you can change your prefix
with --prefix=/usr (or `meson configure builddir/ -Dprefix=/usr` after
the initial meson setup).
Then use ninja to build and install:
ninja -C builddir/ install
If you are installing into a system location you will need to run install
separately, and as root.
AMDGPU ASIC table file
----------------------
The AMDGPU driver requires the `amdgpu.ids` file. It is usually located at
`$PREFIX/share/libdrm`, but it is possible to specify a set of alternative
paths at runtime by setting the `AMDGPU_ASIC_ID_TABLE_PATHS` environment
variable with one or more colon-separated paths where to search for the
`amdgpu.ids` file.
For this option to be available, the C library must support secure_getenv()
function. In systems without it (like NetBSD), this option won't be available.

View file

@ -9,47 +9,22 @@ However, this is up to whoever is driving the feature in question.
Follow these steps to release a new version of libdrm:
1) Ensure that there are no local, uncommitted/unpushed
modifications. You're probably in a good state if both "git diff
HEAD" and "git log master..origin/master" give no output.
1) Bump the version number in meson.build. We seem to have settled for
2.4.x as the versioning scheme for libdrm, so just bump the micro
version.
2) Bump the version number in configure.ac. We seem to have settled
for 2.4.x as the versioning scheme for libdrm, so just bump the
micro version.
2) Run `ninja -C builddir/ dist` to generate the tarballs.
Make sure that the version number of the tarball name in
builddir/meson-dist/ matches the number you bumped to. Move that
tarball to the libdrm repo root for the release script to pick up.
3) Run autoconf and then re-run ./configure so the build system
picks up the new version number.
3) Push the updated main branch with the bumped version number:
4) (optional step, release.sh will make distcheck for you, but it can be
heart warming to verify that make distcheck passes)
Verify that the code passes "make distcheck". Running "make
distcheck" should result in no warnings or errors and end with a
message of the form:
=============================================
libdrm-X.Y.Z archives ready for distribution:
libdrm-X.Y.Z.tar.gz
libdrm-X.Y.Z.tar.bz2
=============================================
Make sure that the version number reported by distcheck and in
the tarball names matches the number you bumped to in configure.ac.
5) Commit the configure.ac change and make an annotated tag for that
commit with the version number of the release as the name and a
message of "libdrm X.Y.Z". For example, for the 2.4.16 release
the command is:
git tag -a 2.4.16 -m "libdrm 2.4.16"
6) Push the commit and tag by saying
git push --tags origin master
git push origin main
assuming the remote for the upstream libdrm repo is called origin.
7) Use the release.sh script from the xorg/util/modular repo to
4) Use the release.sh script from the xorg/util/modular repo to
upload the tarballs to the freedesktop.org download area and
create an announce email template. The script takes one argument:
the path to the libdrm checkout. So, if a checkout of modular is

13
amdgpu/.editorconfig Normal file
View file

@ -0,0 +1,13 @@
# To use this config with your editor, follow the instructions at:
# http://editorconfig.org
[*]
charset = utf-8
indent_style = tab
indent_size = 8
tab_width = 8
insert_final_newline = true
[meson.build]
indent_style = space
indent_size = 2

16
amdgpu/Android.bp Normal file
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@ -0,0 +1,16 @@
build = ["Android.sources.bp"]
cc_library_shared {
name: "libdrm_amdgpu",
cflags: [
"-DAMDGPU_ASIC_ID_TABLE=\"/vendor/etc/hwdata/amdgpu.ids\""
],
defaults: [
"libdrm_defaults",
"libdrm_amdgpu_sources",
],
vendor: true,
shared_libs: ["libdrm"],
}

15
amdgpu/Android.sources.bp Normal file
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@ -0,0 +1,15 @@
// Autogenerated with Android.sources.bp.mk
cc_defaults {
name: "libdrm_amdgpu_sources",
srcs: [
"amdgpu_asic_id.c",
"amdgpu_bo.c",
"amdgpu_cs.c",
"amdgpu_device.c",
"amdgpu_gpu_info.c",
"amdgpu_vamgr.c",
"amdgpu_vm.c",
"handle_table.c",
],
}

92
amdgpu/amdgpu-symbols.txt Normal file
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@ -0,0 +1,92 @@
amdgpu_bo_alloc
amdgpu_bo_cpu_map
amdgpu_bo_cpu_unmap
amdgpu_bo_export
amdgpu_bo_free
amdgpu_bo_import
amdgpu_bo_inc_ref
amdgpu_bo_list_create_raw
amdgpu_bo_list_destroy_raw
amdgpu_bo_list_create
amdgpu_bo_list_destroy
amdgpu_bo_list_update
amdgpu_bo_query_info
amdgpu_bo_set_metadata
amdgpu_bo_va_op
amdgpu_bo_va_op_raw
amdgpu_bo_va_op_raw2
amdgpu_bo_wait_for_idle
amdgpu_create_bo_from_user_mem
amdgpu_cs_chunk_fence_info_to_data
amdgpu_cs_chunk_fence_to_dep
amdgpu_cs_create_semaphore
amdgpu_cs_create_syncobj
amdgpu_cs_create_syncobj2
amdgpu_cs_ctx_create
amdgpu_cs_ctx_create2
amdgpu_cs_ctx_free
amdgpu_cs_ctx_override_priority
amdgpu_cs_ctx_stable_pstate
amdgpu_cs_destroy_semaphore
amdgpu_cs_destroy_syncobj
amdgpu_cs_export_syncobj
amdgpu_cs_fence_to_handle
amdgpu_cs_import_syncobj
amdgpu_cs_query_fence_status
amdgpu_cs_query_reset_state
amdgpu_cs_query_reset_state2
amdgpu_query_sw_info
amdgpu_cs_signal_semaphore
amdgpu_cs_submit
amdgpu_cs_submit_raw
amdgpu_cs_submit_raw2
amdgpu_cs_syncobj_export_sync_file
amdgpu_cs_syncobj_export_sync_file2
amdgpu_cs_syncobj_import_sync_file
amdgpu_cs_syncobj_import_sync_file2
amdgpu_cs_syncobj_query
amdgpu_cs_syncobj_query2
amdgpu_cs_syncobj_reset
amdgpu_cs_syncobj_signal
amdgpu_cs_syncobj_timeline_signal
amdgpu_cs_syncobj_timeline_wait
amdgpu_cs_syncobj_transfer
amdgpu_cs_syncobj_wait
amdgpu_cs_wait_fences
amdgpu_cs_wait_semaphore
amdgpu_device_deinitialize
amdgpu_device_get_fd
amdgpu_device_initialize
amdgpu_device_initialize2
amdgpu_find_bo_by_cpu_mapping
amdgpu_get_marketing_name
amdgpu_query_buffer_size_alignment
amdgpu_query_crtc_from_id
amdgpu_query_firmware_version
amdgpu_query_gds_info
amdgpu_query_gpu_info
amdgpu_query_gpuvm_fault_info
amdgpu_query_heap_info
amdgpu_query_hw_ip_count
amdgpu_query_hw_ip_info
amdgpu_query_info
amdgpu_query_sensor_info
amdgpu_query_uq_fw_area_info
amdgpu_query_video_caps_info
amdgpu_read_mm_registers
amdgpu_va_manager_alloc
amdgpu_va_manager_init
amdgpu_va_manager_init2
amdgpu_va_manager_deinit
amdgpu_va_manager_query_sw_info
amdgpu_va_range_alloc
amdgpu_va_range_alloc2
amdgpu_va_range_free
amdgpu_va_get_start_addr
amdgpu_va_range_query
amdgpu_vm_reserve_vmid
amdgpu_vm_unreserve_vmid
amdgpu_create_userqueue
amdgpu_free_userqueue
amdgpu_userq_signal
amdgpu_userq_wait

2102
amdgpu/amdgpu.h Normal file

File diff suppressed because it is too large Load diff

345
amdgpu/amdgpu_asic_id.c Normal file
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@ -0,0 +1,345 @@
/*
* Copyright © 2017 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
// secure_getenv requires _GNU_SOURCE
#ifndef _GNU_SOURCE
#define _GNU_SOURCE
#endif
#include <ctype.h>
#include <stdio.h>
#include <stdlib.h>
#include <stdint.h>
#include <string.h>
#include <unistd.h>
#include <errno.h>
#include "xf86drm.h"
#include "amdgpu_drm.h"
#include "amdgpu_internal.h"
static int parse_one_line(struct amdgpu_device *dev, const char *line)
{
char *buf, *saveptr;
char *s_did;
uint32_t did;
char *s_rid;
uint32_t rid;
char *s_name;
char *endptr;
int r = -EINVAL;
/* ignore empty line and commented line */
if (strlen(line) == 0 || line[0] == '#')
return -EAGAIN;
buf = strdup(line);
if (!buf)
return -ENOMEM;
/* device id */
s_did = strtok_r(buf, ",", &saveptr);
if (!s_did)
goto out;
did = strtol(s_did, &endptr, 16);
if (*endptr)
goto out;
if (did != dev->info.asic_id) {
r = -EAGAIN;
goto out;
}
/* revision id */
s_rid = strtok_r(NULL, ",", &saveptr);
if (!s_rid)
goto out;
rid = strtol(s_rid, &endptr, 16);
if (*endptr)
goto out;
if (rid != dev->info.pci_rev_id) {
r = -EAGAIN;
goto out;
}
/* marketing name */
s_name = strtok_r(NULL, ",", &saveptr);
if (!s_name)
goto out;
/* trim leading whitespaces or tabs */
while (isblank(*s_name))
s_name++;
if (strlen(s_name) == 0)
goto out;
dev->marketing_name = strdup(s_name);
if (dev->marketing_name)
r = 0;
else
r = -ENOMEM;
out:
free(buf);
return r;
}
static void amdgpu_parse_proc_cpuinfo(struct amdgpu_device *dev)
{
const char *search_key = "model name";
const char *radeon_key = "Radeon";
char *line = NULL;
size_t len = 0;
FILE *fp;
fp = fopen("/proc/cpuinfo", "r");
if (fp == NULL) {
fprintf(stderr, "%s\n", strerror(errno));
return;
}
while (getline(&line, &len, fp) != -1) {
char *saveptr;
char *value;
if (strncmp(line, search_key, strlen(search_key)))
continue;
/* check for parts that have both CPU and GPU information */
value = strstr(line, radeon_key);
/* get content after the first colon */
if (value == NULL) {
value = strstr(line, ":");
if (value == NULL)
continue;
value++;
}
/* strip whitespace */
while (*value == ' ' || *value == '\t')
value++;
saveptr = strchr(value, '\n');
if (saveptr)
*saveptr = '\0';
/* Add AMD to the new string if it's missing from slicing/dicing */
if (strncmp(value, "AMD", 3) != 0) {
char *tmp = malloc(strlen(value) + 5);
if (!tmp)
break;
sprintf(tmp, "AMD %s", value);
dev->marketing_name = tmp;
} else
dev->marketing_name = strdup(value);
break;
}
free(line);
fclose(fp);
}
#if HAVE_SECURE_GETENV
static char *join_path(const char *dir, const char *file) {
size_t dir_len = strlen(dir);
size_t file_len = strlen(file);
char *full_path = NULL;
int need_slash = ((dir_len > 0) && (dir[dir_len - 1] != '/'));
size_t total_len = dir_len + (need_slash ? 1 : 0) + file_len + 1; // +1 for null terminator
if (dir_len == 0) {
return strdup(file);
}
full_path = malloc(total_len);
if (!full_path) {
return NULL; // Memory allocation failed
}
strcpy(full_path, dir);
if (need_slash) {
full_path[dir_len] = '/';
dir_len++;
}
strcpy(full_path + dir_len, file);
return full_path;
}
static char **split_env_var(const char *env_var_content)
{
char **ret = NULL;
char *dup_env_val;
int elements = 1;
int index = 1;
if (!env_var_content || env_var_content[0] == '\0')
return NULL;
for(char *p = (char *)env_var_content; *p; p++) {
if (*p == ':')
elements++;
}
dup_env_val = strdup(env_var_content);
if (!dup_env_val) {
return NULL;
}
ret = malloc(sizeof(char *) * (elements + 1));
ret[0] = dup_env_val;
for(char *p = (char *)dup_env_val; *p; p++) {
if (*p == ':') {
*p = 0;
ret[index++] = p + 1;
}
}
ret[index] = NULL; // ensure that the last element in the array is NULL
return ret;
}
static void split_env_var_free(char **split_var)
{
if (split_var) {
// remember that the first element also points to the whole duplicated string,
// which was modified in place by replacing ':' with '\0' characters
free(split_var[0]);
free(split_var);
}
}
static char *find_asic_id_table(void)
{
// first check the paths in AMDGPU_ASIC_ID_TABLE_PATHS environment variable
const char *amdgpu_asic_id_table_paths = secure_getenv("AMDGPU_ASIC_ID_TABLE_PATHS");
const char *file_name = NULL;
char *found_path = NULL;
char **paths = NULL;
if (!amdgpu_asic_id_table_paths)
return NULL;
// extract the file name from AMDGPU_ASIC_ID_TABLE
file_name = strrchr(AMDGPU_ASIC_ID_TABLE, '/');
if (!file_name)
return NULL;
file_name++; // skip the '/'
paths = split_env_var(amdgpu_asic_id_table_paths);
if (!paths)
return NULL;
// for each path, join with file_name and check if it exists
for (int i = 0; paths[i] != NULL; i++) {
char *full_path = join_path(paths[i], file_name);
if (!full_path) {
continue;
}
if (access(full_path, R_OK) == 0) {
found_path = full_path;
break;
}
}
split_env_var_free(paths);
return found_path;
}
#endif
void amdgpu_parse_asic_ids(struct amdgpu_device *dev)
{
FILE *fp;
char *line = NULL;
size_t len = 0;
ssize_t n;
int line_num = 1;
int r = 0;
char *amdgpu_asic_id_table_path = NULL;
#if HAVE_SECURE_GETENV
// if this system lacks secure_getenv(), don't allow extra paths
// for security reasons.
amdgpu_asic_id_table_path = find_asic_id_table();
#endif
// if not found, use the default AMDGPU_ASIC_ID_TABLE path
if (!amdgpu_asic_id_table_path)
amdgpu_asic_id_table_path = strdup(AMDGPU_ASIC_ID_TABLE);
fp = fopen(amdgpu_asic_id_table_path, "r");
if (!fp) {
fprintf(stderr, "%s: %s\n", amdgpu_asic_id_table_path,
strerror(errno));
goto get_cpu;
}
/* 1st valid line is file version */
while ((n = getline(&line, &len, fp)) != -1) {
/* trim trailing newline */
if (line[n - 1] == '\n')
line[n - 1] = '\0';
/* ignore empty line and commented line */
if (strlen(line) == 0 || line[0] == '#') {
line_num++;
continue;
}
drmMsg("%s version: %s\n", amdgpu_asic_id_table_path, line);
break;
}
while ((n = getline(&line, &len, fp)) != -1) {
/* trim trailing newline */
if (line[n - 1] == '\n')
line[n - 1] = '\0';
r = parse_one_line(dev, line);
if (r != -EAGAIN)
break;
line_num++;
}
if (r == -EINVAL) {
fprintf(stderr, "Invalid format: %s: line %d: %s\n",
amdgpu_asic_id_table_path, line_num, line);
} else if (r && r != -EAGAIN) {
fprintf(stderr, "%s: Cannot parse ASIC IDs: %s\n",
__func__, strerror(-r));
}
free(line);
fclose(fp);
get_cpu:
free(amdgpu_asic_id_table_path);
if (dev->info.ids_flags & AMDGPU_IDS_FLAGS_FUSION &&
dev->marketing_name == NULL) {
amdgpu_parse_proc_cpuinfo(dev);
}
}

833
amdgpu/amdgpu_bo.c Normal file
View file

@ -0,0 +1,833 @@
/*
* Copyright © 2014 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include <stdlib.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <errno.h>
#include <fcntl.h>
#include <unistd.h>
#include <sys/ioctl.h>
#include <sys/mman.h>
#include <sys/time.h>
#include "libdrm_macros.h"
#include "xf86drm.h"
#include "amdgpu_drm.h"
#include "amdgpu_internal.h"
#include "util_math.h"
static int amdgpu_bo_create(amdgpu_device_handle dev,
uint64_t size,
uint32_t handle,
amdgpu_bo_handle *buf_handle)
{
struct amdgpu_bo *bo;
int r;
bo = calloc(1, sizeof(struct amdgpu_bo));
if (!bo)
return -ENOMEM;
r = handle_table_insert(&dev->bo_handles, handle, bo);
if (r) {
free(bo);
return r;
}
atomic_set(&bo->refcount, 1);
bo->dev = dev;
bo->alloc_size = size;
bo->handle = handle;
pthread_mutex_init(&bo->cpu_access_mutex, NULL);
*buf_handle = bo;
return 0;
}
drm_public int amdgpu_bo_alloc(amdgpu_device_handle dev,
struct amdgpu_bo_alloc_request *alloc_buffer,
amdgpu_bo_handle *buf_handle)
{
union drm_amdgpu_gem_create args;
int r;
if (!alloc_buffer || !buf_handle)
return -EINVAL;
memset(&args, 0, sizeof(args));
args.in.bo_size = alloc_buffer->alloc_size;
args.in.alignment = alloc_buffer->phys_alignment;
/* Set the placement. */
args.in.domains = alloc_buffer->preferred_heap;
args.in.domain_flags = alloc_buffer->flags;
/* Allocate the buffer with the preferred heap. */
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_CREATE,
&args, sizeof(args));
if (r)
goto out;
pthread_mutex_lock(&dev->bo_table_mutex);
r = amdgpu_bo_create(dev, alloc_buffer->alloc_size, args.out.handle,
buf_handle);
pthread_mutex_unlock(&dev->bo_table_mutex);
if (r) {
drmCloseBufferHandle(dev->fd, args.out.handle);
}
out:
return r;
}
drm_public int amdgpu_bo_set_metadata(amdgpu_bo_handle bo,
struct amdgpu_bo_metadata *info)
{
struct drm_amdgpu_gem_metadata args = {};
if (!info)
return -EINVAL;
args.handle = bo->handle;
args.op = AMDGPU_GEM_METADATA_OP_SET_METADATA;
args.data.flags = info->flags;
args.data.tiling_info = info->tiling_info;
if (info->size_metadata > sizeof(args.data.data))
return -EINVAL;
if (info->size_metadata) {
args.data.data_size_bytes = info->size_metadata;
memcpy(args.data.data, info->umd_metadata, info->size_metadata);
}
return drmCommandWriteRead(bo->dev->fd,
DRM_AMDGPU_GEM_METADATA,
&args, sizeof(args));
}
drm_public int amdgpu_bo_query_info(amdgpu_bo_handle bo,
struct amdgpu_bo_info *info)
{
struct drm_amdgpu_gem_metadata metadata = {};
struct drm_amdgpu_gem_create_in bo_info = {};
struct drm_amdgpu_gem_op gem_op = {};
int r;
/* Validate the BO passed in */
if (!bo->handle || !info)
return -EINVAL;
/* Query metadata. */
metadata.handle = bo->handle;
metadata.op = AMDGPU_GEM_METADATA_OP_GET_METADATA;
r = drmCommandWriteRead(bo->dev->fd, DRM_AMDGPU_GEM_METADATA,
&metadata, sizeof(metadata));
if (r)
return r;
if (metadata.data.data_size_bytes >
sizeof(info->metadata.umd_metadata))
return -EINVAL;
/* Query buffer info. */
gem_op.handle = bo->handle;
gem_op.op = AMDGPU_GEM_OP_GET_GEM_CREATE_INFO;
gem_op.value = (uintptr_t)&bo_info;
r = drmCommandWriteRead(bo->dev->fd, DRM_AMDGPU_GEM_OP,
&gem_op, sizeof(gem_op));
if (r)
return r;
memset(info, 0, sizeof(*info));
info->alloc_size = bo_info.bo_size;
info->phys_alignment = bo_info.alignment;
info->preferred_heap = bo_info.domains;
info->alloc_flags = bo_info.domain_flags;
info->metadata.flags = metadata.data.flags;
info->metadata.tiling_info = metadata.data.tiling_info;
info->metadata.size_metadata = metadata.data.data_size_bytes;
if (metadata.data.data_size_bytes > 0)
memcpy(info->metadata.umd_metadata, metadata.data.data,
metadata.data.data_size_bytes);
return 0;
}
static int amdgpu_bo_export_flink(amdgpu_bo_handle bo)
{
struct drm_gem_flink flink;
int fd, dma_fd;
uint32_t handle;
int r;
fd = bo->dev->fd;
handle = bo->handle;
if (bo->flink_name)
return 0;
if (bo->dev->flink_fd != bo->dev->fd) {
r = drmPrimeHandleToFD(bo->dev->fd, bo->handle, DRM_CLOEXEC,
&dma_fd);
if (!r) {
r = drmPrimeFDToHandle(bo->dev->flink_fd, dma_fd, &handle);
close(dma_fd);
}
if (r)
return r;
fd = bo->dev->flink_fd;
}
memset(&flink, 0, sizeof(flink));
flink.handle = handle;
r = drmIoctl(fd, DRM_IOCTL_GEM_FLINK, &flink);
if (r)
return r;
bo->flink_name = flink.name;
if (bo->dev->flink_fd != bo->dev->fd)
drmCloseBufferHandle(bo->dev->flink_fd, handle);
pthread_mutex_lock(&bo->dev->bo_table_mutex);
r = handle_table_insert(&bo->dev->bo_flink_names, bo->flink_name, bo);
pthread_mutex_unlock(&bo->dev->bo_table_mutex);
return r;
}
drm_public int amdgpu_bo_export(amdgpu_bo_handle bo,
enum amdgpu_bo_handle_type type,
uint32_t *shared_handle)
{
int r;
switch (type) {
case amdgpu_bo_handle_type_gem_flink_name:
r = amdgpu_bo_export_flink(bo);
if (r)
return r;
*shared_handle = bo->flink_name;
return 0;
case amdgpu_bo_handle_type_kms:
case amdgpu_bo_handle_type_kms_noimport:
*shared_handle = bo->handle;
return 0;
case amdgpu_bo_handle_type_dma_buf_fd:
return drmPrimeHandleToFD(bo->dev->fd, bo->handle,
DRM_CLOEXEC | DRM_RDWR,
(int*)shared_handle);
}
return -EINVAL;
}
drm_public int amdgpu_bo_import(amdgpu_device_handle dev,
enum amdgpu_bo_handle_type type,
uint32_t shared_handle,
struct amdgpu_bo_import_result *output)
{
struct drm_gem_open open_arg = {};
struct amdgpu_bo *bo = NULL;
uint32_t handle = 0, flink_name = 0;
uint64_t alloc_size = 0;
int r = 0;
int dma_fd;
uint64_t dma_buf_size = 0;
/* We must maintain a list of pairs <handle, bo>, so that we always
* return the same amdgpu_bo instance for the same handle. */
pthread_mutex_lock(&dev->bo_table_mutex);
/* Convert a DMA buf handle to a KMS handle now. */
if (type == amdgpu_bo_handle_type_dma_buf_fd) {
off_t size;
/* Get a KMS handle. */
r = drmPrimeFDToHandle(dev->fd, shared_handle, &handle);
if (r)
goto unlock;
/* Query the buffer size. */
size = lseek(shared_handle, 0, SEEK_END);
if (size == (off_t)-1) {
r = -errno;
goto free_bo_handle;
}
lseek(shared_handle, 0, SEEK_SET);
dma_buf_size = size;
shared_handle = handle;
}
/* If we have already created a buffer with this handle, find it. */
switch (type) {
case amdgpu_bo_handle_type_gem_flink_name:
bo = handle_table_lookup(&dev->bo_flink_names, shared_handle);
break;
case amdgpu_bo_handle_type_dma_buf_fd:
bo = handle_table_lookup(&dev->bo_handles, shared_handle);
break;
case amdgpu_bo_handle_type_kms:
case amdgpu_bo_handle_type_kms_noimport:
/* Importing a KMS handle in not allowed. */
r = -EPERM;
goto unlock;
default:
r = -EINVAL;
goto unlock;
}
if (bo) {
/* The buffer already exists, just bump the refcount. */
atomic_inc(&bo->refcount);
pthread_mutex_unlock(&dev->bo_table_mutex);
output->buf_handle = bo;
output->alloc_size = bo->alloc_size;
return 0;
}
/* Open the handle. */
switch (type) {
case amdgpu_bo_handle_type_gem_flink_name:
open_arg.name = shared_handle;
r = drmIoctl(dev->flink_fd, DRM_IOCTL_GEM_OPEN, &open_arg);
if (r)
goto unlock;
flink_name = shared_handle;
handle = open_arg.handle;
alloc_size = open_arg.size;
if (dev->flink_fd != dev->fd) {
r = drmPrimeHandleToFD(dev->flink_fd, handle,
DRM_CLOEXEC, &dma_fd);
if (r)
goto free_bo_handle;
r = drmPrimeFDToHandle(dev->fd, dma_fd, &handle);
close(dma_fd);
if (r)
goto free_bo_handle;
r = drmCloseBufferHandle(dev->flink_fd,
open_arg.handle);
if (r)
goto free_bo_handle;
}
open_arg.handle = 0;
break;
case amdgpu_bo_handle_type_dma_buf_fd:
handle = shared_handle;
alloc_size = dma_buf_size;
break;
case amdgpu_bo_handle_type_kms:
case amdgpu_bo_handle_type_kms_noimport:
assert(0); /* unreachable */
}
/* Initialize it. */
r = amdgpu_bo_create(dev, alloc_size, handle, &bo);
if (r)
goto free_bo_handle;
if (flink_name) {
bo->flink_name = flink_name;
r = handle_table_insert(&dev->bo_flink_names, flink_name,
bo);
if (r)
goto free_bo_handle;
}
output->buf_handle = bo;
output->alloc_size = bo->alloc_size;
pthread_mutex_unlock(&dev->bo_table_mutex);
return 0;
free_bo_handle:
if (flink_name && open_arg.handle)
drmCloseBufferHandle(dev->flink_fd, open_arg.handle);
if (bo)
amdgpu_bo_free(bo);
else
drmCloseBufferHandle(dev->fd, handle);
unlock:
pthread_mutex_unlock(&dev->bo_table_mutex);
return r;
}
drm_public int amdgpu_bo_free(amdgpu_bo_handle buf_handle)
{
struct amdgpu_device *dev;
struct amdgpu_bo *bo = buf_handle;
assert(bo != NULL);
dev = bo->dev;
pthread_mutex_lock(&dev->bo_table_mutex);
if (update_references(&bo->refcount, NULL)) {
/* Remove the buffer from the hash tables. */
handle_table_remove(&dev->bo_handles, bo->handle);
if (bo->flink_name)
handle_table_remove(&dev->bo_flink_names,
bo->flink_name);
/* Release CPU access. */
if (bo->cpu_map_count > 0) {
bo->cpu_map_count = 1;
amdgpu_bo_cpu_unmap(bo);
}
drmCloseBufferHandle(dev->fd, bo->handle);
pthread_mutex_destroy(&bo->cpu_access_mutex);
free(bo);
}
pthread_mutex_unlock(&dev->bo_table_mutex);
return 0;
}
drm_public void amdgpu_bo_inc_ref(amdgpu_bo_handle bo)
{
atomic_inc(&bo->refcount);
}
drm_public int amdgpu_bo_cpu_map(amdgpu_bo_handle bo, void **cpu)
{
union drm_amdgpu_gem_mmap args;
void *ptr;
int r;
pthread_mutex_lock(&bo->cpu_access_mutex);
if (bo->cpu_ptr) {
/* already mapped */
assert(bo->cpu_map_count > 0);
bo->cpu_map_count++;
*cpu = bo->cpu_ptr;
pthread_mutex_unlock(&bo->cpu_access_mutex);
return 0;
}
assert(bo->cpu_map_count == 0);
memset(&args, 0, sizeof(args));
/* Query the buffer address (args.addr_ptr).
* The kernel driver ignores the offset and size parameters. */
args.in.handle = bo->handle;
r = drmCommandWriteRead(bo->dev->fd, DRM_AMDGPU_GEM_MMAP, &args,
sizeof(args));
if (r) {
pthread_mutex_unlock(&bo->cpu_access_mutex);
return r;
}
/* Map the buffer. */
ptr = drm_mmap(NULL, bo->alloc_size, PROT_READ | PROT_WRITE, MAP_SHARED,
bo->dev->fd, args.out.addr_ptr);
if (ptr == MAP_FAILED) {
pthread_mutex_unlock(&bo->cpu_access_mutex);
return -errno;
}
bo->cpu_ptr = ptr;
bo->cpu_map_count = 1;
pthread_mutex_unlock(&bo->cpu_access_mutex);
*cpu = ptr;
return 0;
}
drm_public int amdgpu_bo_cpu_unmap(amdgpu_bo_handle bo)
{
int r;
pthread_mutex_lock(&bo->cpu_access_mutex);
assert(bo->cpu_map_count >= 0);
if (bo->cpu_map_count == 0) {
/* not mapped */
pthread_mutex_unlock(&bo->cpu_access_mutex);
return -EINVAL;
}
bo->cpu_map_count--;
if (bo->cpu_map_count > 0) {
/* mapped multiple times */
pthread_mutex_unlock(&bo->cpu_access_mutex);
return 0;
}
r = drm_munmap(bo->cpu_ptr, bo->alloc_size) == 0 ? 0 : -errno;
bo->cpu_ptr = NULL;
pthread_mutex_unlock(&bo->cpu_access_mutex);
return r;
}
drm_public int amdgpu_query_buffer_size_alignment(amdgpu_device_handle dev,
struct amdgpu_buffer_size_alignments *info)
{
info->size_local = dev->dev_info.pte_fragment_size;
info->size_remote = dev->dev_info.gart_page_size;
return 0;
}
drm_public int amdgpu_bo_wait_for_idle(amdgpu_bo_handle bo,
uint64_t timeout_ns,
bool *busy)
{
union drm_amdgpu_gem_wait_idle args;
int r;
memset(&args, 0, sizeof(args));
args.in.handle = bo->handle;
args.in.timeout = amdgpu_cs_calculate_timeout(timeout_ns);
r = drmCommandWriteRead(bo->dev->fd, DRM_AMDGPU_GEM_WAIT_IDLE,
&args, sizeof(args));
if (r == 0) {
*busy = args.out.status;
return 0;
} else {
fprintf(stderr, "amdgpu: GEM_WAIT_IDLE failed with %i\n", r);
return r;
}
}
drm_public int amdgpu_find_bo_by_cpu_mapping(amdgpu_device_handle dev,
void *cpu,
uint64_t size,
amdgpu_bo_handle *buf_handle,
uint64_t *offset_in_bo)
{
struct amdgpu_bo *bo = NULL;
uint32_t i;
int r = 0;
if (cpu == NULL || size == 0)
return -EINVAL;
/*
* Workaround for a buggy application which tries to import previously
* exposed CPU pointers. If we find a real world use case we should
* improve that by asking the kernel for the right handle.
*/
pthread_mutex_lock(&dev->bo_table_mutex);
for (i = 0; i < dev->bo_handles.max_key; i++) {
bo = handle_table_lookup(&dev->bo_handles, i);
if (!bo || !bo->cpu_ptr || size > bo->alloc_size)
continue;
if (cpu >= bo->cpu_ptr &&
cpu < (void*)((uintptr_t)bo->cpu_ptr + (size_t)bo->alloc_size))
break;
}
if (i < dev->bo_handles.max_key) {
atomic_inc(&bo->refcount);
*buf_handle = bo;
*offset_in_bo = (uintptr_t)cpu - (uintptr_t)bo->cpu_ptr;
} else {
*buf_handle = NULL;
*offset_in_bo = 0;
r = -ENXIO;
}
pthread_mutex_unlock(&dev->bo_table_mutex);
return r;
}
drm_public int amdgpu_create_bo_from_user_mem(amdgpu_device_handle dev,
void *cpu,
uint64_t size,
amdgpu_bo_handle *buf_handle)
{
int r;
struct drm_amdgpu_gem_userptr args;
args.addr = (uintptr_t)cpu;
args.flags = AMDGPU_GEM_USERPTR_ANONONLY | AMDGPU_GEM_USERPTR_REGISTER |
AMDGPU_GEM_USERPTR_VALIDATE;
args.size = size;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_USERPTR,
&args, sizeof(args));
if (r)
goto out;
pthread_mutex_lock(&dev->bo_table_mutex);
r = amdgpu_bo_create(dev, size, args.handle, buf_handle);
pthread_mutex_unlock(&dev->bo_table_mutex);
if (r) {
drmCloseBufferHandle(dev->fd, args.handle);
}
out:
return r;
}
drm_public int amdgpu_bo_list_create_raw(amdgpu_device_handle dev,
uint32_t number_of_buffers,
struct drm_amdgpu_bo_list_entry *buffers,
uint32_t *result)
{
union drm_amdgpu_bo_list args;
int r;
memset(&args, 0, sizeof(args));
args.in.operation = AMDGPU_BO_LIST_OP_CREATE;
args.in.bo_number = number_of_buffers;
args.in.bo_info_size = sizeof(struct drm_amdgpu_bo_list_entry);
args.in.bo_info_ptr = (uint64_t)(uintptr_t)buffers;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_BO_LIST,
&args, sizeof(args));
if (!r)
*result = args.out.list_handle;
return r;
}
drm_public int amdgpu_bo_list_destroy_raw(amdgpu_device_handle dev,
uint32_t bo_list)
{
union drm_amdgpu_bo_list args;
memset(&args, 0, sizeof(args));
args.in.operation = AMDGPU_BO_LIST_OP_DESTROY;
args.in.list_handle = bo_list;
return drmCommandWriteRead(dev->fd, DRM_AMDGPU_BO_LIST,
&args, sizeof(args));
}
drm_public int amdgpu_bo_list_create(amdgpu_device_handle dev,
uint32_t number_of_resources,
amdgpu_bo_handle *resources,
uint8_t *resource_prios,
amdgpu_bo_list_handle *result)
{
struct drm_amdgpu_bo_list_entry *list;
union drm_amdgpu_bo_list args;
unsigned i;
int r;
if (!number_of_resources || !resources)
return -EINVAL;
/* overflow check for multiplication */
if (number_of_resources > UINT32_MAX / sizeof(struct drm_amdgpu_bo_list_entry))
return -EINVAL;
list = malloc(number_of_resources * sizeof(struct drm_amdgpu_bo_list_entry));
if (!list)
return -ENOMEM;
*result = malloc(sizeof(struct amdgpu_bo_list));
if (!*result) {
free(list);
return -ENOMEM;
}
memset(&args, 0, sizeof(args));
args.in.operation = AMDGPU_BO_LIST_OP_CREATE;
args.in.bo_number = number_of_resources;
args.in.bo_info_size = sizeof(struct drm_amdgpu_bo_list_entry);
args.in.bo_info_ptr = (uint64_t)(uintptr_t)list;
for (i = 0; i < number_of_resources; i++) {
list[i].bo_handle = resources[i]->handle;
if (resource_prios)
list[i].bo_priority = resource_prios[i];
else
list[i].bo_priority = 0;
}
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_BO_LIST,
&args, sizeof(args));
free(list);
if (r) {
free(*result);
return r;
}
(*result)->dev = dev;
(*result)->handle = args.out.list_handle;
return 0;
}
drm_public int amdgpu_bo_list_destroy(amdgpu_bo_list_handle list)
{
union drm_amdgpu_bo_list args;
int r;
memset(&args, 0, sizeof(args));
args.in.operation = AMDGPU_BO_LIST_OP_DESTROY;
args.in.list_handle = list->handle;
r = drmCommandWriteRead(list->dev->fd, DRM_AMDGPU_BO_LIST,
&args, sizeof(args));
if (!r)
free(list);
return r;
}
drm_public int amdgpu_bo_list_update(amdgpu_bo_list_handle handle,
uint32_t number_of_resources,
amdgpu_bo_handle *resources,
uint8_t *resource_prios)
{
struct drm_amdgpu_bo_list_entry *list;
union drm_amdgpu_bo_list args;
unsigned i;
int r;
if (!number_of_resources)
return -EINVAL;
/* overflow check for multiplication */
if (number_of_resources > UINT32_MAX / sizeof(struct drm_amdgpu_bo_list_entry))
return -EINVAL;
list = malloc(number_of_resources * sizeof(struct drm_amdgpu_bo_list_entry));
if (!list)
return -ENOMEM;
args.in.operation = AMDGPU_BO_LIST_OP_UPDATE;
args.in.list_handle = handle->handle;
args.in.bo_number = number_of_resources;
args.in.bo_info_size = sizeof(struct drm_amdgpu_bo_list_entry);
args.in.bo_info_ptr = (uintptr_t)list;
for (i = 0; i < number_of_resources; i++) {
list[i].bo_handle = resources[i]->handle;
if (resource_prios)
list[i].bo_priority = resource_prios[i];
else
list[i].bo_priority = 0;
}
r = drmCommandWriteRead(handle->dev->fd, DRM_AMDGPU_BO_LIST,
&args, sizeof(args));
free(list);
return r;
}
drm_public int amdgpu_bo_va_op(amdgpu_bo_handle bo,
uint64_t offset,
uint64_t size,
uint64_t addr,
uint64_t flags,
uint32_t ops)
{
amdgpu_device_handle dev = bo->dev;
size = ALIGN(size, getpagesize());
return amdgpu_bo_va_op_raw(dev, bo, offset, size, addr,
AMDGPU_VM_PAGE_READABLE |
AMDGPU_VM_PAGE_WRITEABLE |
AMDGPU_VM_PAGE_EXECUTABLE, ops);
}
drm_public int amdgpu_bo_va_op_raw(amdgpu_device_handle dev,
amdgpu_bo_handle bo,
uint64_t offset,
uint64_t size,
uint64_t addr,
uint64_t flags,
uint32_t ops)
{
struct drm_amdgpu_gem_va va;
int r;
if (ops != AMDGPU_VA_OP_MAP && ops != AMDGPU_VA_OP_UNMAP &&
ops != AMDGPU_VA_OP_REPLACE && ops != AMDGPU_VA_OP_CLEAR)
return -EINVAL;
memset(&va, 0, sizeof(va));
va.handle = bo ? bo->handle : 0;
va.operation = ops;
va.flags = flags;
va.va_address = addr;
va.offset_in_bo = offset;
va.map_size = size;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_VA, &va, sizeof(va));
return r;
}
drm_public int amdgpu_bo_va_op_raw2(amdgpu_device_handle dev,
amdgpu_bo_handle bo,
uint64_t offset,
uint64_t size,
uint64_t addr,
uint64_t flags,
uint32_t ops,
uint32_t vm_timeline_syncobj_out,
uint64_t vm_timeline_point,
uint64_t input_fence_syncobj_handles,
uint32_t num_syncobj_handles)
{
struct drm_amdgpu_gem_va va;
int r;
if (ops != AMDGPU_VA_OP_MAP && ops != AMDGPU_VA_OP_UNMAP &&
ops != AMDGPU_VA_OP_REPLACE && ops != AMDGPU_VA_OP_CLEAR)
return -EINVAL;
memset(&va, 0, sizeof(va));
va.handle = bo ? bo->handle : 0;
va.operation = ops;
va.flags = flags;
va.va_address = addr;
va.offset_in_bo = offset;
va.map_size = size;
va.vm_timeline_syncobj_out = vm_timeline_syncobj_out;
va.vm_timeline_point = vm_timeline_point;
va.input_fence_syncobj_handles = input_fence_syncobj_handles;
va.num_syncobj_handles = num_syncobj_handles;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_GEM_VA, &va, sizeof(va));
return r;
}

991
amdgpu/amdgpu_cs.c Normal file
View file

@ -0,0 +1,991 @@
/*
* Copyright 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <errno.h>
#include <pthread.h>
#include <sched.h>
#include <sys/ioctl.h>
#if HAVE_ALLOCA_H
# include <alloca.h>
#endif
#include "xf86drm.h"
#include "amdgpu_drm.h"
#include "amdgpu_internal.h"
static int amdgpu_cs_unreference_sem(amdgpu_semaphore_handle sem);
static int amdgpu_cs_reset_sem(amdgpu_semaphore_handle sem);
/**
* Create command submission context
*
* \param dev - \c [in] Device handle. See #amdgpu_device_initialize()
* \param priority - \c [in] Context creation flags. See AMDGPU_CTX_PRIORITY_*
* \param context - \c [out] GPU Context handle
*
* \return 0 on success otherwise POSIX Error code
*/
drm_public int amdgpu_cs_ctx_create2(amdgpu_device_handle dev,
uint32_t priority,
amdgpu_context_handle *context)
{
struct amdgpu_context *gpu_context;
union drm_amdgpu_ctx args;
int i, j, k;
int r;
char *override_priority;
if (!dev || !context)
return -EINVAL;
override_priority = getenv("AMD_PRIORITY");
if (override_priority) {
/* The priority is a signed integer. The variable type is
* wrong. If parsing fails, priority is unchanged.
*/
if (sscanf(override_priority, "%i", &priority) == 1) {
printf("amdgpu: context priority changed to %i\n",
priority);
}
}
gpu_context = calloc(1, sizeof(struct amdgpu_context));
if (!gpu_context)
return -ENOMEM;
gpu_context->dev = dev;
r = pthread_mutex_init(&gpu_context->sequence_mutex, NULL);
if (r)
goto error;
/* Create the context */
memset(&args, 0, sizeof(args));
args.in.op = AMDGPU_CTX_OP_ALLOC_CTX;
args.in.priority = priority;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_CTX, &args, sizeof(args));
if (r)
goto error;
gpu_context->id = args.out.alloc.ctx_id;
for (i = 0; i < AMDGPU_HW_IP_NUM; i++)
for (j = 0; j < AMDGPU_HW_IP_INSTANCE_MAX_COUNT; j++)
for (k = 0; k < AMDGPU_CS_MAX_RINGS; k++)
list_inithead(&gpu_context->sem_list[i][j][k]);
*context = (amdgpu_context_handle)gpu_context;
return 0;
error:
pthread_mutex_destroy(&gpu_context->sequence_mutex);
free(gpu_context);
return r;
}
drm_public int amdgpu_cs_ctx_create(amdgpu_device_handle dev,
amdgpu_context_handle *context)
{
return amdgpu_cs_ctx_create2(dev, AMDGPU_CTX_PRIORITY_NORMAL, context);
}
/**
* Release command submission context
*
* \param dev - \c [in] amdgpu device handle
* \param context - \c [in] amdgpu context handle
*
* \return 0 on success otherwise POSIX Error code
*/
drm_public int amdgpu_cs_ctx_free(amdgpu_context_handle context)
{
union drm_amdgpu_ctx args;
int i, j, k;
int r;
if (!context)
return -EINVAL;
pthread_mutex_destroy(&context->sequence_mutex);
/* now deal with kernel side */
memset(&args, 0, sizeof(args));
args.in.op = AMDGPU_CTX_OP_FREE_CTX;
args.in.ctx_id = context->id;
r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CTX,
&args, sizeof(args));
for (i = 0; i < AMDGPU_HW_IP_NUM; i++) {
for (j = 0; j < AMDGPU_HW_IP_INSTANCE_MAX_COUNT; j++) {
for (k = 0; k < AMDGPU_CS_MAX_RINGS; k++) {
amdgpu_semaphore_handle sem, tmp;
LIST_FOR_EACH_ENTRY_SAFE(sem, tmp, &context->sem_list[i][j][k], list) {
list_del(&sem->list);
amdgpu_cs_reset_sem(sem);
amdgpu_cs_unreference_sem(sem);
}
}
}
}
free(context);
return r;
}
drm_public int amdgpu_cs_ctx_override_priority(amdgpu_device_handle dev,
amdgpu_context_handle context,
int master_fd,
unsigned priority)
{
union drm_amdgpu_sched args;
int r;
if (!dev || !context || master_fd < 0)
return -EINVAL;
memset(&args, 0, sizeof(args));
args.in.op = AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE;
args.in.fd = dev->fd;
args.in.priority = priority;
args.in.ctx_id = context->id;
r = drmCommandWrite(master_fd, DRM_AMDGPU_SCHED, &args, sizeof(args));
if (r)
return r;
return 0;
}
drm_public int amdgpu_cs_ctx_stable_pstate(amdgpu_context_handle context,
uint32_t op,
uint32_t flags,
uint32_t *out_flags)
{
union drm_amdgpu_ctx args;
int r;
if (!context)
return -EINVAL;
memset(&args, 0, sizeof(args));
args.in.op = op;
args.in.ctx_id = context->id;
args.in.flags = flags;
r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CTX,
&args, sizeof(args));
if (!r && out_flags)
*out_flags = args.out.pstate.flags;
return r;
}
drm_public int amdgpu_cs_query_reset_state(amdgpu_context_handle context,
uint32_t *state, uint32_t *hangs)
{
union drm_amdgpu_ctx args;
int r;
if (!context)
return -EINVAL;
memset(&args, 0, sizeof(args));
args.in.op = AMDGPU_CTX_OP_QUERY_STATE;
args.in.ctx_id = context->id;
r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CTX,
&args, sizeof(args));
if (!r) {
*state = args.out.state.reset_status;
*hangs = args.out.state.hangs;
}
return r;
}
drm_public int amdgpu_cs_query_reset_state2(amdgpu_context_handle context,
uint64_t *flags)
{
union drm_amdgpu_ctx args;
int r;
if (!context)
return -EINVAL;
memset(&args, 0, sizeof(args));
args.in.op = AMDGPU_CTX_OP_QUERY_STATE2;
args.in.ctx_id = context->id;
r = drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_CTX,
&args, sizeof(args));
if (!r)
*flags = args.out.state.flags;
return r;
}
/**
* Submit command to kernel DRM
* \param dev - \c [in] Device handle
* \param context - \c [in] GPU Context
* \param ibs_request - \c [in] Pointer to submission requests
* \param fence - \c [out] return fence for this submission
*
* \return 0 on success otherwise POSIX Error code
* \sa amdgpu_cs_submit()
*/
static int amdgpu_cs_submit_one(amdgpu_context_handle context,
struct amdgpu_cs_request *ibs_request)
{
struct drm_amdgpu_cs_chunk *chunks;
struct drm_amdgpu_cs_chunk_data *chunk_data;
struct drm_amdgpu_cs_chunk_dep *dependencies = NULL;
struct drm_amdgpu_cs_chunk_dep *sem_dependencies = NULL;
amdgpu_device_handle dev = context->dev;
struct list_head *sem_list;
amdgpu_semaphore_handle sem, tmp;
uint32_t i, size, num_chunks, bo_list_handle = 0, sem_count = 0;
uint64_t seq_no;
bool user_fence;
int r = 0;
if (ibs_request->ip_type >= AMDGPU_HW_IP_NUM)
return -EINVAL;
if (ibs_request->ring >= AMDGPU_CS_MAX_RINGS)
return -EINVAL;
if (ibs_request->number_of_ibs == 0) {
ibs_request->seq_no = AMDGPU_NULL_SUBMIT_SEQ;
return 0;
}
user_fence = (ibs_request->fence_info.handle != NULL);
size = ibs_request->number_of_ibs + (user_fence ? 2 : 1) + 1;
chunks = alloca(sizeof(struct drm_amdgpu_cs_chunk) * size);
size = ibs_request->number_of_ibs + (user_fence ? 1 : 0);
chunk_data = alloca(sizeof(struct drm_amdgpu_cs_chunk_data) * size);
if (ibs_request->resources)
bo_list_handle = ibs_request->resources->handle;
num_chunks = ibs_request->number_of_ibs;
/* IB chunks */
for (i = 0; i < ibs_request->number_of_ibs; i++) {
struct amdgpu_cs_ib_info *ib;
chunks[i].chunk_id = AMDGPU_CHUNK_ID_IB;
chunks[i].length_dw = sizeof(struct drm_amdgpu_cs_chunk_ib) / 4;
chunks[i].chunk_data = (uint64_t)(uintptr_t)&chunk_data[i];
ib = &ibs_request->ibs[i];
chunk_data[i].ib_data._pad = 0;
chunk_data[i].ib_data.va_start = ib->ib_mc_address;
chunk_data[i].ib_data.ib_bytes = ib->size * 4;
chunk_data[i].ib_data.ip_type = ibs_request->ip_type;
chunk_data[i].ib_data.ip_instance = ibs_request->ip_instance;
chunk_data[i].ib_data.ring = ibs_request->ring;
chunk_data[i].ib_data.flags = ib->flags;
}
pthread_mutex_lock(&context->sequence_mutex);
if (user_fence) {
i = num_chunks++;
/* fence chunk */
chunks[i].chunk_id = AMDGPU_CHUNK_ID_FENCE;
chunks[i].length_dw = sizeof(struct drm_amdgpu_cs_chunk_fence) / 4;
chunks[i].chunk_data = (uint64_t)(uintptr_t)&chunk_data[i];
/* fence bo handle */
chunk_data[i].fence_data.handle = ibs_request->fence_info.handle->handle;
/* offset */
chunk_data[i].fence_data.offset =
ibs_request->fence_info.offset * sizeof(uint64_t);
}
if (ibs_request->number_of_dependencies) {
dependencies = alloca(sizeof(struct drm_amdgpu_cs_chunk_dep) *
ibs_request->number_of_dependencies);
if (!dependencies) {
r = -ENOMEM;
goto error_unlock;
}
for (i = 0; i < ibs_request->number_of_dependencies; ++i) {
struct amdgpu_cs_fence *info = &ibs_request->dependencies[i];
struct drm_amdgpu_cs_chunk_dep *dep = &dependencies[i];
dep->ip_type = info->ip_type;
dep->ip_instance = info->ip_instance;
dep->ring = info->ring;
dep->ctx_id = info->context->id;
dep->handle = info->fence;
}
i = num_chunks++;
/* dependencies chunk */
chunks[i].chunk_id = AMDGPU_CHUNK_ID_DEPENDENCIES;
chunks[i].length_dw = sizeof(struct drm_amdgpu_cs_chunk_dep) / 4
* ibs_request->number_of_dependencies;
chunks[i].chunk_data = (uint64_t)(uintptr_t)dependencies;
}
sem_list = &context->sem_list[ibs_request->ip_type][ibs_request->ip_instance][ibs_request->ring];
LIST_FOR_EACH_ENTRY(sem, sem_list, list)
sem_count++;
if (sem_count) {
sem_dependencies = alloca(sizeof(struct drm_amdgpu_cs_chunk_dep) * sem_count);
if (!sem_dependencies) {
r = -ENOMEM;
goto error_unlock;
}
sem_count = 0;
LIST_FOR_EACH_ENTRY_SAFE(sem, tmp, sem_list, list) {
struct amdgpu_cs_fence *info = &sem->signal_fence;
struct drm_amdgpu_cs_chunk_dep *dep = &sem_dependencies[sem_count++];
dep->ip_type = info->ip_type;
dep->ip_instance = info->ip_instance;
dep->ring = info->ring;
dep->ctx_id = info->context->id;
dep->handle = info->fence;
list_del(&sem->list);
amdgpu_cs_reset_sem(sem);
amdgpu_cs_unreference_sem(sem);
}
i = num_chunks++;
/* dependencies chunk */
chunks[i].chunk_id = AMDGPU_CHUNK_ID_DEPENDENCIES;
chunks[i].length_dw = sizeof(struct drm_amdgpu_cs_chunk_dep) / 4 * sem_count;
chunks[i].chunk_data = (uint64_t)(uintptr_t)sem_dependencies;
}
r = amdgpu_cs_submit_raw2(dev, context, bo_list_handle, num_chunks,
chunks, &seq_no);
if (r)
goto error_unlock;
ibs_request->seq_no = seq_no;
context->last_seq[ibs_request->ip_type][ibs_request->ip_instance][ibs_request->ring] = ibs_request->seq_no;
error_unlock:
pthread_mutex_unlock(&context->sequence_mutex);
return r;
}
drm_public int amdgpu_cs_submit(amdgpu_context_handle context,
uint64_t flags,
struct amdgpu_cs_request *ibs_request,
uint32_t number_of_requests)
{
uint32_t i;
int r;
if (!context || !ibs_request)
return -EINVAL;
r = 0;
for (i = 0; i < number_of_requests; i++) {
r = amdgpu_cs_submit_one(context, ibs_request);
if (r)
break;
ibs_request++;
}
return r;
}
/**
* Calculate absolute timeout.
*
* \param timeout - \c [in] timeout in nanoseconds.
*
* \return absolute timeout in nanoseconds
*/
drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout)
{
int r;
if (timeout != AMDGPU_TIMEOUT_INFINITE) {
struct timespec current;
uint64_t current_ns;
r = clock_gettime(CLOCK_MONOTONIC, &current);
if (r) {
fprintf(stderr, "clock_gettime() returned error (%d)!", errno);
return AMDGPU_TIMEOUT_INFINITE;
}
current_ns = ((uint64_t)current.tv_sec) * 1000000000ull;
current_ns += current.tv_nsec;
timeout += current_ns;
if (timeout < current_ns)
timeout = AMDGPU_TIMEOUT_INFINITE;
}
return timeout;
}
static int amdgpu_ioctl_wait_cs(amdgpu_context_handle context,
unsigned ip,
unsigned ip_instance,
uint32_t ring,
uint64_t handle,
uint64_t timeout_ns,
uint64_t flags,
bool *busy)
{
amdgpu_device_handle dev = context->dev;
union drm_amdgpu_wait_cs args;
int r;
memset(&args, 0, sizeof(args));
args.in.handle = handle;
args.in.ip_type = ip;
args.in.ip_instance = ip_instance;
args.in.ring = ring;
args.in.ctx_id = context->id;
if (flags & AMDGPU_QUERY_FENCE_TIMEOUT_IS_ABSOLUTE)
args.in.timeout = timeout_ns;
else
args.in.timeout = amdgpu_cs_calculate_timeout(timeout_ns);
r = drmIoctl(dev->fd, DRM_IOCTL_AMDGPU_WAIT_CS, &args);
if (r)
return -errno;
*busy = args.out.status;
return 0;
}
drm_public int amdgpu_cs_query_fence_status(struct amdgpu_cs_fence *fence,
uint64_t timeout_ns,
uint64_t flags,
uint32_t *expired)
{
bool busy = true;
int r;
if (!fence || !expired || !fence->context)
return -EINVAL;
if (fence->ip_type >= AMDGPU_HW_IP_NUM)
return -EINVAL;
if (fence->ring >= AMDGPU_CS_MAX_RINGS)
return -EINVAL;
if (fence->fence == AMDGPU_NULL_SUBMIT_SEQ) {
*expired = true;
return 0;
}
*expired = false;
r = amdgpu_ioctl_wait_cs(fence->context, fence->ip_type,
fence->ip_instance, fence->ring,
fence->fence, timeout_ns, flags, &busy);
if (!r && !busy)
*expired = true;
return r;
}
static int amdgpu_ioctl_wait_fences(struct amdgpu_cs_fence *fences,
uint32_t fence_count,
bool wait_all,
uint64_t timeout_ns,
uint32_t *status,
uint32_t *first)
{
struct drm_amdgpu_fence *drm_fences;
amdgpu_device_handle dev = fences[0].context->dev;
union drm_amdgpu_wait_fences args;
int r;
uint32_t i;
drm_fences = alloca(sizeof(struct drm_amdgpu_fence) * fence_count);
for (i = 0; i < fence_count; i++) {
drm_fences[i].ctx_id = fences[i].context->id;
drm_fences[i].ip_type = fences[i].ip_type;
drm_fences[i].ip_instance = fences[i].ip_instance;
drm_fences[i].ring = fences[i].ring;
drm_fences[i].seq_no = fences[i].fence;
}
memset(&args, 0, sizeof(args));
args.in.fences = (uint64_t)(uintptr_t)drm_fences;
args.in.fence_count = fence_count;
args.in.wait_all = wait_all;
args.in.timeout_ns = amdgpu_cs_calculate_timeout(timeout_ns);
r = drmIoctl(dev->fd, DRM_IOCTL_AMDGPU_WAIT_FENCES, &args);
if (r)
return -errno;
*status = args.out.status;
if (first)
*first = args.out.first_signaled;
return 0;
}
drm_public int amdgpu_cs_wait_fences(struct amdgpu_cs_fence *fences,
uint32_t fence_count,
bool wait_all,
uint64_t timeout_ns,
uint32_t *status,
uint32_t *first)
{
uint32_t i;
/* Sanity check */
if (!fences || !status || !fence_count)
return -EINVAL;
for (i = 0; i < fence_count; i++) {
if (NULL == fences[i].context)
return -EINVAL;
if (fences[i].ip_type >= AMDGPU_HW_IP_NUM)
return -EINVAL;
if (fences[i].ring >= AMDGPU_CS_MAX_RINGS)
return -EINVAL;
}
*status = 0;
return amdgpu_ioctl_wait_fences(fences, fence_count, wait_all,
timeout_ns, status, first);
}
drm_public int amdgpu_cs_create_semaphore(amdgpu_semaphore_handle *sem)
{
struct amdgpu_semaphore *gpu_semaphore;
if (!sem)
return -EINVAL;
gpu_semaphore = calloc(1, sizeof(struct amdgpu_semaphore));
if (!gpu_semaphore)
return -ENOMEM;
atomic_set(&gpu_semaphore->refcount, 1);
*sem = gpu_semaphore;
return 0;
}
drm_public int amdgpu_cs_signal_semaphore(amdgpu_context_handle ctx,
uint32_t ip_type,
uint32_t ip_instance,
uint32_t ring,
amdgpu_semaphore_handle sem)
{
int ret;
if (!ctx || !sem)
return -EINVAL;
if (ip_type >= AMDGPU_HW_IP_NUM)
return -EINVAL;
if (ring >= AMDGPU_CS_MAX_RINGS)
return -EINVAL;
pthread_mutex_lock(&ctx->sequence_mutex);
/* sem has been signaled */
if (sem->signal_fence.context) {
ret = -EINVAL;
goto unlock;
}
sem->signal_fence.context = ctx;
sem->signal_fence.ip_type = ip_type;
sem->signal_fence.ip_instance = ip_instance;
sem->signal_fence.ring = ring;
sem->signal_fence.fence = ctx->last_seq[ip_type][ip_instance][ring];
update_references(NULL, &sem->refcount);
ret = 0;
unlock:
pthread_mutex_unlock(&ctx->sequence_mutex);
return ret;
}
drm_public int amdgpu_cs_wait_semaphore(amdgpu_context_handle ctx,
uint32_t ip_type,
uint32_t ip_instance,
uint32_t ring,
amdgpu_semaphore_handle sem)
{
if (!ctx || !sem)
return -EINVAL;
if (ip_type >= AMDGPU_HW_IP_NUM)
return -EINVAL;
if (ring >= AMDGPU_CS_MAX_RINGS)
return -EINVAL;
/* must signal first */
if (!sem->signal_fence.context)
return -EINVAL;
pthread_mutex_lock(&ctx->sequence_mutex);
list_add(&sem->list, &ctx->sem_list[ip_type][ip_instance][ring]);
pthread_mutex_unlock(&ctx->sequence_mutex);
return 0;
}
static int amdgpu_cs_reset_sem(amdgpu_semaphore_handle sem)
{
if (!sem || !sem->signal_fence.context)
return -EINVAL;
sem->signal_fence.context = NULL;
sem->signal_fence.ip_type = 0;
sem->signal_fence.ip_instance = 0;
sem->signal_fence.ring = 0;
sem->signal_fence.fence = 0;
return 0;
}
static int amdgpu_cs_unreference_sem(amdgpu_semaphore_handle sem)
{
if (!sem)
return -EINVAL;
if (update_references(&sem->refcount, NULL))
free(sem);
return 0;
}
drm_public int amdgpu_cs_destroy_semaphore(amdgpu_semaphore_handle sem)
{
return amdgpu_cs_unreference_sem(sem);
}
drm_public int amdgpu_cs_create_syncobj2(amdgpu_device_handle dev,
uint32_t flags,
uint32_t *handle)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjCreate(dev->fd, flags, handle);
}
drm_public int amdgpu_cs_create_syncobj(amdgpu_device_handle dev,
uint32_t *handle)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjCreate(dev->fd, 0, handle);
}
drm_public int amdgpu_cs_destroy_syncobj(amdgpu_device_handle dev,
uint32_t handle)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjDestroy(dev->fd, handle);
}
drm_public int amdgpu_cs_syncobj_reset(amdgpu_device_handle dev,
const uint32_t *syncobjs,
uint32_t syncobj_count)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjReset(dev->fd, syncobjs, syncobj_count);
}
drm_public int amdgpu_cs_syncobj_signal(amdgpu_device_handle dev,
const uint32_t *syncobjs,
uint32_t syncobj_count)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjSignal(dev->fd, syncobjs, syncobj_count);
}
drm_public int amdgpu_cs_syncobj_timeline_signal(amdgpu_device_handle dev,
const uint32_t *syncobjs,
uint64_t *points,
uint32_t syncobj_count)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjTimelineSignal(dev->fd, syncobjs,
points, syncobj_count);
}
drm_public int amdgpu_cs_syncobj_wait(amdgpu_device_handle dev,
uint32_t *handles, unsigned num_handles,
int64_t timeout_nsec, unsigned flags,
uint32_t *first_signaled)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjWait(dev->fd, handles, num_handles, timeout_nsec,
flags, first_signaled);
}
drm_public int amdgpu_cs_syncobj_timeline_wait(amdgpu_device_handle dev,
uint32_t *handles, uint64_t *points,
unsigned num_handles,
int64_t timeout_nsec, unsigned flags,
uint32_t *first_signaled)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjTimelineWait(dev->fd, handles, points, num_handles,
timeout_nsec, flags, first_signaled);
}
drm_public int amdgpu_cs_syncobj_query(amdgpu_device_handle dev,
uint32_t *handles, uint64_t *points,
unsigned num_handles)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjQuery(dev->fd, handles, points, num_handles);
}
drm_public int amdgpu_cs_syncobj_query2(amdgpu_device_handle dev,
uint32_t *handles, uint64_t *points,
unsigned num_handles, uint32_t flags)
{
if (!dev)
return -EINVAL;
return drmSyncobjQuery2(dev->fd, handles, points, num_handles, flags);
}
drm_public int amdgpu_cs_export_syncobj(amdgpu_device_handle dev,
uint32_t handle,
int *shared_fd)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjHandleToFD(dev->fd, handle, shared_fd);
}
drm_public int amdgpu_cs_import_syncobj(amdgpu_device_handle dev,
int shared_fd,
uint32_t *handle)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjFDToHandle(dev->fd, shared_fd, handle);
}
drm_public int amdgpu_cs_syncobj_export_sync_file(amdgpu_device_handle dev,
uint32_t syncobj,
int *sync_file_fd)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjExportSyncFile(dev->fd, syncobj, sync_file_fd);
}
drm_public int amdgpu_cs_syncobj_import_sync_file(amdgpu_device_handle dev,
uint32_t syncobj,
int sync_file_fd)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjImportSyncFile(dev->fd, syncobj, sync_file_fd);
}
drm_public int amdgpu_cs_syncobj_export_sync_file2(amdgpu_device_handle dev,
uint32_t syncobj,
uint64_t point,
uint32_t flags,
int *sync_file_fd)
{
uint32_t binary_handle;
int ret;
if (NULL == dev)
return -EINVAL;
if (!point)
return drmSyncobjExportSyncFile(dev->fd, syncobj, sync_file_fd);
ret = drmSyncobjCreate(dev->fd, 0, &binary_handle);
if (ret)
return ret;
ret = drmSyncobjTransfer(dev->fd, binary_handle, 0,
syncobj, point, flags);
if (ret)
goto out;
ret = drmSyncobjExportSyncFile(dev->fd, binary_handle, sync_file_fd);
out:
drmSyncobjDestroy(dev->fd, binary_handle);
return ret;
}
drm_public int amdgpu_cs_syncobj_import_sync_file2(amdgpu_device_handle dev,
uint32_t syncobj,
uint64_t point,
int sync_file_fd)
{
uint32_t binary_handle;
int ret;
if (NULL == dev)
return -EINVAL;
if (!point)
return drmSyncobjImportSyncFile(dev->fd, syncobj, sync_file_fd);
ret = drmSyncobjCreate(dev->fd, 0, &binary_handle);
if (ret)
return ret;
ret = drmSyncobjImportSyncFile(dev->fd, binary_handle, sync_file_fd);
if (ret)
goto out;
ret = drmSyncobjTransfer(dev->fd, syncobj, point,
binary_handle, 0, 0);
out:
drmSyncobjDestroy(dev->fd, binary_handle);
return ret;
}
drm_public int amdgpu_cs_syncobj_transfer(amdgpu_device_handle dev,
uint32_t dst_handle,
uint64_t dst_point,
uint32_t src_handle,
uint64_t src_point,
uint32_t flags)
{
if (NULL == dev)
return -EINVAL;
return drmSyncobjTransfer(dev->fd,
dst_handle, dst_point,
src_handle, src_point,
flags);
}
drm_public int amdgpu_cs_submit_raw(amdgpu_device_handle dev,
amdgpu_context_handle context,
amdgpu_bo_list_handle bo_list_handle,
int num_chunks,
struct drm_amdgpu_cs_chunk *chunks,
uint64_t *seq_no)
{
union drm_amdgpu_cs cs;
uint64_t *chunk_array;
int i, r;
if (num_chunks == 0)
return -EINVAL;
memset(&cs, 0, sizeof(cs));
chunk_array = alloca(sizeof(uint64_t) * num_chunks);
for (i = 0; i < num_chunks; i++)
chunk_array[i] = (uint64_t)(uintptr_t)&chunks[i];
cs.in.chunks = (uint64_t)(uintptr_t)chunk_array;
cs.in.ctx_id = context->id;
cs.in.bo_list_handle = bo_list_handle ? bo_list_handle->handle : 0;
cs.in.num_chunks = num_chunks;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_CS,
&cs, sizeof(cs));
if (r)
return r;
if (seq_no)
*seq_no = cs.out.handle;
return 0;
}
drm_public int amdgpu_cs_submit_raw2(amdgpu_device_handle dev,
amdgpu_context_handle context,
uint32_t bo_list_handle,
int num_chunks,
struct drm_amdgpu_cs_chunk *chunks,
uint64_t *seq_no)
{
union drm_amdgpu_cs cs;
uint64_t *chunk_array;
int i, r;
memset(&cs, 0, sizeof(cs));
chunk_array = alloca(sizeof(uint64_t) * num_chunks);
for (i = 0; i < num_chunks; i++)
chunk_array[i] = (uint64_t)(uintptr_t)&chunks[i];
cs.in.chunks = (uint64_t)(uintptr_t)chunk_array;
cs.in.ctx_id = context->id;
cs.in.bo_list_handle = bo_list_handle;
cs.in.num_chunks = num_chunks;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_CS,
&cs, sizeof(cs));
if (!r && seq_no)
*seq_no = cs.out.handle;
return r;
}
drm_public void amdgpu_cs_chunk_fence_info_to_data(struct amdgpu_cs_fence_info *fence_info,
struct drm_amdgpu_cs_chunk_data *data)
{
data->fence_data.handle = fence_info->handle->handle;
data->fence_data.offset = fence_info->offset * sizeof(uint64_t);
}
drm_public void amdgpu_cs_chunk_fence_to_dep(struct amdgpu_cs_fence *fence,
struct drm_amdgpu_cs_chunk_dep *dep)
{
dep->ip_type = fence->ip_type;
dep->ip_instance = fence->ip_instance;
dep->ring = fence->ring;
dep->ctx_id = fence->context->id;
dep->handle = fence->fence;
}
drm_public int amdgpu_cs_fence_to_handle(amdgpu_device_handle dev,
struct amdgpu_cs_fence *fence,
uint32_t what,
uint32_t *out_handle)
{
union drm_amdgpu_fence_to_handle fth;
int r;
memset(&fth, 0, sizeof(fth));
fth.in.fence.ctx_id = fence->context->id;
fth.in.fence.ip_type = fence->ip_type;
fth.in.fence.ip_instance = fence->ip_instance;
fth.in.fence.ring = fence->ring;
fth.in.fence.seq_no = fence->fence;
fth.in.what = what;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_FENCE_TO_HANDLE,
&fth, sizeof(fth));
if (r == 0)
*out_handle = fth.out.handle;
return r;
}

378
amdgpu/amdgpu_device.c Normal file
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@ -0,0 +1,378 @@
/*
* Copyright 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
/**
* \file amdgpu_device.c
*
* Implementation of functions for AMD GPU device
*
*/
#include <sys/stat.h>
#include <errno.h>
#include <string.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <fcntl.h>
#include "xf86drm.h"
#include "amdgpu_drm.h"
#include "amdgpu_internal.h"
#include "util_math.h"
#define PTR_TO_UINT(x) ((unsigned)((intptr_t)(x)))
static pthread_mutex_t dev_mutex = PTHREAD_MUTEX_INITIALIZER;
static amdgpu_device_handle dev_list;
static int fd_compare(int fd1, int fd2)
{
char *name1 = drmGetPrimaryDeviceNameFromFd(fd1);
char *name2 = drmGetPrimaryDeviceNameFromFd(fd2);
int result;
if (name1 == NULL || name2 == NULL) {
free(name1);
free(name2);
return 0;
}
result = strcmp(name1, name2);
free(name1);
free(name2);
return result;
}
/**
* Get the authenticated form fd,
*
* \param fd - \c [in] File descriptor for AMD GPU device
* \param auth - \c [out] Pointer to output the fd is authenticated or not
* A render node fd, output auth = 0
* A legacy fd, get the authenticated for compatibility root
*
* \return 0 on success\n
* >0 - AMD specific error code\n
* <0 - Negative POSIX Error code
*/
static int amdgpu_get_auth(int fd, int *auth)
{
int r = 0;
drm_client_t client = {};
if (drmGetNodeTypeFromFd(fd) == DRM_NODE_RENDER)
*auth = 0;
else {
client.idx = 0;
r = drmIoctl(fd, DRM_IOCTL_GET_CLIENT, &client);
if (!r)
*auth = client.auth;
}
return r;
}
static void amdgpu_device_free_internal(amdgpu_device_handle dev)
{
/* Remove dev from dev_list, if it was added there. */
if (dev == dev_list) {
dev_list = dev->next;
} else {
for (amdgpu_device_handle node = dev_list; node; node = node->next) {
if (node->next == dev) {
node->next = dev->next;
break;
}
}
}
close(dev->fd);
if ((dev->flink_fd >= 0) && (dev->fd != dev->flink_fd))
close(dev->flink_fd);
amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_32);
amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_low);
amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_high_32);
amdgpu_vamgr_deinit(&dev->va_mgr.vamgr_high);
handle_table_fini(&dev->bo_handles);
handle_table_fini(&dev->bo_flink_names);
pthread_mutex_destroy(&dev->bo_table_mutex);
free(dev->marketing_name);
free(dev);
}
/**
* Assignment between two amdgpu_device pointers with reference counting.
*
* Usage:
* struct amdgpu_device *dst = ... , *src = ...;
*
* dst = src;
* // No reference counting. Only use this when you need to move
* // a reference from one pointer to another.
*
* amdgpu_device_reference(&dst, src);
* // Reference counters are updated. dst is decremented and src is
* // incremented. dst is freed if its reference counter is 0.
*/
static void amdgpu_device_reference(struct amdgpu_device **dst,
struct amdgpu_device *src)
{
if (update_references(&(*dst)->refcount, &src->refcount))
amdgpu_device_free_internal(*dst);
*dst = src;
}
static int amdgpu_query_gfx_level_major(amdgpu_device_handle dev,
uint8_t *gfx_ip_version_major)
{
struct drm_amdgpu_info_hw_ip ip_info;
uint32_t gfx_ip_count = 0;
int r;
*gfx_ip_version_major = 0;
r = amdgpu_query_hw_ip_count(dev, AMDGPU_HW_IP_GFX, &gfx_ip_count);
if (r)
return r;
/* No graphics support. */
if (gfx_ip_count == 0)
return 0;
memset(&ip_info, 0, sizeof(ip_info));
r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_GFX, 0, &ip_info);
if (r)
return r;
/* GFX6-8 don't set ip_discovery_version. */
if (dev->minor_version >= 48 && ip_info.ip_discovery_version) {
*gfx_ip_version_major = (ip_info.ip_discovery_version >> 16) & 0xff;
} else {
*gfx_ip_version_major = ip_info.hw_ip_version_major;
}
return r;
}
static int _amdgpu_device_initialize(int fd,
uint32_t *major_version,
uint32_t *minor_version,
amdgpu_device_handle *device_handle,
bool deduplicate_device)
{
struct amdgpu_device *dev = NULL;
uint8_t gfx_ip_version_major = 0;
drmVersionPtr version;
int r;
int flag_auth = 0;
int flag_authexist=0;
uint32_t accel_working = 0;
uint32_t va_mgr_flags = 0;
*device_handle = NULL;
pthread_mutex_lock(&dev_mutex);
r = amdgpu_get_auth(fd, &flag_auth);
if (r) {
fprintf(stderr, "%s: amdgpu_get_auth (1) failed (%i)\n",
__func__, r);
pthread_mutex_unlock(&dev_mutex);
return r;
}
if (deduplicate_device)
for (dev = dev_list; dev; dev = dev->next)
if (fd_compare(dev->fd, fd) == 0)
break;
if (dev) {
r = amdgpu_get_auth(dev->fd, &flag_authexist);
if (r) {
fprintf(stderr, "%s: amdgpu_get_auth (2) failed (%i)\n",
__func__, r);
pthread_mutex_unlock(&dev_mutex);
return r;
}
if ((flag_auth) && (!flag_authexist)) {
dev->flink_fd = fcntl(fd, F_DUPFD_CLOEXEC, 0);
}
*major_version = dev->major_version;
*minor_version = dev->minor_version;
amdgpu_device_reference(device_handle, dev);
pthread_mutex_unlock(&dev_mutex);
return 0;
}
dev = calloc(1, sizeof(struct amdgpu_device));
if (!dev) {
fprintf(stderr, "%s: calloc failed\n", __func__);
pthread_mutex_unlock(&dev_mutex);
return -ENOMEM;
}
dev->fd = -1;
dev->flink_fd = -1;
atomic_set(&dev->refcount, 1);
version = drmGetVersion(fd);
if (version->version_major != 3) {
fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
"only compatible with 3.x.x.\n",
__func__,
version->version_major,
version->version_minor,
version->version_patchlevel);
drmFreeVersion(version);
r = -EBADF;
goto cleanup;
}
dev->fd = fcntl(fd, F_DUPFD_CLOEXEC, 0);
dev->flink_fd = dev->fd;
dev->major_version = version->version_major;
dev->minor_version = version->version_minor;
drmFreeVersion(version);
pthread_mutex_init(&dev->bo_table_mutex, NULL);
/* Check if acceleration is working. */
r = amdgpu_query_info(dev, AMDGPU_INFO_ACCEL_WORKING, 4, &accel_working);
if (r) {
fprintf(stderr, "%s: amdgpu_query_info(ACCEL_WORKING) failed (%i)\n",
__func__, r);
goto cleanup;
}
if (!accel_working) {
fprintf(stderr, "%s: AMDGPU_INFO_ACCEL_WORKING = 0\n", __func__);
r = -EBADF;
goto cleanup;
}
r = amdgpu_query_gpu_info_init(dev);
if (r) {
fprintf(stderr, "%s: amdgpu_query_gpu_info_init failed\n", __func__);
goto cleanup;
}
r = amdgpu_query_gfx_level_major(dev, &gfx_ip_version_major);
if (!r) {
/* Split the HIGH addr space for GFX6-GFX12, except GFX9 to
* implement a workaround for SMEM loads with NULL PRT pages.
* This is silently ignored if querying the GFX level failed.
*/
if (gfx_ip_version_major >= 6 && gfx_ip_version_major <= 12 &&
gfx_ip_version_major != 9) {
va_mgr_flags |= AMDGPU_VA_MGR_RESERVE_HALF_VA_FOR_PRT;
}
}
amdgpu_va_manager_init2(&dev->va_mgr,
dev->dev_info.virtual_address_offset,
dev->dev_info.virtual_address_max,
dev->dev_info.high_va_offset,
dev->dev_info.high_va_max,
dev->dev_info.virtual_address_alignment,
va_mgr_flags);
amdgpu_parse_asic_ids(dev);
*major_version = dev->major_version;
*minor_version = dev->minor_version;
*device_handle = dev;
if (deduplicate_device) {
dev->next = dev_list;
dev_list = dev;
}
pthread_mutex_unlock(&dev_mutex);
return 0;
cleanup:
if (dev->fd >= 0)
close(dev->fd);
free(dev);
pthread_mutex_unlock(&dev_mutex);
return r;
}
drm_public int amdgpu_device_initialize(int fd,
uint32_t *major_version,
uint32_t *minor_version,
amdgpu_device_handle *device_handle)
{
return _amdgpu_device_initialize(fd, major_version, minor_version, device_handle, true);
}
drm_public int amdgpu_device_initialize2(int fd, bool deduplicate_device,
uint32_t *major_version,
uint32_t *minor_version,
amdgpu_device_handle *device_handle)
{
return _amdgpu_device_initialize(fd, major_version, minor_version, device_handle, deduplicate_device);
}
drm_public int amdgpu_device_deinitialize(amdgpu_device_handle dev)
{
pthread_mutex_lock(&dev_mutex);
amdgpu_device_reference(&dev, NULL);
pthread_mutex_unlock(&dev_mutex);
return 0;
}
drm_public int amdgpu_device_get_fd(amdgpu_device_handle device_handle)
{
return device_handle->fd;
}
drm_public const char *amdgpu_get_marketing_name(amdgpu_device_handle dev)
{
if (dev->marketing_name)
return dev->marketing_name;
else
return "AMD Radeon Graphics";
}
drm_public int amdgpu_query_sw_info(amdgpu_device_handle dev,
enum amdgpu_sw_info info,
void *value)
{
uint32_t *val32 = (uint32_t*)value;
switch (info) {
case amdgpu_sw_info_address32_hi:
if (dev->va_mgr.vamgr_high_32.va_max)
*val32 = (dev->va_mgr.vamgr_high_32.va_max - 1) >> 32;
else
*val32 = (dev->va_mgr.vamgr_32.va_max - 1) >> 32;
return 0;
case amdgpu_sw_info_address_prt_wa_control_bit:
*val32 = dev->va_mgr.address_prt_wa_control_bit;
return 0;
}
return -EINVAL;
}

380
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/*
* Copyright © 2014 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include <errno.h>
#include <string.h>
#include "amdgpu.h"
#include "amdgpu_drm.h"
#include "amdgpu_internal.h"
#include "xf86drm.h"
drm_public int amdgpu_query_info(amdgpu_device_handle dev, unsigned info_id,
unsigned size, void *value)
{
struct drm_amdgpu_info request;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)value;
request.return_size = size;
request.query = info_id;
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}
drm_public int amdgpu_query_crtc_from_id(amdgpu_device_handle dev, unsigned id,
int32_t *result)
{
struct drm_amdgpu_info request;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)result;
request.return_size = sizeof(*result);
request.query = AMDGPU_INFO_CRTC_FROM_ID;
request.mode_crtc.id = id;
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}
drm_public int amdgpu_read_mm_registers(amdgpu_device_handle dev,
unsigned dword_offset, unsigned count, uint32_t instance,
uint32_t flags, uint32_t *values)
{
struct drm_amdgpu_info request;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)values;
request.return_size = count * sizeof(uint32_t);
request.query = AMDGPU_INFO_READ_MMR_REG;
request.read_mmr_reg.dword_offset = dword_offset;
request.read_mmr_reg.count = count;
request.read_mmr_reg.instance = instance;
request.read_mmr_reg.flags = flags;
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}
drm_public int amdgpu_query_hw_ip_count(amdgpu_device_handle dev,
unsigned type,
uint32_t *count)
{
struct drm_amdgpu_info request;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)count;
request.return_size = sizeof(*count);
request.query = AMDGPU_INFO_HW_IP_COUNT;
request.query_hw_ip.type = type;
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}
drm_public int amdgpu_query_hw_ip_info(amdgpu_device_handle dev, unsigned type,
unsigned ip_instance,
struct drm_amdgpu_info_hw_ip *info)
{
struct drm_amdgpu_info request;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)info;
request.return_size = sizeof(*info);
request.query = AMDGPU_INFO_HW_IP_INFO;
request.query_hw_ip.type = type;
request.query_hw_ip.ip_instance = ip_instance;
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}
drm_public int amdgpu_query_firmware_version(amdgpu_device_handle dev,
unsigned fw_type, unsigned ip_instance, unsigned index,
uint32_t *version, uint32_t *feature)
{
struct drm_amdgpu_info request;
struct drm_amdgpu_info_firmware firmware = {};
int r;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)&firmware;
request.return_size = sizeof(firmware);
request.query = AMDGPU_INFO_FW_VERSION;
request.query_fw.fw_type = fw_type;
request.query_fw.ip_instance = ip_instance;
request.query_fw.index = index;
r = drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
if (r)
return r;
*version = firmware.ver;
*feature = firmware.feature;
return 0;
}
drm_public int amdgpu_query_uq_fw_area_info(amdgpu_device_handle dev,
unsigned type,
unsigned ip_instance,
struct drm_amdgpu_info_uq_fw_areas *info)
{
struct drm_amdgpu_info request;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)info;
request.return_size = sizeof(*info);
request.query = AMDGPU_INFO_UQ_FW_AREAS;
request.query_hw_ip.type = type;
request.query_hw_ip.ip_instance = ip_instance;
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}
drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev)
{
int r, i;
r = amdgpu_query_info(dev, AMDGPU_INFO_DEV_INFO, sizeof(dev->dev_info),
&dev->dev_info);
if (r)
return r;
dev->info.asic_id = dev->dev_info.device_id;
dev->info.chip_rev = dev->dev_info.chip_rev;
dev->info.chip_external_rev = dev->dev_info.external_rev;
dev->info.family_id = dev->dev_info.family;
dev->info.max_engine_clk = dev->dev_info.max_engine_clock;
dev->info.max_memory_clk = dev->dev_info.max_memory_clock;
dev->info.gpu_counter_freq = dev->dev_info.gpu_counter_freq;
dev->info.enabled_rb_pipes_mask = dev->dev_info.enabled_rb_pipes_mask;
dev->info.rb_pipes = dev->dev_info.num_rb_pipes;
dev->info.ids_flags = dev->dev_info.ids_flags;
dev->info.num_hw_gfx_contexts = dev->dev_info.num_hw_gfx_contexts;
dev->info.num_shader_engines = dev->dev_info.num_shader_engines;
dev->info.num_shader_arrays_per_engine =
dev->dev_info.num_shader_arrays_per_engine;
dev->info.vram_type = dev->dev_info.vram_type;
dev->info.vram_bit_width = dev->dev_info.vram_bit_width;
dev->info.ce_ram_size = dev->dev_info.ce_ram_size;
dev->info.vce_harvest_config = dev->dev_info.vce_harvest_config;
dev->info.pci_rev_id = dev->dev_info.pci_rev;
if (dev->info.family_id < AMDGPU_FAMILY_AI) {
for (i = 0; i < (int)dev->info.num_shader_engines; i++) {
unsigned instance = (i << AMDGPU_INFO_MMR_SE_INDEX_SHIFT) |
(AMDGPU_INFO_MMR_SH_INDEX_MASK <<
AMDGPU_INFO_MMR_SH_INDEX_SHIFT);
r = amdgpu_read_mm_registers(dev, 0x263d, 1, instance, 0,
&dev->info.backend_disable[i]);
if (r)
return r;
/* extract bitfield CC_RB_BACKEND_DISABLE.BACKEND_DISABLE */
dev->info.backend_disable[i] =
(dev->info.backend_disable[i] >> 16) & 0xff;
r = amdgpu_read_mm_registers(dev, 0xa0d4, 1, instance, 0,
&dev->info.pa_sc_raster_cfg[i]);
if (r)
return r;
if (dev->info.family_id >= AMDGPU_FAMILY_CI) {
r = amdgpu_read_mm_registers(dev, 0xa0d5, 1, instance, 0,
&dev->info.pa_sc_raster_cfg1[i]);
if (r)
return r;
}
}
}
r = amdgpu_read_mm_registers(dev, 0x263e, 1, 0xffffffff, 0,
&dev->info.gb_addr_cfg);
if (r)
return r;
if (dev->info.family_id < AMDGPU_FAMILY_AI) {
r = amdgpu_read_mm_registers(dev, 0x2644, 32, 0xffffffff, 0,
dev->info.gb_tile_mode);
if (r)
return r;
if (dev->info.family_id >= AMDGPU_FAMILY_CI) {
r = amdgpu_read_mm_registers(dev, 0x2664, 16, 0xffffffff, 0,
dev->info.gb_macro_tile_mode);
if (r)
return r;
}
r = amdgpu_read_mm_registers(dev, 0x9d8, 1, 0xffffffff, 0,
&dev->info.mc_arb_ramcfg);
if (r)
return r;
}
dev->info.cu_active_number = dev->dev_info.cu_active_number;
dev->info.cu_ao_mask = dev->dev_info.cu_ao_mask;
memcpy(&dev->info.cu_bitmap[0][0], &dev->dev_info.cu_bitmap[0][0], sizeof(dev->info.cu_bitmap));
/* TODO: info->max_quad_shader_pipes is not set */
/* TODO: info->avail_quad_shader_pipes is not set */
/* TODO: info->cache_entries_per_quad_pipe is not set */
return 0;
}
drm_public int amdgpu_query_gpu_info(amdgpu_device_handle dev,
struct amdgpu_gpu_info *info)
{
if (!dev || !info)
return -EINVAL;
/* Get ASIC info*/
*info = dev->info;
return 0;
}
drm_public int amdgpu_query_heap_info(amdgpu_device_handle dev,
uint32_t heap,
uint32_t flags,
struct amdgpu_heap_info *info)
{
struct drm_amdgpu_info_vram_gtt vram_gtt_info = {};
int r;
r = amdgpu_query_info(dev, AMDGPU_INFO_VRAM_GTT,
sizeof(vram_gtt_info), &vram_gtt_info);
if (r)
return r;
/* Get heap information */
switch (heap) {
case AMDGPU_GEM_DOMAIN_VRAM:
/* query visible only vram heap */
if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)
info->heap_size = vram_gtt_info.vram_cpu_accessible_size;
else /* query total vram heap */
info->heap_size = vram_gtt_info.vram_size;
info->max_allocation = vram_gtt_info.vram_cpu_accessible_size;
if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)
r = amdgpu_query_info(dev, AMDGPU_INFO_VIS_VRAM_USAGE,
sizeof(info->heap_usage),
&info->heap_usage);
else
r = amdgpu_query_info(dev, AMDGPU_INFO_VRAM_USAGE,
sizeof(info->heap_usage),
&info->heap_usage);
if (r)
return r;
break;
case AMDGPU_GEM_DOMAIN_GTT:
info->heap_size = vram_gtt_info.gtt_size;
info->max_allocation = vram_gtt_info.vram_cpu_accessible_size;
r = amdgpu_query_info(dev, AMDGPU_INFO_GTT_USAGE,
sizeof(info->heap_usage),
&info->heap_usage);
if (r)
return r;
break;
default:
return -EINVAL;
}
return 0;
}
drm_public int amdgpu_query_gds_info(amdgpu_device_handle dev,
struct amdgpu_gds_resource_info *gds_info)
{
struct drm_amdgpu_info_gds gds_config = {};
int r;
if (!gds_info)
return -EINVAL;
r = amdgpu_query_info(dev, AMDGPU_INFO_GDS_CONFIG,
sizeof(gds_config), &gds_config);
if (r)
return r;
gds_info->gds_gfx_partition_size = gds_config.gds_gfx_partition_size;
gds_info->compute_partition_size = gds_config.compute_partition_size;
gds_info->gds_total_size = gds_config.gds_total_size;
gds_info->gws_per_gfx_partition = gds_config.gws_per_gfx_partition;
gds_info->gws_per_compute_partition = gds_config.gws_per_compute_partition;
gds_info->oa_per_gfx_partition = gds_config.oa_per_gfx_partition;
gds_info->oa_per_compute_partition = gds_config.oa_per_compute_partition;
return 0;
}
drm_public int amdgpu_query_sensor_info(amdgpu_device_handle dev, unsigned sensor_type,
unsigned size, void *value)
{
struct drm_amdgpu_info request;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)value;
request.return_size = size;
request.query = AMDGPU_INFO_SENSOR;
request.sensor_info.type = sensor_type;
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}
drm_public int amdgpu_query_video_caps_info(amdgpu_device_handle dev, unsigned cap_type,
unsigned size, void *value)
{
struct drm_amdgpu_info request;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)value;
request.return_size = size;
request.query = AMDGPU_INFO_VIDEO_CAPS;
request.sensor_info.type = cap_type;
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}
drm_public int amdgpu_query_gpuvm_fault_info(amdgpu_device_handle dev,
unsigned size, void *value)
{
struct drm_amdgpu_info request;
memset(&request, 0, sizeof(request));
request.return_pointer = (uintptr_t)value;
request.return_size = size;
request.query = AMDGPU_INFO_GPUVM_FAULT;
return drmCommandWrite(dev->fd, DRM_AMDGPU_INFO, &request,
sizeof(struct drm_amdgpu_info));
}

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/*
* Copyright © 2014 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef _AMDGPU_INTERNAL_H_
#define _AMDGPU_INTERNAL_H_
#include <assert.h>
#include <pthread.h>
#include "libdrm_macros.h"
#include "xf86atomic.h"
#include "amdgpu.h"
#include "util_double_list.h"
#include "handle_table.h"
#define AMDGPU_CS_MAX_RINGS 8
/* do not use below macro if b is not power of 2 aligned value */
#define __round_mask(x, y) ((__typeof__(x))((y)-1))
#define ROUND_UP(x, y) ((((x)-1) | __round_mask(x, y))+1)
#define ROUND_DOWN(x, y) ((x) & ~__round_mask(x, y))
#define AMDGPU_INVALID_VA_ADDRESS 0xffffffffffffffff
#define AMDGPU_NULL_SUBMIT_SEQ 0
struct amdgpu_bo_va_hole {
struct list_head list;
uint64_t offset;
uint64_t size;
};
struct amdgpu_bo_va_mgr {
uint64_t va_max;
struct list_head va_holes;
pthread_mutex_t bo_va_mutex;
uint32_t va_alignment;
};
struct amdgpu_va {
uint64_t address;
uint64_t size;
enum amdgpu_gpu_va_range range;
struct amdgpu_bo_va_mgr *vamgr;
};
struct amdgpu_va_manager {
/** The VA manager for the lower virtual address space */
struct amdgpu_bo_va_mgr vamgr_low;
/** The VA manager for the 32bit address space */
struct amdgpu_bo_va_mgr vamgr_32;
/** The VA manager for the high virtual address space */
struct amdgpu_bo_va_mgr vamgr_high;
/** The VA manager for the 32bit high address space */
struct amdgpu_bo_va_mgr vamgr_high_32;
/** The bit to control whether it's the "LOW" or "HIGH" halves, when
* half of the address space is reserved for PRT to implement a SW
* workaround. */
unsigned address_prt_wa_control_bit;
};
struct amdgpu_device {
atomic_t refcount;
struct amdgpu_device *next;
int fd;
int flink_fd;
unsigned major_version;
unsigned minor_version;
char *marketing_name;
/** List of buffer handles. Protected by bo_table_mutex. */
struct handle_table bo_handles;
/** List of buffer GEM flink names. Protected by bo_table_mutex. */
struct handle_table bo_flink_names;
/** This protects all hash tables. */
pthread_mutex_t bo_table_mutex;
struct drm_amdgpu_info_device dev_info;
struct amdgpu_gpu_info info;
struct amdgpu_va_manager va_mgr;
};
struct amdgpu_bo {
atomic_t refcount;
struct amdgpu_device *dev;
uint64_t alloc_size;
uint32_t handle;
uint32_t flink_name;
pthread_mutex_t cpu_access_mutex;
void *cpu_ptr;
int64_t cpu_map_count;
};
struct amdgpu_bo_list {
struct amdgpu_device *dev;
uint32_t handle;
};
struct amdgpu_context {
struct amdgpu_device *dev;
/** Mutex for accessing fences and to maintain command submissions
in good sequence. */
pthread_mutex_t sequence_mutex;
/* context id*/
uint32_t id;
uint64_t last_seq[AMDGPU_HW_IP_NUM][AMDGPU_HW_IP_INSTANCE_MAX_COUNT][AMDGPU_CS_MAX_RINGS];
struct list_head sem_list[AMDGPU_HW_IP_NUM][AMDGPU_HW_IP_INSTANCE_MAX_COUNT][AMDGPU_CS_MAX_RINGS];
};
/**
* Structure describing sw semaphore based on scheduler
*
*/
struct amdgpu_semaphore {
atomic_t refcount;
struct list_head list;
struct amdgpu_cs_fence signal_fence;
};
/**
* Functions.
*/
drm_private void amdgpu_vamgr_init(struct amdgpu_bo_va_mgr *mgr, uint64_t start,
uint64_t max, uint64_t alignment);
drm_private void amdgpu_vamgr_deinit(struct amdgpu_bo_va_mgr *mgr);
drm_private void amdgpu_parse_asic_ids(struct amdgpu_device *dev);
drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
drm_private uint64_t amdgpu_cs_calculate_timeout(uint64_t timeout);
/**
* Inline functions.
*/
/**
* Increment src and decrement dst as if we were updating references
* for an assignment between 2 pointers of some objects.
*
* \return true if dst is 0
*/
static inline bool update_references(atomic_t *dst, atomic_t *src)
{
if (dst != src) {
/* bump src first */
if (src) {
assert(atomic_read(src) > 0);
atomic_inc(src);
}
if (dst) {
assert(atomic_read(dst) > 0);
return atomic_dec_and_test(dst);
}
}
return false;
}
#endif

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/*
* Copyright 2024 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include <string.h>
#include <errno.h>
#include "xf86drm.h"
#include "amdgpu_drm.h"
#include "amdgpu_internal.h"
drm_public int
amdgpu_create_userqueue(amdgpu_device_handle dev,
uint32_t ip_type,
uint32_t doorbell_handle,
uint32_t doorbell_offset,
uint64_t queue_va,
uint64_t queue_size,
uint64_t wptr_va,
uint64_t rptr_va,
void *mqd_in,
uint32_t flags,
uint32_t *queue_id)
{
int ret;
union drm_amdgpu_userq userq;
uint64_t mqd_size;
if (!dev)
return -EINVAL;
switch (ip_type) {
case AMDGPU_HW_IP_GFX:
mqd_size = sizeof(struct drm_amdgpu_userq_mqd_gfx11);
break;
case AMDGPU_HW_IP_DMA:
mqd_size = sizeof(struct drm_amdgpu_userq_mqd_sdma_gfx11);
break;
case AMDGPU_HW_IP_COMPUTE:
mqd_size = sizeof(struct drm_amdgpu_userq_mqd_compute_gfx11);
break;
default:
return -EINVAL;
}
memset(&userq, 0, sizeof(userq));
userq.in.op = AMDGPU_USERQ_OP_CREATE;
userq.in.ip_type = ip_type;
userq.in.doorbell_handle = doorbell_handle;
userq.in.doorbell_offset = doorbell_offset;
userq.in.queue_va = queue_va;
userq.in.queue_size = queue_size;
userq.in.wptr_va = wptr_va;
userq.in.rptr_va = rptr_va;
userq.in.mqd = (uint64_t)mqd_in;
userq.in.mqd_size = mqd_size;
userq.in.flags = flags;
ret = drmCommandWriteRead(dev->fd, DRM_AMDGPU_USERQ,
&userq, sizeof(userq));
*queue_id = userq.out.queue_id;
return ret;
}
drm_public int
amdgpu_free_userqueue(amdgpu_device_handle dev, uint32_t queue_id)
{
union drm_amdgpu_userq userq;
memset(&userq, 0, sizeof(userq));
userq.in.op = AMDGPU_USERQ_OP_FREE;
userq.in.queue_id = queue_id;
return drmCommandWriteRead(dev->fd, DRM_AMDGPU_USERQ,
&userq, sizeof(userq));
}
drm_public int
amdgpu_userq_signal(amdgpu_device_handle dev,
struct drm_amdgpu_userq_signal *signal_data)
{
int r;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_USERQ_SIGNAL,
signal_data, sizeof(struct drm_amdgpu_userq_signal));
return r;
}
drm_public int
amdgpu_userq_wait(amdgpu_device_handle dev,
struct drm_amdgpu_userq_wait *wait_data)
{
int r;
r = drmCommandWriteRead(dev->fd, DRM_AMDGPU_USERQ_WAIT,
wait_data, sizeof(struct drm_amdgpu_userq_wait));
return r;
}

406
amdgpu/amdgpu_vamgr.c Normal file
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/*
* Copyright 2014 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include "amdgpu.h"
#include "amdgpu_drm.h"
#include "amdgpu_internal.h"
#include "util_math.h"
drm_public int amdgpu_va_range_query(amdgpu_device_handle dev,
enum amdgpu_gpu_va_range type,
uint64_t *start, uint64_t *end)
{
if (type != amdgpu_gpu_va_range_general)
return -EINVAL;
*start = dev->dev_info.virtual_address_offset;
*end = dev->dev_info.virtual_address_max;
return 0;
}
drm_private void amdgpu_vamgr_init(struct amdgpu_bo_va_mgr *mgr, uint64_t start,
uint64_t max, uint64_t alignment)
{
struct amdgpu_bo_va_hole *n;
mgr->va_max = max;
mgr->va_alignment = alignment;
list_inithead(&mgr->va_holes);
pthread_mutex_init(&mgr->bo_va_mutex, NULL);
pthread_mutex_lock(&mgr->bo_va_mutex);
n = calloc(1, sizeof(struct amdgpu_bo_va_hole));
n->size = mgr->va_max - start;
n->offset = start;
list_add(&n->list, &mgr->va_holes);
pthread_mutex_unlock(&mgr->bo_va_mutex);
}
drm_private void amdgpu_vamgr_deinit(struct amdgpu_bo_va_mgr *mgr)
{
struct amdgpu_bo_va_hole *hole, *tmp;
LIST_FOR_EACH_ENTRY_SAFE(hole, tmp, &mgr->va_holes, list) {
list_del(&hole->list);
free(hole);
}
pthread_mutex_destroy(&mgr->bo_va_mutex);
}
static drm_private int
amdgpu_vamgr_subtract_hole(struct amdgpu_bo_va_hole *hole, uint64_t start_va,
uint64_t end_va)
{
if (start_va > hole->offset && end_va - hole->offset < hole->size) {
struct amdgpu_bo_va_hole *n = calloc(1, sizeof(struct amdgpu_bo_va_hole));
if (!n)
return -ENOMEM;
n->size = start_va - hole->offset;
n->offset = hole->offset;
list_add(&n->list, &hole->list);
hole->size -= (end_va - hole->offset);
hole->offset = end_va;
} else if (start_va > hole->offset) {
hole->size = start_va - hole->offset;
} else if (end_va - hole->offset < hole->size) {
hole->size -= (end_va - hole->offset);
hole->offset = end_va;
} else {
list_del(&hole->list);
free(hole);
}
return 0;
}
static drm_private int
amdgpu_vamgr_find_va(struct amdgpu_bo_va_mgr *mgr, uint64_t size,
uint64_t alignment, uint64_t base_required,
bool search_from_top, uint64_t *va_out)
{
struct amdgpu_bo_va_hole *hole, *n;
uint64_t offset = 0;
int ret;
alignment = MAX2(alignment, mgr->va_alignment);
size = ALIGN(size, mgr->va_alignment);
if (base_required % alignment)
return -EINVAL;
pthread_mutex_lock(&mgr->bo_va_mutex);
if (!search_from_top) {
LIST_FOR_EACH_ENTRY_SAFE_REV(hole, n, &mgr->va_holes, list) {
if (base_required) {
if (hole->offset > base_required ||
(hole->offset + hole->size) < (base_required + size))
continue;
offset = base_required;
} else {
uint64_t waste = hole->offset % alignment;
waste = waste ? alignment - waste : 0;
offset = hole->offset + waste;
if (offset >= (hole->offset + hole->size) ||
size > (hole->offset + hole->size) - offset) {
continue;
}
}
ret = amdgpu_vamgr_subtract_hole(hole, offset, offset + size);
pthread_mutex_unlock(&mgr->bo_va_mutex);
*va_out = offset;
return ret;
}
} else {
LIST_FOR_EACH_ENTRY_SAFE(hole, n, &mgr->va_holes, list) {
if (base_required) {
if (hole->offset > base_required ||
(hole->offset + hole->size) < (base_required + size))
continue;
offset = base_required;
} else {
if (size > hole->size)
continue;
offset = hole->offset + hole->size - size;
offset -= offset % alignment;
if (offset < hole->offset) {
continue;
}
}
ret = amdgpu_vamgr_subtract_hole(hole, offset, offset + size);
pthread_mutex_unlock(&mgr->bo_va_mutex);
*va_out = offset;
return ret;
}
}
pthread_mutex_unlock(&mgr->bo_va_mutex);
return -ENOMEM;
}
static drm_private void
amdgpu_vamgr_free_va(struct amdgpu_bo_va_mgr *mgr, uint64_t va, uint64_t size)
{
struct amdgpu_bo_va_hole *hole, *next;
if (va == AMDGPU_INVALID_VA_ADDRESS)
return;
size = ALIGN(size, mgr->va_alignment);
pthread_mutex_lock(&mgr->bo_va_mutex);
hole = container_of(&mgr->va_holes, hole, list);
LIST_FOR_EACH_ENTRY(next, &mgr->va_holes, list) {
if (next->offset < va)
break;
hole = next;
}
if (&hole->list != &mgr->va_holes) {
/* Grow upper hole if it's adjacent */
if (hole->offset == (va + size)) {
hole->offset = va;
hole->size += size;
/* Merge lower hole if it's adjacent */
if (next != hole &&
&next->list != &mgr->va_holes &&
(next->offset + next->size) == va) {
next->size += hole->size;
list_del(&hole->list);
free(hole);
}
goto out;
}
}
/* Grow lower hole if it's adjacent */
if (next != hole && &next->list != &mgr->va_holes &&
(next->offset + next->size) == va) {
next->size += size;
goto out;
}
/* FIXME on allocation failure we just lose virtual address space
* maybe print a warning
*/
next = calloc(1, sizeof(struct amdgpu_bo_va_hole));
if (next) {
next->size = size;
next->offset = va;
list_add(&next->list, &hole->list);
}
out:
pthread_mutex_unlock(&mgr->bo_va_mutex);
}
drm_public int amdgpu_va_range_alloc(amdgpu_device_handle dev,
enum amdgpu_gpu_va_range va_range_type,
uint64_t size,
uint64_t va_base_alignment,
uint64_t va_base_required,
uint64_t *va_base_allocated,
amdgpu_va_handle *va_range_handle,
uint64_t flags)
{
return amdgpu_va_range_alloc2(&dev->va_mgr, va_range_type, size,
va_base_alignment, va_base_required,
va_base_allocated, va_range_handle,
flags);
}
drm_public int amdgpu_va_range_alloc2(amdgpu_va_manager_handle va_mgr,
enum amdgpu_gpu_va_range va_range_type,
uint64_t size,
uint64_t va_base_alignment,
uint64_t va_base_required,
uint64_t *va_base_allocated,
amdgpu_va_handle *va_range_handle,
uint64_t flags)
{
struct amdgpu_bo_va_mgr *vamgr;
bool search_from_top = !!(flags & AMDGPU_VA_RANGE_REPLAYABLE);
int ret;
/* Clear the flag when the high VA manager is not initialized */
if (flags & AMDGPU_VA_RANGE_HIGH && !va_mgr->vamgr_high_32.va_max)
flags &= ~AMDGPU_VA_RANGE_HIGH;
if (flags & AMDGPU_VA_RANGE_HIGH) {
if (flags & AMDGPU_VA_RANGE_32_BIT)
vamgr = &va_mgr->vamgr_high_32;
else
vamgr = &va_mgr->vamgr_high;
} else {
if (flags & AMDGPU_VA_RANGE_32_BIT)
vamgr = &va_mgr->vamgr_32;
else
vamgr = &va_mgr->vamgr_low;
}
va_base_alignment = MAX2(va_base_alignment, vamgr->va_alignment);
size = ALIGN(size, vamgr->va_alignment);
ret = amdgpu_vamgr_find_va(vamgr, size,
va_base_alignment, va_base_required,
search_from_top, va_base_allocated);
if (!(flags & AMDGPU_VA_RANGE_32_BIT) && ret) {
/* fallback to 32bit address */
if (flags & AMDGPU_VA_RANGE_HIGH)
vamgr = &va_mgr->vamgr_high_32;
else
vamgr = &va_mgr->vamgr_32;
ret = amdgpu_vamgr_find_va(vamgr, size,
va_base_alignment, va_base_required,
search_from_top, va_base_allocated);
}
if (!ret) {
struct amdgpu_va* va;
va = calloc(1, sizeof(struct amdgpu_va));
if(!va){
amdgpu_vamgr_free_va(vamgr, *va_base_allocated, size);
return -ENOMEM;
}
va->address = *va_base_allocated;
va->size = size;
va->range = va_range_type;
va->vamgr = vamgr;
*va_range_handle = va;
}
return ret;
}
drm_public int amdgpu_va_range_free(amdgpu_va_handle va_range_handle)
{
if(!va_range_handle || !va_range_handle->address)
return 0;
amdgpu_vamgr_free_va(va_range_handle->vamgr,
va_range_handle->address,
va_range_handle->size);
free(va_range_handle);
return 0;
}
drm_public uint64_t amdgpu_va_get_start_addr(amdgpu_va_handle va_handle)
{
return va_handle->address;
}
drm_public amdgpu_va_manager_handle amdgpu_va_manager_alloc(void)
{
amdgpu_va_manager_handle r = calloc(1, sizeof(struct amdgpu_va_manager));
return r;
}
drm_public void amdgpu_va_manager_init(struct amdgpu_va_manager *va_mgr,
uint64_t low_va_offset, uint64_t low_va_max,
uint64_t high_va_offset, uint64_t high_va_max,
uint32_t virtual_address_alignment)
{
amdgpu_va_manager_init2(va_mgr, low_va_offset, low_va_max,
high_va_offset, high_va_max,
virtual_address_alignment, 0);
}
drm_public void amdgpu_va_manager_init2(struct amdgpu_va_manager *va_mgr,
uint64_t low_va_offset, uint64_t low_va_max,
uint64_t high_va_offset, uint64_t high_va_max,
uint32_t virtual_address_alignment,
uint32_t flags)
{
uint64_t start, max;
va_mgr->address_prt_wa_control_bit = ~0;
start = low_va_offset;
max = MIN2(low_va_max, 0x100000000ULL);
amdgpu_vamgr_init(&va_mgr->vamgr_32, start, max,
virtual_address_alignment);
start = max;
if ((flags & AMDGPU_VA_MGR_RESERVE_HALF_VA_FOR_PRT) && !high_va_max) {
/* Reserve the half VA range for PRT by splitting it in two
* equal halves where one bit controls whether it's the LOW or
* HIGH half.
*/
va_mgr->address_prt_wa_control_bit = util_last_bit64(low_va_offset ^ low_va_max) - 1;
max = low_va_max ^ (1ull << va_mgr->address_prt_wa_control_bit);
} else {
max = MAX2(low_va_max, 0x100000000ULL);
}
amdgpu_vamgr_init(&va_mgr->vamgr_low, start, max,
virtual_address_alignment);
start = high_va_offset;
max = MIN2(high_va_max, (start & ~0xffffffffULL) + 0x100000000ULL);
amdgpu_vamgr_init(&va_mgr->vamgr_high_32, start, max,
virtual_address_alignment);
start = max;
if ((flags & AMDGPU_VA_MGR_RESERVE_HALF_VA_FOR_PRT) && high_va_max) {
/* Reserve the half VA range for PRT by splitting it in two
* equal halves where one bit controls whether it's the LOW or
* HIGH half.
*/
va_mgr->address_prt_wa_control_bit = util_last_bit64(high_va_offset ^ high_va_max) - 1;
max = high_va_max ^ (1ull << va_mgr->address_prt_wa_control_bit);
} else {
max = MAX2(high_va_max, (start & ~0xffffffffULL) + 0x100000000ULL);
}
amdgpu_vamgr_init(&va_mgr->vamgr_high, start, max,
virtual_address_alignment);
}
drm_public void amdgpu_va_manager_deinit(struct amdgpu_va_manager *va_mgr)
{
amdgpu_vamgr_deinit(&va_mgr->vamgr_32);
amdgpu_vamgr_deinit(&va_mgr->vamgr_low);
amdgpu_vamgr_deinit(&va_mgr->vamgr_high_32);
amdgpu_vamgr_deinit(&va_mgr->vamgr_high);
}
drm_public int amdgpu_va_manager_query_sw_info(struct amdgpu_va_manager *va_mgr,
enum amdgpu_va_manager_sw_info info,
void *value)
{
uint32_t *val32 = (uint32_t*)value;
switch (info) {
case amdgpu_va_manager_sw_info_address_prt_wa_control_bit:
*val32 = va_mgr->address_prt_wa_control_bit;
return 0;
}
return -EINVAL;
}

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/*
* Copyright 2017 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "amdgpu.h"
#include "amdgpu_drm.h"
#include "xf86drm.h"
#include "amdgpu_internal.h"
drm_public int amdgpu_vm_reserve_vmid(amdgpu_device_handle dev, uint32_t flags)
{
union drm_amdgpu_vm vm;
vm.in.op = AMDGPU_VM_OP_RESERVE_VMID;
vm.in.flags = flags;
return drmCommandWriteRead(dev->fd, DRM_AMDGPU_VM,
&vm, sizeof(vm));
}
drm_public int amdgpu_vm_unreserve_vmid(amdgpu_device_handle dev,
uint32_t flags)
{
union drm_amdgpu_vm vm;
vm.in.op = AMDGPU_VM_OP_UNRESERVE_VMID;
vm.in.flags = flags;
return drmCommandWriteRead(dev->fd, DRM_AMDGPU_VM,
&vm, sizeof(vm));
}

72
amdgpu/handle_table.c Normal file
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/*
* Copyright 2018 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include <stdlib.h>
#include <string.h>
#include <errno.h>
#include <unistd.h>
#include "handle_table.h"
#include "util_math.h"
drm_private int handle_table_insert(struct handle_table *table, uint32_t key,
void *value)
{
if (key >= table->max_key) {
uint32_t alignment = sysconf(_SC_PAGESIZE) / sizeof(void*);
uint32_t max_key = ALIGN(key + 1, alignment);
void **values;
values = realloc(table->values, max_key * sizeof(void *));
if (!values)
return -ENOMEM;
memset(values + table->max_key, 0, (max_key - table->max_key) *
sizeof(void *));
table->max_key = max_key;
table->values = values;
}
table->values[key] = value;
return 0;
}
drm_private void handle_table_remove(struct handle_table *table, uint32_t key)
{
if (key < table->max_key)
table->values[key] = NULL;
}
drm_private void *handle_table_lookup(struct handle_table *table, uint32_t key)
{
if (key < table->max_key)
return table->values[key];
else
return NULL;
}
drm_private void handle_table_fini(struct handle_table *table)
{
free(table->values);
table->max_key = 0;
table->values = NULL;
}

41
amdgpu/handle_table.h Normal file
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/*
* Copyright 2018 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef _HANDLE_TABLE_H_
#define _HANDLE_TABLE_H_
#include <stdint.h>
#include "libdrm_macros.h"
struct handle_table {
uint32_t max_key;
void **values;
};
drm_private int handle_table_insert(struct handle_table *table, uint32_t key,
void *value);
drm_private void handle_table_remove(struct handle_table *table, uint32_t key);
drm_private void *handle_table_lookup(struct handle_table *table, uint32_t key);
drm_private void handle_table_fini(struct handle_table *table);
#endif /* _HANDLE_TABLE_H_ */

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prefix=@prefix@
exec_prefix=@exec_prefix@
libdir=@libdir@
includedir=@includedir@
Name: libdrm_amdgpu
Description: Userspace interface to kernel DRM services for amdgpu
Version: @PACKAGE_VERSION@
Libs: -L${libdir} -ldrm_amdgpu
Cflags: -I${includedir} -I${includedir}/libdrm
Requires.private: libdrm

69
amdgpu/meson.build Normal file
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# Copyright © 2017-2018 Intel Corporation
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
datadir_amdgpu = join_paths(get_option('prefix'), get_option('datadir'), 'libdrm')
libdrm_amdgpu = library(
'drm_amdgpu',
[
files(
'amdgpu_asic_id.c', 'amdgpu_bo.c', 'amdgpu_cs.c', 'amdgpu_device.c',
'amdgpu_gpu_info.c', 'amdgpu_vamgr.c', 'amdgpu_vm.c', 'handle_table.c',
'amdgpu_userq.c',
),
config_file,
],
c_args : [
libdrm_c_args,
'-DAMDGPU_ASIC_ID_TABLE="@0@"'.format(join_paths(datadir_amdgpu, 'amdgpu.ids')),
],
include_directories : [inc_root, inc_drm],
link_with : libdrm,
dependencies : [dep_threads, dep_atomic_ops, dep_rt],
version : '1.@0@.0'.format(patch_ver),
install : true,
)
install_headers('amdgpu.h', subdir : 'libdrm')
pkg.generate(
libdrm_amdgpu,
name : 'libdrm_amdgpu',
subdirs : ['.', 'libdrm'],
description : 'Userspace interface to kernel DRM services for amdgpu',
)
ext_libdrm_amdgpu = declare_dependency(
link_with : [libdrm, libdrm_amdgpu],
include_directories : [inc_drm, include_directories('.')],
)
meson.override_dependency('libdrm_amdgpu', ext_libdrm_amdgpu)
test(
'amdgpu-symbols-check',
symbols_check,
args : [
'--lib', libdrm_amdgpu,
'--symbols-file', files('amdgpu-symbols.txt'),
'--nm', prog_nm.full_path(),
],
)

111
android/gralloc_handle.h Normal file
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@ -0,0 +1,111 @@
/*
* Copyright (C) 2010-2011 Chia-I Wu <olvaffe@gmail.com>
* Copyright (C) 2010-2011 LunarG Inc.
* Copyright (C) 2016 Linaro, Ltd., Rob Herring <robh@kernel.org>
* Copyright (C) 2018 Collabora, Robert Foss <robert.foss@collabora.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef __ANDROID_GRALLOC_HANDLE_H__
#define __ANDROID_GRALLOC_HANDLE_H__
#include <cutils/native_handle.h>
#include <stdint.h>
/* support users of drm_gralloc/gbm_gralloc */
#define gralloc_gbm_handle_t gralloc_handle_t
#define gralloc_drm_handle_t gralloc_handle_t
struct gralloc_handle_t {
native_handle_t base;
/* dma-buf file descriptor
* Must be located first since, native_handle_t is allocated
* using native_handle_create(), which allocates space for
* sizeof(native_handle_t) + sizeof(int) * (numFds + numInts)
* numFds = GRALLOC_HANDLE_NUM_FDS
* numInts = GRALLOC_HANDLE_NUM_INTS
* Where numFds represents the number of FDs and
* numInts represents the space needed for the
* remainder of this struct.
* And the FDs are expected to be found first following
* native_handle_t.
*/
int prime_fd;
/* api variables */
uint32_t magic; /* differentiate between allocator impls */
uint32_t version; /* api version */
uint32_t width; /* width of buffer in pixels */
uint32_t height; /* height of buffer in pixels */
uint32_t format; /* pixel format (Android) */
uint32_t usage; /* android libhardware usage flags */
uint32_t stride; /* the stride in bytes */
int data_owner; /* owner of data (for validation) */
uint64_t modifier __attribute__((aligned(8))); /* buffer modifiers */
union {
void *data; /* pointer to struct gralloc_gbm_bo_t */
uint64_t reserved;
} __attribute__((aligned(8)));
};
#define GRALLOC_HANDLE_VERSION 4
#define GRALLOC_HANDLE_MAGIC 0x60585350
#define GRALLOC_HANDLE_NUM_FDS 1
#define GRALLOC_HANDLE_NUM_INTS ( \
((sizeof(struct gralloc_handle_t) - sizeof(native_handle_t))/sizeof(int)) \
- GRALLOC_HANDLE_NUM_FDS)
static inline struct gralloc_handle_t *gralloc_handle(buffer_handle_t handle)
{
return (struct gralloc_handle_t *)handle;
}
/**
* Create a buffer handle.
*/
static inline native_handle_t *gralloc_handle_create(int32_t width,
int32_t height,
int32_t hal_format,
int32_t usage)
{
struct gralloc_handle_t *handle;
native_handle_t *nhandle = native_handle_create(GRALLOC_HANDLE_NUM_FDS,
GRALLOC_HANDLE_NUM_INTS);
if (!nhandle)
return NULL;
handle = gralloc_handle(nhandle);
handle->magic = GRALLOC_HANDLE_MAGIC;
handle->version = GRALLOC_HANDLE_VERSION;
handle->width = width;
handle->height = height;
handle->format = hal_format;
handle->usage = usage;
handle->prime_fd = -1;
return nhandle;
}
#endif

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@ -1,14 +0,0 @@
#! /bin/sh
srcdir=`dirname "$0"`
test -z "$srcdir" && srcdir=.
ORIGDIR=`pwd`
cd "$srcdir"
autoreconf --force --verbose --install || exit 1
cd "$ORIGDIR" || exit $?
if test -z "$NOCONFIGURE"; then
"$srcdir"/configure "$@"
fi

View file

@ -1,485 +0,0 @@
# Copyright 2005 Adam Jackson.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
# on the rights to use, copy, modify, merge, publish, distribute, sub
# license, and/or sell copies of the Software, and to permit persons to whom
# the Software is furnished to do so, subject to the following conditions:
#
# The above copyright notice and this permission notice (including the next
# paragraph) shall be included in all copies or substantial portions of the
# Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
# ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
AC_PREREQ([2.63])
AC_INIT([libdrm],
[2.4.62],
[https://bugs.freedesktop.org/enter_bug.cgi?product=DRI],
[libdrm])
AC_CONFIG_HEADERS([config.h])
AC_CONFIG_SRCDIR([Makefile.am])
AC_CONFIG_MACRO_DIR([m4])
AC_CONFIG_AUX_DIR([build-aux])
# Require xorg-macros minimum of 1.12 for XORG_WITH_XSLTPROC
m4_ifndef([XORG_MACROS_VERSION],
[m4_fatal([must install xorg-macros 1.12 or later before running autoconf/autogen])])
XORG_MACROS_VERSION(1.12)
XORG_WITH_XSLTPROC
XORG_MANPAGE_SECTIONS
AM_INIT_AUTOMAKE([1.10 foreign dist-bzip2])
# Enable quiet compiles on automake 1.11.
m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])])
# Check for programs
AC_PROG_CC
AC_PROG_CC_C99
if test "x$ac_cv_prog_cc_c99" = xno; then
AC_MSG_ERROR([Building libdrm requires C99 enabled compiler])
fi
AC_USE_SYSTEM_EXTENSIONS
AC_SYS_LARGEFILE
AC_FUNC_ALLOCA
AC_CHECK_HEADERS([sys/mkdev.h])
# Initialize libtool
LT_PREREQ([2.2])
LT_INIT([disable-static])
PKG_CHECK_MODULES(PTHREADSTUBS, pthread-stubs)
AC_SUBST(PTHREADSTUBS_CFLAGS)
AC_SUBST(PTHREADSTUBS_LIBS)
pkgconfigdir=${libdir}/pkgconfig
AC_SUBST(pkgconfigdir)
AC_ARG_ENABLE([udev],
[AS_HELP_STRING([--enable-udev],
[Enable support for using udev instead of mknod (default: disabled)])],
[UDEV=$enableval], [UDEV=no])
AC_ARG_ENABLE(libkms,
AS_HELP_STRING([--disable-libkms],
[Disable KMS mm abstraction library (default: auto, enabled on supported platforms)]),
[LIBKMS=$enableval], [LIBKMS=auto])
AC_ARG_ENABLE(intel,
AS_HELP_STRING([--disable-intel],
[Enable support for intel's KMS API (default: auto, enabled on x86)]),
[INTEL=$enableval], [INTEL=auto])
AC_ARG_ENABLE(radeon,
AS_HELP_STRING([--disable-radeon],
[Enable support for radeon's KMS API (default: auto)]),
[RADEON=$enableval], [RADEON=auto])
AC_ARG_ENABLE(nouveau,
AS_HELP_STRING([--disable-nouveau],
[Enable support for nouveau's KMS API (default: auto)]),
[NOUVEAU=$enableval], [NOUVEAU=auto])
AC_ARG_ENABLE(vmwgfx,
AS_HELP_STRING([--disable-vmwgfx],
[Enable support for vmwgfx's KMS API (default: yes)]),
[VMWGFX=$enableval], [VMWGFX=yes])
AC_ARG_ENABLE(omap-experimental-api,
AS_HELP_STRING([--enable-omap-experimental-api],
[Enable support for OMAP's experimental API (default: disabled)]),
[OMAP=$enableval], [OMAP=no])
AC_ARG_ENABLE(exynos-experimental-api,
AS_HELP_STRING([--enable-exynos-experimental-api],
[Enable support for EXYNOS's experimental API (default: disabled)]),
[EXYNOS=$enableval], [EXYNOS=no])
AC_ARG_ENABLE(freedreno,
AS_HELP_STRING([--disable-freedreno],
[Enable support for freedreno's KMS API (default: auto, enabled on arm)]),
[FREEDRENO=$enableval], [FREEDRENO=auto])
AC_ARG_ENABLE(freedreno-kgsl,
AS_HELP_STRING([--enable-freedreno-kgsl],
[Enable support for freedreno's to use downstream android kernel API (default: disabled)]),
[FREEDRENO_KGSL=$enableval], [FREEDRENO_KGSL=no])
AC_ARG_ENABLE(tegra-experimental-api,
AS_HELP_STRING([--enable-tegra-experimental-api],
[Enable support for Tegra's experimental API (default: disabled)]),
[TEGRA=$enableval], [TEGRA=no])
AC_ARG_ENABLE(install-test-programs,
AS_HELP_STRING([--enable-install-test-programs],
[Install test programs (default: no)]),
[INSTALL_TESTS=$enableval], [INSTALL_TESTS=no])
dnl ===========================================================================
dnl check compiler flags
AC_DEFUN([LIBDRM_CC_TRY_FLAG], [
AC_MSG_CHECKING([whether $CC supports $1])
libdrm_save_CFLAGS="$CFLAGS"
CFLAGS="$CFLAGS $1"
AC_COMPILE_IFELSE([AC_LANG_SOURCE([ ])], [libdrm_cc_flag=yes], [libdrm_cc_flag=no])
CFLAGS="$libdrm_save_CFLAGS"
if test "x$libdrm_cc_flag" = "xyes"; then
ifelse([$2], , :, [$2])
else
ifelse([$3], , :, [$3])
fi
AC_MSG_RESULT([$libdrm_cc_flag])
])
dnl We use clock_gettime to check for timeouts in drmWaitVBlank
AC_CHECK_FUNCS([clock_gettime], [CLOCK_LIB=],
[AC_CHECK_LIB([rt], [clock_gettime], [CLOCK_LIB=-lrt],
[AC_MSG_ERROR([Couldn't find clock_gettime])])])
AC_SUBST([CLOCK_LIB])
AC_CHECK_FUNCS([open_memstream], [HAVE_OPEN_MEMSTREAM=yes])
dnl Use lots of warning flags with with gcc and compatible compilers
dnl Note: if you change the following variable, the cache is automatically
dnl skipped and all flags rechecked. So there's no need to do anything
dnl else. If for any reason you need to force a recheck, just change
dnl MAYBE_WARN in an ignorable way (like adding whitespace)
MAYBE_WARN="-Wall -Wextra \
-Wsign-compare -Werror-implicit-function-declaration \
-Wpointer-arith -Wwrite-strings -Wstrict-prototypes \
-Wmissing-prototypes -Wmissing-declarations -Wnested-externs \
-Wpacked -Wswitch-enum -Wmissing-format-attribute \
-Wstrict-aliasing=2 -Winit-self \
-Wdeclaration-after-statement -Wold-style-definition \
-Wno-missing-field-initializers -Wno-unused-parameter \
-Wno-attributes -Wno-long-long -Winline"
# invalidate cached value if MAYBE_WARN has changed
if test "x$libdrm_cv_warn_maybe" != "x$MAYBE_WARN"; then
unset libdrm_cv_warn_cflags
fi
AC_CACHE_CHECK([for supported warning flags], libdrm_cv_warn_cflags, [
echo
WARN_CFLAGS=""
# Some warning options are not supported by all versions of
# gcc, so test all desired options against the current
# compiler.
#
# Note that there are some order dependencies
# here. Specifically, an option that disables a warning will
# have no net effect if a later option then enables that
# warnings, (perhaps implicitly). So we put some grouped
# options (-Wall and -Wextra) up front and the -Wno options
# last.
for W in $MAYBE_WARN; do
LIBDRM_CC_TRY_FLAG([$W], [WARN_CFLAGS="$WARN_CFLAGS $W"])
done
libdrm_cv_warn_cflags=$WARN_CFLAGS
libdrm_cv_warn_maybe=$MAYBE_WARN
AC_MSG_CHECKING([which warning flags were supported])])
WARN_CFLAGS="$libdrm_cv_warn_cflags"
# Check for atomic intrinsics
AC_CACHE_CHECK([for native atomic primitives], drm_cv_atomic_primitives, [
drm_cv_atomic_primitives="none"
AC_LINK_IFELSE([AC_LANG_PROGRAM([[
int atomic_add(int i) { return __sync_fetch_and_add (&i, 1); }
int atomic_cmpxchg(int i, int j, int k) { return __sync_val_compare_and_swap (&i, j, k); }
]],[[]])], [drm_cv_atomic_primitives="Intel"],[])
if test "x$drm_cv_atomic_primitives" = "xnone"; then
AC_CHECK_HEADER([atomic_ops.h], drm_cv_atomic_primitives="libatomic-ops")
fi
# atomic functions defined in <atomic.h> & libc on Solaris
if test "x$drm_cv_atomic_primitives" = "xnone"; then
AC_CHECK_FUNC([atomic_cas_uint], drm_cv_atomic_primitives="Solaris")
fi
])
if test "x$drm_cv_atomic_primitives" = xIntel; then
AC_DEFINE(HAVE_LIBDRM_ATOMIC_PRIMITIVES, 1,
[Enable if your compiler supports the Intel __sync_* atomic primitives])
fi
if test "x$drm_cv_atomic_primitives" = "xlibatomic-ops"; then
AC_DEFINE(HAVE_LIB_ATOMIC_OPS, 1, [Enable if you have libatomic-ops-dev installed])
fi
dnl Print out the approapriate message considering the value set be the
dnl respective in $1.
dnl $1 - value to be evaluated. Eg. $INTEL, $NOUVEAU, ...
dnl $2 - libdrm shortname. Eg. intel, freedreno, ...
dnl $3 - GPU name/brand. Eg. Intel, NVIDIA Tegra, ...
dnl $4 - Configure switch. Eg. intel, omap-experimental-api, ...
AC_DEFUN([LIBDRM_ATOMICS_NOT_FOUND_MSG], [
case "x$1" in
xyes) AC_MSG_ERROR([libdrm_$2 depends upon atomic operations, which were not found for your compiler/cpu. Try compiling with -march=native, or install the libatomics-op-dev package, or, failing both of those, disable support for $3 GPUs by passing --disable-$4 to ./configure]) ;;
xauto) AC_MSG_WARN([Disabling $2. It depends on atomic operations, which were not found for your compiler/cpu. Try compiling with -march=native, or install the libatomics-op-dev package.]) ;;
*) ;;
esac
])
if test "x$drm_cv_atomic_primitives" = "xnone"; then
LIBDRM_ATOMICS_NOT_FOUND_MSG($INTEL, intel, Intel, intel)
INTEL=no
LIBDRM_ATOMICS_NOT_FOUND_MSG($RADEON, radeon, Radeon, radeon)
RADEON=no
LIBDRM_ATOMICS_NOT_FOUND_MSG($NOUVEAU, nouveau, NVIDIA, nouveau)
NOUVEAU=no
LIBDRM_ATOMICS_NOT_FOUND_MSG($OMAP, omap, OMAP, omap-experimental-api)
OMAP=no
LIBDRM_ATOMICS_NOT_FOUND_MSG($FREEDRENO, freedreno, Qualcomm Adreno, freedreno)
FREEDRENO=no
LIBDRM_ATOMICS_NOT_FOUND_MSG($TEGRA, tegra, NVIDIA Tegra, tegra-experimental-api)
TEGRA=no
else
if test "x$INTEL" = xauto; then
case $host_cpu in
i?86|x86_64) INTEL=yes ;;
*) INTEL=no ;;
esac
fi
if test "x$RADEON" = xauto; then
RADEON=yes
fi
if test "x$NOUVEAU" = xauto; then
NOUVEAU=yes
fi
if test "x$FREEDRENO" = xauto; then
case $host_cpu in
arm*|aarch64) FREEDRENO=yes ;;
*) FREEDRENO=no ;;
esac
fi
fi
if test "x$INTEL" != "xno"; then
PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10])
fi
AC_SUBST(PCIACCESS_CFLAGS)
AC_SUBST(PCIACCESS_LIBS)
if test "x$UDEV" = xyes; then
AC_DEFINE(UDEV, 1, [Have UDEV support])
fi
AC_CANONICAL_HOST
if test "x$LIBKMS" = xauto ; then
case $host_os in
linux*) LIBKMS="yes" ;;
freebsd* | kfreebsd*-gnu)
LIBKMS="yes" ;;
dragonfly*) LIBKMS="yes" ;;
*) LIBKMS="no" ;;
esac
fi
AM_CONDITIONAL(HAVE_LIBKMS, [test "x$LIBKMS" = xyes])
AM_CONDITIONAL(HAVE_INTEL, [test "x$INTEL" = xyes])
if test "x$INTEL" = xyes; then
AC_DEFINE(HAVE_INTEL, 1, [Have intel support])
fi
AM_CONDITIONAL(HAVE_VMWGFX, [test "x$VMWGFX" = xyes])
if test "x$VMWGFX" = xyes; then
AC_DEFINE(HAVE_VMWGFX, 1, [Have vmwgfx kernel headers])
fi
AM_CONDITIONAL(HAVE_NOUVEAU, [test "x$NOUVEAU" = xyes])
if test "x$NOUVEAU" = xyes; then
AC_DEFINE(HAVE_NOUVEAU, 1, [Have nouveau (nvidia) support])
fi
AM_CONDITIONAL(HAVE_OMAP, [test "x$OMAP" = xyes])
if test "x$OMAP" = xyes; then
AC_DEFINE(HAVE_OMAP, 1, [Have OMAP support])
fi
AM_CONDITIONAL(HAVE_EXYNOS, [test "x$EXYNOS" = xyes])
if test "x$EXYNOS" = xyes; then
AC_DEFINE(HAVE_EXYNOS, 1, [Have EXYNOS support])
fi
AM_CONDITIONAL(HAVE_FREEDRENO, [test "x$FREEDRENO" = xyes])
if test "x$FREEDRENO" = xyes; then
AC_DEFINE(HAVE_FREEDRENO, 1, [Have freedreno support])
fi
if test "x$FREEDRENO_KGSL" = xyes; then
if test "x$FREEDRENO" != xyes; then
AC_MSG_ERROR([Cannot enable freedreno KGSL interface if freedreno is disabled])
fi
fi
AM_CONDITIONAL(HAVE_FREEDRENO_KGSL, [test "x$FREEDRENO_KGSL" = xyes])
if test "x$FREEDRENO_KGSL" = xyes; then
AC_DEFINE(HAVE_FREEDRENO_KGSL, 1, [Have freedreno support for KGSL kernel interface])
fi
AM_CONDITIONAL(HAVE_RADEON, [test "x$RADEON" = xyes])
if test "x$RADEON" = xyes; then
AC_DEFINE(HAVE_RADEON, 1, [Have radeon support])
fi
AM_CONDITIONAL(HAVE_TEGRA, [test "x$TEGRA" = xyes])
if test "x$TEGRA" = xyes; then
AC_DEFINE(HAVE_TEGRA, 1, [Have Tegra support])
fi
AM_CONDITIONAL(HAVE_INSTALL_TESTS, [test "x$INSTALL_TESTS" = xyes])
if test "x$INSTALL_TESTS" = xyes; then
AC_DEFINE(HAVE_INSTALL_TESTS, 1, [Install test programs])
fi
AC_ARG_ENABLE([cairo-tests],
[AS_HELP_STRING([--enable-cairo-tests],
[Enable support for Cairo rendering in tests (default: auto)])],
[CAIRO=$enableval], [CAIRO=auto])
PKG_CHECK_MODULES(CAIRO, cairo, [HAVE_CAIRO=yes], [HAVE_CAIRO=no])
AC_MSG_CHECKING([whether to enable Cairo tests])
if test "x$CAIRO" = xauto; then
CAIRO="$HAVE_CAIRO"
fi
if test "x$CAIRO" = xyes; then
if ! test "x$HAVE_CAIRO" = xyes; then
AC_MSG_ERROR([Cairo support required but not present])
fi
AC_DEFINE(HAVE_CAIRO, 1, [Have Cairo support])
fi
AC_MSG_RESULT([$CAIRO])
AM_CONDITIONAL(HAVE_CAIRO, [test "x$CAIRO" = xyes])
# For enumerating devices in test case
PKG_CHECK_MODULES(LIBUDEV, libudev, [HAVE_LIBUDEV=yes], [HAVE_LIBUDEV=no])
if test "x$HAVE_LIBUDEV" = xyes; then
AC_DEFINE(HAVE_LIBUDEV, 1, [Have libudev support])
fi
AM_CONDITIONAL(HAVE_LIBUDEV, [test "x$HAVE_LIBUDEV" = xyes])
# xsltproc for docbook manpages
AC_ARG_ENABLE([manpages],
AS_HELP_STRING([--enable-manpages], [enable manpages @<:@default=auto@:>@]),
[MANS=$enableval], [MANS=auto])
AM_CONDITIONAL([BUILD_MANPAGES], [test "x$XSLTPROC" != "x" -a "x$MANS" != "xno"])
# check for offline man-pages stylesheet
AC_MSG_CHECKING([for docbook manpages stylesheet])
MANPAGES_STYLESHEET="http://docbook.sourceforge.net/release/xsl/current/manpages/docbook.xsl"
AC_PATH_PROGS_FEATURE_CHECK([XSLTPROC_TMP], [xsltproc],
AS_IF([`"$ac_path_XSLTPROC_TMP" --nonet "$MANPAGES_STYLESHEET" > /dev/null 2>&1`],
[HAVE_MANPAGES_STYLESHEET=yes]))
if test "x$HAVE_MANPAGES_STYLESHEET" = "xyes"; then
AC_SUBST(MANPAGES_STYLESHEET)
AC_MSG_RESULT([yes])
else
AC_MSG_RESULT([no])
fi
AM_CONDITIONAL([HAVE_MANPAGES_STYLESHEET], [test "x$HAVE_MANPAGES_STYLESHEET" = "xyes"])
AC_ARG_ENABLE(valgrind,
[AS_HELP_STRING([--enable-valgrind],
[Build libdrm with valgrind support (default: auto)])],
[VALGRIND=$enableval], [VALGRIND=yes])
PKG_CHECK_MODULES(VALGRIND, [valgrind], [have_valgrind=yes], [have_valgrind=no])
AC_MSG_CHECKING([whether to enable Valgrind support])
if test "x$VALGRIND" = xauto; then
VALGRIND="$have_valgrind"
fi
if test "x$VALGRIND" = "xyes"; then
if ! test "x$have_valgrind" = xyes; then
AC_MSG_ERROR([Valgrind support required but not present])
fi
AC_DEFINE([HAVE_VALGRIND], 1, [Use valgrind intrinsics to suppress false warnings])
fi
AC_MSG_RESULT([$VALGRIND])
AC_ARG_WITH([kernel-source],
[AS_HELP_STRING([--with-kernel-source],
[specify path to linux kernel source])],
[kernel_source="$with_kernel_source"])
AC_SUBST(kernel_source)
AC_MSG_CHECKING([whether $CC supports __attribute__(("hidden"))])
AC_LINK_IFELSE([AC_LANG_PROGRAM([
int foo_hidden( void ) __attribute__((visibility("hidden")));
])], HAVE_ATTRIBUTE_VISIBILITY="yes"; AC_MSG_RESULT([yes]), AC_MSG_RESULT([no]));
if test "x$HAVE_ATTRIBUTE_VISIBILITY" = xyes; then
AC_DEFINE(HAVE_VISIBILITY, 1, [Compiler supports __attribute__(("hidden"))])
fi
AC_SUBST(WARN_CFLAGS)
AC_CONFIG_FILES([
Makefile
libkms/Makefile
libkms/libkms.pc
intel/Makefile
intel/libdrm_intel.pc
radeon/Makefile
radeon/libdrm_radeon.pc
nouveau/Makefile
nouveau/libdrm_nouveau.pc
omap/Makefile
omap/libdrm_omap.pc
exynos/Makefile
exynos/libdrm_exynos.pc
freedreno/Makefile
freedreno/libdrm_freedreno.pc
tegra/Makefile
tegra/libdrm_tegra.pc
tests/Makefile
tests/modeprint/Makefile
tests/modetest/Makefile
tests/kmstest/Makefile
tests/proptest/Makefile
tests/radeon/Makefile
tests/vbltest/Makefile
tests/exynos/Makefile
tests/tegra/Makefile
tests/nouveau/Makefile
man/Makefile
libdrm.pc])
AC_OUTPUT
echo ""
echo "$PACKAGE_STRING will be compiled with:"
echo ""
echo " libkms $LIBKMS"
echo " Intel API $INTEL"
echo " vmwgfx API $VMWGFX"
echo " Radeon API $RADEON"
echo " Nouveau API $NOUVEAU"
echo " OMAP API $OMAP"
echo " EXYNOS API $EXYNOS"
echo " Freedreno API $FREEDRENO (kgsl: $FREEDRENO_KGSL)"
echo " Tegra API $TEGRA"
echo ""

212
core-symbols.txt Normal file
View file

@ -0,0 +1,212 @@
drmAddBufs
drmAddContextPrivateMapping
drmAddContextTag
drmAddMap
drmAgpAcquire
drmAgpAlloc
drmAgpBase
drmAgpBind
drmAgpDeviceId
drmAgpEnable
drmAgpFree
drmAgpGetMode
drmAgpMemoryAvail
drmAgpMemoryUsed
drmAgpRelease
drmAgpSize
drmAgpUnbind
drmAgpVendorId
drmAgpVersionMajor
drmAgpVersionMinor
drmAuthMagic
drmAvailable
drmCheckModesettingSupported
drmClose
drmCloseBufferHandle
drmCloseOnce
drmCommandNone
drmCommandRead
drmCommandWrite
drmCommandWriteRead
drmCreateContext
drmCreateDrawable
drmCrtcGetSequence
drmCrtcQueueSequence
drmCtlInstHandler
drmCtlUninstHandler
drmDelContextTag
drmDestroyContext
drmDestroyDrawable
drmDevicesEqual
drmDMA
drmDropMaster
drmError
drmFinish
drmFree
drmFreeBufs
drmFreeBusid
drmFreeDevice
drmFreeDevices
drmFreeReservedContextList
drmFreeVersion
drmGetBufInfo
drmGetBusid
drmGetCap
drmGetClient
drmGetContextFlags
drmGetContextPrivateMapping
drmGetContextTag
drmGetDevice
drmGetDevice2
drmGetDeviceFromDevId
drmGetDeviceNameFromFd
drmGetDeviceNameFromFd2
drmGetDevices
drmGetDevices2
drmGetEntry
drmGetHashTable
drmGetInterruptFromBusID
drmGetLibVersion
drmGetLock
drmGetMagic
drmGetMap
drmGetNodeTypeFromDevId
drmGetNodeTypeFromFd
drmGetPrimaryDeviceNameFromFd
drmGetRenderDeviceNameFromFd
drmGetReservedContextList
drmGetStats
drmGetVersion
drmHandleEvent
drmHashCreate
drmHashDelete
drmHashDestroy
drmHashFirst
drmHashInsert
drmHashLookup
drmHashNext
drmIoctl
drmIsKMS
drmIsMaster
drmMalloc
drmMap
drmMapBufs
drmMarkBufs
drmModeAddFB
drmModeAddFB2
drmModeAddFB2WithModifiers
drmModeAtomicAddProperty
drmModeAtomicAlloc
drmModeAtomicCommit
drmModeAtomicDuplicate
drmModeAtomicFree
drmModeAtomicGetCursor
drmModeAtomicMerge
drmModeAtomicSetCursor
drmModeAttachMode
drmModeCloseFB
drmModeConnectorGetPossibleCrtcs
drmModeConnectorSetProperty
drmModeCreateDumbBuffer
drmModeCreateLease
drmModeCreatePropertyBlob
drmModeCrtcGetGamma
drmModeCrtcSetGamma
drmModeDestroyDumbBuffer
drmModeDestroyPropertyBlob
drmModeDetachMode
drmModeDirtyFB
drmModeFormatModifierBlobIterNext
drmModeFreeConnector
drmModeFreeCrtc
drmModeFreeEncoder
drmModeFreeFB
drmModeFreeFB2
drmModeFreeModeInfo
drmModeFreeObjectProperties
drmModeFreePlane
drmModeFreePlaneResources
drmModeFreeProperty
drmModeFreePropertyBlob
drmModeFreeResources
drmModeGetConnector
drmModeGetConnectorCurrent
drmModeGetConnectorTypeName
drmModeGetCrtc
drmModeGetEncoder
drmModeGetFB
drmModeGetFB2
drmModeGetLease
drmModeGetPlane
drmModeGetPlaneResources
drmModeGetProperty
drmModeGetPropertyBlob
drmModeGetResources
drmModeListLessees
drmModeMapDumbBuffer
drmModeMoveCursor
drmModeObjectGetProperties
drmModeObjectSetProperty
drmModePageFlip
drmModePageFlipTarget
drmModeRevokeLease
drmModeRmFB
drmModeSetCrtc
drmModeSetCursor
drmModeSetCursor2
drmModeSetPlane
drmMsg
drmOpen
drmOpenControl
drmOpenOnce
drmOpenOnceWithType
drmOpenRender
drmOpenWithType
drmPrimeFDToHandle
drmPrimeHandleToFD
drmRandom
drmRandomCreate
drmRandomDestroy
drmRandomDouble
drmRmMap
drmScatterGatherAlloc
drmScatterGatherFree
drmSetBusid
drmSetClientCap
drmSetContextFlags
drmSetInterfaceVersion
drmSetMaster
drmSetServerInfo
drmSLCreate
drmSLDelete
drmSLDestroy
drmSLDump
drmSLFirst
drmSLInsert
drmSLLookup
drmSLLookupNeighbors
drmSLNext
drmSwitchToContext
drmSyncobjCreate
drmSyncobjDestroy
drmSyncobjEventfd
drmSyncobjExportSyncFile
drmSyncobjFDToHandle
drmSyncobjHandleToFD
drmSyncobjImportSyncFile
drmSyncobjQuery
drmSyncobjQuery2
drmSyncobjReset
drmSyncobjSignal
drmSyncobjTimelineSignal
drmSyncobjTimelineWait
drmSyncobjTransfer
drmSyncobjWait
drmUnlock
drmUnmap
drmUnmapBufs
drmUpdateDrawableInfo
drmWaitVBlank
drmGetFormatModifierName
drmGetFormatModifierVendor
drmGetFormatName

6
data/Android.bp Normal file
View file

@ -0,0 +1,6 @@
prebuilt_etc {
name: "amdgpu.ids",
proprietary: true,
sub_dir: "hwdata",
src: "amdgpu.ids",
}

749
data/amdgpu.ids Normal file
View file

@ -0,0 +1,749 @@
# List of AMDGPU IDs
#
# Syntax:
# device_id, revision_id, product_name <-- single tab after comma
1.0.0
1114, C2, AMD Radeon 860M Graphics
1114, C3, AMD Radeon 840M Graphics
1114, D2, AMD Radeon 860M Graphics
1114, D3, AMD Radeon 840M Graphics
1114, E2, AMD Radeon 860M Graphics
1114, E4, AMD Radeon 860M Graphics
1114, E5, AMD Radeon 840M Graphics
1114, E9, AMD Radeon 860M Graphics
1114, EA, AMD Radeon 840M Graphics
1114, ED, AMD Radeon 860M Graphics
1114, EE, AMD Radeon 840M Graphics
1114, F2, AMD Radeon 860M Graphics
1114, F3, AMD Radeon 840M Graphics
1114, F9, AMD Radeon 860M Graphics
1114, FA, AMD Radeon 840M Graphics
1114, FC, AMD Radeon 860M Graphics
1114, FD, AMD Radeon 840M Graphics
1309, 00, AMD Radeon R7 Graphics
130A, 00, AMD Radeon R6 Graphics
130B, 00, AMD Radeon R4 Graphics
130C, 00, AMD Radeon R7 Graphics
130D, 00, AMD Radeon R6 Graphics
130E, 00, AMD Radeon R5 Graphics
130F, 00, AMD Radeon R7 Graphics
130F, D4, AMD Radeon R7 Graphics
130F, D5, AMD Radeon R7 Graphics
130F, D6, AMD Radeon R7 Graphics
130F, D7, AMD Radeon R7 Graphics
1313, 00, AMD Radeon R7 Graphics
1313, D4, AMD Radeon R7 Graphics
1313, D5, AMD Radeon R7 Graphics
1313, D6, AMD Radeon R7 Graphics
1315, 00, AMD Radeon R5 Graphics
1315, D4, AMD Radeon R5 Graphics
1315, D5, AMD Radeon R5 Graphics
1315, D6, AMD Radeon R5 Graphics
1315, D7, AMD Radeon R5 Graphics
1316, 00, AMD Radeon R5 Graphics
1318, 00, AMD Radeon R5 Graphics
131B, 00, AMD Radeon R4 Graphics
131C, 00, AMD Radeon R7 Graphics
131D, 00, AMD Radeon R6 Graphics
1435, AE, AMD Custom GPU 0932
1506, C1, AMD Radeon 610M
1506, C2, AMD Radeon 610M
1506, C3, AMD Radeon 610M
1506, C4, AMD Radeon 610M
150E, C1, AMD Radeon 890M Graphics
150E, C4, AMD Radeon 880M Graphics
150E, C5, AMD Radeon 890M Graphics
150E, C6, AMD Radeon 890M Graphics
150E, C7, AMD Radeon 890M Graphics
150E, D1, AMD Radeon 890M Graphics
150E, D2, AMD Radeon 880M Graphics
150E, D3, AMD Radeon 890M Graphics
150E, E1, AMD Radeon 890M Graphics
150E, E3, AMD Radeon 890M Graphics
150E, E4, AMD Radeon 890M Graphics
150E, F1, AMD Radeon 890M Graphics
150E, F3, AMD Radeon 890M Graphics
1586, C1, AMD Radeon 8060S Graphics
1586, C2, AMD Radeon 8050S Graphics
1586, C3, AMD Radeon 8060S Graphics
1586, C4, AMD Radeon 8050S Graphics
1586, C6, AMD Radeon 8060S Graphics
1586, D1, AMD Radeon 8060S Graphics
1586, D2, AMD Radeon 8050S Graphics
1586, D4, AMD Radeon 8050S Graphics
1586, D5, AMD Radeon 8040S Graphics
15BF, 00, AMD Radeon 780M Graphics
15BF, 01, AMD Radeon 760M Graphics
15BF, 02, AMD Radeon 780M Graphics
15BF, 03, AMD Radeon 760M Graphics
15BF, 05, AMD Radeon 760M Graphics
15BF, 06, AMD Radeon 780M Graphics
15BF, 07, AMD Radeon 740M Graphics
15BF, 08, AMD Radeon 740M Graphics
15BF, C1, AMD Radeon 780M Graphics
15BF, C2, AMD Radeon 780M Graphics
15BF, C3, AMD Radeon 760M Graphics
15BF, C4, AMD Radeon 780M Graphics
15BF, C5, AMD Radeon 740M Graphics
15BF, C6, AMD Radeon 780M Graphics
15BF, C7, AMD Radeon 780M Graphics
15BF, C8, AMD Radeon 760M Graphics
15BF, C9, AMD Radeon 780M Graphics
15BF, CA, AMD Radeon 740M Graphics
15BF, CB, AMD Radeon 760M Graphics
15BF, CC, AMD Radeon 740M Graphics
15BF, CD, AMD Radeon 760M Graphics
15BF, CE, AMD Radeon 740M Graphics
15BF, CF, AMD Radeon 780M Graphics
15BF, D0, AMD Radeon 780M Graphics
15BF, D1, AMD Radeon 780M Graphics
15BF, D2, AMD Radeon 780M Graphics
15BF, D3, AMD Radeon 780M Graphics
15BF, D4, AMD Radeon 780M Graphics
15BF, D5, AMD Radeon 760M Graphics
15BF, D6, AMD Radeon 760M Graphics
15BF, D7, AMD Radeon 780M Graphics
15BF, D8, AMD Radeon 740M Graphics
15BF, D9, AMD Radeon 780M Graphics
15BF, DA, AMD Radeon 780M Graphics
15BF, DB, AMD Radeon 760M Graphics
15BF, DC, AMD Radeon 760M Graphics
15BF, DD, AMD Radeon 780M Graphics
15BF, DE, AMD Radeon 740M Graphics
15BF, DF, AMD Radeon 760M Graphics
15BF, F0, AMD Radeon 760M Graphics
15C8, C1, AMD Radeon 740M Graphics
15C8, C2, AMD Radeon 740M Graphics
15C8, C3, AMD Radeon 740M Graphics
15C8, C4, AMD Radeon 740M Graphics
15C8, C5, AMD Radeon 740M Graphics
15C8, C6, AMD Radeon 740M Graphics
15C8, C7, AMD Radeon 740M Graphics
15C8, C8, AMD Radeon 740M Graphics
15C8, D1, AMD Radeon 740M Graphics
15C8, D2, AMD Radeon 740M Graphics
15C8, D3, AMD Radeon 740M Graphics
15C8, D4, AMD Radeon 740M Graphics
15C8, D5, AMD Radeon 740M Graphics
15C8, D6, AMD Radeon 740M Graphics
15C8, D7, AMD Radeon 740M Graphics
15C8, D8, AMD Radeon 740M Graphics
15D8, 00, AMD Radeon RX Vega 8 Graphics WS
15D8, 91, AMD Radeon Vega 3 Graphics
15D8, 91, AMD Ryzen Embedded R1606G with Radeon Vega Gfx
15D8, 92, AMD Radeon Vega 3 Graphics
15D8, 92, AMD Ryzen Embedded R1505G with Radeon Vega Gfx
15D8, 93, AMD Radeon Vega 1 Graphics
15D8, A1, AMD Radeon Vega 10 Graphics
15D8, A2, AMD Radeon Vega 8 Graphics
15D8, A3, AMD Radeon Vega 6 Graphics
15D8, A4, AMD Radeon Vega 3 Graphics
15D8, B1, AMD Radeon Vega 10 Graphics
15D8, B2, AMD Radeon Vega 8 Graphics
15D8, B3, AMD Radeon Vega 6 Graphics
15D8, B4, AMD Radeon Vega 3 Graphics
15D8, C1, AMD Radeon Vega 10 Graphics
15D8, C2, AMD Radeon Vega 8 Graphics
15D8, C3, AMD Radeon Vega 6 Graphics
15D8, C4, AMD Radeon Vega 3 Graphics
15D8, C5, AMD Radeon Vega 3 Graphics
15D8, C8, AMD Radeon Vega 11 Graphics
15D8, C9, AMD Radeon Vega 8 Graphics
15D8, CA, AMD Radeon Vega 11 Graphics
15D8, CB, AMD Radeon Vega 8 Graphics
15D8, CC, AMD Radeon Vega 3 Graphics
15D8, CE, AMD Radeon Vega 3 Graphics
15D8, CF, AMD Ryzen Embedded R1305G with Radeon Vega Gfx
15D8, D1, AMD Radeon Vega 10 Graphics
15D8, D2, AMD Radeon Vega 8 Graphics
15D8, D3, AMD Radeon Vega 6 Graphics
15D8, D4, AMD Radeon Vega 3 Graphics
15D8, D8, AMD Radeon Vega 11 Graphics
15D8, D9, AMD Radeon Vega 8 Graphics
15D8, DA, AMD Radeon Vega 11 Graphics
15D8, DB, AMD Radeon Vega 3 Graphics
15D8, DB, AMD Radeon Vega 8 Graphics
15D8, DC, AMD Radeon Vega 3 Graphics
15D8, DD, AMD Radeon Vega 3 Graphics
15D8, DE, AMD Radeon Vega 3 Graphics
15D8, DF, AMD Radeon Vega 3 Graphics
15D8, E3, AMD Radeon Vega 3 Graphics
15D8, E4, AMD Ryzen Embedded R1102G with Radeon Vega Gfx
15DD, 81, AMD Ryzen Embedded V1807B with Radeon Vega Gfx
15DD, 82, AMD Ryzen Embedded V1756B with Radeon Vega Gfx
15DD, 83, AMD Ryzen Embedded V1605B with Radeon Vega Gfx
15DD, 84, AMD Radeon Vega 6 Graphics
15DD, 85, AMD Ryzen Embedded V1202B with Radeon Vega Gfx
15DD, 86, AMD Radeon Vega 11 Graphics
15DD, 88, AMD Radeon Vega 8 Graphics
15DD, C1, AMD Radeon Vega 11 Graphics
15DD, C2, AMD Radeon Vega 8 Graphics
15DD, C3, AMD Radeon Vega 3 / 10 Graphics
15DD, C4, AMD Radeon Vega 8 Graphics
15DD, C5, AMD Radeon Vega 3 Graphics
15DD, C6, AMD Radeon Vega 11 Graphics
15DD, C8, AMD Radeon Vega 8 Graphics
15DD, C9, AMD Radeon Vega 11 Graphics
15DD, CA, AMD Radeon Vega 8 Graphics
15DD, CB, AMD Radeon Vega 3 Graphics
15DD, CC, AMD Radeon Vega 6 Graphics
15DD, CE, AMD Radeon Vega 3 Graphics
15DD, CF, AMD Radeon Vega 3 Graphics
15DD, D0, AMD Radeon Vega 10 Graphics
15DD, D1, AMD Radeon Vega 8 Graphics
15DD, D3, AMD Radeon Vega 11 Graphics
15DD, D5, AMD Radeon Vega 8 Graphics
15DD, D6, AMD Radeon Vega 11 Graphics
15DD, D7, AMD Radeon Vega 8 Graphics
15DD, D8, AMD Radeon Vega 3 Graphics
15DD, D9, AMD Radeon Vega 6 Graphics
15DD, E1, AMD Radeon Vega 3 Graphics
15DD, E2, AMD Radeon Vega 3 Graphics
163F, AE, AMD Custom GPU 0405
163F, E1, AMD Custom GPU 0405
164E, D8, AMD Radeon 610M
164E, D9, AMD Radeon 610M
164E, DA, AMD Radeon 610M
164E, DB, AMD Radeon 610M
164E, DC, AMD Radeon 610M
1681, 06, AMD Radeon 680M
1681, 07, AMD Radeon 660M
1681, 0A, AMD Radeon 680M
1681, 0B, AMD Radeon 660M
1681, C7, AMD Radeon 680M
1681, C8, AMD Radeon 680M
1681, C9, AMD Radeon 660M
1900, 01, AMD Radeon 780M Graphics
1900, 02, AMD Radeon 760M Graphics
1900, 03, AMD Radeon 780M Graphics
1900, 04, AMD Radeon 760M Graphics
1900, 05, AMD Radeon 780M Graphics
1900, 06, AMD Radeon 780M Graphics
1900, 07, AMD Radeon 760M Graphics
1900, B0, AMD Radeon 780M Graphics
1900, B1, AMD Radeon 780M Graphics
1900, B2, AMD Radeon 780M Graphics
1900, B3, AMD Radeon 780M Graphics
1900, B4, AMD Radeon 780M Graphics
1900, B5, AMD Radeon 780M Graphics
1900, B6, AMD Radeon 780M Graphics
1900, B7, AMD Radeon 760M Graphics
1900, B8, AMD Radeon 760M Graphics
1900, B9, AMD Radeon 780M Graphics
1900, BA, AMD Radeon 780M Graphics
1900, BB, AMD Radeon 780M Graphics
1900, C0, AMD Radeon 780M Graphics
1900, C1, AMD Radeon 760M Graphics
1900, C2, AMD Radeon 780M Graphics
1900, C3, AMD Radeon 760M Graphics
1900, C4, AMD Radeon 780M Graphics
1900, C5, AMD Radeon 780M Graphics
1900, C6, AMD Radeon 760M Graphics
1900, C7, AMD Radeon 780M Graphics
1900, C8, AMD Radeon 760M Graphics
1900, C9, AMD Radeon 780M Graphics
1900, CA, AMD Radeon 760M Graphics
1900, CB, AMD Radeon 780M Graphics
1900, CC, AMD Radeon 780M Graphics
1900, CD, AMD Radeon 760M Graphics
1900, CE, AMD Radeon 780M Graphics
1900, CF, AMD Radeon 760M Graphics
1900, D0, AMD Radeon 780M Graphics
1900, D1, AMD Radeon 760M Graphics
1900, D2, AMD Radeon 780M Graphics
1900, D3, AMD Radeon 760M Graphics
1900, D4, AMD Radeon 780M Graphics
1900, D5, AMD Radeon 780M Graphics
1900, D6, AMD Radeon 760M Graphics
1900, D7, AMD Radeon 780M Graphics
1900, D8, AMD Radeon 760M Graphics
1900, D9, AMD Radeon 780M Graphics
1900, DA, AMD Radeon 760M Graphics
1900, DB, AMD Radeon 780M Graphics
1900, DC, AMD Radeon 780M Graphics
1900, DD, AMD Radeon 760M Graphics
1900, DE, AMD Radeon 780M Graphics
1900, DF, AMD Radeon 760M Graphics
1900, F0, AMD Radeon 780M Graphics
1900, F1, AMD Radeon 780M Graphics
1900, F2, AMD Radeon 780M Graphics
1901, C1, AMD Radeon 740M Graphics
1901, C2, AMD Radeon 740M Graphics
1901, C3, AMD Radeon 740M Graphics
1901, C6, AMD Radeon 740M Graphics
1901, C7, AMD Radeon 740M Graphics
1901, C8, AMD Radeon 740M Graphics
1901, C9, AMD Radeon 740M Graphics
1901, CA, AMD Radeon 740M Graphics
1901, D1, AMD Radeon 740M Graphics
1901, D2, AMD Radeon 740M Graphics
1901, D3, AMD Radeon 740M Graphics
1901, D4, AMD Radeon 740M Graphics
1901, D5, AMD Radeon 740M Graphics
1901, D6, AMD Radeon 740M Graphics
1901, D7, AMD Radeon 740M Graphics
1901, D8, AMD Radeon 740M Graphics
1902, C0, AMD Radeon 840M Graphics
1902, C1, AMD Radeon 840M Graphics
1902, C2, AMD Radeon 820M Graphics
1902, C3, AMD Radeon 840M Graphics
1902, C6, AMD Radeon 820M Graphics
1902, C7, AMD Radeon 840M Graphics
1902, C8, AMD Radeon 840M Graphics
1902, C9, AMD Radeon 820M Graphics
1902, CA, AMD Radeon 840M Graphics
1902, D1, AMD Radeon 840M Graphics
1902, D3, AMD Radeon 840M Graphics
1902, D7, AMD Radeon 840M Graphics
1902, D8, AMD Radeon 840M Graphics
6600, 00, AMD Radeon HD 8600 / 8700M
6600, 81, AMD Radeon R7 M370
6601, 00, AMD Radeon HD 8500M / 8700M
6604, 00, AMD Radeon R7 M265 Series
6604, 81, AMD Radeon R7 M350
6605, 00, AMD Radeon R7 M260 Series
6605, 81, AMD Radeon R7 M340
6606, 00, AMD Radeon HD 8790M
6607, 00, AMD Radeon R5 M240
6608, 00, AMD FirePro W2100
6610, 00, AMD Radeon R7 200 Series
6610, 81, AMD Radeon R7 350
6610, 83, AMD Radeon R5 340
6610, 87, AMD Radeon R7 200 Series
6611, 00, AMD Radeon R7 200 Series
6611, 87, AMD Radeon R7 200 Series
6613, 00, AMD Radeon R7 200 Series
6617, 00, AMD Radeon R7 240 Series
6617, 87, AMD Radeon R7 200 Series
6617, C7, AMD Radeon R7 240 Series
6640, 00, AMD Radeon HD 8950
6640, 80, AMD Radeon R9 M380
6646, 00, AMD Radeon R9 M280X
6646, 80, AMD Radeon R9 M385
6646, 80, AMD Radeon R9 M470X
6647, 00, AMD Radeon R9 M200X Series
6647, 80, AMD Radeon R9 M380
6649, 00, AMD FirePro W5100
6658, 00, AMD Radeon R7 200 Series
665C, 00, AMD Radeon HD 7700 Series
665D, 00, AMD Radeon R7 200 Series
665F, 81, AMD Radeon R7 360 Series
6660, 00, AMD Radeon HD 8600M Series
6660, 81, AMD Radeon R5 M335
6660, 83, AMD Radeon R5 M330
6663, 00, AMD Radeon HD 8500M Series
6663, 83, AMD Radeon R5 M320
6664, 00, AMD Radeon R5 M200 Series
6665, 00, AMD Radeon R5 M230 Series
6665, 83, AMD Radeon R5 M320
6665, C3, AMD Radeon R5 M435
6666, 00, AMD Radeon R5 M200 Series
6667, 00, AMD Radeon R5 M200 Series
666F, 00, AMD Radeon HD 8500M
66A1, 02, AMD Instinct MI60 / MI50
66A1, 06, AMD Radeon Pro VII
66AF, C1, AMD Radeon VII
6780, 00, AMD FirePro W9000
6784, 00, ATI FirePro V (FireGL V) Graphics Adapter
6788, 00, ATI FirePro V (FireGL V) Graphics Adapter
678A, 00, AMD FirePro W8000
6798, 00, AMD Radeon R9 200 / HD 7900 Series
6799, 00, AMD Radeon HD 7900 Series
679A, 00, AMD Radeon HD 7900 Series
679B, 00, AMD Radeon HD 7900 Series
679E, 00, AMD Radeon HD 7800 Series
67A0, 00, AMD Radeon FirePro W9100
67A1, 00, AMD Radeon FirePro W8100
67B0, 00, AMD Radeon R9 200 Series
67B0, 80, AMD Radeon R9 390 Series
67B1, 00, AMD Radeon R9 200 Series
67B1, 80, AMD Radeon R9 390 Series
67B9, 00, AMD Radeon R9 200 Series
67C0, 00, AMD Radeon Pro WX 7100 Graphics
67C0, 80, AMD Radeon E9550
67C2, 01, AMD Radeon Pro V7350x2
67C2, 02, AMD Radeon Pro V7300X
67C4, 00, AMD Radeon Pro WX 7100 Graphics
67C4, 80, AMD Radeon E9560 / E9565 Graphics
67C7, 00, AMD Radeon Pro WX 5100 Graphics
67C7, 80, AMD Radeon E9390 Graphics
67D0, 01, AMD Radeon Pro V7350x2
67D0, 02, AMD Radeon Pro V7300X
67DF, C0, AMD Radeon Pro 580X
67DF, C1, AMD Radeon RX 580 Series
67DF, C2, AMD Radeon RX 570 Series
67DF, C3, AMD Radeon RX 580 Series
67DF, C4, AMD Radeon RX 480 Graphics
67DF, C5, AMD Radeon RX 470 Graphics
67DF, C6, AMD Radeon RX 570 Series
67DF, C7, AMD Radeon RX 480 Graphics
67DF, CF, AMD Radeon RX 470 Graphics
67DF, D7, AMD Radeon RX 470 Graphics
67DF, E0, AMD Radeon RX 470 Series
67DF, E1, AMD Radeon RX 590 Series
67DF, E3, AMD Radeon RX Series
67DF, E7, AMD Radeon RX 580 Series
67DF, EB, AMD Radeon Pro 580X
67DF, EF, AMD Radeon RX 570 Series
67DF, F7, AMD Radeon RX P30PH
67DF, FF, AMD Radeon RX 470 Series
67E0, 00, AMD Radeon Pro WX Series
67E3, 00, AMD Radeon Pro WX 4100
67E8, 00, AMD Radeon Pro WX Series
67E8, 01, AMD Radeon Pro WX Series
67E8, 80, AMD Radeon E9260 Graphics
67EB, 00, AMD Radeon Pro V5300X
67EF, C0, AMD Radeon RX Graphics
67EF, C1, AMD Radeon RX 460 Graphics
67EF, C2, AMD Radeon Pro Series
67EF, C3, AMD Radeon RX Series
67EF, C5, AMD Radeon RX 460 Graphics
67EF, C7, AMD Radeon RX Graphics
67EF, CF, AMD Radeon RX 460 Graphics
67EF, E0, AMD Radeon RX 560 Series
67EF, E1, AMD Radeon RX Series
67EF, E2, AMD Radeon RX 560X
67EF, E3, AMD Radeon RX Series
67EF, E5, AMD Radeon RX 560 Series
67EF, E7, AMD Radeon RX 560 Series
67EF, EF, AMD Radeon 550 Series
67EF, FF, AMD Radeon RX 460 Graphics
67FF, C0, AMD Radeon Pro 465
67FF, C1, AMD Radeon RX 560 Series
67FF, CF, AMD Radeon RX 560 Series
67FF, EF, AMD Radeon RX 560 Series
67FF, FF, AMD Radeon RX 550 Series
6800, 00, AMD Radeon HD 7970M
6801, 00, AMD Radeon HD 8970M
6806, 00, AMD Radeon R9 M290X
6808, 00, AMD FirePro W7000
6808, 00, ATI FirePro V (FireGL V) Graphics Adapter
6809, 00, ATI FirePro W5000
6810, 00, AMD Radeon R9 200 Series
6810, 81, AMD Radeon R9 370 Series
6811, 00, AMD Radeon R9 200 Series
6811, 81, AMD Radeon R7 370 Series
6818, 00, AMD Radeon HD 7800 Series
6819, 00, AMD Radeon HD 7800 Series
6820, 00, AMD Radeon R9 M275X
6820, 81, AMD Radeon R9 M375
6820, 83, AMD Radeon R9 M375X
6821, 00, AMD Radeon R9 M200X Series
6821, 83, AMD Radeon R9 M370X
6821, 87, AMD Radeon R7 M380
6822, 00, AMD Radeon E8860
6823, 00, AMD Radeon R9 M200X Series
6825, 00, AMD Radeon HD 7800M Series
6826, 00, AMD Radeon HD 7700M Series
6827, 00, AMD Radeon HD 7800M Series
6828, 00, AMD FirePro W600
682B, 00, AMD Radeon HD 8800M Series
682B, 87, AMD Radeon R9 M360
682C, 00, AMD FirePro W4100
682D, 00, AMD Radeon HD 7700M Series
682F, 00, AMD Radeon HD 7700M Series
6830, 00, AMD Radeon 7800M Series
6831, 00, AMD Radeon 7700M Series
6835, 00, AMD Radeon R7 Series / HD 9000 Series
6837, 00, AMD Radeon HD 7700 Series
683D, 00, AMD Radeon HD 7700 Series
683F, 00, AMD Radeon HD 7700 Series
684C, 00, ATI FirePro V (FireGL V) Graphics Adapter
6860, 00, AMD Radeon Instinct MI25
6860, 01, AMD Radeon Instinct MI25
6860, 02, AMD Radeon Instinct MI25
6860, 03, AMD Radeon Pro V340
6860, 04, AMD Radeon Instinct MI25x2
6860, 07, AMD Radeon Pro V320
6861, 00, AMD Radeon Pro WX 9100
6862, 00, AMD Radeon Pro SSG
6863, 00, AMD Radeon Vega Frontier Edition
6864, 03, AMD Radeon Pro V340
6864, 04, AMD Radeon Instinct MI25x2
6864, 05, AMD Radeon Pro V340
6868, 00, AMD Radeon Pro WX 8200
686C, 00, AMD Radeon Instinct MI25 MxGPU
686C, 01, AMD Radeon Instinct MI25 MxGPU
686C, 02, AMD Radeon Instinct MI25 MxGPU
686C, 03, AMD Radeon Pro V340 MxGPU
686C, 04, AMD Radeon Instinct MI25x2 MxGPU
686C, 05, AMD Radeon Pro V340L MxGPU
686C, 06, AMD Radeon Instinct MI25 MxGPU
687F, 01, AMD Radeon RX Vega
687F, C0, AMD Radeon RX Vega
687F, C1, AMD Radeon RX Vega
687F, C3, AMD Radeon RX Vega
687F, C7, AMD Radeon RX Vega
6900, 00, AMD Radeon R7 M260
6900, 81, AMD Radeon R7 M360
6900, 83, AMD Radeon R7 M340
6900, C1, AMD Radeon R5 M465 Series
6900, C3, AMD Radeon R5 M445 Series
6900, D1, AMD Radeon 530 Series
6900, D3, AMD Radeon 530 Series
6901, 00, AMD Radeon R5 M255
6902, 00, AMD Radeon Series
6907, 00, AMD Radeon R5 M255
6907, 87, AMD Radeon R5 M315
6920, 00, AMD Radeon R9 M395X
6920, 01, AMD Radeon R9 M390X
6921, 00, AMD Radeon R9 M390X
6929, 00, AMD FirePro S7150
6929, 01, AMD FirePro S7100X
692B, 00, AMD FirePro W7100
6938, 00, AMD Radeon R9 200 Series
6938, F0, AMD Radeon R9 200 Series
6938, F1, AMD Radeon R9 380 Series
6939, 00, AMD Radeon R9 200 Series
6939, F0, AMD Radeon R9 200 Series
6939, F1, AMD Radeon R9 380 Series
694C, C0, AMD Radeon RX Vega M GH Graphics
694E, C0, AMD Radeon RX Vega M GL Graphics
6980, 00, AMD Radeon Pro WX 3100
6981, 00, AMD Radeon Pro WX 3200 Series
6981, 01, AMD Radeon Pro WX 3200 Series
6981, 10, AMD Radeon Pro WX 3200 Series
6985, 00, AMD Radeon Pro WX 3100
6986, 00, AMD Radeon Pro WX 2100
6987, 80, AMD Embedded Radeon E9171
6987, C0, AMD Radeon 550X Series
6987, C1, AMD Radeon RX 640
6987, C3, AMD Radeon 540X Series
6987, C7, AMD Radeon 540
6995, 00, AMD Radeon Pro WX 2100
6997, 00, AMD Radeon Pro WX 2100
699F, 81, AMD Embedded Radeon E9170 Series
699F, C0, AMD Radeon 500 Series
699F, C1, AMD Radeon 540 Series
699F, C3, AMD Radeon 500 Series
699F, C7, AMD Radeon RX 550 / 550 Series
699F, C9, AMD Radeon 540
6FDF, E7, AMD Radeon RX 590 GME
6FDF, EF, AMD Radeon RX 580 2048SP
7300, C1, AMD FirePro S9300 x2
7300, C8, AMD Radeon R9 Fury Series
7300, C9, AMD Radeon Pro Duo
7300, CA, AMD Radeon R9 Fury Series
7300, CB, AMD Radeon R9 Fury Series
7312, 00, AMD Radeon Pro W5700
731E, C6, AMD Radeon RX 5700XTB
731E, C7, AMD Radeon RX 5700B
731F, C0, AMD Radeon RX 5700 XT 50th Anniversary
731F, C1, AMD Radeon RX 5700 XT
731F, C2, AMD Radeon RX 5600M
731F, C3, AMD Radeon RX 5700M
731F, C4, AMD Radeon RX 5700
731F, C5, AMD Radeon RX 5700 XT
731F, CA, AMD Radeon RX 5600 XT
731F, CB, AMD Radeon RX 5600 OEM
7340, C1, AMD Radeon RX 5500M
7340, C3, AMD Radeon RX 5300M
7340, C5, AMD Radeon RX 5500 XT
7340, C7, AMD Radeon RX 5500
7340, C9, AMD Radeon RX 5500XTB
7340, CF, AMD Radeon RX 5300
7341, 00, AMD Radeon Pro W5500
7347, 00, AMD Radeon Pro W5500M
7360, 41, AMD Radeon Pro 5600M
7360, C3, AMD Radeon Pro V520
7362, C1, AMD Radeon Pro V540
7362, C3, AMD Radeon Pro V520
738C, 01, AMD Instinct MI100
73A1, 00, AMD Radeon Pro V620
73A3, 00, AMD Radeon Pro W6800
73A5, C0, AMD Radeon RX 6950 XT
73AE, 00, AMD Radeon Pro V620 MxGPU
73AF, C0, AMD Radeon RX 6900 XT
73BF, C0, AMD Radeon RX 6900 XT
73BF, C1, AMD Radeon RX 6800 XT
73BF, C3, AMD Radeon RX 6800
73DF, C0, AMD Radeon RX 6750 XT
73DF, C1, AMD Radeon RX 6700 XT
73DF, C2, AMD Radeon RX 6800M
73DF, C3, AMD Radeon RX 6800M
73DF, C5, AMD Radeon RX 6700 XT
73DF, CF, AMD Radeon RX 6700M
73DF, D5, AMD Radeon RX 6750 GRE 12GB
73DF, D7, AMD TDC-235
73DF, DF, AMD Radeon RX 6700
73DF, E5, AMD Radeon RX 6750 GRE 12GB
73DF, FF, AMD Radeon RX 6700
73E0, 00, AMD Radeon RX 6600M
73E1, 00, AMD Radeon Pro W6600M
73E3, 00, AMD Radeon Pro W6600
73EF, C0, AMD Radeon RX 6800S
73EF, C1, AMD Radeon RX 6650 XT
73EF, C2, AMD Radeon RX 6700S
73EF, C3, AMD Radeon RX 6650M
73EF, C4, AMD Radeon RX 6650M XT
73FF, C1, AMD Radeon RX 6600 XT
73FF, C3, AMD Radeon RX 6600M
73FF, C7, AMD Radeon RX 6600
73FF, CB, AMD Radeon RX 6600S
73FF, CF, AMD Radeon RX 6600 LE
73FF, DF, AMD Radeon RX 6750 GRE 10GB
7408, 00, AMD Instinct MI250X
740C, 01, AMD Instinct MI250X / MI250
740F, 02, AMD Instinct MI210
7421, 00, AMD Radeon Pro W6500M
7422, 00, AMD Radeon Pro W6400
7423, 00, AMD Radeon Pro W6300M
7423, 01, AMD Radeon Pro W6300
7424, 00, AMD Radeon RX 6300
743F, C1, AMD Radeon RX 6500 XT
743F, C3, AMD Radeon RX 6500
743F, C3, AMD Radeon RX 6500M
743F, C7, AMD Radeon RX 6400
743F, C8, AMD Radeon RX 6500M
743F, CC, AMD Radeon 6550S
743F, CE, AMD Radeon RX 6450M
743F, CF, AMD Radeon RX 6300M
743F, D3, AMD Radeon RX 6550M
743F, D7, AMD Radeon RX 6400
7448, 00, AMD Radeon Pro W7900
7449, 00, AMD Radeon Pro W7800 48GB
744A, 00, AMD Radeon Pro W7900 Dual Slot
744B, 00, AMD Radeon Pro W7900D
744C, C8, AMD Radeon RX 7900 XTX
744C, CC, AMD Radeon RX 7900 XT
744C, CE, AMD Radeon RX 7900 GRE
744C, CF, AMD Radeon RX 7900M
745E, CC, AMD Radeon Pro W7800
7460, 00, AMD Radeon Pro V710
7461, 00, AMD Radeon Pro V710 MxGPU
7470, 00, AMD Radeon Pro W7700
747E, C8, AMD Radeon RX 7800 XT
747E, D8, AMD Radeon RX 7800M
747E, DB, AMD Radeon RX 7700
747E, FF, AMD Radeon RX 7700 XT
7480, 00, AMD Radeon Pro W7600
7480, C0, AMD Radeon RX 7600 XT
7480, C1, AMD Radeon RX 7700S
7480, C2, AMD Radeon RX 7650 GRE
7480, C3, AMD Radeon RX 7600S
7480, C7, AMD Radeon RX 7600M XT
7480, CF, AMD Radeon RX 7600
7481, C7, AMD Steam Machine
7483, CF, AMD Radeon RX 7600M
7489, 00, AMD Radeon Pro W7500
7499, 00, AMD Radeon Pro W7400
7499, C0, AMD Radeon RX 7400
7499, C1, AMD Radeon RX 7300
74A0, 00, AMD Instinct MI300A
74A1, 00, AMD Instinct MI300X
74A2, 00, AMD Instinct MI308X
74A5, 00, AMD Instinct MI325X
74A8, 00, AMD Instinct MI308X HF
74A9, 00, AMD Instinct MI300X HF
74B5, 00, AMD Instinct MI300X VF
74B6, 00, AMD Instinct MI308X
74BD, 00, AMD Instinct MI300X HF
7550, C0, AMD Radeon RX 9070 XT
7550, C2, AMD Radeon RX 9070 GRE
7550, C3, AMD Radeon RX 9070
7551, C0, AMD Radeon AI PRO R9700
7551, C8, AMD Radeon AI PRO R9600D
7590, C0, AMD Radeon RX 9060 XT
7590, C1, AMD Radeon RX 9060 XT LP
7590, C7, AMD Radeon RX 9060
75A0, 00, AMD Instinct MI350X
75A3, 00, AMD Instinct MI355X
75B0, 00, AMD Instinct MI350X VF
75B3, 00, AMD Instinct MI355X VF
9830, 00, AMD Radeon HD 8400 / R3 Series
9831, 00, AMD Radeon HD 8400E
9832, 00, AMD Radeon HD 8330
9833, 00, AMD Radeon HD 8330E
9834, 00, AMD Radeon HD 8210
9835, 00, AMD Radeon HD 8210E
9836, 00, AMD Radeon HD 8200 / R3 Series
9837, 00, AMD Radeon HD 8280E
9838, 00, AMD Radeon HD 8200 / R3 series
9839, 00, AMD Radeon HD 8180
983D, 00, AMD Radeon HD 8250
9850, 00, AMD Radeon R3 Graphics
9850, 03, AMD Radeon R3 Graphics
9850, 40, AMD Radeon R2 Graphics
9850, 45, AMD Radeon R3 Graphics
9851, 00, AMD Radeon R4 Graphics
9851, 01, AMD Radeon R5E Graphics
9851, 05, AMD Radeon R5 Graphics
9851, 06, AMD Radeon R5E Graphics
9851, 40, AMD Radeon R4 Graphics
9851, 45, AMD Radeon R5 Graphics
9852, 00, AMD Radeon R2 Graphics
9852, 40, AMD Radeon E1 Graphics
9853, 00, AMD Radeon R2 Graphics
9853, 01, AMD Radeon R4E Graphics
9853, 03, AMD Radeon R2 Graphics
9853, 05, AMD Radeon R1E Graphics
9853, 06, AMD Radeon R1E Graphics
9853, 07, AMD Radeon R1E Graphics
9853, 08, AMD Radeon R1E Graphics
9853, 40, AMD Radeon R2 Graphics
9854, 00, AMD Radeon R3 Graphics
9854, 01, AMD Radeon R3E Graphics
9854, 02, AMD Radeon R3 Graphics
9854, 05, AMD Radeon R2 Graphics
9854, 06, AMD Radeon R4 Graphics
9854, 07, AMD Radeon R3 Graphics
9855, 02, AMD Radeon R6 Graphics
9855, 05, AMD Radeon R4 Graphics
9856, 00, AMD Radeon R2 Graphics
9856, 01, AMD Radeon R2E Graphics
9856, 02, AMD Radeon R2 Graphics
9856, 05, AMD Radeon R1E Graphics
9856, 06, AMD Radeon R2 Graphics
9856, 07, AMD Radeon R1E Graphics
9856, 08, AMD Radeon R1E Graphics
9856, 13, AMD Radeon R1E Graphics
9874, 81, AMD Radeon R6 Graphics
9874, 84, AMD Radeon R7 Graphics
9874, 85, AMD Radeon R6 Graphics
9874, 87, AMD Radeon R5 Graphics
9874, 88, AMD Radeon R7E Graphics
9874, 89, AMD Radeon R6E Graphics
9874, C4, AMD Radeon R7 Graphics
9874, C5, AMD Radeon R6 Graphics
9874, C6, AMD Radeon R6 Graphics
9874, C7, AMD Radeon R5 Graphics
9874, C8, AMD Radeon R7 Graphics
9874, C9, AMD Radeon R7 Graphics
9874, CA, AMD Radeon R5 Graphics
9874, CB, AMD Radeon R5 Graphics
9874, CC, AMD Radeon R7 Graphics
9874, CD, AMD Radeon R7 Graphics
9874, CE, AMD Radeon R5 Graphics
9874, E1, AMD Radeon R7 Graphics
9874, E2, AMD Radeon R7 Graphics
9874, E3, AMD Radeon R7 Graphics
9874, E4, AMD Radeon R7 Graphics
9874, E5, AMD Radeon R5 Graphics
9874, E6, AMD Radeon R5 Graphics
98E4, 80, AMD Radeon R5E Graphics
98E4, 81, AMD Radeon R4E Graphics
98E4, 83, AMD Radeon R2E Graphics
98E4, 84, AMD Radeon R2E Graphics
98E4, 86, AMD Radeon R1E Graphics
98E4, C0, AMD Radeon R4 Graphics
98E4, C1, AMD Radeon R5 Graphics
98E4, C2, AMD Radeon R4 Graphics
98E4, C4, AMD Radeon R5 Graphics
98E4, C6, AMD Radeon R5 Graphics
98E4, C8, AMD Radeon R4 Graphics
98E4, C9, AMD Radeon R4 Graphics
98E4, CA, AMD Radeon R5 Graphics
98E4, D0, AMD Radeon R2 Graphics
98E4, D1, AMD Radeon R2 Graphics
98E4, D2, AMD Radeon R2 Graphics
98E4, D4, AMD Radeon R2 Graphics
98E4, D9, AMD Radeon R5 Graphics
98E4, DA, AMD Radeon R5 Graphics
98E4, DB, AMD Radeon R3 Graphics
98E4, E1, AMD Radeon R3 Graphics
98E4, E2, AMD Radeon R3 Graphics
98E4, E9, AMD Radeon R4 Graphics
98E4, EA, AMD Radeon R4 Graphics
98E4, EB, AMD Radeon R3 Graphics
98E4, EB, AMD Radeon R4 Graphics

27
data/meson.build Normal file
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# Copyright © 2017-2018 Intel Corporation
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
if with_amdgpu
install_data(
'amdgpu.ids',
install_mode : 'rw-r--r--',
install_dir : datadir_amdgpu,
)
endif

11
etnaviv/Android.bp Normal file
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@ -0,0 +1,11 @@
build = ["Android.sources.bp"]
cc_library_shared {
name: "libdrm_etnaviv",
defaults: [
"libdrm_defaults",
"libdrm_etnaviv_sources",
],
vendor: true,
shared_libs: ["libdrm"],
}

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@ -0,0 +1,13 @@
// Autogenerated with Android.sources.bp.mk
cc_defaults {
name: "libdrm_etnaviv_sources",
srcs: [
"etnaviv_device.c",
"etnaviv_gpu.c",
"etnaviv_bo.c",
"etnaviv_bo_cache.c",
"etnaviv_pipe.c",
"etnaviv_cmd_stream.c",
],
}

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@ -0,0 +1,36 @@
etna_device_new
etna_device_new_dup
etna_device_ref
etna_device_del
etna_device_fd
etna_gpu_new
etna_gpu_del
etna_gpu_get_param
etna_pipe_new
etna_pipe_del
etna_pipe_wait
etna_pipe_wait_ns
etna_bo_new
etna_bo_from_name
etna_bo_from_dmabuf
etna_bo_ref
etna_bo_del
etna_bo_get_name
etna_bo_handle
etna_bo_dmabuf
etna_bo_size
etna_bo_map
etna_bo_cpu_prep
etna_bo_cpu_fini
etna_cmd_stream_new
etna_cmd_stream_del
etna_cmd_stream_timestamp
etna_cmd_stream_flush
etna_cmd_stream_flush2
etna_cmd_stream_finish
etna_cmd_stream_perf
etna_cmd_stream_reloc
etna_perfmon_create
etna_perfmon_del
etna_perfmon_get_dom_by_name
etna_perfmon_get_sig_by_name

340
etnaviv/etnaviv_bo.c Normal file
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/*
* Copyright (C) 2014 Etnaviv Project
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Christian Gmeiner <christian.gmeiner@gmail.com>
*/
#include "etnaviv_priv.h"
#include "etnaviv_drmif.h"
drm_private pthread_mutex_t table_lock = PTHREAD_MUTEX_INITIALIZER;
drm_private void bo_del(struct etna_bo *bo);
/* set buffer name, and add to table, call w/ table_lock held: */
static void set_name(struct etna_bo *bo, uint32_t name)
{
bo->name = name;
/* add ourself into the name table: */
drmHashInsert(bo->dev->name_table, name, bo);
}
/* Called under table_lock */
drm_private void bo_del(struct etna_bo *bo)
{
if (bo->map)
drm_munmap(bo->map, bo->size);
if (bo->name)
drmHashDelete(bo->dev->name_table, bo->name);
if (bo->handle) {
drmHashDelete(bo->dev->handle_table, bo->handle);
drmCloseBufferHandle(bo->dev->fd, bo->handle);
}
free(bo);
}
/* lookup a buffer from it's handle, call w/ table_lock held: */
static struct etna_bo *lookup_bo(void *tbl, uint32_t handle)
{
struct etna_bo *bo = NULL;
if (!drmHashLookup(tbl, handle, (void **)&bo)) {
/* found, incr refcnt and return: */
bo = etna_bo_ref(bo);
/* don't break the bucket if this bo was found in one */
list_delinit(&bo->list);
}
return bo;
}
/* allocate a new buffer object, call w/ table_lock held */
static struct etna_bo *bo_from_handle(struct etna_device *dev,
uint32_t size, uint32_t handle, uint32_t flags)
{
struct etna_bo *bo = calloc(sizeof(*bo), 1);
if (!bo) {
drmCloseBufferHandle(dev->fd, handle);
return NULL;
}
bo->dev = etna_device_ref(dev);
bo->size = size;
bo->handle = handle;
bo->flags = flags;
atomic_set(&bo->refcnt, 1);
list_inithead(&bo->list);
/* add ourselves to the handle table: */
drmHashInsert(dev->handle_table, handle, bo);
return bo;
}
/* allocate a new (un-tiled) buffer object */
drm_public struct etna_bo *etna_bo_new(struct etna_device *dev, uint32_t size,
uint32_t flags)
{
struct etna_bo *bo;
int ret;
struct drm_etnaviv_gem_new req = {
.flags = flags,
};
bo = etna_bo_cache_alloc(&dev->bo_cache, &size, flags);
if (bo)
return bo;
req.size = size;
ret = drmCommandWriteRead(dev->fd, DRM_ETNAVIV_GEM_NEW,
&req, sizeof(req));
if (ret)
return NULL;
pthread_mutex_lock(&table_lock);
bo = bo_from_handle(dev, size, req.handle, flags);
bo->reuse = 1;
pthread_mutex_unlock(&table_lock);
return bo;
}
drm_public struct etna_bo *etna_bo_ref(struct etna_bo *bo)
{
atomic_inc(&bo->refcnt);
return bo;
}
/* get buffer info */
static int get_buffer_info(struct etna_bo *bo)
{
int ret;
struct drm_etnaviv_gem_info req = {
.handle = bo->handle,
};
ret = drmCommandWriteRead(bo->dev->fd, DRM_ETNAVIV_GEM_INFO,
&req, sizeof(req));
if (ret) {
return ret;
}
/* really all we need for now is mmap offset */
bo->offset = req.offset;
return 0;
}
/* import a buffer object from DRI2 name */
drm_public struct etna_bo *etna_bo_from_name(struct etna_device *dev,
uint32_t name)
{
struct etna_bo *bo;
struct drm_gem_open req = {
.name = name,
};
pthread_mutex_lock(&table_lock);
/* check name table first, to see if bo is already open: */
bo = lookup_bo(dev->name_table, name);
if (bo)
goto out_unlock;
if (drmIoctl(dev->fd, DRM_IOCTL_GEM_OPEN, &req)) {
ERROR_MSG("gem-open failed: %s", strerror(errno));
goto out_unlock;
}
bo = lookup_bo(dev->handle_table, req.handle);
if (bo)
goto out_unlock;
bo = bo_from_handle(dev, req.size, req.handle, 0);
if (bo)
set_name(bo, name);
out_unlock:
pthread_mutex_unlock(&table_lock);
return bo;
}
/* import a buffer from dmabuf fd, does not take ownership of the
* fd so caller should close() the fd when it is otherwise done
* with it (even if it is still using the 'struct etna_bo *')
*/
drm_public struct etna_bo *etna_bo_from_dmabuf(struct etna_device *dev, int fd)
{
struct etna_bo *bo;
int ret, size;
uint32_t handle;
/* take the lock before calling drmPrimeFDToHandle to avoid
* racing against etna_bo_del, which might invalidate the
* returned handle.
*/
pthread_mutex_lock(&table_lock);
ret = drmPrimeFDToHandle(dev->fd, fd, &handle);
if (ret) {
pthread_mutex_unlock(&table_lock);
return NULL;
}
bo = lookup_bo(dev->handle_table, handle);
if (bo)
goto out_unlock;
/* lseek() to get bo size */
size = lseek(fd, 0, SEEK_END);
lseek(fd, 0, SEEK_CUR);
bo = bo_from_handle(dev, size, handle, 0);
out_unlock:
pthread_mutex_unlock(&table_lock);
return bo;
}
/* destroy a buffer object */
drm_public void etna_bo_del(struct etna_bo *bo)
{
struct etna_device *dev = bo->dev;
if (!bo)
return;
if (!atomic_dec_and_test(&bo->refcnt))
return;
pthread_mutex_lock(&table_lock);
if (bo->reuse && (etna_bo_cache_free(&dev->bo_cache, bo) == 0))
goto out;
bo_del(bo);
etna_device_del_locked(dev);
out:
pthread_mutex_unlock(&table_lock);
}
/* get the global flink/DRI2 buffer name */
drm_public int etna_bo_get_name(struct etna_bo *bo, uint32_t *name)
{
if (!bo->name) {
struct drm_gem_flink req = {
.handle = bo->handle,
};
int ret;
ret = drmIoctl(bo->dev->fd, DRM_IOCTL_GEM_FLINK, &req);
if (ret) {
return ret;
}
pthread_mutex_lock(&table_lock);
set_name(bo, req.name);
pthread_mutex_unlock(&table_lock);
bo->reuse = 0;
}
*name = bo->name;
return 0;
}
drm_public uint32_t etna_bo_handle(struct etna_bo *bo)
{
return bo->handle;
}
/* caller owns the dmabuf fd that is returned and is responsible
* to close() it when done
*/
drm_public int etna_bo_dmabuf(struct etna_bo *bo)
{
int ret, prime_fd;
ret = drmPrimeHandleToFD(bo->dev->fd, bo->handle, DRM_CLOEXEC,
&prime_fd);
if (ret) {
ERROR_MSG("failed to get dmabuf fd: %d", ret);
return ret;
}
bo->reuse = 0;
return prime_fd;
}
drm_public uint32_t etna_bo_size(struct etna_bo *bo)
{
return bo->size;
}
drm_public void *etna_bo_map(struct etna_bo *bo)
{
if (!bo->map) {
if (!bo->offset) {
get_buffer_info(bo);
}
bo->map = drm_mmap(0, bo->size, PROT_READ | PROT_WRITE,
MAP_SHARED, bo->dev->fd, bo->offset);
if (bo->map == MAP_FAILED) {
ERROR_MSG("mmap failed: %s", strerror(errno));
bo->map = NULL;
}
}
return bo->map;
}
drm_public int etna_bo_cpu_prep(struct etna_bo *bo, uint32_t op)
{
struct drm_etnaviv_gem_cpu_prep req = {
.handle = bo->handle,
.op = op,
};
get_abs_timeout(&req.timeout, 5000000000);
return drmCommandWrite(bo->dev->fd, DRM_ETNAVIV_GEM_CPU_PREP,
&req, sizeof(req));
}
drm_public void etna_bo_cpu_fini(struct etna_bo *bo)
{
struct drm_etnaviv_gem_cpu_fini req = {
.handle = bo->handle,
};
drmCommandWrite(bo->dev->fd, DRM_ETNAVIV_GEM_CPU_FINI,
&req, sizeof(req));
}

204
etnaviv/etnaviv_bo_cache.c Normal file
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@ -0,0 +1,204 @@
/*
* Copyright (C) 2016 Etnaviv Project
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Christian Gmeiner <christian.gmeiner@gmail.com>
*/
#include "etnaviv_priv.h"
#include "etnaviv_drmif.h"
drm_private void bo_del(struct etna_bo *bo);
drm_private extern pthread_mutex_t table_lock;
static void add_bucket(struct etna_bo_cache *cache, int size)
{
unsigned i = cache->num_buckets;
assert(i < ARRAY_SIZE(cache->cache_bucket));
list_inithead(&cache->cache_bucket[i].list);
cache->cache_bucket[i].size = size;
cache->num_buckets++;
}
drm_private void etna_bo_cache_init(struct etna_bo_cache *cache)
{
unsigned long size, cache_max_size = 64 * 1024 * 1024;
/* OK, so power of two buckets was too wasteful of memory.
* Give 3 other sizes between each power of two, to hopefully
* cover things accurately enough. (The alternative is
* probably to just go for exact matching of sizes, and assume
* that for things like composited window resize the tiled
* width/height alignment and rounding of sizes to pages will
* get us useful cache hit rates anyway)
*/
add_bucket(cache, 4096);
add_bucket(cache, 4096 * 2);
add_bucket(cache, 4096 * 3);
/* Initialize the linked lists for BO reuse cache. */
for (size = 4 * 4096; size <= cache_max_size; size *= 2) {
add_bucket(cache, size);
add_bucket(cache, size + size * 1 / 4);
add_bucket(cache, size + size * 2 / 4);
add_bucket(cache, size + size * 3 / 4);
}
}
/* Frees older cached buffers. Called under table_lock */
drm_private void etna_bo_cache_cleanup(struct etna_bo_cache *cache, time_t time)
{
unsigned i;
if (cache->time == time)
return;
for (i = 0; i < cache->num_buckets; i++) {
struct etna_bo_bucket *bucket = &cache->cache_bucket[i];
struct etna_bo *bo;
while (!LIST_IS_EMPTY(&bucket->list)) {
bo = LIST_ENTRY(struct etna_bo, bucket->list.next, list);
/* keep things in cache for at least 1 second: */
if (time && ((time - bo->free_time) <= 1))
break;
list_del(&bo->list);
bo_del(bo);
}
}
cache->time = time;
}
static struct etna_bo_bucket *get_bucket(struct etna_bo_cache *cache, uint32_t size)
{
unsigned i;
/* hmm, this is what intel does, but I suppose we could calculate our
* way to the correct bucket size rather than looping..
*/
for (i = 0; i < cache->num_buckets; i++) {
struct etna_bo_bucket *bucket = &cache->cache_bucket[i];
if (bucket->size >= size) {
return bucket;
}
}
return NULL;
}
static int is_idle(struct etna_bo *bo)
{
return etna_bo_cpu_prep(bo,
DRM_ETNA_PREP_READ |
DRM_ETNA_PREP_WRITE |
DRM_ETNA_PREP_NOSYNC) == 0;
}
static struct etna_bo *find_in_bucket(struct etna_bo_bucket *bucket, uint32_t flags)
{
struct etna_bo *bo = NULL, *tmp;
pthread_mutex_lock(&table_lock);
if (LIST_IS_EMPTY(&bucket->list))
goto out_unlock;
LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &bucket->list, list) {
/* skip BOs with different flags */
if (bo->flags != flags)
continue;
/* check if the first BO with matching flags is idle */
if (is_idle(bo)) {
list_delinit(&bo->list);
goto out_unlock;
}
/* If the oldest BO is still busy, don't try younger ones */
break;
}
/* There was no matching buffer found */
bo = NULL;
out_unlock:
pthread_mutex_unlock(&table_lock);
return bo;
}
/* allocate a new (un-tiled) buffer object
*
* NOTE: size is potentially rounded up to bucket size
*/
drm_private struct etna_bo *etna_bo_cache_alloc(struct etna_bo_cache *cache, uint32_t *size,
uint32_t flags)
{
struct etna_bo *bo;
struct etna_bo_bucket *bucket;
*size = ALIGN(*size, 4096);
bucket = get_bucket(cache, *size);
/* see if we can be green and recycle: */
if (bucket) {
*size = bucket->size;
bo = find_in_bucket(bucket, flags);
if (bo) {
atomic_set(&bo->refcnt, 1);
etna_device_ref(bo->dev);
return bo;
}
}
return NULL;
}
drm_private int etna_bo_cache_free(struct etna_bo_cache *cache, struct etna_bo *bo)
{
struct etna_bo_bucket *bucket = get_bucket(cache, bo->size);
/* see if we can be green and recycle: */
if (bucket) {
struct timespec time;
clock_gettime(CLOCK_MONOTONIC, &time);
bo->free_time = time.tv_sec;
list_addtail(&bo->list, &bucket->list);
etna_bo_cache_cleanup(cache, time.tv_sec);
/* bo's in the bucket cache don't have a ref and
* don't hold a ref to the dev:
*/
etna_device_del_locked(bo->dev);
return 0;
}
return -1;
}

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/*
* Copyright (C) 2014-2015 Etnaviv Project
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Christian Gmeiner <christian.gmeiner@gmail.com>
*/
#include <assert.h>
#include "etnaviv_drmif.h"
#include "etnaviv_priv.h"
static pthread_mutex_t idx_lock = PTHREAD_MUTEX_INITIALIZER;
static void *grow(void *ptr, uint32_t nr, uint32_t *max, uint32_t sz)
{
if ((nr + 1) > *max) {
if ((*max * 2) < (nr + 1))
*max = nr + 5;
else
*max = *max * 2;
ptr = realloc(ptr, *max * sz);
}
return ptr;
}
#define APPEND(x, name) ({ \
(x)->name = grow((x)->name, (x)->nr_ ## name, &(x)->max_ ## name, sizeof((x)->name[0])); \
(x)->nr_ ## name ++; \
})
static inline struct etna_cmd_stream_priv *
etna_cmd_stream_priv(struct etna_cmd_stream *stream)
{
return (struct etna_cmd_stream_priv *)stream;
}
drm_public struct etna_cmd_stream *etna_cmd_stream_new(struct etna_pipe *pipe,
uint32_t size,
void (*reset_notify)(struct etna_cmd_stream *stream, void *priv),
void *priv)
{
struct etna_cmd_stream_priv *stream = NULL;
if (size == 0) {
ERROR_MSG("invalid size of 0");
goto fail;
}
stream = calloc(1, sizeof(*stream));
if (!stream) {
ERROR_MSG("allocation failed");
goto fail;
}
/* allocate even number of 32-bit words */
size = ALIGN(size, 2);
stream->base.buffer = malloc(size * sizeof(uint32_t));
if (!stream->base.buffer) {
ERROR_MSG("allocation failed");
goto fail;
}
stream->base.size = size;
stream->pipe = pipe;
stream->reset_notify = reset_notify;
stream->reset_notify_priv = priv;
return &stream->base;
fail:
if (stream)
etna_cmd_stream_del(&stream->base);
return NULL;
}
drm_public void etna_cmd_stream_del(struct etna_cmd_stream *stream)
{
struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream);
free(stream->buffer);
free(priv->submit.relocs);
free(priv->submit.pmrs);
free(priv);
}
static void reset_buffer(struct etna_cmd_stream *stream)
{
struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream);
stream->offset = 0;
priv->submit.nr_bos = 0;
priv->submit.nr_relocs = 0;
priv->submit.nr_pmrs = 0;
priv->nr_bos = 0;
if (priv->reset_notify)
priv->reset_notify(stream, priv->reset_notify_priv);
}
drm_public uint32_t etna_cmd_stream_timestamp(struct etna_cmd_stream *stream)
{
return etna_cmd_stream_priv(stream)->last_timestamp;
}
static uint32_t append_bo(struct etna_cmd_stream *stream, struct etna_bo *bo)
{
struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream);
uint32_t idx;
idx = APPEND(&priv->submit, bos);
idx = APPEND(priv, bos);
priv->submit.bos[idx].flags = 0;
priv->submit.bos[idx].handle = bo->handle;
priv->bos[idx] = etna_bo_ref(bo);
return idx;
}
/* add (if needed) bo, return idx: */
static uint32_t bo2idx(struct etna_cmd_stream *stream, struct etna_bo *bo,
uint32_t flags)
{
struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream);
uint32_t idx;
pthread_mutex_lock(&idx_lock);
if (bo->current_stream == stream) {
idx = bo->idx;
} else {
/* slow-path: */
for (idx = 0; idx < priv->nr_bos; idx++)
if (priv->bos[idx] == bo)
break;
if (idx == priv->nr_bos) {
/* not found */
idx = append_bo(stream, bo);
}
bo->current_stream = stream;
bo->idx = idx;
}
pthread_mutex_unlock(&idx_lock);
if (flags & ETNA_RELOC_READ)
priv->submit.bos[idx].flags |= ETNA_SUBMIT_BO_READ;
if (flags & ETNA_RELOC_WRITE)
priv->submit.bos[idx].flags |= ETNA_SUBMIT_BO_WRITE;
return idx;
}
static void flush(struct etna_cmd_stream *stream, int in_fence_fd,
int *out_fence_fd)
{
struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream);
int ret, id = priv->pipe->id;
struct etna_gpu *gpu = priv->pipe->gpu;
struct drm_etnaviv_gem_submit req = {
.pipe = gpu->core,
.exec_state = id,
.bos = VOID2U64(priv->submit.bos),
.nr_bos = priv->submit.nr_bos,
.relocs = VOID2U64(priv->submit.relocs),
.nr_relocs = priv->submit.nr_relocs,
.pmrs = VOID2U64(priv->submit.pmrs),
.nr_pmrs = priv->submit.nr_pmrs,
.stream = VOID2U64(stream->buffer),
.stream_size = stream->offset * 4, /* in bytes */
};
if (in_fence_fd != -1) {
req.flags |= ETNA_SUBMIT_FENCE_FD_IN | ETNA_SUBMIT_NO_IMPLICIT;
req.fence_fd = in_fence_fd;
}
if (out_fence_fd)
req.flags |= ETNA_SUBMIT_FENCE_FD_OUT;
ret = drmCommandWriteRead(gpu->dev->fd, DRM_ETNAVIV_GEM_SUBMIT,
&req, sizeof(req));
if (ret)
ERROR_MSG("submit failed: %d (%s)", ret, strerror(errno));
else
priv->last_timestamp = req.fence;
for (uint32_t i = 0; i < priv->nr_bos; i++) {
struct etna_bo *bo = priv->bos[i];
bo->current_stream = NULL;
etna_bo_del(bo);
}
if (out_fence_fd)
*out_fence_fd = req.fence_fd;
}
drm_public void etna_cmd_stream_flush(struct etna_cmd_stream *stream)
{
flush(stream, -1, NULL);
reset_buffer(stream);
}
drm_public void etna_cmd_stream_flush2(struct etna_cmd_stream *stream,
int in_fence_fd,
int *out_fence_fd)
{
flush(stream, in_fence_fd, out_fence_fd);
reset_buffer(stream);
}
drm_public void etna_cmd_stream_finish(struct etna_cmd_stream *stream)
{
struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream);
flush(stream, -1, NULL);
etna_pipe_wait(priv->pipe, priv->last_timestamp, 5000);
reset_buffer(stream);
}
drm_public void etna_cmd_stream_reloc(struct etna_cmd_stream *stream,
const struct etna_reloc *r)
{
struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream);
struct drm_etnaviv_gem_submit_reloc *reloc;
uint32_t idx = APPEND(&priv->submit, relocs);
uint32_t addr = 0;
reloc = &priv->submit.relocs[idx];
reloc->reloc_idx = bo2idx(stream, r->bo, r->flags);
reloc->reloc_offset = r->offset;
reloc->submit_offset = stream->offset * 4; /* in bytes */
reloc->flags = 0;
etna_cmd_stream_emit(stream, addr);
}
drm_public void etna_cmd_stream_perf(struct etna_cmd_stream *stream, const struct etna_perf *p)
{
struct etna_cmd_stream_priv *priv = etna_cmd_stream_priv(stream);
struct drm_etnaviv_gem_submit_pmr *pmr;
uint32_t idx = APPEND(&priv->submit, pmrs);
pmr = &priv->submit.pmrs[idx];
pmr->flags = p->flags;
pmr->sequence = p->sequence;
pmr->read_offset = p->offset;
pmr->read_idx = bo2idx(stream, p->bo, ETNA_SUBMIT_BO_READ | ETNA_SUBMIT_BO_WRITE);
pmr->domain = p->signal->domain->id;
pmr->signal = p->signal->signal;
}

114
etnaviv/etnaviv_device.c Normal file
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/*
* Copyright (C) 2014 Etnaviv Project
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Christian Gmeiner <christian.gmeiner@gmail.com>
*/
#include <stdlib.h>
#include <sys/types.h>
#include <errno.h>
#include <sys/mman.h>
#include <fcntl.h>
#include <unistd.h>
#include <pthread.h>
#include <xf86drm.h>
#include <xf86atomic.h>
#include "etnaviv_priv.h"
#include "etnaviv_drmif.h"
static pthread_mutex_t table_lock = PTHREAD_MUTEX_INITIALIZER;
drm_public struct etna_device *etna_device_new(int fd)
{
struct etna_device *dev = calloc(sizeof(*dev), 1);
if (!dev)
return NULL;
atomic_set(&dev->refcnt, 1);
dev->fd = fd;
dev->handle_table = drmHashCreate();
dev->name_table = drmHashCreate();
etna_bo_cache_init(&dev->bo_cache);
return dev;
}
/* like etna_device_new() but creates it's own private dup() of the fd
* which is close()d when the device is finalized. */
drm_public struct etna_device *etna_device_new_dup(int fd)
{
int dup_fd = dup(fd);
struct etna_device *dev = etna_device_new(dup_fd);
if (dev)
dev->closefd = 1;
else
close(dup_fd);
return dev;
}
drm_public struct etna_device *etna_device_ref(struct etna_device *dev)
{
atomic_inc(&dev->refcnt);
return dev;
}
static void etna_device_del_impl(struct etna_device *dev)
{
etna_bo_cache_cleanup(&dev->bo_cache, 0);
drmHashDestroy(dev->handle_table);
drmHashDestroy(dev->name_table);
if (dev->closefd)
close(dev->fd);
free(dev);
}
drm_private void etna_device_del_locked(struct etna_device *dev)
{
if (!atomic_dec_and_test(&dev->refcnt))
return;
etna_device_del_impl(dev);
}
drm_public void etna_device_del(struct etna_device *dev)
{
if (!atomic_dec_and_test(&dev->refcnt))
return;
pthread_mutex_lock(&table_lock);
etna_device_del_impl(dev);
pthread_mutex_unlock(&table_lock);
}
drm_public int etna_device_fd(struct etna_device *dev)
{
return dev->fd;
}

300
etnaviv/etnaviv_drm.h Normal file
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Copyright (C) 2015 Etnaviv Project
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef __ETNAVIV_DRM_H__
#define __ETNAVIV_DRM_H__
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
/* Please note that modifications to all structs defined here are
* subject to backwards-compatibility constraints:
* 1) Do not use pointers, use __u64 instead for 32 bit / 64 bit
* user/kernel compatibility
* 2) Keep fields aligned to their size
* 3) Because of how drm_ioctl() works, we can add new fields at
* the end of an ioctl if some care is taken: drm_ioctl() will
* zero out the new fields at the tail of the ioctl, so a zero
* value should have a backwards compatible meaning. And for
* output params, userspace won't see the newly added output
* fields.. so that has to be somehow ok.
*/
/* timeouts are specified in clock-monotonic absolute times (to simplify
* restarting interrupted ioctls). The following struct is logically the
* same as 'struct timespec' but 32/64b ABI safe.
*/
struct drm_etnaviv_timespec {
__s64 tv_sec; /* seconds */
__s64 tv_nsec; /* nanoseconds */
};
#define ETNAVIV_PARAM_GPU_MODEL 0x01
#define ETNAVIV_PARAM_GPU_REVISION 0x02
#define ETNAVIV_PARAM_GPU_FEATURES_0 0x03
#define ETNAVIV_PARAM_GPU_FEATURES_1 0x04
#define ETNAVIV_PARAM_GPU_FEATURES_2 0x05
#define ETNAVIV_PARAM_GPU_FEATURES_3 0x06
#define ETNAVIV_PARAM_GPU_FEATURES_4 0x07
#define ETNAVIV_PARAM_GPU_FEATURES_5 0x08
#define ETNAVIV_PARAM_GPU_FEATURES_6 0x09
#define ETNAVIV_PARAM_GPU_FEATURES_7 0x0a
#define ETNAVIV_PARAM_GPU_FEATURES_8 0x0b
#define ETNAVIV_PARAM_GPU_FEATURES_9 0x0c
#define ETNAVIV_PARAM_GPU_FEATURES_10 0x0d
#define ETNAVIV_PARAM_GPU_FEATURES_11 0x0e
#define ETNAVIV_PARAM_GPU_FEATURES_12 0x0f
#define ETNAVIV_PARAM_GPU_STREAM_COUNT 0x10
#define ETNAVIV_PARAM_GPU_REGISTER_MAX 0x11
#define ETNAVIV_PARAM_GPU_THREAD_COUNT 0x12
#define ETNAVIV_PARAM_GPU_VERTEX_CACHE_SIZE 0x13
#define ETNAVIV_PARAM_GPU_SHADER_CORE_COUNT 0x14
#define ETNAVIV_PARAM_GPU_PIXEL_PIPES 0x15
#define ETNAVIV_PARAM_GPU_VERTEX_OUTPUT_BUFFER_SIZE 0x16
#define ETNAVIV_PARAM_GPU_BUFFER_SIZE 0x17
#define ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT 0x18
#define ETNAVIV_PARAM_GPU_NUM_CONSTANTS 0x19
#define ETNAVIV_PARAM_GPU_NUM_VARYINGS 0x1a
#define ETNAVIV_PARAM_SOFTPIN_START_ADDR 0x1b
#define ETNAVIV_PARAM_GPU_PRODUCT_ID 0x1c
#define ETNAVIV_PARAM_GPU_CUSTOMER_ID 0x1d
#define ETNAVIV_PARAM_GPU_ECO_ID 0x1e
#define ETNA_MAX_PIPES 4
struct drm_etnaviv_param {
__u32 pipe; /* in */
__u32 param; /* in, ETNAVIV_PARAM_x */
__u64 value; /* out (get_param) or in (set_param) */
};
/*
* GEM buffers:
*/
#define ETNA_BO_CACHE_MASK 0x000f0000
/* cache modes */
#define ETNA_BO_CACHED 0x00010000
#define ETNA_BO_WC 0x00020000
#define ETNA_BO_UNCACHED 0x00040000
/* map flags */
#define ETNA_BO_FORCE_MMU 0x00100000
struct drm_etnaviv_gem_new {
__u64 size; /* in */
__u32 flags; /* in, mask of ETNA_BO_x */
__u32 handle; /* out */
};
struct drm_etnaviv_gem_info {
__u32 handle; /* in */
__u32 pad;
__u64 offset; /* out, offset to pass to mmap() */
};
#define ETNA_PREP_READ 0x01
#define ETNA_PREP_WRITE 0x02
#define ETNA_PREP_NOSYNC 0x04
struct drm_etnaviv_gem_cpu_prep {
__u32 handle; /* in */
__u32 op; /* in, mask of ETNA_PREP_x */
struct drm_etnaviv_timespec timeout; /* in */
};
struct drm_etnaviv_gem_cpu_fini {
__u32 handle; /* in */
__u32 flags; /* in, placeholder for now, no defined values */
};
/*
* Cmdstream Submission:
*/
/* The value written into the cmdstream is logically:
* relocbuf->gpuaddr + reloc_offset
*
* NOTE that reloc's must be sorted by order of increasing submit_offset,
* otherwise EINVAL.
*/
struct drm_etnaviv_gem_submit_reloc {
__u32 submit_offset; /* in, offset from submit_bo */
__u32 reloc_idx; /* in, index of reloc_bo buffer */
__u64 reloc_offset; /* in, offset from start of reloc_bo */
__u32 flags; /* in, placeholder for now, no defined values */
};
/* Each buffer referenced elsewhere in the cmdstream submit (ie. the
* cmdstream buffer(s) themselves or reloc entries) has one (and only
* one) entry in the submit->bos[] table.
*
* As a optimization, the current buffer (gpu virtual address) can be
* passed back through the 'presumed' field. If on a subsequent reloc,
* userspace passes back a 'presumed' address that is still valid,
* then patching the cmdstream for this entry is skipped. This can
* avoid kernel needing to map/access the cmdstream bo in the common
* case.
* If the submit is a softpin submit (ETNA_SUBMIT_SOFTPIN) the 'presumed'
* field is interpreted as the fixed location to map the bo into the gpu
* virtual address space. If the kernel is unable to map the buffer at
* this location the submit will fail. This means userspace is responsible
* for the whole gpu virtual address management.
*/
#define ETNA_SUBMIT_BO_READ 0x0001
#define ETNA_SUBMIT_BO_WRITE 0x0002
struct drm_etnaviv_gem_submit_bo {
__u32 flags; /* in, mask of ETNA_SUBMIT_BO_x */
__u32 handle; /* in, GEM handle */
__u64 presumed; /* in/out, presumed buffer address */
};
/* performance monitor request (pmr) */
#define ETNA_PM_PROCESS_PRE 0x0001
#define ETNA_PM_PROCESS_POST 0x0002
struct drm_etnaviv_gem_submit_pmr {
__u32 flags; /* in, when to process request (ETNA_PM_PROCESS_x) */
__u8 domain; /* in, pm domain */
__u8 pad;
__u16 signal; /* in, pm signal */
__u32 sequence; /* in, sequence number */
__u32 read_offset; /* in, offset from read_bo */
__u32 read_idx; /* in, index of read_bo buffer */
};
/* Each cmdstream submit consists of a table of buffers involved, and
* one or more cmdstream buffers. This allows for conditional execution
* (context-restore), and IB buffers needed for per tile/bin draw cmds.
*/
#define ETNA_SUBMIT_NO_IMPLICIT 0x0001
#define ETNA_SUBMIT_FENCE_FD_IN 0x0002
#define ETNA_SUBMIT_FENCE_FD_OUT 0x0004
#define ETNA_SUBMIT_SOFTPIN 0x0008
#define ETNA_SUBMIT_FLAGS (ETNA_SUBMIT_NO_IMPLICIT | \
ETNA_SUBMIT_FENCE_FD_IN | \
ETNA_SUBMIT_FENCE_FD_OUT| \
ETNA_SUBMIT_SOFTPIN)
#define ETNA_PIPE_3D 0x00
#define ETNA_PIPE_2D 0x01
#define ETNA_PIPE_VG 0x02
struct drm_etnaviv_gem_submit {
__u32 fence; /* out */
__u32 pipe; /* in */
__u32 exec_state; /* in, initial execution state (ETNA_PIPE_x) */
__u32 nr_bos; /* in, number of submit_bo's */
__u32 nr_relocs; /* in, number of submit_reloc's */
__u32 stream_size; /* in, cmdstream size */
__u64 bos; /* in, ptr to array of submit_bo's */
__u64 relocs; /* in, ptr to array of submit_reloc's */
__u64 stream; /* in, ptr to cmdstream */
__u32 flags; /* in, mask of ETNA_SUBMIT_x */
__s32 fence_fd; /* in/out, fence fd (see ETNA_SUBMIT_FENCE_FD_x) */
__u64 pmrs; /* in, ptr to array of submit_pmr's */
__u32 nr_pmrs; /* in, number of submit_pmr's */
__u32 pad;
};
/* The normal way to synchronize with the GPU is just to CPU_PREP on
* a buffer if you need to access it from the CPU (other cmdstream
* submission from same or other contexts, PAGE_FLIP ioctl, etc, all
* handle the required synchronization under the hood). This ioctl
* mainly just exists as a way to implement the gallium pipe_fence
* APIs without requiring a dummy bo to synchronize on.
*/
#define ETNA_WAIT_NONBLOCK 0x01
struct drm_etnaviv_wait_fence {
__u32 pipe; /* in */
__u32 fence; /* in */
__u32 flags; /* in, mask of ETNA_WAIT_x */
__u32 pad;
struct drm_etnaviv_timespec timeout; /* in */
};
#define ETNA_USERPTR_READ 0x01
#define ETNA_USERPTR_WRITE 0x02
struct drm_etnaviv_gem_userptr {
__u64 user_ptr; /* in, page aligned user pointer */
__u64 user_size; /* in, page aligned user size */
__u32 flags; /* in, flags */
__u32 handle; /* out, non-zero handle */
};
struct drm_etnaviv_gem_wait {
__u32 pipe; /* in */
__u32 handle; /* in, bo to be waited for */
__u32 flags; /* in, mask of ETNA_WAIT_x */
__u32 pad;
struct drm_etnaviv_timespec timeout; /* in */
};
/*
* Performance Monitor (PM):
*/
struct drm_etnaviv_pm_domain {
__u32 pipe; /* in */
__u8 iter; /* in/out, select pm domain at index iter */
__u8 id; /* out, id of domain */
__u16 nr_signals; /* out, how many signals does this domain provide */
char name[64]; /* out, name of domain */
};
struct drm_etnaviv_pm_signal {
__u32 pipe; /* in */
__u8 domain; /* in, pm domain index */
__u8 pad;
__u16 iter; /* in/out, select pm source at index iter */
__u16 id; /* out, id of signal */
char name[64]; /* out, name of domain */
};
#define DRM_ETNAVIV_GET_PARAM 0x00
/* placeholder:
#define DRM_ETNAVIV_SET_PARAM 0x01
*/
#define DRM_ETNAVIV_GEM_NEW 0x02
#define DRM_ETNAVIV_GEM_INFO 0x03
#define DRM_ETNAVIV_GEM_CPU_PREP 0x04
#define DRM_ETNAVIV_GEM_CPU_FINI 0x05
#define DRM_ETNAVIV_GEM_SUBMIT 0x06
#define DRM_ETNAVIV_WAIT_FENCE 0x07
#define DRM_ETNAVIV_GEM_USERPTR 0x08
#define DRM_ETNAVIV_GEM_WAIT 0x09
#define DRM_ETNAVIV_PM_QUERY_DOM 0x0a
#define DRM_ETNAVIV_PM_QUERY_SIG 0x0b
#define DRM_ETNAVIV_NUM_IOCTLS 0x0c
#define DRM_IOCTL_ETNAVIV_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GET_PARAM, struct drm_etnaviv_param)
#define DRM_IOCTL_ETNAVIV_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_NEW, struct drm_etnaviv_gem_new)
#define DRM_IOCTL_ETNAVIV_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_INFO, struct drm_etnaviv_gem_info)
#define DRM_IOCTL_ETNAVIV_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_CPU_PREP, struct drm_etnaviv_gem_cpu_prep)
#define DRM_IOCTL_ETNAVIV_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_CPU_FINI, struct drm_etnaviv_gem_cpu_fini)
#define DRM_IOCTL_ETNAVIV_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_SUBMIT, struct drm_etnaviv_gem_submit)
#define DRM_IOCTL_ETNAVIV_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_WAIT_FENCE, struct drm_etnaviv_wait_fence)
#define DRM_IOCTL_ETNAVIV_GEM_USERPTR DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_USERPTR, struct drm_etnaviv_gem_userptr)
#define DRM_IOCTL_ETNAVIV_GEM_WAIT DRM_IOW(DRM_COMMAND_BASE + DRM_ETNAVIV_GEM_WAIT, struct drm_etnaviv_gem_wait)
#define DRM_IOCTL_ETNAVIV_PM_QUERY_DOM DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_PM_QUERY_DOM, struct drm_etnaviv_pm_domain)
#define DRM_IOCTL_ETNAVIV_PM_QUERY_SIG DRM_IOWR(DRM_COMMAND_BASE + DRM_ETNAVIV_PM_QUERY_SIG, struct drm_etnaviv_pm_signal)
#if defined(__cplusplus)
}
#endif
#endif /* __ETNAVIV_DRM_H__ */

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/*
* Copyright (C) 2014-2015 Etnaviv Project
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Christian Gmeiner <christian.gmeiner@gmail.com>
*/
#ifndef ETNAVIV_DRMIF_H_
#define ETNAVIV_DRMIF_H_
#include <xf86drm.h>
#include <stdint.h>
struct etna_bo;
struct etna_pipe;
struct etna_gpu;
struct etna_device;
struct etna_cmd_stream;
struct etna_perfmon;
struct etna_perfmon_domain;
struct etna_perfmon_signal;
enum etna_pipe_id {
ETNA_PIPE_3D = 0,
ETNA_PIPE_2D = 1,
ETNA_PIPE_VG = 2,
ETNA_PIPE_MAX
};
enum etna_param_id {
ETNA_GPU_MODEL = 0x1,
ETNA_GPU_REVISION = 0x2,
ETNA_GPU_FEATURES_0 = 0x3,
ETNA_GPU_FEATURES_1 = 0x4,
ETNA_GPU_FEATURES_2 = 0x5,
ETNA_GPU_FEATURES_3 = 0x6,
ETNA_GPU_FEATURES_4 = 0x7,
ETNA_GPU_FEATURES_5 = 0x8,
ETNA_GPU_FEATURES_6 = 0x9,
ETNA_GPU_STREAM_COUNT = 0x10,
ETNA_GPU_REGISTER_MAX = 0x11,
ETNA_GPU_THREAD_COUNT = 0x12,
ETNA_GPU_VERTEX_CACHE_SIZE = 0x13,
ETNA_GPU_SHADER_CORE_COUNT = 0x14,
ETNA_GPU_PIXEL_PIPES = 0x15,
ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE = 0x16,
ETNA_GPU_BUFFER_SIZE = 0x17,
ETNA_GPU_INSTRUCTION_COUNT = 0x18,
ETNA_GPU_NUM_CONSTANTS = 0x19,
ETNA_GPU_NUM_VARYINGS = 0x1a
};
/* bo flags: */
#define DRM_ETNA_GEM_CACHE_CACHED 0x00010000
#define DRM_ETNA_GEM_CACHE_WC 0x00020000
#define DRM_ETNA_GEM_CACHE_UNCACHED 0x00040000
#define DRM_ETNA_GEM_CACHE_MASK 0x000f0000
/* map flags */
#define DRM_ETNA_GEM_FORCE_MMU 0x00100000
/* bo access flags: (keep aligned to ETNA_PREP_x) */
#define DRM_ETNA_PREP_READ 0x01
#define DRM_ETNA_PREP_WRITE 0x02
#define DRM_ETNA_PREP_NOSYNC 0x04
/* device functions:
*/
struct etna_device *etna_device_new(int fd);
struct etna_device *etna_device_new_dup(int fd);
struct etna_device *etna_device_ref(struct etna_device *dev);
void etna_device_del(struct etna_device *dev);
int etna_device_fd(struct etna_device *dev);
/* gpu functions:
*/
struct etna_gpu *etna_gpu_new(struct etna_device *dev, unsigned int core);
void etna_gpu_del(struct etna_gpu *gpu);
int etna_gpu_get_param(struct etna_gpu *gpu, enum etna_param_id param,
uint64_t *value);
/* pipe functions:
*/
struct etna_pipe *etna_pipe_new(struct etna_gpu *gpu, enum etna_pipe_id id);
void etna_pipe_del(struct etna_pipe *pipe);
int etna_pipe_wait(struct etna_pipe *pipe, uint32_t timestamp, uint32_t ms);
int etna_pipe_wait_ns(struct etna_pipe *pipe, uint32_t timestamp, uint64_t ns);
/* buffer-object functions:
*/
struct etna_bo *etna_bo_new(struct etna_device *dev,
uint32_t size, uint32_t flags);
struct etna_bo *etna_bo_from_name(struct etna_device *dev, uint32_t name);
struct etna_bo *etna_bo_from_dmabuf(struct etna_device *dev, int fd);
struct etna_bo *etna_bo_ref(struct etna_bo *bo);
void etna_bo_del(struct etna_bo *bo);
int etna_bo_get_name(struct etna_bo *bo, uint32_t *name);
uint32_t etna_bo_handle(struct etna_bo *bo);
int etna_bo_dmabuf(struct etna_bo *bo);
uint32_t etna_bo_size(struct etna_bo *bo);
void * etna_bo_map(struct etna_bo *bo);
int etna_bo_cpu_prep(struct etna_bo *bo, uint32_t op);
void etna_bo_cpu_fini(struct etna_bo *bo);
/* cmd stream functions:
*/
struct etna_cmd_stream {
uint32_t *buffer;
uint32_t offset; /* in 32-bit words */
uint32_t size; /* in 32-bit words */
};
struct etna_cmd_stream *etna_cmd_stream_new(struct etna_pipe *pipe, uint32_t size,
void (*reset_notify)(struct etna_cmd_stream *stream, void *priv),
void *priv);
void etna_cmd_stream_del(struct etna_cmd_stream *stream);
uint32_t etna_cmd_stream_timestamp(struct etna_cmd_stream *stream);
void etna_cmd_stream_flush(struct etna_cmd_stream *stream);
void etna_cmd_stream_flush2(struct etna_cmd_stream *stream, int in_fence_fd,
int *out_fence_fd);
void etna_cmd_stream_finish(struct etna_cmd_stream *stream);
static inline uint32_t etna_cmd_stream_avail(struct etna_cmd_stream *stream)
{
static const uint32_t END_CLEARANCE = 2; /* LINK op code */
return stream->size - stream->offset - END_CLEARANCE;
}
static inline void etna_cmd_stream_reserve(struct etna_cmd_stream *stream, size_t n)
{
if (etna_cmd_stream_avail(stream) < n)
etna_cmd_stream_flush(stream);
}
static inline void etna_cmd_stream_emit(struct etna_cmd_stream *stream, uint32_t data)
{
stream->buffer[stream->offset++] = data;
}
static inline uint32_t etna_cmd_stream_get(struct etna_cmd_stream *stream, uint32_t offset)
{
return stream->buffer[offset];
}
static inline void etna_cmd_stream_set(struct etna_cmd_stream *stream, uint32_t offset,
uint32_t data)
{
stream->buffer[offset] = data;
}
static inline uint32_t etna_cmd_stream_offset(struct etna_cmd_stream *stream)
{
return stream->offset;
}
struct etna_reloc {
struct etna_bo *bo;
#define ETNA_RELOC_READ 0x0001
#define ETNA_RELOC_WRITE 0x0002
uint32_t flags;
uint32_t offset;
};
void etna_cmd_stream_reloc(struct etna_cmd_stream *stream, const struct etna_reloc *r);
/* performance monitoring functions:
*/
struct etna_perfmon *etna_perfmon_create(struct etna_pipe *pipe);
void etna_perfmon_del(struct etna_perfmon *perfmon);
struct etna_perfmon_domain *etna_perfmon_get_dom_by_name(struct etna_perfmon *pm, const char *name);
struct etna_perfmon_signal *etna_perfmon_get_sig_by_name(struct etna_perfmon_domain *dom, const char *name);
struct etna_perf {
#define ETNA_PM_PROCESS_PRE 0x0001
#define ETNA_PM_PROCESS_POST 0x0002
uint32_t flags;
uint32_t sequence;
struct etna_perfmon_signal *signal;
struct etna_bo *bo;
uint32_t offset;
};
void etna_cmd_stream_perf(struct etna_cmd_stream *stream, const struct etna_perf *p);
#endif /* ETNAVIV_DRMIF_H_ */

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/*
* Copyright (C) 2015 Etnaviv Project
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Christian Gmeiner <christian.gmeiner@gmail.com>
*/
#include "etnaviv_priv.h"
#include "etnaviv_drmif.h"
static uint64_t get_param(struct etna_device *dev, uint32_t core, uint32_t param)
{
struct drm_etnaviv_param req = {
.pipe = core,
.param = param,
};
int ret;
ret = drmCommandWriteRead(dev->fd, DRM_ETNAVIV_GET_PARAM, &req, sizeof(req));
if (ret) {
ERROR_MSG("get-param (%x) failed! %d (%s)", param, ret, strerror(errno));
return 0;
}
return req.value;
}
drm_public struct etna_gpu *etna_gpu_new(struct etna_device *dev, unsigned int core)
{
struct etna_gpu *gpu;
gpu = calloc(1, sizeof(*gpu));
if (!gpu) {
ERROR_MSG("allocation failed");
goto fail;
}
gpu->dev = dev;
gpu->core = core;
gpu->model = get_param(dev, core, ETNAVIV_PARAM_GPU_MODEL);
gpu->revision = get_param(dev, core, ETNAVIV_PARAM_GPU_REVISION);
if (!gpu->model)
goto fail;
INFO_MSG(" GPU model: 0x%x (rev %x)", gpu->model, gpu->revision);
return gpu;
fail:
if (gpu)
etna_gpu_del(gpu);
return NULL;
}
drm_public void etna_gpu_del(struct etna_gpu *gpu)
{
free(gpu);
}
drm_public int etna_gpu_get_param(struct etna_gpu *gpu, enum etna_param_id param,
uint64_t *value)
{
struct etna_device *dev = gpu->dev;
unsigned int core = gpu->core;
switch(param) {
case ETNA_GPU_MODEL:
*value = gpu->model;
return 0;
case ETNA_GPU_REVISION:
*value = gpu->revision;
return 0;
case ETNA_GPU_FEATURES_0:
*value = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_0);
return 0;
case ETNA_GPU_FEATURES_1:
*value = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_1);
return 0;
case ETNA_GPU_FEATURES_2:
*value = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_2);
return 0;
case ETNA_GPU_FEATURES_3:
*value = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_3);
return 0;
case ETNA_GPU_FEATURES_4:
*value = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_4);
return 0;
case ETNA_GPU_FEATURES_5:
*value = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_5);
return 0;
case ETNA_GPU_FEATURES_6:
*value = get_param(dev, core, ETNAVIV_PARAM_GPU_FEATURES_6);
return 0;
case ETNA_GPU_STREAM_COUNT:
*value = get_param(dev, core, ETNA_GPU_STREAM_COUNT);
return 0;
case ETNA_GPU_REGISTER_MAX:
*value = get_param(dev, core, ETNA_GPU_REGISTER_MAX);
return 0;
case ETNA_GPU_THREAD_COUNT:
*value = get_param(dev, core, ETNA_GPU_THREAD_COUNT);
return 0;
case ETNA_GPU_VERTEX_CACHE_SIZE:
*value = get_param(dev, core, ETNA_GPU_VERTEX_CACHE_SIZE);
return 0;
case ETNA_GPU_SHADER_CORE_COUNT:
*value = get_param(dev, core, ETNA_GPU_SHADER_CORE_COUNT);
return 0;
case ETNA_GPU_PIXEL_PIPES:
*value = get_param(dev, core, ETNA_GPU_PIXEL_PIPES);
return 0;
case ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE:
*value = get_param(dev, core, ETNA_GPU_VERTEX_OUTPUT_BUFFER_SIZE);
return 0;
case ETNA_GPU_BUFFER_SIZE:
*value = get_param(dev, core, ETNA_GPU_BUFFER_SIZE);
return 0;
case ETNA_GPU_INSTRUCTION_COUNT:
*value = get_param(dev, core, ETNA_GPU_INSTRUCTION_COUNT);
return 0;
case ETNA_GPU_NUM_CONSTANTS:
*value = get_param(dev, core, ETNA_GPU_NUM_CONSTANTS);
return 0;
case ETNA_GPU_NUM_VARYINGS:
*value = get_param(dev, core, ETNA_GPU_NUM_VARYINGS);
return 0;
default:
ERROR_MSG("invalid param id: %d", param);
return -1;
}
return 0;
}

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/*
* Copyright (C) 2017 Etnaviv Project
* Copyright (C) 2017 Zodiac Inflight Innovations
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Christian Gmeiner <christian.gmeiner@gmail.com>
*/
#include "etnaviv_priv.h"
static int etna_perfmon_query_signals(struct etna_perfmon *pm, struct etna_perfmon_domain *dom)
{
struct etna_device *dev = pm->pipe->gpu->dev;
struct drm_etnaviv_pm_signal req = {
.pipe = pm->pipe->id,
.domain = dom->id
};
do {
struct etna_perfmon_signal *sig;
int ret;
ret = drmCommandWriteRead(dev->fd, DRM_ETNAVIV_PM_QUERY_SIG, &req, sizeof(req));
if (ret)
break;
sig = calloc(1, sizeof(*sig));
if (!sig)
return -ENOMEM;
INFO_MSG("perfmon signal:");
INFO_MSG("id = %d", req.id);
INFO_MSG("name = %s", req.name);
sig->domain = dom;
sig->signal = req.id;
strncpy(sig->name, req.name, sizeof(sig->name));
list_addtail(&sig->head, &dom->signals);
} while (req.iter != 0xffff);
return 0;
}
static int etna_perfmon_query_domains(struct etna_perfmon *pm)
{
struct etna_device *dev = pm->pipe->gpu->dev;
struct drm_etnaviv_pm_domain req = {
.pipe = pm->pipe->id
};
do {
struct etna_perfmon_domain *dom;
int ret;
ret = drmCommandWriteRead(dev->fd, DRM_ETNAVIV_PM_QUERY_DOM, &req, sizeof(req));
if (ret)
break;
dom = calloc(1, sizeof(*dom));
if (!dom)
return -ENOMEM;
list_inithead(&dom->signals);
dom->id = req.id;
strncpy(dom->name, req.name, sizeof(dom->name));
list_addtail(&dom->head, &pm->domains);
INFO_MSG("perfmon domain:");
INFO_MSG("id = %d", req.id);
INFO_MSG("name = %s", req.name);
INFO_MSG("nr_signals = %d", req.nr_signals);
/* Query all available signals for this domain. */
if (req.nr_signals > 0) {
ret = etna_perfmon_query_signals(pm, dom);
if (ret)
return ret;
}
} while (req.iter != 0xff);
return 0;
}
static void etna_perfmon_free_signals(struct etna_perfmon_domain *dom)
{
struct etna_perfmon_signal *sig, *next;
LIST_FOR_EACH_ENTRY_SAFE(sig, next, &dom->signals, head) {
list_del(&sig->head);
free(sig);
}
}
static void etna_perfmon_free_domains(struct etna_perfmon *pm)
{
struct etna_perfmon_domain *dom, *next;
LIST_FOR_EACH_ENTRY_SAFE(dom, next, &pm->domains, head) {
etna_perfmon_free_signals(dom);
list_del(&dom->head);
free(dom);
}
}
drm_public struct etna_perfmon *etna_perfmon_create(struct etna_pipe *pipe)
{
struct etna_perfmon *pm;
int ret;
pm = calloc(1, sizeof(*pm));
if (!pm) {
ERROR_MSG("allocation failed");
return NULL;
}
list_inithead(&pm->domains);
pm->pipe = pipe;
/* query all available domains and sources for this device */
ret = etna_perfmon_query_domains(pm);
if (ret)
goto fail;
return pm;
fail:
etna_perfmon_del(pm);
return NULL;
}
drm_public void etna_perfmon_del(struct etna_perfmon *pm)
{
if (!pm)
return;
etna_perfmon_free_domains(pm);
free(pm);
}
drm_public struct etna_perfmon_domain *etna_perfmon_get_dom_by_name(struct etna_perfmon *pm, const char *name)
{
struct etna_perfmon_domain *dom;
if (pm) {
LIST_FOR_EACH_ENTRY(dom, &pm->domains, head) {
if (!strcmp(dom->name, name))
return dom;
}
}
return NULL;
}
drm_public struct etna_perfmon_signal *etna_perfmon_get_sig_by_name(struct etna_perfmon_domain *dom, const char *name)
{
struct etna_perfmon_signal *signal;
if (dom) {
LIST_FOR_EACH_ENTRY(signal, &dom->signals, head) {
if (!strcmp(signal->name, name))
return signal;
}
}
return NULL;
}

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/*
* Copyright (C) 2014-2015 Etnaviv Project
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Christian Gmeiner <christian.gmeiner@gmail.com>
*/
#include "etnaviv_priv.h"
drm_public int etna_pipe_wait(struct etna_pipe *pipe, uint32_t timestamp, uint32_t ms)
{
return etna_pipe_wait_ns(pipe, timestamp, ms * 1000000);
}
drm_public int etna_pipe_wait_ns(struct etna_pipe *pipe, uint32_t timestamp, uint64_t ns)
{
struct etna_device *dev = pipe->gpu->dev;
int ret;
struct drm_etnaviv_wait_fence req = {
.pipe = pipe->gpu->core,
.fence = timestamp,
};
if (ns == 0)
req.flags |= ETNA_WAIT_NONBLOCK;
get_abs_timeout(&req.timeout, ns);
ret = drmCommandWrite(dev->fd, DRM_ETNAVIV_WAIT_FENCE, &req, sizeof(req));
if (ret) {
ERROR_MSG("wait-fence failed! %d (%s)", ret, strerror(errno));
return ret;
}
return 0;
}
drm_public void etna_pipe_del(struct etna_pipe *pipe)
{
free(pipe);
}
drm_public struct etna_pipe *etna_pipe_new(struct etna_gpu *gpu, enum etna_pipe_id id)
{
struct etna_pipe *pipe;
pipe = calloc(1, sizeof(*pipe));
if (!pipe) {
ERROR_MSG("allocation failed");
goto fail;
}
pipe->id = id;
pipe->gpu = gpu;
return pipe;
fail:
return NULL;
}

208
etnaviv/etnaviv_priv.h Normal file
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@ -0,0 +1,208 @@
/*
* Copyright (C) 2014-2015 Etnaviv Project
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Christian Gmeiner <christian.gmeiner@gmail.com>
*/
#ifndef ETNAVIV_PRIV_H_
#define ETNAVIV_PRIV_H_
#include <stdlib.h>
#include <errno.h>
#include <string.h>
#include <unistd.h>
#include <errno.h>
#include <fcntl.h>
#include <sys/ioctl.h>
#include <pthread.h>
#include <stdio.h>
#include <assert.h>
#include "libdrm_macros.h"
#include "xf86drm.h"
#include "xf86atomic.h"
#include "util_double_list.h"
#include "etnaviv_drmif.h"
#include "etnaviv_drm.h"
struct etna_bo_bucket {
uint32_t size;
struct list_head list;
};
struct etna_bo_cache {
struct etna_bo_bucket cache_bucket[14 * 4];
unsigned num_buckets;
time_t time;
};
struct etna_device {
int fd;
atomic_t refcnt;
/* tables to keep track of bo's, to avoid "evil-twin" etna_bo objects:
*
* handle_table: maps handle to etna_bo
* name_table: maps flink name to etna_bo
*
* We end up needing two tables, because DRM_IOCTL_GEM_OPEN always
* returns a new handle. So we need to figure out if the bo is already
* open in the process first, before calling gem-open.
*/
void *handle_table, *name_table;
struct etna_bo_cache bo_cache;
int closefd; /* call close(fd) upon destruction */
};
drm_private void etna_bo_cache_init(struct etna_bo_cache *cache);
drm_private void etna_bo_cache_cleanup(struct etna_bo_cache *cache, time_t time);
drm_private struct etna_bo *etna_bo_cache_alloc(struct etna_bo_cache *cache,
uint32_t *size, uint32_t flags);
drm_private int etna_bo_cache_free(struct etna_bo_cache *cache, struct etna_bo *bo);
/* for where @table_lock is already held: */
drm_private void etna_device_del_locked(struct etna_device *dev);
/* a GEM buffer object allocated from the DRM device */
struct etna_bo {
struct etna_device *dev;
void *map; /* userspace mmap'ing (if there is one) */
uint32_t size;
uint32_t handle;
uint32_t flags;
uint32_t name; /* flink global handle (DRI2 name) */
uint64_t offset; /* offset to mmap() */
atomic_t refcnt;
/* in the common case, a bo won't be referenced by more than a single
* command stream. So to avoid looping over all the bo's in the
* reloc table to find the idx of a bo that might already be in the
* table, we cache the idx in the bo. But in order to detect the
* slow-path where bo is ref'd in multiple streams, we also must track
* the current_stream for which the idx is valid. See bo2idx().
*/
struct etna_cmd_stream *current_stream;
uint32_t idx;
int reuse;
struct list_head list; /* bucket-list entry */
time_t free_time; /* time when added to bucket-list */
};
struct etna_gpu {
struct etna_device *dev;
uint32_t core;
uint32_t model;
uint32_t revision;
};
struct etna_pipe {
enum etna_pipe_id id;
struct etna_gpu *gpu;
};
struct etna_cmd_stream_priv {
struct etna_cmd_stream base;
struct etna_pipe *pipe;
uint32_t last_timestamp;
/* submit ioctl related tables: */
struct {
/* bo's table: */
struct drm_etnaviv_gem_submit_bo *bos;
uint32_t nr_bos, max_bos;
/* reloc's table: */
struct drm_etnaviv_gem_submit_reloc *relocs;
uint32_t nr_relocs, max_relocs;
/* perf's table: */
struct drm_etnaviv_gem_submit_pmr *pmrs;
uint32_t nr_pmrs, max_pmrs;
} submit;
/* should have matching entries in submit.bos: */
struct etna_bo **bos;
uint32_t nr_bos, max_bos;
/* notify callback if buffer reset happened */
void (*reset_notify)(struct etna_cmd_stream *stream, void *priv);
void *reset_notify_priv;
};
struct etna_perfmon {
struct list_head domains;
struct etna_pipe *pipe;
};
struct etna_perfmon_domain
{
struct list_head head;
struct list_head signals;
uint8_t id;
char name[64];
};
struct etna_perfmon_signal
{
struct list_head head;
struct etna_perfmon_domain *domain;
uint8_t signal;
char name[64];
};
#define ALIGN(v,a) (((v) + (a) - 1) & ~((a) - 1))
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
#define enable_debug 1 /* TODO make dynamic */
#define INFO_MSG(fmt, ...) \
do { drmMsg("[I] "fmt " (%s:%d)\n", \
##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0)
#define DEBUG_MSG(fmt, ...) \
do if (enable_debug) { drmMsg("[D] "fmt " (%s:%d)\n", \
##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0)
#define WARN_MSG(fmt, ...) \
do { drmMsg("[W] "fmt " (%s:%d)\n", \
##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0)
#define ERROR_MSG(fmt, ...) \
do { drmMsg("[E] " fmt " (%s:%d)\n", \
##__VA_ARGS__, __FUNCTION__, __LINE__); } while (0)
#define VOID2U64(x) ((uint64_t)(unsigned long)(x))
static inline void get_abs_timeout(struct drm_etnaviv_timespec *tv, uint64_t ns)
{
struct timespec t;
uint32_t s = ns / 1000000000;
clock_gettime(CLOCK_MONOTONIC, &t);
tv->tv_sec = t.tv_sec + s;
tv->tv_nsec = t.tv_nsec + ns - (s * 1000000000);
}
#endif /* ETNAVIV_PRIV_H_ */

View file

@ -0,0 +1,11 @@
prefix=@prefix@
exec_prefix=@exec_prefix@
libdir=@libdir@
includedir=@includedir@
Name: libdrm_etnaviv
Description: Userspace interface to etnaviv kernel DRM services
Version: @PACKAGE_VERSION@
Libs: -L${libdir} -ldrm_etnaviv
Cflags: -I${includedir} -I${includedir}/libdrm
Requires.private: libdrm

64
etnaviv/meson.build Normal file
View file

@ -0,0 +1,64 @@
# Copyright © 2017-2018 Intel Corporation
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
libdrm_etnaviv = library(
'drm_etnaviv',
[
files(
'etnaviv_device.c', 'etnaviv_gpu.c', 'etnaviv_bo.c', 'etnaviv_bo_cache.c',
'etnaviv_perfmon.c', 'etnaviv_pipe.c', 'etnaviv_cmd_stream.c',
),
config_file
],
include_directories : [inc_root, inc_drm],
link_with : libdrm,
c_args : libdrm_c_args,
gnu_symbol_visibility : 'hidden',
dependencies : [dep_threads, dep_rt, dep_atomic_ops],
version : '1.@0@.0'.format(patch_ver),
install : true,
)
install_headers('etnaviv_drmif.h', subdir : 'libdrm')
pkg.generate(
libdrm_etnaviv,
name : 'libdrm_etnaviv',
subdirs : ['.', 'libdrm'],
description : 'Userspace interface to Tegra kernel DRM services',
)
ext_libdrm_etnaviv = declare_dependency(
link_with : [libdrm, libdrm_etnaviv],
include_directories : [inc_drm, include_directories('.')],
)
meson.override_dependency('libdrm_etnaviv', ext_libdrm_etnaviv)
test(
'etnaviv-symbols-check',
symbols_check,
args : [
'--lib', libdrm_etnaviv,
'--symbols-file', files('etnaviv-symbols.txt'),
'--nm', prog_nm.full_path(),
],
)

View file

@ -1,27 +0,0 @@
AM_CFLAGS = \
$(WARN_CFLAGS) \
-I$(top_srcdir) \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
libdrm_exynos_la_LTLIBRARIES = libdrm_exynos.la
libdrm_exynos_ladir = $(libdir)
libdrm_exynos_la_LDFLAGS = -version-number 1:0:0 -no-undefined
libdrm_exynos_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@
libdrm_exynos_la_SOURCES = \
exynos_drm.c \
exynos_fimg2d.c \
fimg2d_reg.h
libdrm_exynoscommonincludedir = ${includedir}/exynos
libdrm_exynoscommoninclude_HEADERS = exynos_drm.h exynos_fimg2d.h
libdrm_exynosincludedir = ${includedir}/libdrm
libdrm_exynosinclude_HEADERS = exynos_drmif.h
pkgconfigdir = @pkgconfigdir@
pkgconfig_DATA = libdrm_exynos.pc
TESTS = exynos-symbol-check
EXTRA_DIST = $(TESTS)

View file

@ -1,37 +0,0 @@
#!/bin/bash
# The following symbols (past the first five) are taken from the public headers.
# A list of the latter should be available Makefile.am/libdrm_exynos*_HEADERS
FUNCS=$(nm -D --format=bsd --defined-only ${1-.libs/libdrm_exynos.so} | awk '{print $3}'| while read func; do
( grep -q "^$func$" || echo $func ) <<EOF
__bss_start
_edata
_end
_fini
_init
exynos_bo_create
exynos_bo_destroy
exynos_bo_from_name
exynos_bo_get_info
exynos_bo_get_name
exynos_bo_handle
exynos_bo_map
exynos_device_create
exynos_device_destroy
exynos_prime_fd_to_handle
exynos_prime_handle_to_fd
exynos_vidi_connection
g2d_blend
g2d_copy
g2d_copy_with_scale
g2d_exec
g2d_fini
g2d_init
g2d_scale_and_blend
g2d_solid_fill
EOF
done)
test ! -n "$FUNCS" || echo $FUNCS
test ! -n "$FUNCS"

23
exynos/exynos-symbols.txt Normal file
View file

@ -0,0 +1,23 @@
exynos_bo_create
exynos_bo_destroy
exynos_bo_from_name
exynos_bo_get_info
exynos_bo_get_name
exynos_bo_handle
exynos_bo_map
exynos_device_create
exynos_device_destroy
exynos_prime_fd_to_handle
exynos_prime_handle_to_fd
exynos_vidi_connection
exynos_handle_event
g2d_blend
g2d_copy
g2d_copy_with_scale
g2d_exec
g2d_config_event
g2d_fini
g2d_init
g2d_move
g2d_scale_and_blend
g2d_solid_fill

View file

@ -24,17 +24,13 @@
* Inki Dae <inki.dae@samsung.com>
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <errno.h>
#include <unistd.h>
#include <sys/mman.h>
#include <linux/stddef.h>
#include <xf86drm.h>
@ -42,6 +38,8 @@
#include "exynos_drm.h"
#include "exynos_drmif.h"
#define U642VOID(x) ((void *)(unsigned long)(x))
/*
* Create exynos drm device object.
*
@ -49,7 +47,7 @@
*
* if true, return the device object else NULL.
*/
struct exynos_device * exynos_device_create(int fd)
drm_public struct exynos_device * exynos_device_create(int fd)
{
struct exynos_device *dev;
@ -70,7 +68,7 @@ struct exynos_device * exynos_device_create(int fd)
*
* @dev: exynos drm device object.
*/
void exynos_device_destroy(struct exynos_device *dev)
drm_public void exynos_device_destroy(struct exynos_device *dev)
{
free(dev);
}
@ -88,8 +86,8 @@ void exynos_device_destroy(struct exynos_device *dev)
*
* if true, return a exynos buffer object else NULL.
*/
struct exynos_bo * exynos_bo_create(struct exynos_device *dev,
size_t size, uint32_t flags)
drm_public struct exynos_bo * exynos_bo_create(struct exynos_device *dev,
size_t size, uint32_t flags)
{
struct exynos_bo *bo;
struct drm_exynos_gem_create req = {
@ -142,8 +140,8 @@ fail:
*
* if true, return 0 else negative.
*/
int exynos_bo_get_info(struct exynos_device *dev, uint32_t handle,
size_t *size, uint32_t *flags)
drm_public int exynos_bo_get_info(struct exynos_device *dev, uint32_t handle,
size_t *size, uint32_t *flags)
{
int ret;
struct drm_exynos_gem_info req = {
@ -168,7 +166,7 @@ int exynos_bo_get_info(struct exynos_device *dev, uint32_t handle,
*
* @bo: a exynos buffer object to be destroyed.
*/
void exynos_bo_destroy(struct exynos_bo *bo)
drm_public void exynos_bo_destroy(struct exynos_bo *bo)
{
if (!bo)
return;
@ -177,11 +175,7 @@ void exynos_bo_destroy(struct exynos_bo *bo)
munmap(bo->vaddr, bo->size);
if (bo->handle) {
struct drm_gem_close req = {
.handle = bo->handle,
};
drmIoctl(bo->dev->fd, DRM_IOCTL_GEM_CLOSE, &req);
drmCloseBufferHandle(bo->dev->fd, bo->handle);
}
free(bo);
@ -200,7 +194,7 @@ void exynos_bo_destroy(struct exynos_bo *bo)
* if true, return a exynos buffer object else NULL.
*
*/
struct exynos_bo *
drm_public struct exynos_bo *
exynos_bo_from_name(struct exynos_device *dev, uint32_t name)
{
struct exynos_bo *bo;
@ -243,7 +237,7 @@ err_free_bo:
*
* if true, return 0 else negative.
*/
int exynos_bo_get_name(struct exynos_bo *bo, uint32_t *name)
drm_public int exynos_bo_get_name(struct exynos_bo *bo, uint32_t *name)
{
if (!bo->name) {
struct drm_gem_flink req = {
@ -266,7 +260,7 @@ int exynos_bo_get_name(struct exynos_bo *bo, uint32_t *name)
return 0;
}
uint32_t exynos_bo_handle(struct exynos_bo *bo)
drm_public uint32_t exynos_bo_handle(struct exynos_bo *bo)
{
return bo->handle;
}
@ -277,9 +271,9 @@ uint32_t exynos_bo_handle(struct exynos_bo *bo)
* @bo: a exynos buffer object including a gem object handle to be mmapped
* to user space.
*
* if true, user pointer mmaped else NULL.
* if true, user pointer mmapped else NULL.
*/
void *exynos_bo_map(struct exynos_bo *bo)
drm_public void *exynos_bo_map(struct exynos_bo *bo)
{
if (!bo->vaddr) {
struct exynos_device *dev = bo->dev;
@ -316,7 +310,7 @@ void *exynos_bo_map(struct exynos_bo *bo)
*
* @return: 0 on success, -1 on error, and errno will be set
*/
int
drm_public int
exynos_prime_handle_to_fd(struct exynos_device *dev, uint32_t handle, int *fd)
{
return drmPrimeHandleToFD(dev->fd, handle, 0, fd);
@ -331,7 +325,7 @@ exynos_prime_handle_to_fd(struct exynos_device *dev, uint32_t handle, int *fd)
*
* @return: 0 on success, -1 on error, and errno will be set
*/
int
drm_public int
exynos_prime_fd_to_handle(struct exynos_device *dev, int fd, uint32_t *handle)
{
return drmPrimeFDToHandle(dev->fd, fd, handle);
@ -344,7 +338,7 @@ exynos_prime_fd_to_handle(struct exynos_device *dev, int fd, uint32_t *handle)
*
* @dev: a exynos device object.
* @connect: indicate whether connectoin or disconnection request.
* @ext: indicate whether edid data includes extentions data or not.
* @ext: indicate whether edid data includes extensions data or not.
* @edid: a pointer to edid data from Wireless Display device.
*
* this interface is used to request Virtual Display driver connection or
@ -354,7 +348,7 @@ exynos_prime_fd_to_handle(struct exynos_device *dev, int fd, uint32_t *handle)
*
* if true, return 0 else negative.
*/
int
drm_public int
exynos_vidi_connection(struct exynos_device *dev, uint32_t connect,
uint32_t ext, void *edid)
{
@ -374,3 +368,76 @@ exynos_vidi_connection(struct exynos_device *dev, uint32_t connect,
return 0;
}
static void
exynos_handle_vendor(int fd, struct drm_event *e, void *ctx)
{
struct drm_exynos_g2d_event *g2d;
struct exynos_event_context *ectx = ctx;
switch (e->type) {
case DRM_EXYNOS_G2D_EVENT:
if (ectx->version < 1 || ectx->g2d_event_handler == NULL)
break;
g2d = (struct drm_exynos_g2d_event *)e;
ectx->g2d_event_handler(fd, g2d->cmdlist_no, g2d->tv_sec,
g2d->tv_usec, U642VOID(g2d->user_data));
break;
default:
break;
}
}
drm_public int
exynos_handle_event(struct exynos_device *dev, struct exynos_event_context *ctx)
{
char buffer[1024];
int len, i;
struct drm_event *e;
struct drm_event_vblank *vblank;
drmEventContextPtr evctx = &ctx->base;
/* The DRM read semantics guarantees that we always get only
* complete events. */
len = read(dev->fd, buffer, sizeof buffer);
if (len == 0)
return 0;
if (len < (int)sizeof *e)
return -1;
i = 0;
while (i < len) {
e = (struct drm_event *)(buffer + i);
switch (e->type) {
case DRM_EVENT_VBLANK:
if (evctx->version < 1 ||
evctx->vblank_handler == NULL)
break;
vblank = (struct drm_event_vblank *) e;
evctx->vblank_handler(dev->fd,
vblank->sequence,
vblank->tv_sec,
vblank->tv_usec,
U642VOID (vblank->user_data));
break;
case DRM_EVENT_FLIP_COMPLETE:
if (evctx->version < 2 ||
evctx->page_flip_handler == NULL)
break;
vblank = (struct drm_event_vblank *) e;
evctx->page_flip_handler(dev->fd,
vblank->sequence,
vblank->tv_sec,
vblank->tv_usec,
U642VOID (vblank->user_data));
break;
default:
exynos_handle_vendor(dev->fd, e, evctx);
break;
}
i += e->length;
}
return 0;
}

View file

@ -64,7 +64,7 @@ struct drm_exynos_gem_info {
/**
* A structure for user connection request of virtual display.
*
* @connection: indicate whether doing connetion or not by user.
* @connection: indicate whether doing connection or not by user.
* @extensions: if this value is 1 then the vidi driver would need additional
* 128bytes edid data.
* @edid: the edid data pointer from user side.
@ -157,4 +157,16 @@ struct drm_exynos_g2d_exec {
#define DRM_IOCTL_EXYNOS_G2D_EXEC DRM_IOWR(DRM_COMMAND_BASE + \
DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
/* EXYNOS specific events */
#define DRM_EXYNOS_G2D_EVENT 0x80000000
struct drm_exynos_g2d_event {
struct drm_event base;
__u64 user_data;
__u32 tv_sec;
__u32 tv_usec;
__u32 cmdlist_no;
__u32 reserved;
};
#endif

View file

@ -31,6 +31,10 @@
#include <stdint.h>
#include "exynos_drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
struct exynos_device {
int fd;
};
@ -42,7 +46,7 @@ struct exynos_device {
* @handle: a gem handle to gem object created.
* @flags: indicate memory allocation and cache attribute types.
* @size: size to the buffer created.
* @vaddr: user space address to a gem buffer mmaped.
* @vaddr: user space address to a gem buffer mmapped.
* @name: a gem global handle from flink request.
*/
struct exynos_bo {
@ -54,6 +58,25 @@ struct exynos_bo {
uint32_t name;
};
#define EXYNOS_EVENT_CONTEXT_VERSION 1
/*
* Exynos Event Context structure.
*
* @base: base context (for core events).
* @version: version info similar to the one in 'drmEventContext'.
* @g2d_event_handler: handler for G2D events.
*/
struct exynos_event_context {
drmEventContext base;
int version;
void (*g2d_event_handler)(int fd, unsigned int cmdlist_no,
unsigned int tv_sec, unsigned int tv_usec,
void *user_data);
};
/*
* device related functions:
*/
@ -83,4 +106,15 @@ int exynos_prime_fd_to_handle(struct exynos_device *dev, int fd,
int exynos_vidi_connection(struct exynos_device *dev, uint32_t connect,
uint32_t ext, void *edid);
/*
* event handling related functions:
*/
int exynos_handle_event(struct exynos_device *dev,
struct exynos_event_context *ctx);
#if defined(__cplusplus)
}
#endif
#endif /* EXYNOS_DRMIF_H_ */

View file

@ -3,24 +3,33 @@
* Authors:
* Inki Dae <inki.dae@samsung.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <errno.h>
#include <assert.h>
#include <sys/mman.h>
#include <linux/stddef.h>
#include <xf86drm.h>
@ -41,11 +50,67 @@
#define MIN(a, b) ((a) < (b) ? (a) : (b))
#define MSG_PREFIX "exynos/fimg2d: "
#define G2D_MAX_CMD_NR 64
#define G2D_MAX_GEM_CMD_NR 64
#define G2D_MAX_CMD_LIST_NR 64
struct g2d_context {
int fd;
unsigned int major;
unsigned int minor;
struct drm_exynos_g2d_cmd cmd[G2D_MAX_CMD_NR];
struct drm_exynos_g2d_cmd cmd_buf[G2D_MAX_GEM_CMD_NR];
unsigned int cmd_nr;
unsigned int cmd_buf_nr;
unsigned int cmdlist_nr;
void *event_userdata;
};
enum g2d_base_addr_reg {
g2d_dst = 0,
g2d_src
};
enum e_g2d_dir_mode {
G2D_DIR_MODE_POSITIVE = 0,
G2D_DIR_MODE_NEGATIVE = 1
};
union g2d_direction_val {
unsigned int val[2];
struct {
/* SRC_MSK_DIRECT_REG [0:1] (source) */
enum e_g2d_dir_mode src_x_direction:1;
enum e_g2d_dir_mode src_y_direction:1;
/* SRC_MSK_DIRECT_REG [2:3] */
unsigned int reversed1:2;
/* SRC_MSK_DIRECT_REG [4:5] (mask) */
enum e_g2d_dir_mode mask_x_direction:1;
enum e_g2d_dir_mode mask_y_direction:1;
/* SRC_MSK_DIRECT_REG [6:31] */
unsigned int padding1:26;
/* DST_PAT_DIRECT_REG [0:1] (destination) */
enum e_g2d_dir_mode dst_x_direction:1;
enum e_g2d_dir_mode dst_y_direction:1;
/* DST_PAT_DIRECT_REG [2:3] */
unsigned int reversed2:2;
/* DST_PAT_DIRECT_REG [4:5] (pattern) */
enum e_g2d_dir_mode pat_x_direction:1;
enum e_g2d_dir_mode pat_y_direction:1;
/* DST_PAT_DIRECT_REG [6:31] */
unsigned int padding2:26;
} data;
};
static unsigned int g2d_get_scaling(unsigned int src, unsigned int dst)
{
/*
@ -64,6 +129,11 @@ static unsigned int g2d_get_blend_op(enum e_g2d_op op)
val.val = 0;
/*
* The switch statement is missing the default branch since
* we assume that the caller checks the blending operation
* via g2d_validate_blending_op() first.
*/
switch (op) {
case G2D_OP_CLEAR:
case G2D_OP_DISJOINT_CLEAR:
@ -91,24 +161,87 @@ static unsigned int g2d_get_blend_op(enum e_g2d_op op)
SET_BF(val, G2D_COEFF_MODE_SRC_ALPHA, 0, 0, 0,
G2D_COEFF_MODE_SRC_ALPHA, 1, 0, 0);
break;
default:
fprintf(stderr, "Not support operation(%d).\n", op);
SET_BF(val, G2D_COEFF_MODE_ONE, 0, 0, 0, G2D_COEFF_MODE_ZERO,
0, 0, 0);
break;
}
return val.val;
}
/*
* g2d_check_space - check if command buffers have enough space left.
*
* @ctx: a pointer to g2d_context structure.
* @num_cmds: number of (regular) commands.
* @num_gem_cmds: number of GEM commands.
*/
static unsigned int g2d_check_space(const struct g2d_context *ctx,
unsigned int num_cmds, unsigned int num_gem_cmds)
{
if (ctx->cmd_nr + num_cmds >= G2D_MAX_CMD_NR ||
ctx->cmd_buf_nr + num_gem_cmds >= G2D_MAX_GEM_CMD_NR)
return 1;
else
return 0;
}
/*
* g2d_validate_select_mode - validate select mode.
*
* @mode: the mode to validate
*
* Returns zero for an invalid mode and one otherwise.
*/
static int g2d_validate_select_mode(
enum e_g2d_select_mode mode)
{
switch (mode) {
case G2D_SELECT_MODE_NORMAL:
case G2D_SELECT_MODE_FGCOLOR:
case G2D_SELECT_MODE_BGCOLOR:
return 1;
}
return 0;
}
/*
* g2d_validate_blending_op - validate blending operation.
*
* @operation: the operation to validate
*
* Returns zero for an invalid mode and one otherwise.
*/
static int g2d_validate_blending_op(
enum e_g2d_op operation)
{
switch (operation) {
case G2D_OP_CLEAR:
case G2D_OP_SRC:
case G2D_OP_DST:
case G2D_OP_OVER:
case G2D_OP_INTERPOLATE:
case G2D_OP_DISJOINT_CLEAR:
case G2D_OP_DISJOINT_SRC:
case G2D_OP_DISJOINT_DST:
case G2D_OP_CONJOINT_CLEAR:
case G2D_OP_CONJOINT_SRC:
case G2D_OP_CONJOINT_DST:
return 1;
}
return 0;
}
/*
* g2d_add_cmd - set given command and value to user side command buffer.
*
* @ctx: a pointer to g2d_context structure.
* @cmd: command data.
* @value: value data.
*
* The caller has to make sure that the commands buffers have enough space
* left to hold the command. Use g2d_check_space() to ensure this.
*/
static int g2d_add_cmd(struct g2d_context *ctx, unsigned long cmd,
static void g2d_add_cmd(struct g2d_context *ctx, unsigned long cmd,
unsigned long value)
{
switch (cmd & ~(G2D_BUF_USERPTR)) {
@ -118,28 +251,20 @@ static int g2d_add_cmd(struct g2d_context *ctx, unsigned long cmd,
case DST_PLANE2_BASE_ADDR_REG:
case PAT_BASE_ADDR_REG:
case MASK_BASE_ADDR_REG:
if (ctx->cmd_buf_nr >= G2D_MAX_GEM_CMD_NR) {
fprintf(stderr, "Overflow cmd_gem size.\n");
return -EINVAL;
}
assert(ctx->cmd_buf_nr < G2D_MAX_GEM_CMD_NR);
ctx->cmd_buf[ctx->cmd_buf_nr].offset = cmd;
ctx->cmd_buf[ctx->cmd_buf_nr].data = value;
ctx->cmd_buf_nr++;
break;
default:
if (ctx->cmd_nr >= G2D_MAX_CMD_NR) {
fprintf(stderr, "Overflow cmd size.\n");
return -EINVAL;
}
assert(ctx->cmd_nr < G2D_MAX_CMD_NR);
ctx->cmd[ctx->cmd_nr].offset = cmd;
ctx->cmd[ctx->cmd_nr].data = value;
ctx->cmd_nr++;
break;
}
return 0;
}
/*
@ -163,17 +288,16 @@ static void g2d_add_base_addr(struct g2d_context *ctx, struct g2d_image *img,
}
/*
* g2d_reset - reset fimg2d hardware.
* g2d_set_direction - setup direction register (useful for overlapping blits).
*
* @ctx: a pointer to g2d_context structure.
*
* @dir: a pointer to the g2d_direction_val structure.
*/
static void g2d_reset(struct g2d_context *ctx)
static void g2d_set_direction(struct g2d_context *ctx,
const union g2d_direction_val *dir)
{
ctx->cmd_nr = 0;
ctx->cmd_buf_nr = 0;
g2d_add_cmd(ctx, SOFT_RESET_REG, 0x01);
g2d_add_cmd(ctx, SRC_MASK_DIRECT_REG, dir->val[0]);
g2d_add_cmd(ctx, DST_PAT_DIRECT_REG, dir->val[1]);
}
/*
@ -191,10 +315,10 @@ static int g2d_flush(struct g2d_context *ctx)
struct drm_exynos_g2d_set_cmdlist cmdlist = {0};
if (ctx->cmd_nr == 0 && ctx->cmd_buf_nr == 0)
return -1;
return 0;
if (ctx->cmdlist_nr >= G2D_MAX_CMD_LIST_NR) {
fprintf(stderr, "Overflow cmdlist.\n");
fprintf(stderr, MSG_PREFIX "command list overflow.\n");
return -EINVAL;
}
@ -202,15 +326,22 @@ static int g2d_flush(struct g2d_context *ctx)
cmdlist.cmd_buf = (uint64_t)(uintptr_t)&ctx->cmd_buf[0];
cmdlist.cmd_nr = ctx->cmd_nr;
cmdlist.cmd_buf_nr = ctx->cmd_buf_nr;
cmdlist.event_type = G2D_EVENT_NOT;
cmdlist.user_data = 0;
if (ctx->event_userdata) {
cmdlist.event_type = G2D_EVENT_NONSTOP;
cmdlist.user_data = (uint64_t)(uintptr_t)(ctx->event_userdata);
ctx->event_userdata = NULL;
} else {
cmdlist.event_type = G2D_EVENT_NOT;
cmdlist.user_data = 0;
}
ctx->cmd_nr = 0;
ctx->cmd_buf_nr = 0;
ret = drmIoctl(ctx->fd, DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST, &cmdlist);
if (ret < 0) {
fprintf(stderr, "failed to set cmdlist.\n");
fprintf(stderr, MSG_PREFIX "failed to set cmdlist.\n");
return ret;
}
@ -224,7 +355,7 @@ static int g2d_flush(struct g2d_context *ctx)
*
* fd: a file descriptor to an opened drm device.
*/
struct g2d_context *g2d_init(int fd)
drm_public struct g2d_context *g2d_init(int fd)
{
struct drm_exynos_g2d_get_ver ver;
struct g2d_context *ctx;
@ -232,7 +363,7 @@ struct g2d_context *g2d_init(int fd)
ctx = calloc(1, sizeof(*ctx));
if (!ctx) {
fprintf(stderr, "failed to allocate context.\n");
fprintf(stderr, MSG_PREFIX "failed to allocate context.\n");
return NULL;
}
@ -240,7 +371,7 @@ struct g2d_context *g2d_init(int fd)
ret = drmIoctl(fd, DRM_IOCTL_EXYNOS_G2D_GET_VER, &ver);
if (ret < 0) {
fprintf(stderr, "failed to get version.\n");
fprintf(stderr, MSG_PREFIX "failed to get version.\n");
free(ctx);
return NULL;
}
@ -248,21 +379,37 @@ struct g2d_context *g2d_init(int fd)
ctx->major = ver.major;
ctx->minor = ver.minor;
printf("g2d version(%d.%d).\n", ctx->major, ctx->minor);
printf(MSG_PREFIX "G2D version (%d.%d).\n", ctx->major, ctx->minor);
return ctx;
}
void g2d_fini(struct g2d_context *ctx)
drm_public void g2d_fini(struct g2d_context *ctx)
{
free(ctx);
}
/**
* g2d_config_event - setup userdata configuration for a g2d event.
* The next invocation of a g2d call (e.g. g2d_solid_fill) is
* then going to flag the command buffer as 'nonstop'.
* Completion of the command buffer execution can then be
* determined by using drmHandleEvent on the DRM fd.
* The userdata is 'consumed' in the process.
*
* @ctx: a pointer to g2d_context structure.
* @userdata: a pointer to the user data
*/
drm_public void g2d_config_event(struct g2d_context *ctx, void *userdata)
{
ctx->event_userdata = userdata;
}
/**
* g2d_exec - start the dma to process all commands summited by g2d_flush().
*
* @ctx: a pointer to g2d_context structure.
*/
int g2d_exec(struct g2d_context *ctx)
drm_public int g2d_exec(struct g2d_context *ctx)
{
struct drm_exynos_g2d_exec exec;
int ret;
@ -274,7 +421,7 @@ int g2d_exec(struct g2d_context *ctx)
ret = drmIoctl(ctx->fd, DRM_IOCTL_EXYNOS_G2D_EXEC, &exec);
if (ret < 0) {
fprintf(stderr, "failed to execute.\n");
fprintf(stderr, MSG_PREFIX "failed to execute.\n");
return ret;
}
@ -294,7 +441,7 @@ int g2d_exec(struct g2d_context *ctx)
* @w: width value to buffer filled with given color data.
* @h: height value to buffer filled with given color data.
*/
int
drm_public int
g2d_solid_fill(struct g2d_context *ctx, struct g2d_image *img,
unsigned int x, unsigned int y, unsigned int w,
unsigned int h)
@ -302,6 +449,9 @@ g2d_solid_fill(struct g2d_context *ctx, struct g2d_image *img,
union g2d_bitblt_cmd_val bitblt;
union g2d_point_val pt;
if (g2d_check_space(ctx, 7, 1))
return -ENOSPC;
g2d_add_cmd(ctx, DST_SELECT_REG, G2D_SELECT_MODE_NORMAL);
g2d_add_cmd(ctx, DST_COLOR_MODE_REG, img->color_mode);
g2d_add_base_addr(ctx, img, g2d_dst);
@ -312,15 +462,12 @@ g2d_solid_fill(struct g2d_context *ctx, struct g2d_image *img,
if (y + h > img->height)
h = img->height - y;
pt.val = 0;
pt.data.x = x;
pt.data.y = y;
g2d_add_cmd(ctx, DST_LEFT_TOP_REG, pt.val);
pt.val = 0;
pt.data.x = x + w;
pt.data.y = y + h;
g2d_add_cmd(ctx, DST_RIGHT_BOTTOM_REG, pt.val);
g2d_add_cmd(ctx, SF_COLOR_REG, img->color);
@ -347,7 +494,7 @@ g2d_solid_fill(struct g2d_context *ctx, struct g2d_image *img,
* @w: width value to source and destination buffers.
* @h: height value to source and destination buffers.
*/
int
drm_public int
g2d_copy(struct g2d_context *ctx, struct g2d_image *src,
struct g2d_image *dst, unsigned int src_x, unsigned int src_y,
unsigned int dst_x, unsigned dst_y, unsigned int w,
@ -355,17 +502,7 @@ g2d_copy(struct g2d_context *ctx, struct g2d_image *src,
{
union g2d_rop4_val rop4;
union g2d_point_val pt;
unsigned int src_w = 0, src_h = 0, dst_w = 0, dst_h = 0;
g2d_add_cmd(ctx, DST_SELECT_REG, G2D_SELECT_MODE_BGCOLOR);
g2d_add_cmd(ctx, DST_COLOR_MODE_REG, dst->color_mode);
g2d_add_base_addr(ctx, dst, g2d_dst);
g2d_add_cmd(ctx, DST_STRIDE_REG, dst->stride);
g2d_add_cmd(ctx, SRC_SELECT_REG, G2D_SELECT_MODE_NORMAL);
g2d_add_cmd(ctx, SRC_COLOR_MODE_REG, src->color_mode);
g2d_add_base_addr(ctx, src, g2d_src);
g2d_add_cmd(ctx, SRC_STRIDE_REG, src->stride);
unsigned int src_w, src_h, dst_w, dst_h;
src_w = w;
src_h = h;
@ -385,25 +522,128 @@ g2d_copy(struct g2d_context *ctx, struct g2d_image *src,
h = MIN(src_h, dst_h);
if (w <= 0 || h <= 0) {
fprintf(stderr, "invalid width or height.\n");
g2d_reset(ctx);
fprintf(stderr, MSG_PREFIX "invalid width or height.\n");
return -EINVAL;
}
pt.val = 0;
if (g2d_check_space(ctx, 11, 2))
return -ENOSPC;
g2d_add_cmd(ctx, DST_SELECT_REG, G2D_SELECT_MODE_BGCOLOR);
g2d_add_cmd(ctx, DST_COLOR_MODE_REG, dst->color_mode);
g2d_add_base_addr(ctx, dst, g2d_dst);
g2d_add_cmd(ctx, DST_STRIDE_REG, dst->stride);
g2d_add_cmd(ctx, SRC_SELECT_REG, G2D_SELECT_MODE_NORMAL);
g2d_add_cmd(ctx, SRC_COLOR_MODE_REG, src->color_mode);
g2d_add_base_addr(ctx, src, g2d_src);
g2d_add_cmd(ctx, SRC_STRIDE_REG, src->stride);
pt.data.x = src_x;
pt.data.y = src_y;
g2d_add_cmd(ctx, SRC_LEFT_TOP_REG, pt.val);
pt.data.x = src_x + w;
pt.data.y = src_y + h;
g2d_add_cmd(ctx, SRC_RIGHT_BOTTOM_REG, pt.val);
pt.data.x = dst_x;
pt.data.y = dst_y;
g2d_add_cmd(ctx, DST_LEFT_TOP_REG, pt.val);
pt.data.x = dst_x + w;
pt.data.y = dst_y + h;
g2d_add_cmd(ctx, DST_RIGHT_BOTTOM_REG, pt.val);
rop4.val = 0;
rop4.data.unmasked_rop3 = G2D_ROP3_SRC;
g2d_add_cmd(ctx, ROP4_REG, rop4.val);
return g2d_flush(ctx);
}
/**
* g2d_move - copy content inside single buffer.
* Similar to libc's memmove() this copies a rectangular
* region of the provided buffer to another location, while
* properly handling the situation where source and
* destination rectangle overlap.
*
* @ctx: a pointer to g2d_context structure.
* @img: a pointer to g2d_image structure providing
* buffer information.
* @src_x: x position of source rectangle.
* @src_y: y position of source rectangle.
* @dst_x: x position of destination rectangle.
* @dst_y: y position of destination rectangle.
* @w: width of rectangle to move.
* @h: height of rectangle to move.
*/
drm_public int
g2d_move(struct g2d_context *ctx, struct g2d_image *img,
unsigned int src_x, unsigned int src_y,
unsigned int dst_x, unsigned dst_y, unsigned int w,
unsigned int h)
{
union g2d_rop4_val rop4;
union g2d_point_val pt;
union g2d_direction_val dir;
unsigned int src_w, src_h, dst_w, dst_h;
src_w = w;
src_h = h;
if (src_x + img->width > w)
src_w = img->width - src_x;
if (src_y + img->height > h)
src_h = img->height - src_y;
dst_w = w;
dst_h = w;
if (dst_x + img->width > w)
dst_w = img->width - dst_x;
if (dst_y + img->height > h)
dst_h = img->height - dst_y;
w = MIN(src_w, dst_w);
h = MIN(src_h, dst_h);
if (w == 0 || h == 0) {
fprintf(stderr, MSG_PREFIX "invalid width or height.\n");
return -EINVAL;
}
if (g2d_check_space(ctx, 13, 2))
return -ENOSPC;
g2d_add_cmd(ctx, DST_SELECT_REG, G2D_SELECT_MODE_BGCOLOR);
g2d_add_cmd(ctx, SRC_SELECT_REG, G2D_SELECT_MODE_NORMAL);
g2d_add_cmd(ctx, DST_COLOR_MODE_REG, img->color_mode);
g2d_add_cmd(ctx, SRC_COLOR_MODE_REG, img->color_mode);
g2d_add_base_addr(ctx, img, g2d_dst);
g2d_add_base_addr(ctx, img, g2d_src);
g2d_add_cmd(ctx, DST_STRIDE_REG, img->stride);
g2d_add_cmd(ctx, SRC_STRIDE_REG, img->stride);
dir.val[0] = dir.val[1] = 0;
if (dst_x >= src_x)
dir.data.src_x_direction = dir.data.dst_x_direction = 1;
if (dst_y >= src_y)
dir.data.src_y_direction = dir.data.dst_y_direction = 1;
g2d_set_direction(ctx, &dir);
pt.data.x = src_x;
pt.data.y = src_y;
g2d_add_cmd(ctx, SRC_LEFT_TOP_REG, pt.val);
pt.val = 0;
pt.data.x = src_x + w;
pt.data.y = src_y + h;
g2d_add_cmd(ctx, SRC_RIGHT_BOTTOM_REG, pt.val);
pt.val = 0;
pt.data.x = dst_x;
pt.data.y = dst_y;
g2d_add_cmd(ctx, DST_LEFT_TOP_REG, pt.val);
pt.val = 0;
pt.data.x = dst_x + w;
pt.data.y = dst_y + h;
g2d_add_cmd(ctx, DST_RIGHT_BOTTOM_REG, pt.val);
@ -435,7 +675,7 @@ g2d_copy(struct g2d_context *ctx, struct g2d_image *src,
* @negative: indicate that it uses color negative to source and
* destination buffers.
*/
int
drm_public int
g2d_copy_with_scale(struct g2d_context *ctx, struct g2d_image *src,
struct g2d_image *dst, unsigned int src_x,
unsigned int src_y, unsigned int src_w,
@ -445,23 +685,12 @@ g2d_copy_with_scale(struct g2d_context *ctx, struct g2d_image *src,
{
union g2d_rop4_val rop4;
union g2d_point_val pt;
unsigned int scale;
unsigned int scale, repeat_pad;
unsigned int scale_x, scale_y;
g2d_add_cmd(ctx, DST_SELECT_REG, G2D_SELECT_MODE_BGCOLOR);
g2d_add_cmd(ctx, DST_COLOR_MODE_REG, dst->color_mode);
g2d_add_base_addr(ctx, dst, g2d_dst);
g2d_add_cmd(ctx, DST_STRIDE_REG, dst->stride);
g2d_add_cmd(ctx, SRC_SELECT_REG, G2D_SELECT_MODE_NORMAL);
g2d_add_cmd(ctx, SRC_COLOR_MODE_REG, src->color_mode);
g2d_add_cmd(ctx, SRC_REPEAT_MODE_REG, src->repeat_mode);
if (src->repeat_mode == G2D_REPEAT_MODE_PAD)
g2d_add_cmd(ctx, SRC_PAD_VALUE_REG, dst->color);
g2d_add_base_addr(ctx, src, g2d_src);
g2d_add_cmd(ctx, SRC_STRIDE_REG, src->stride);
/* Sanitize this parameter to facilitate space computation below. */
if (negative)
negative = 1;
if (src_w == dst_w && src_h == dst_h)
scale = 0;
@ -471,6 +700,8 @@ g2d_copy_with_scale(struct g2d_context *ctx, struct g2d_image *src,
scale_y = g2d_get_scaling(src_h, dst_h);
}
repeat_pad = src->repeat_mode == G2D_REPEAT_MODE_PAD ? 1 : 0;
if (src_x + src_w > src->width)
src_w = src->width - src_x;
if (src_y + src_h > src->height)
@ -482,42 +713,54 @@ g2d_copy_with_scale(struct g2d_context *ctx, struct g2d_image *src,
dst_h = dst->height - dst_y;
if (src_w <= 0 || src_h <= 0 || dst_w <= 0 || dst_h <= 0) {
fprintf(stderr, "invalid width or height.\n");
g2d_reset(ctx);
fprintf(stderr, MSG_PREFIX "invalid width or height.\n");
return -EINVAL;
}
if (g2d_check_space(ctx, 12 + scale * 3 + negative + repeat_pad, 2))
return -ENOSPC;
g2d_add_cmd(ctx, DST_SELECT_REG, G2D_SELECT_MODE_BGCOLOR);
g2d_add_cmd(ctx, DST_COLOR_MODE_REG, dst->color_mode);
g2d_add_base_addr(ctx, dst, g2d_dst);
g2d_add_cmd(ctx, DST_STRIDE_REG, dst->stride);
g2d_add_cmd(ctx, SRC_SELECT_REG, G2D_SELECT_MODE_NORMAL);
g2d_add_cmd(ctx, SRC_COLOR_MODE_REG, src->color_mode);
g2d_add_cmd(ctx, SRC_REPEAT_MODE_REG, src->repeat_mode);
if (repeat_pad)
g2d_add_cmd(ctx, SRC_PAD_VALUE_REG, dst->color);
g2d_add_base_addr(ctx, src, g2d_src);
g2d_add_cmd(ctx, SRC_STRIDE_REG, src->stride);
rop4.val = 0;
rop4.data.unmasked_rop3 = G2D_ROP3_SRC;
if (negative) {
g2d_add_cmd(ctx, BG_COLOR_REG, 0x00FFFFFF);
rop4.val = 0;
rop4.data.unmasked_rop3 = G2D_ROP3_SRC^G2D_ROP3_DST;
g2d_add_cmd(ctx, ROP4_REG, rop4.val);
} else {
rop4.val = 0;
rop4.data.unmasked_rop3 = G2D_ROP3_SRC;
g2d_add_cmd(ctx, ROP4_REG, rop4.val);
rop4.data.unmasked_rop3 ^= G2D_ROP3_DST;
}
g2d_add_cmd(ctx, ROP4_REG, rop4.val);
if (scale) {
g2d_add_cmd(ctx, SRC_SCALE_CTRL_REG, G2D_SCALE_MODE_BILINEAR);
g2d_add_cmd(ctx, SRC_XSCALE_REG, scale_x);
g2d_add_cmd(ctx, SRC_YSCALE_REG, scale_y);
}
pt.val = 0;
pt.data.x = src_x;
pt.data.y = src_y;
g2d_add_cmd(ctx, SRC_LEFT_TOP_REG, pt.val);
pt.val = 0;
pt.data.x = src_x + src_w;
pt.data.y = src_y + src_h;
g2d_add_cmd(ctx, SRC_RIGHT_BOTTOM_REG, pt.val);
pt.val = 0;
pt.data.x = dst_x;
pt.data.y = dst_y;
g2d_add_cmd(ctx, DST_LEFT_TOP_REG, pt.val);
pt.val = 0;
pt.data.x = dst_x + dst_w;
pt.data.y = dst_y + dst_h;
g2d_add_cmd(ctx, DST_RIGHT_BOTTOM_REG, pt.val);
@ -541,7 +784,7 @@ g2d_copy_with_scale(struct g2d_context *ctx, struct g2d_image *src,
* @h: height value to source and destination buffer.
* @op: blend operation type.
*/
int
drm_public int
g2d_blend(struct g2d_context *ctx, struct g2d_image *src,
struct g2d_image *dst, unsigned int src_x,
unsigned int src_y, unsigned int dst_x, unsigned int dst_y,
@ -550,7 +793,45 @@ g2d_blend(struct g2d_context *ctx, struct g2d_image *src,
union g2d_point_val pt;
union g2d_bitblt_cmd_val bitblt;
union g2d_blend_func_val blend;
unsigned int src_w = 0, src_h = 0, dst_w = 0, dst_h = 0;
unsigned int gem_space;
unsigned int src_w, src_h, dst_w, dst_h;
src_w = w;
src_h = h;
if (src_x + w > src->width)
src_w = src->width - src_x;
if (src_y + h > src->height)
src_h = src->height - src_y;
dst_w = w;
dst_h = h;
if (dst_x + w > dst->width)
dst_w = dst->width - dst_x;
if (dst_y + h > dst->height)
dst_h = dst->height - dst_y;
w = MIN(src_w, dst_w);
h = MIN(src_h, dst_h);
if (w <= 0 || h <= 0) {
fprintf(stderr, MSG_PREFIX "invalid width or height.\n");
return -EINVAL;
}
if (!g2d_validate_select_mode(src->select_mode)) {
fprintf(stderr , MSG_PREFIX "invalid select mode for source.\n");
return -EINVAL;
}
if (!g2d_validate_blending_op(op)) {
fprintf(stderr , MSG_PREFIX "unsupported blending operation.\n");
return -EINVAL;
}
gem_space = src->select_mode == G2D_SELECT_MODE_NORMAL ? 2 : 1;
if (g2d_check_space(ctx, 12, gem_space))
return -ENOSPC;
bitblt.val = 0;
blend.val = 0;
@ -578,32 +859,6 @@ g2d_blend(struct g2d_context *ctx, struct g2d_image *src,
case G2D_SELECT_MODE_BGCOLOR:
g2d_add_cmd(ctx, BG_COLOR_REG, src->color);
break;
default:
fprintf(stderr , "failed to set src.\n");
return -EINVAL;
}
src_w = w;
src_h = h;
if (src_x + w > src->width)
src_w = src->width - src_x;
if (src_y + h > src->height)
src_h = src->height - src_y;
dst_w = w;
dst_h = h;
if (dst_x + w > dst->width)
dst_w = dst->width - dst_x;
if (dst_y + h > dst->height)
dst_h = dst->height - dst_y;
w = MIN(src_w, dst_w);
h = MIN(src_h, dst_h);
if (w <= 0 || h <= 0) {
fprintf(stderr, "invalid width or height.\n");
g2d_reset(ctx);
return -EINVAL;
}
bitblt.data.alpha_blend_mode = G2D_ALPHA_BLEND_MODE_ENABLE;
@ -611,20 +866,16 @@ g2d_blend(struct g2d_context *ctx, struct g2d_image *src,
g2d_add_cmd(ctx, BITBLT_COMMAND_REG, bitblt.val);
g2d_add_cmd(ctx, BLEND_FUNCTION_REG, blend.val);
pt.val = 0;
pt.data.x = src_x;
pt.data.y = src_y;
g2d_add_cmd(ctx, SRC_LEFT_TOP_REG, pt.val);
pt.val = 0;
pt.data.x = src_x + w;
pt.data.y = src_y + h;
g2d_add_cmd(ctx, SRC_RIGHT_BOTTOM_REG, pt.val);
pt.val = 0;
pt.data.x = dst_x;
pt.data.y = dst_y;
g2d_add_cmd(ctx, DST_LEFT_TOP_REG, pt.val);
pt.val = 0;
pt.data.x = dst_x + w;
pt.data.y = dst_y + h;
g2d_add_cmd(ctx, DST_RIGHT_BOTTOM_REG, pt.val);
@ -650,7 +901,7 @@ g2d_blend(struct g2d_context *ctx, struct g2d_image *src,
* @dst_h: height value to destination buffer.
* @op: blend operation type.
*/
int
drm_public int
g2d_scale_and_blend(struct g2d_context *ctx, struct g2d_image *src,
struct g2d_image *dst, unsigned int src_x, unsigned int src_y,
unsigned int src_w, unsigned int src_h, unsigned int dst_x,
@ -660,50 +911,9 @@ g2d_scale_and_blend(struct g2d_context *ctx, struct g2d_image *src,
union g2d_point_val pt;
union g2d_bitblt_cmd_val bitblt;
union g2d_blend_func_val blend;
unsigned int scale;
unsigned int scale, gem_space;
unsigned int scale_x, scale_y;
bitblt.val = 0;
blend.val = 0;
if (op == G2D_OP_SRC || op == G2D_OP_CLEAR)
g2d_add_cmd(ctx, DST_SELECT_REG, G2D_SELECT_MODE_BGCOLOR);
else
g2d_add_cmd(ctx, DST_SELECT_REG, G2D_SELECT_MODE_NORMAL);
g2d_add_cmd(ctx, DST_COLOR_MODE_REG, dst->color_mode);
if (dst->buf_type == G2D_IMGBUF_USERPTR)
g2d_add_cmd(ctx, DST_BASE_ADDR_REG | G2D_BUF_USERPTR,
(unsigned long)&dst->user_ptr[0]);
else
g2d_add_cmd(ctx, DST_BASE_ADDR_REG, dst->bo[0]);
g2d_add_cmd(ctx, DST_STRIDE_REG, dst->stride);
g2d_add_cmd(ctx, SRC_SELECT_REG, src->select_mode);
g2d_add_cmd(ctx, SRC_COLOR_MODE_REG, src->color_mode);
switch (src->select_mode) {
case G2D_SELECT_MODE_NORMAL:
if (src->buf_type == G2D_IMGBUF_USERPTR)
g2d_add_cmd(ctx, SRC_BASE_ADDR_REG | G2D_BUF_USERPTR,
(unsigned long)&src->user_ptr[0]);
else
g2d_add_cmd(ctx, SRC_BASE_ADDR_REG, src->bo[0]);
g2d_add_cmd(ctx, SRC_STRIDE_REG, src->stride);
break;
case G2D_SELECT_MODE_FGCOLOR:
g2d_add_cmd(ctx, FG_COLOR_REG, src->color);
break;
case G2D_SELECT_MODE_BGCOLOR:
g2d_add_cmd(ctx, BG_COLOR_REG, src->color);
break;
default:
fprintf(stderr , "failed to set src.\n");
return -EINVAL;
}
if (src_w == dst_w && src_h == dst_h)
scale = 0;
else {
@ -723,11 +933,53 @@ g2d_scale_and_blend(struct g2d_context *ctx, struct g2d_image *src,
dst_h = dst->height - dst_y;
if (src_w <= 0 || src_h <= 0 || dst_w <= 0 || dst_h <= 0) {
fprintf(stderr, "invalid width or height.\n");
g2d_reset(ctx);
fprintf(stderr, MSG_PREFIX "invalid width or height.\n");
return -EINVAL;
}
if (!g2d_validate_select_mode(src->select_mode)) {
fprintf(stderr , MSG_PREFIX "invalid select mode for source.\n");
return -EINVAL;
}
if (!g2d_validate_blending_op(op)) {
fprintf(stderr , MSG_PREFIX "unsupported blending operation.\n");
return -EINVAL;
}
gem_space = src->select_mode == G2D_SELECT_MODE_NORMAL ? 2 : 1;
if (g2d_check_space(ctx, 12 + scale * 3, gem_space))
return -ENOSPC;
bitblt.val = 0;
blend.val = 0;
if (op == G2D_OP_SRC || op == G2D_OP_CLEAR)
g2d_add_cmd(ctx, DST_SELECT_REG, G2D_SELECT_MODE_BGCOLOR);
else
g2d_add_cmd(ctx, DST_SELECT_REG, G2D_SELECT_MODE_NORMAL);
g2d_add_cmd(ctx, DST_COLOR_MODE_REG, dst->color_mode);
g2d_add_base_addr(ctx, dst, g2d_dst);
g2d_add_cmd(ctx, DST_STRIDE_REG, dst->stride);
g2d_add_cmd(ctx, SRC_SELECT_REG, src->select_mode);
g2d_add_cmd(ctx, SRC_COLOR_MODE_REG, src->color_mode);
switch (src->select_mode) {
case G2D_SELECT_MODE_NORMAL:
g2d_add_base_addr(ctx, src, g2d_src);
g2d_add_cmd(ctx, SRC_STRIDE_REG, src->stride);
break;
case G2D_SELECT_MODE_FGCOLOR:
g2d_add_cmd(ctx, FG_COLOR_REG, src->color);
break;
case G2D_SELECT_MODE_BGCOLOR:
g2d_add_cmd(ctx, BG_COLOR_REG, src->color);
break;
}
if (scale) {
g2d_add_cmd(ctx, SRC_SCALE_CTRL_REG, G2D_SCALE_MODE_BILINEAR);
g2d_add_cmd(ctx, SRC_XSCALE_REG, scale_x);
@ -739,20 +991,16 @@ g2d_scale_and_blend(struct g2d_context *ctx, struct g2d_image *src,
g2d_add_cmd(ctx, BITBLT_COMMAND_REG, bitblt.val);
g2d_add_cmd(ctx, BLEND_FUNCTION_REG, blend.val);
pt.val = 0;
pt.data.x = src_x;
pt.data.y = src_y;
g2d_add_cmd(ctx, SRC_LEFT_TOP_REG, pt.val);
pt.val = 0;
pt.data.x = src_x + src_w;
pt.data.y = src_y + src_h;
g2d_add_cmd(ctx, SRC_RIGHT_BOTTOM_REG, pt.val);
pt.val = 0;
pt.data.x = dst_x;
pt.data.y = dst_y;
g2d_add_cmd(ctx, DST_LEFT_TOP_REG, pt.val);
pt.val = 0;
pt.data.x = dst_x + dst_w;
pt.data.y = dst_y + dst_h;
g2d_add_cmd(ctx, DST_RIGHT_BOTTOM_REG, pt.val);

View file

@ -3,19 +3,29 @@
* Authors:
* Inki Dae <inki.dae@samsung.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _FIMG2D_H_
#define _FIMG2D_H_
#define G2D_MAX_CMD_NR 64
#define G2D_MAX_GEM_CMD_NR 64
#define G2D_MAX_CMD_LIST_NR 64
#define G2D_PLANE_MAX_NR 2
enum e_g2d_color_mode {
@ -289,19 +299,11 @@ struct g2d_image {
void *mapped_ptr[G2D_PLANE_MAX_NR];
};
struct g2d_context {
int fd;
unsigned int major;
unsigned int minor;
struct drm_exynos_g2d_cmd cmd[G2D_MAX_CMD_NR];
struct drm_exynos_g2d_cmd cmd_buf[G2D_MAX_GEM_CMD_NR];
unsigned int cmd_nr;
unsigned int cmd_buf_nr;
unsigned int cmdlist_nr;
};
struct g2d_context;
struct g2d_context *g2d_init(int fd);
void g2d_fini(struct g2d_context *ctx);
void g2d_config_event(struct g2d_context *ctx, void *userdata);
int g2d_exec(struct g2d_context *ctx);
int g2d_solid_fill(struct g2d_context *ctx, struct g2d_image *img,
unsigned int x, unsigned int y, unsigned int w,
@ -310,6 +312,9 @@ int g2d_copy(struct g2d_context *ctx, struct g2d_image *src,
struct g2d_image *dst, unsigned int src_x,
unsigned int src_y, unsigned int dst_x, unsigned int dst_y,
unsigned int w, unsigned int h);
int g2d_move(struct g2d_context *ctx, struct g2d_image *img,
unsigned int src_x, unsigned int src_y, unsigned int dst_x,
unsigned dst_y, unsigned int w, unsigned int h);
int g2d_copy_with_scale(struct g2d_context *ctx, struct g2d_image *src,
struct g2d_image *dst, unsigned int src_x,
unsigned int src_y, unsigned int src_w,

View file

@ -3,11 +3,24 @@
* Authors:
* Inki Dae <inki.dae@samsung.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef _FIMG2D_REG_H_

View file

@ -5,7 +5,7 @@ includedir=@includedir@
Name: libdrm_exynos
Description: Userspace interface to exynos kernel DRM services
Version: 0.6
Version: 0.7
Libs: -L${libdir} -ldrm_exynos
Cflags: -I${includedir} -I${includedir}/libdrm -I${includedir}/exynos
Requires.private: libdrm

59
exynos/meson.build Normal file
View file

@ -0,0 +1,59 @@
# Copyright © 2017-2018 Intel Corporation
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
libdrm_exynos = library(
'drm_exynos',
[files('exynos_drm.c', 'exynos_fimg2d.c'), config_file],
c_args : libdrm_c_args,
gnu_symbol_visibility : 'hidden',
include_directories : [inc_root, inc_drm],
link_with : libdrm,
dependencies : [dep_threads],
version : '1.@0@.0'.format(patch_ver),
install : true,
)
install_headers('exynos_drmif.h', subdir : 'libdrm')
install_headers('exynos_drm.h', 'exynos_fimg2d.h', subdir : 'exynos')
ext_libdrm_exynos = declare_dependency(
link_with : [libdrm, libdrm_exynos],
include_directories : [inc_drm, include_directories('.')],
)
meson.override_dependency('libdrm_exynos', ext_libdrm_exynos)
pkg.generate(
libdrm_exynos,
name : 'libdrm_exynos',
subdirs : ['.', 'libdrm', 'exynos'],
version : '0.7',
description : 'Userspace interface to exynos kernel DRM services',
)
test(
'exynos-symbols-check',
symbols_check,
args : [
'--lib', libdrm_exynos,
'--symbols-file', files('exynos-symbols.txt'),
'--nm', prog_nm.full_path(),
],
)

View file

@ -1,18 +0,0 @@
LOCAL_PATH := $(call my-dir)
include $(CLEAR_VARS)
# Import variables LIBDRM_FREEDRENO_FILES, LIBDRM_FREEDRENO_H_FILES
include $(LOCAL_PATH)/Makefile.sources
LOCAL_MODULE := libdrm_freedreno
LOCAL_MODULE_TAGS := optional
LOCAL_SHARED_LIBRARIES := libdrm
LOCAL_SRC_FILES := $(LIBDRM_FREEDRENO_FILES)
LOCAL_EXPORT_C_INCLUDE_DIRS := $(LOCAL_PATH)
LOCAL_CFLAGS := \
-DHAVE_LIBDRM_ATOMIC_PRIMITIVES=1
include $(BUILD_SHARED_LIBRARY)

View file

@ -1,30 +0,0 @@
AUTOMAKE_OPTIONS=subdir-objects
include Makefile.sources
AM_CFLAGS = \
$(WARN_CFLAGS) \
-I$(top_srcdir) \
$(PTHREADSTUBS_CFLAGS) \
-I$(top_srcdir)/include/drm
libdrm_freedreno_la_LTLIBRARIES = libdrm_freedreno.la
libdrm_freedreno_ladir = $(libdir)
libdrm_freedreno_la_LDFLAGS = -version-number 1:0:0 -no-undefined
libdrm_freedreno_la_LIBADD = \
../libdrm.la \
@PTHREADSTUBS_LIBS@ \
@CLOCK_LIB@
libdrm_freedreno_la_SOURCES = $(LIBDRM_FREEDRENO_FILES)
if HAVE_FREEDRENO_KGSL
libdrm_freedreno_la_SOURCES += $(LIBDRM_FREEDRENO_KGSL_FILES)
endif
libdrm_freedrenocommonincludedir = ${includedir}/freedreno
libdrm_freedrenocommoninclude_HEADERS = $(LIBDRM_FREEDRENO_H_FILES)
pkgconfigdir = @pkgconfigdir@
pkgconfig_DATA = libdrm_freedreno.pc
TESTS = freedreno-symbol-check
EXTRA_DIST = Android.mk $(TESTS)

View file

@ -1,26 +0,0 @@
LIBDRM_FREEDRENO_FILES := \
freedreno_device.c \
freedreno_pipe.c \
freedreno_priv.h \
freedreno_ringbuffer.c \
freedreno_bo.c \
msm/msm_bo.c \
msm/msm_device.c \
msm/msm_drm.h \
msm/msm_pipe.c \
msm/msm_priv.h \
msm/msm_ringbuffer.c \
list.h
LIBDRM_FREEDRENO_KGSL_FILES := \
kgsl/kgsl_bo.c \
kgsl/kgsl_device.c \
kgsl/kgsl_drm.h \
kgsl/kgsl_pipe.c \
kgsl/kgsl_priv.h \
kgsl/kgsl_ringbuffer.c \
kgsl/msm_kgsl.h
LIBDRM_FREEDRENO_H_FILES := \
freedreno_drmif.h \
freedreno_ringbuffer.h

View file

@ -1,52 +0,0 @@
#!/bin/bash
# The following symbols (past the first five) are taken from the public headers.
# A list of the latter should be available Makefile.sources/LIBDRM_FREEDRENO_H_FILES
FUNCS=$(nm -D --format=bsd --defined-only ${1-.libs/libdrm_freedreno.so} | awk '{print $3}'| while read func; do
( grep -q "^$func$" || echo $func ) <<EOF
__bss_start
_edata
_end
_fini
_init
fd_bo_cpu_fini
fd_bo_cpu_prep
fd_bo_del
fd_bo_dmabuf
fd_bo_from_dmabuf
fd_bo_from_fbdev
fd_bo_from_handle
fd_bo_from_name
fd_bo_get_name
fd_bo_handle
fd_bo_map
fd_bo_new
fd_bo_ref
fd_bo_size
fd_device_del
fd_device_new
fd_device_new_dup
fd_device_ref
fd_pipe_del
fd_pipe_get_param
fd_pipe_new
fd_pipe_wait
fd_ringbuffer_del
fd_ringbuffer_emit_reloc_ring
fd_ringbuffer_flush
fd_ringbuffer_new
fd_ringbuffer_reloc
fd_ringbuffer_reset
fd_ringbuffer_set_parent
fd_ringbuffer_timestamp
fd_ringmarker_del
fd_ringmarker_dwords
fd_ringmarker_flush
fd_ringmarker_mark
fd_ringmarker_new
EOF
done)
test ! -n "$FUNCS" || echo $FUNCS
test ! -n "$FUNCS"

View file

@ -0,0 +1,45 @@
fd_bo_cpu_fini
fd_bo_cpu_prep
fd_bo_del
fd_bo_dmabuf
fd_bo_from_dmabuf
fd_bo_from_fbdev
fd_bo_from_handle
fd_bo_from_name
fd_bo_get_iova
fd_bo_get_name
fd_bo_handle
fd_bo_map
fd_bo_new
fd_bo_put_iova
fd_bo_ref
fd_bo_size
fd_device_del
fd_device_fd
fd_device_new
fd_device_new_dup
fd_device_ref
fd_device_version
fd_pipe_del
fd_pipe_get_param
fd_pipe_new
fd_pipe_new2
fd_pipe_ref
fd_pipe_wait
fd_pipe_wait_timeout
fd_ringbuffer_cmd_count
fd_ringbuffer_del
fd_ringbuffer_emit_reloc_ring_full
fd_ringbuffer_flush
fd_ringbuffer_grow
fd_ringbuffer_new
fd_ringbuffer_new_flags
fd_ringbuffer_new_object
fd_ringbuffer_ref
fd_ringbuffer_reloc
fd_ringbuffer_reloc2
fd_ringbuffer_reset
fd_ringbuffer_set_parent
fd_ringbuffer_size
fd_ringbuffer_timestamp
fd_ringbuffer_flush2

View file

@ -26,16 +26,11 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include "freedreno_drmif.h"
#include "freedreno_priv.h"
static pthread_mutex_t table_lock = PTHREAD_MUTEX_INITIALIZER;
static void bo_del(struct fd_bo *bo);
drm_private pthread_mutex_t table_lock = PTHREAD_MUTEX_INITIALIZER;
drm_private void bo_del(struct fd_bo *bo);
/* set buffer name, and add to table, call w/ table_lock held: */
static void set_name(struct fd_bo *bo, uint32_t name)
@ -52,6 +47,9 @@ static struct fd_bo * lookup_bo(void *tbl, uint32_t key)
if (!drmHashLookup(tbl, key, (void **)&bo)) {
/* found, incr refcnt and return: */
bo = fd_bo_ref(bo);
/* don't break the bucket if this bo was found in one */
list_delinit(&bo->list);
}
return bo;
}
@ -64,10 +62,7 @@ static struct fd_bo * bo_from_handle(struct fd_device *dev,
bo = dev->funcs->bo_from_handle(dev, size, handle);
if (!bo) {
struct drm_gem_close req = {
.handle = handle,
};
drmIoctl(dev->fd, DRM_IOCTL_GEM_CLOSE, &req);
drmCloseBufferHandle(dev->fd, handle);
return NULL;
}
bo->dev = fd_device_ref(dev);
@ -80,114 +75,17 @@ static struct fd_bo * bo_from_handle(struct fd_device *dev,
return bo;
}
/* Frees older cached buffers. Called under table_lock */
drm_private void fd_cleanup_bo_cache(struct fd_device *dev, time_t time)
{
int i;
if (dev->time == time)
return;
for (i = 0; i < dev->num_buckets; i++) {
struct fd_bo_bucket *bucket = &dev->cache_bucket[i];
struct fd_bo *bo;
while (!LIST_IS_EMPTY(&bucket->list)) {
bo = LIST_ENTRY(struct fd_bo, bucket->list.next, list);
/* keep things in cache for at least 1 second: */
if (time && ((time - bo->free_time) <= 1))
break;
list_del(&bo->list);
bo_del(bo);
}
}
dev->time = time;
}
static struct fd_bo_bucket * get_bucket(struct fd_device *dev, uint32_t size)
{
int i;
/* hmm, this is what intel does, but I suppose we could calculate our
* way to the correct bucket size rather than looping..
*/
for (i = 0; i < dev->num_buckets; i++) {
struct fd_bo_bucket *bucket = &dev->cache_bucket[i];
if (bucket->size >= size) {
return bucket;
}
}
return NULL;
}
static int is_idle(struct fd_bo *bo)
{
return fd_bo_cpu_prep(bo, NULL,
DRM_FREEDRENO_PREP_READ |
DRM_FREEDRENO_PREP_WRITE |
DRM_FREEDRENO_PREP_NOSYNC) == 0;
}
static struct fd_bo *find_in_bucket(struct fd_device *dev,
struct fd_bo_bucket *bucket, uint32_t flags)
static struct fd_bo *
bo_new(struct fd_device *dev, uint32_t size, uint32_t flags,
struct fd_bo_cache *cache)
{
struct fd_bo *bo = NULL;
/* TODO .. if we had an ALLOC_FOR_RENDER flag like intel, we could
* skip the busy check.. if it is only going to be a render target
* then we probably don't need to stall..
*
* NOTE that intel takes ALLOC_FOR_RENDER bo's from the list tail
* (MRU, since likely to be in GPU cache), rather than head (LRU)..
*/
pthread_mutex_lock(&table_lock);
while (!LIST_IS_EMPTY(&bucket->list)) {
bo = LIST_ENTRY(struct fd_bo, bucket->list.next, list);
if (0 /* TODO: if madvise tells us bo is gone... */) {
list_del(&bo->list);
bo_del(bo);
bo = NULL;
continue;
}
/* TODO check for compatible flags? */
if (is_idle(bo)) {
list_del(&bo->list);
break;
}
bo = NULL;
break;
}
pthread_mutex_unlock(&table_lock);
return bo;
}
struct fd_bo *
fd_bo_new(struct fd_device *dev, uint32_t size, uint32_t flags)
{
struct fd_bo *bo = NULL;
struct fd_bo_bucket *bucket;
uint32_t handle;
int ret;
size = ALIGN(size, 4096);
bucket = get_bucket(dev, size);
/* see if we can be green and recycle: */
if (bucket) {
size = bucket->size;
bo = find_in_bucket(dev, bucket, flags);
if (bo) {
atomic_set(&bo->refcnt, 1);
fd_device_ref(bo->dev);
return bo;
}
}
bo = fd_bo_cache_alloc(cache, &size, flags);
if (bo)
return bo;
ret = dev->funcs->bo_new_handle(dev, size, flags, &handle);
if (ret)
@ -195,13 +93,37 @@ fd_bo_new(struct fd_device *dev, uint32_t size, uint32_t flags)
pthread_mutex_lock(&table_lock);
bo = bo_from_handle(dev, size, handle);
bo->bo_reuse = 1;
pthread_mutex_unlock(&table_lock);
VG_BO_ALLOC(bo);
return bo;
}
struct fd_bo *
drm_public struct fd_bo *
fd_bo_new(struct fd_device *dev, uint32_t size, uint32_t flags)
{
struct fd_bo *bo = bo_new(dev, size, flags, &dev->bo_cache);
if (bo)
bo->bo_reuse = BO_CACHE;
return bo;
}
/* internal function to allocate bo's that use the ringbuffer cache
* instead of the normal bo_cache. The purpose is, because cmdstream
* bo's get vmap'd on the kernel side, and that is expensive, we want
* to re-use cmdstream bo's for cmdstream and not unrelated purposes.
*/
drm_private struct fd_bo *
fd_bo_new_ring(struct fd_device *dev, uint32_t size, uint32_t flags)
{
struct fd_bo *bo = bo_new(dev, size, flags, &dev->ring_cache);
if (bo)
bo->bo_reuse = RING_CACHE;
return bo;
}
drm_public struct fd_bo *
fd_bo_from_handle(struct fd_device *dev, uint32_t handle, uint32_t size)
{
struct fd_bo *bo = NULL;
@ -214,32 +136,47 @@ fd_bo_from_handle(struct fd_device *dev, uint32_t handle, uint32_t size)
bo = bo_from_handle(dev, size, handle);
VG_BO_ALLOC(bo);
out_unlock:
pthread_mutex_unlock(&table_lock);
return bo;
}
struct fd_bo *
drm_public struct fd_bo *
fd_bo_from_dmabuf(struct fd_device *dev, int fd)
{
struct drm_prime_handle req = {
.fd = fd,
};
int ret, size;
uint32_t handle;
struct fd_bo *bo;
ret = drmIoctl(dev->fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &req);
pthread_mutex_lock(&table_lock);
ret = drmPrimeFDToHandle(dev->fd, fd, &handle);
if (ret) {
pthread_mutex_unlock(&table_lock);
return NULL;
}
/* hmm, would be nice if we had a way to figure out the size.. */
size = 0;
bo = lookup_bo(dev->handle_table, handle);
if (bo)
goto out_unlock;
return fd_bo_from_handle(dev, req.handle, size);
/* lseek() to get bo size */
size = lseek(fd, 0, SEEK_END);
lseek(fd, 0, SEEK_CUR);
bo = bo_from_handle(dev, size, handle);
VG_BO_ALLOC(bo);
out_unlock:
pthread_mutex_unlock(&table_lock);
return bo;
}
struct fd_bo * fd_bo_from_name(struct fd_device *dev, uint32_t name)
drm_public struct fd_bo * fd_bo_from_name(struct fd_device *dev, uint32_t name)
{
struct drm_gem_open req = {
.name = name,
@ -263,8 +200,10 @@ struct fd_bo * fd_bo_from_name(struct fd_device *dev, uint32_t name)
goto out_unlock;
bo = bo_from_handle(dev, req.size, req.handle);
if (bo)
if (bo) {
set_name(bo, name);
VG_BO_ALLOC(bo);
}
out_unlock:
pthread_mutex_unlock(&table_lock);
@ -272,56 +211,47 @@ out_unlock:
return bo;
}
struct fd_bo * fd_bo_ref(struct fd_bo *bo)
drm_public uint64_t fd_bo_get_iova(struct fd_bo *bo)
{
return bo->funcs->iova(bo);
}
drm_public void fd_bo_put_iova(struct fd_bo *bo)
{
/* currently a no-op */
}
drm_public struct fd_bo * fd_bo_ref(struct fd_bo *bo)
{
atomic_inc(&bo->refcnt);
return bo;
}
void fd_bo_del(struct fd_bo *bo)
drm_public void fd_bo_del(struct fd_bo *bo)
{
struct fd_device *dev = bo->dev;
if (!atomic_dec_and_test(&bo->refcnt))
return;
if (bo->fd) {
close(bo->fd);
bo->fd = 0;
}
pthread_mutex_lock(&table_lock);
if (bo->bo_reuse) {
struct fd_bo_bucket *bucket = get_bucket(dev, bo->size);
/* see if we can be green and recycle: */
if (bucket) {
struct timespec time;
clock_gettime(CLOCK_MONOTONIC, &time);
bo->free_time = time.tv_sec;
list_addtail(&bo->list, &bucket->list);
fd_cleanup_bo_cache(dev, time.tv_sec);
/* bo's in the bucket cache don't have a ref and
* don't hold a ref to the dev:
*/
goto out;
}
}
if ((bo->bo_reuse == BO_CACHE) && (fd_bo_cache_free(&dev->bo_cache, bo) == 0))
goto out;
if ((bo->bo_reuse == RING_CACHE) && (fd_bo_cache_free(&dev->ring_cache, bo) == 0))
goto out;
bo_del(bo);
out:
fd_device_del_locked(dev);
out:
pthread_mutex_unlock(&table_lock);
}
/* Called under table_lock */
static void bo_del(struct fd_bo *bo)
drm_private void bo_del(struct fd_bo *bo)
{
VG_BO_FREE(bo);
if (bo->map)
drm_munmap(bo->map, bo->size);
@ -330,19 +260,16 @@ static void bo_del(struct fd_bo *bo)
*/
if (bo->handle) {
struct drm_gem_close req = {
.handle = bo->handle,
};
drmHashDelete(bo->dev->handle_table, bo->handle);
if (bo->name)
drmHashDelete(bo->dev->name_table, bo->name);
drmIoctl(bo->dev->fd, DRM_IOCTL_GEM_CLOSE, &req);
drmCloseBufferHandle(bo->dev->fd, bo->handle);
}
bo->funcs->destroy(bo);
}
int fd_bo_get_name(struct fd_bo *bo, uint32_t *name)
drm_public int fd_bo_get_name(struct fd_bo *bo, uint32_t *name)
{
if (!bo->name) {
struct drm_gem_flink req = {
@ -358,6 +285,7 @@ int fd_bo_get_name(struct fd_bo *bo, uint32_t *name)
pthread_mutex_lock(&table_lock);
set_name(bo, req.name);
pthread_mutex_unlock(&table_lock);
bo->bo_reuse = NO_CACHE;
}
*name = bo->name;
@ -365,36 +293,33 @@ int fd_bo_get_name(struct fd_bo *bo, uint32_t *name)
return 0;
}
uint32_t fd_bo_handle(struct fd_bo *bo)
drm_public uint32_t fd_bo_handle(struct fd_bo *bo)
{
return bo->handle;
}
int fd_bo_dmabuf(struct fd_bo *bo)
drm_public int fd_bo_dmabuf(struct fd_bo *bo)
{
if (!bo->fd) {
struct drm_prime_handle req = {
.handle = bo->handle,
.flags = DRM_CLOEXEC,
};
int ret;
int ret, prime_fd;
ret = drmIoctl(bo->dev->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &req);
if (ret) {
return ret;
}
bo->fd = req.fd;
ret = drmPrimeHandleToFD(bo->dev->fd, bo->handle, DRM_CLOEXEC,
&prime_fd);
if (ret) {
ERROR_MSG("failed to get dmabuf fd: %d", ret);
return ret;
}
return dup(bo->fd);
bo->bo_reuse = NO_CACHE;
return prime_fd;
}
uint32_t fd_bo_size(struct fd_bo *bo)
drm_public uint32_t fd_bo_size(struct fd_bo *bo)
{
return bo->size;
}
void * fd_bo_map(struct fd_bo *bo)
drm_public void * fd_bo_map(struct fd_bo *bo)
{
if (!bo->map) {
uint64_t offset;
@ -416,12 +341,19 @@ void * fd_bo_map(struct fd_bo *bo)
}
/* a bit odd to take the pipe as an arg, but it's a, umm, quirk of kgsl.. */
int fd_bo_cpu_prep(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op)
drm_public int fd_bo_cpu_prep(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op)
{
return bo->funcs->cpu_prep(bo, pipe, op);
}
void fd_bo_cpu_fini(struct fd_bo *bo)
drm_public void fd_bo_cpu_fini(struct fd_bo *bo)
{
bo->funcs->cpu_fini(bo);
}
#if !HAVE_FREEDRENO_KGSL
drm_public struct fd_bo * fd_bo_from_fbdev(struct fd_pipe *pipe, int fbfd, uint32_t size)
{
return NULL;
}
#endif

View file

@ -0,0 +1,220 @@
/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
/*
* Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Authors:
* Rob Clark <robclark@freedesktop.org>
*/
#include "freedreno_drmif.h"
#include "freedreno_priv.h"
drm_private void bo_del(struct fd_bo *bo);
drm_private extern pthread_mutex_t table_lock;
static void
add_bucket(struct fd_bo_cache *cache, int size)
{
unsigned int i = cache->num_buckets;
assert(i < ARRAY_SIZE(cache->cache_bucket));
list_inithead(&cache->cache_bucket[i].list);
cache->cache_bucket[i].size = size;
cache->num_buckets++;
}
/**
* @coarse: if true, only power-of-two bucket sizes, otherwise
* fill in for a bit smoother size curve..
*/
drm_private void
fd_bo_cache_init(struct fd_bo_cache *cache, int coarse)
{
unsigned long size, cache_max_size = 64 * 1024 * 1024;
/* OK, so power of two buckets was too wasteful of memory.
* Give 3 other sizes between each power of two, to hopefully
* cover things accurately enough. (The alternative is
* probably to just go for exact matching of sizes, and assume
* that for things like composited window resize the tiled
* width/height alignment and rounding of sizes to pages will
* get us useful cache hit rates anyway)
*/
add_bucket(cache, 4096);
add_bucket(cache, 4096 * 2);
if (!coarse)
add_bucket(cache, 4096 * 3);
/* Initialize the linked lists for BO reuse cache. */
for (size = 4 * 4096; size <= cache_max_size; size *= 2) {
add_bucket(cache, size);
if (!coarse) {
add_bucket(cache, size + size * 1 / 4);
add_bucket(cache, size + size * 2 / 4);
add_bucket(cache, size + size * 3 / 4);
}
}
}
/* Frees older cached buffers. Called under table_lock */
drm_private void
fd_bo_cache_cleanup(struct fd_bo_cache *cache, time_t time)
{
int i;
if (cache->time == time)
return;
for (i = 0; i < cache->num_buckets; i++) {
struct fd_bo_bucket *bucket = &cache->cache_bucket[i];
struct fd_bo *bo;
while (!LIST_IS_EMPTY(&bucket->list)) {
bo = LIST_ENTRY(struct fd_bo, bucket->list.next, list);
/* keep things in cache for at least 1 second: */
if (time && ((time - bo->free_time) <= 1))
break;
VG_BO_OBTAIN(bo);
list_del(&bo->list);
bo_del(bo);
}
}
cache->time = time;
}
static struct fd_bo_bucket * get_bucket(struct fd_bo_cache *cache, uint32_t size)
{
int i;
/* hmm, this is what intel does, but I suppose we could calculate our
* way to the correct bucket size rather than looping..
*/
for (i = 0; i < cache->num_buckets; i++) {
struct fd_bo_bucket *bucket = &cache->cache_bucket[i];
if (bucket->size >= size) {
return bucket;
}
}
return NULL;
}
static int is_idle(struct fd_bo *bo)
{
return fd_bo_cpu_prep(bo, NULL,
DRM_FREEDRENO_PREP_READ |
DRM_FREEDRENO_PREP_WRITE |
DRM_FREEDRENO_PREP_NOSYNC) == 0;
}
static struct fd_bo *find_in_bucket(struct fd_bo_bucket *bucket, uint32_t flags)
{
struct fd_bo *bo = NULL;
/* TODO .. if we had an ALLOC_FOR_RENDER flag like intel, we could
* skip the busy check.. if it is only going to be a render target
* then we probably don't need to stall..
*
* NOTE that intel takes ALLOC_FOR_RENDER bo's from the list tail
* (MRU, since likely to be in GPU cache), rather than head (LRU)..
*/
pthread_mutex_lock(&table_lock);
if (!LIST_IS_EMPTY(&bucket->list)) {
bo = LIST_ENTRY(struct fd_bo, bucket->list.next, list);
/* TODO check for compatible flags? */
if (is_idle(bo)) {
list_del(&bo->list);
} else {
bo = NULL;
}
}
pthread_mutex_unlock(&table_lock);
return bo;
}
/* NOTE: size is potentially rounded up to bucket size: */
drm_private struct fd_bo *
fd_bo_cache_alloc(struct fd_bo_cache *cache, uint32_t *size, uint32_t flags)
{
struct fd_bo *bo = NULL;
struct fd_bo_bucket *bucket;
*size = ALIGN(*size, 4096);
bucket = get_bucket(cache, *size);
/* see if we can be green and recycle: */
retry:
if (bucket) {
*size = bucket->size;
bo = find_in_bucket(bucket, flags);
if (bo) {
VG_BO_OBTAIN(bo);
if (bo->funcs->madvise(bo, TRUE) <= 0) {
/* we've lost the backing pages, delete and try again: */
pthread_mutex_lock(&table_lock);
bo_del(bo);
pthread_mutex_unlock(&table_lock);
goto retry;
}
atomic_set(&bo->refcnt, 1);
fd_device_ref(bo->dev);
return bo;
}
}
return NULL;
}
drm_private int
fd_bo_cache_free(struct fd_bo_cache *cache, struct fd_bo *bo)
{
struct fd_bo_bucket *bucket = get_bucket(cache, bo->size);
/* see if we can be green and recycle: */
if (bucket) {
struct timespec time;
bo->funcs->madvise(bo, FALSE);
clock_gettime(CLOCK_MONOTONIC, &time);
bo->free_time = time.tv_sec;
VG_BO_RELEASE(bo);
list_addtail(&bo->list, &bucket->list);
fd_bo_cache_cleanup(cache, time.tv_sec);
/* bo's in the bucket cache don't have a ref and
* don't hold a ref to the dev:
*/
fd_device_del_locked(bo->dev);
return 0;
}
return -1;
}

View file

@ -26,10 +26,6 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include <sys/types.h>
#include <sys/stat.h>
#include <unistd.h>
@ -42,45 +38,7 @@ static pthread_mutex_t table_lock = PTHREAD_MUTEX_INITIALIZER;
struct fd_device * kgsl_device_new(int fd);
struct fd_device * msm_device_new(int fd);
static void
add_bucket(struct fd_device *dev, int size)
{
unsigned int i = dev->num_buckets;
assert(i < ARRAY_SIZE(dev->cache_bucket));
list_inithead(&dev->cache_bucket[i].list);
dev->cache_bucket[i].size = size;
dev->num_buckets++;
}
static void
init_cache_buckets(struct fd_device *dev)
{
unsigned long size, cache_max_size = 64 * 1024 * 1024;
/* OK, so power of two buckets was too wasteful of memory.
* Give 3 other sizes between each power of two, to hopefully
* cover things accurately enough. (The alternative is
* probably to just go for exact matching of sizes, and assume
* that for things like composited window resize the tiled
* width/height alignment and rounding of sizes to pages will
* get us useful cache hit rates anyway)
*/
add_bucket(dev, 4096);
add_bucket(dev, 4096 * 2);
add_bucket(dev, 4096 * 3);
/* Initialize the linked lists for BO reuse cache. */
for (size = 4 * 4096; size <= cache_max_size; size *= 2) {
add_bucket(dev, size);
add_bucket(dev, size + size * 1 / 4);
add_bucket(dev, size + size * 2 / 4);
add_bucket(dev, size + size * 3 / 4);
}
}
struct fd_device * fd_device_new(int fd)
drm_public struct fd_device * fd_device_new(int fd)
{
struct fd_device *dev;
drmVersionPtr version;
@ -94,8 +52,16 @@ struct fd_device * fd_device_new(int fd)
if (!strcmp(version->name, "msm")) {
DEBUG_MSG("msm DRM device");
if (version->version_major != 1) {
ERROR_MSG("unsupported version: %u.%u.%u", version->version_major,
version->version_minor, version->version_patchlevel);
dev = NULL;
goto out;
}
dev = msm_device_new(fd);
#ifdef HAVE_FREEDRENO_KGSL
dev->version = version->version_minor;
#if HAVE_FREEDRENO_KGSL
} else if (!strcmp(version->name, "kgsl")) {
DEBUG_MSG("kgsl DRM device");
dev = kgsl_device_new(fd);
@ -104,6 +70,8 @@ struct fd_device * fd_device_new(int fd)
ERROR_MSG("unknown device: %s", version->name);
dev = NULL;
}
out:
drmFreeVersion(version);
if (!dev)
@ -113,7 +81,8 @@ struct fd_device * fd_device_new(int fd)
dev->fd = fd;
dev->handle_table = drmHashCreate();
dev->name_table = drmHashCreate();
init_cache_buckets(dev);
fd_bo_cache_init(&dev->bo_cache, FALSE);
fd_bo_cache_init(&dev->ring_cache, TRUE);
return dev;
}
@ -121,15 +90,18 @@ struct fd_device * fd_device_new(int fd)
/* like fd_device_new() but creates it's own private dup() of the fd
* which is close()d when the device is finalized.
*/
struct fd_device * fd_device_new_dup(int fd)
drm_public struct fd_device * fd_device_new_dup(int fd)
{
struct fd_device *dev = fd_device_new(dup(fd));
int dup_fd = dup(fd);
struct fd_device *dev = fd_device_new(dup_fd);
if (dev)
dev->closefd = 1;
else
close(dup_fd);
return dev;
}
struct fd_device * fd_device_ref(struct fd_device *dev)
drm_public struct fd_device * fd_device_ref(struct fd_device *dev)
{
atomic_inc(&dev->refcnt);
return dev;
@ -137,12 +109,13 @@ struct fd_device * fd_device_ref(struct fd_device *dev)
static void fd_device_del_impl(struct fd_device *dev)
{
fd_cleanup_bo_cache(dev, 0);
int close_fd = dev->closefd ? dev->fd : -1;
fd_bo_cache_cleanup(&dev->bo_cache, 0);
drmHashDestroy(dev->handle_table);
drmHashDestroy(dev->name_table);
if (dev->closefd)
close(dev->fd);
dev->funcs->destroy(dev);
if (close_fd >= 0)
close(close_fd);
}
drm_private void fd_device_del_locked(struct fd_device *dev)
@ -152,7 +125,7 @@ drm_private void fd_device_del_locked(struct fd_device *dev)
fd_device_del_impl(dev);
}
void fd_device_del(struct fd_device *dev)
drm_public void fd_device_del(struct fd_device *dev)
{
if (!atomic_dec_and_test(&dev->refcnt))
return;
@ -160,3 +133,13 @@ void fd_device_del(struct fd_device *dev)
fd_device_del_impl(dev);
pthread_mutex_unlock(&table_lock);
}
drm_public int fd_device_fd(struct fd_device *dev)
{
return dev->fd;
}
drm_public enum fd_version fd_device_version(struct fd_device *dev)
{
return dev->version;
}

View file

@ -32,6 +32,15 @@
#include <xf86drm.h>
#include <stdint.h>
#if defined(__GNUC__)
# define drm_deprecated __attribute__((__deprecated__))
#else
# define drm_deprecated
#endif
/* an empty marker for things that will be deprecated in the future: */
#define will_be_deprecated
struct fd_bo;
struct fd_pipe;
struct fd_device;
@ -50,6 +59,9 @@ enum fd_param_id {
FD_GMEM_SIZE,
FD_GPU_ID,
FD_CHIP_ID,
FD_MAX_FREQ,
FD_TIMESTAMP,
FD_NR_RINGS, /* # of rings == # of distinct priority levels */
};
/* bo flags: */
@ -76,16 +88,30 @@ struct fd_device * fd_device_new(int fd);
struct fd_device * fd_device_new_dup(int fd);
struct fd_device * fd_device_ref(struct fd_device *dev);
void fd_device_del(struct fd_device *dev);
int fd_device_fd(struct fd_device *dev);
enum fd_version {
FD_VERSION_MADVISE = 1, /* kernel supports madvise */
FD_VERSION_UNLIMITED_CMDS = 1, /* submits w/ >4 cmd buffers (growable ringbuffer) */
FD_VERSION_FENCE_FD = 2, /* submit command supports in/out fences */
FD_VERSION_SUBMIT_QUEUES = 3, /* submit queues and multiple priority levels */
FD_VERSION_BO_IOVA = 3, /* supports fd_bo_get/put_iova() */
};
enum fd_version fd_device_version(struct fd_device *dev);
/* pipe functions:
*/
struct fd_pipe * fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id);
struct fd_pipe * fd_pipe_new2(struct fd_device *dev, enum fd_pipe_id id, uint32_t prio);
struct fd_pipe * fd_pipe_ref(struct fd_pipe *pipe);
void fd_pipe_del(struct fd_pipe *pipe);
int fd_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param,
uint64_t *value);
int fd_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp);
/* timeout in nanosec */
int fd_pipe_wait_timeout(struct fd_pipe *pipe, uint32_t timestamp,
uint64_t timeout);
/* buffer-object functions:
@ -99,6 +125,8 @@ struct fd_bo *fd_bo_from_handle(struct fd_device *dev,
uint32_t handle, uint32_t size);
struct fd_bo * fd_bo_from_name(struct fd_device *dev, uint32_t name);
struct fd_bo * fd_bo_from_dmabuf(struct fd_device *dev, int fd);
uint64_t fd_bo_get_iova(struct fd_bo *bo);
void fd_bo_put_iova(struct fd_bo *bo);
struct fd_bo * fd_bo_ref(struct fd_bo *bo);
void fd_bo_del(struct fd_bo *bo);
int fd_bo_get_name(struct fd_bo *bo, uint32_t *name);

View file

@ -26,51 +26,77 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include "freedreno_drmif.h"
#include "freedreno_priv.h"
struct fd_pipe *
fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id)
/**
* priority of zero is highest priority, and higher numeric values are
* lower priorities
*/
drm_public struct fd_pipe *
fd_pipe_new2(struct fd_device *dev, enum fd_pipe_id id, uint32_t prio)
{
struct fd_pipe *pipe = NULL;
struct fd_pipe *pipe;
uint64_t val;
if (id > FD_PIPE_MAX) {
ERROR_MSG("invalid pipe id: %d", id);
goto fail;
return NULL;
}
pipe = dev->funcs->pipe_new(dev, id);
if ((prio != 1) && (fd_device_version(dev) < FD_VERSION_SUBMIT_QUEUES)) {
ERROR_MSG("invalid priority!");
return NULL;
}
pipe = dev->funcs->pipe_new(dev, id, prio);
if (!pipe) {
ERROR_MSG("allocation failed");
goto fail;
return NULL;
}
pipe->dev = dev;
pipe->id = id;
atomic_set(&pipe->refcnt, 1);
fd_pipe_get_param(pipe, FD_GPU_ID, &val);
pipe->gpu_id = val;
return pipe;
fail:
if (pipe)
fd_pipe_del(pipe);
return NULL;
}
void fd_pipe_del(struct fd_pipe *pipe)
drm_public struct fd_pipe *
fd_pipe_new(struct fd_device *dev, enum fd_pipe_id id)
{
return fd_pipe_new2(dev, id, 1);
}
drm_public struct fd_pipe * fd_pipe_ref(struct fd_pipe *pipe)
{
atomic_inc(&pipe->refcnt);
return pipe;
}
drm_public void fd_pipe_del(struct fd_pipe *pipe)
{
if (!atomic_dec_and_test(&pipe->refcnt))
return;
pipe->funcs->destroy(pipe);
}
int fd_pipe_get_param(struct fd_pipe *pipe,
drm_public int fd_pipe_get_param(struct fd_pipe *pipe,
enum fd_param_id param, uint64_t *value)
{
return pipe->funcs->get_param(pipe, param, value);
}
int fd_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp)
drm_public int fd_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp)
{
return pipe->funcs->wait(pipe, timestamp);
return fd_pipe_wait_timeout(pipe, timestamp, ~0);
}
drm_public int fd_pipe_wait_timeout(struct fd_pipe *pipe, uint32_t timestamp,
uint64_t timeout)
{
return pipe->funcs->wait(pipe, timestamp, timeout);
}

View file

@ -29,10 +29,6 @@
#ifndef FREEDRENO_PRIV_H_
#define FREEDRENO_PRIV_H_
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <stdlib.h>
#include <errno.h>
#include <string.h>
@ -48,18 +44,27 @@
#include "xf86drm.h"
#include "xf86atomic.h"
#include "list.h"
#include "util_double_list.h"
#include "util_math.h"
#include "freedreno_drmif.h"
#include "freedreno_ringbuffer.h"
#include "drm.h"
#ifndef TRUE
# define TRUE 1
#endif
#ifndef FALSE
# define FALSE 0
#endif
struct fd_device_funcs {
int (*bo_new_handle)(struct fd_device *dev, uint32_t size,
uint32_t flags, uint32_t *handle);
struct fd_bo * (*bo_from_handle)(struct fd_device *dev,
uint32_t size, uint32_t handle);
struct fd_pipe * (*pipe_new)(struct fd_device *dev, enum fd_pipe_id id);
struct fd_pipe * (*pipe_new)(struct fd_device *dev, enum fd_pipe_id id,
unsigned prio);
void (*destroy)(struct fd_device *dev);
};
@ -68,8 +73,15 @@ struct fd_bo_bucket {
struct list_head list;
};
struct fd_bo_cache {
struct fd_bo_bucket cache_bucket[14 * 4];
int num_buckets;
time_t time;
};
struct fd_device {
int fd;
enum fd_version version;
atomic_t refcnt;
/* tables to keep track of bo's, to avoid "evil-twin" fd_bo objects:
@ -83,46 +95,53 @@ struct fd_device {
*/
void *handle_table, *name_table;
struct fd_device_funcs *funcs;
const struct fd_device_funcs *funcs;
struct fd_bo_bucket cache_bucket[14 * 4];
int num_buckets;
time_t time;
struct fd_bo_cache bo_cache;
struct fd_bo_cache ring_cache;
int closefd; /* call close(fd) upon destruction */
/* just for valgrind: */
int bo_size;
};
drm_private void fd_cleanup_bo_cache(struct fd_device *dev, time_t time);
drm_private void fd_bo_cache_init(struct fd_bo_cache *cache, int coarse);
drm_private void fd_bo_cache_cleanup(struct fd_bo_cache *cache, time_t time);
drm_private struct fd_bo * fd_bo_cache_alloc(struct fd_bo_cache *cache,
uint32_t *size, uint32_t flags);
drm_private int fd_bo_cache_free(struct fd_bo_cache *cache, struct fd_bo *bo);
/* for where @table_lock is already held: */
drm_private void fd_device_del_locked(struct fd_device *dev);
struct fd_pipe_funcs {
struct fd_ringbuffer * (*ringbuffer_new)(struct fd_pipe *pipe, uint32_t size);
struct fd_ringbuffer * (*ringbuffer_new)(struct fd_pipe *pipe, uint32_t size,
enum fd_ringbuffer_flags flags);
int (*get_param)(struct fd_pipe *pipe, enum fd_param_id param, uint64_t *value);
int (*wait)(struct fd_pipe *pipe, uint32_t timestamp);
int (*wait)(struct fd_pipe *pipe, uint32_t timestamp, uint64_t timeout);
void (*destroy)(struct fd_pipe *pipe);
};
struct fd_pipe {
struct fd_device *dev;
enum fd_pipe_id id;
struct fd_pipe_funcs *funcs;
};
struct fd_ringmarker {
struct fd_ringbuffer *ring;
uint32_t *cur;
uint32_t gpu_id;
atomic_t refcnt;
const struct fd_pipe_funcs *funcs;
};
struct fd_ringbuffer_funcs {
void * (*hostptr)(struct fd_ringbuffer *ring);
int (*flush)(struct fd_ringbuffer *ring, uint32_t *last_start);
int (*flush)(struct fd_ringbuffer *ring, uint32_t *last_start,
int in_fence_fd, int *out_fence_fd);
void (*grow)(struct fd_ringbuffer *ring, uint32_t size);
void (*reset)(struct fd_ringbuffer *ring);
void (*emit_reloc)(struct fd_ringbuffer *ring,
const struct fd_reloc *reloc);
void (*emit_reloc_ring)(struct fd_ringbuffer *ring,
struct fd_ringmarker *target, struct fd_ringmarker *end);
uint32_t (*emit_reloc_ring)(struct fd_ringbuffer *ring,
struct fd_ringbuffer *target, uint32_t cmd_idx);
uint32_t (*cmd_count)(struct fd_ringbuffer *ring);
void (*destroy)(struct fd_ringbuffer *ring);
};
@ -130,6 +149,8 @@ struct fd_bo_funcs {
int (*offset)(struct fd_bo *bo, uint64_t *offset);
int (*cpu_prep)(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op);
void (*cpu_fini)(struct fd_bo *bo);
int (*madvise)(struct fd_bo *bo, int willneed);
uint64_t (*iova)(struct fd_bo *bo);
void (*destroy)(struct fd_bo *bo);
};
@ -138,17 +159,23 @@ struct fd_bo {
uint32_t size;
uint32_t handle;
uint32_t name;
int fd; /* dmabuf handle */
void *map;
atomic_t refcnt;
struct fd_bo_funcs *funcs;
const struct fd_bo_funcs *funcs;
enum {
NO_CACHE = 0,
BO_CACHE = 1,
RING_CACHE = 2,
} bo_reuse;
int bo_reuse;
struct list_head list; /* bucket-list entry */
time_t free_time; /* time when added to bucket-list */
};
#define ALIGN(v,a) (((v) + (a) - 1) & ~((a) - 1))
drm_private struct fd_bo *fd_bo_new_ring(struct fd_device *dev,
uint32_t size, uint32_t flags);
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
#define enable_debug 0 /* TODO make dynamic */
@ -169,4 +196,63 @@ struct fd_bo {
#define U642VOID(x) ((void *)(unsigned long)(x))
#define VOID2U64(x) ((uint64_t)(unsigned long)(x))
static inline uint32_t
offset_bytes(void *end, void *start)
{
return ((char *)end) - ((char *)start);
}
#if HAVE_VALGRIND
# include <memcheck.h>
/*
* For tracking the backing memory (if valgrind enabled, we force a mmap
* for the purposes of tracking)
*/
static inline void VG_BO_ALLOC(struct fd_bo *bo)
{
if (bo && RUNNING_ON_VALGRIND) {
VALGRIND_MALLOCLIKE_BLOCK(fd_bo_map(bo), bo->size, 0, 1);
}
}
static inline void VG_BO_FREE(struct fd_bo *bo)
{
VALGRIND_FREELIKE_BLOCK(bo->map, 0);
}
/*
* For tracking bo structs that are in the buffer-cache, so that valgrind
* doesn't attribute ownership to the first one to allocate the recycled
* bo.
*
* Note that the list_head in fd_bo is used to track the buffers in cache
* so disable error reporting on the range while they are in cache so
* valgrind doesn't squawk about list traversal.
*
*/
static inline void VG_BO_RELEASE(struct fd_bo *bo)
{
if (RUNNING_ON_VALGRIND) {
VALGRIND_DISABLE_ADDR_ERROR_REPORTING_IN_RANGE(bo, bo->dev->bo_size);
VALGRIND_MAKE_MEM_NOACCESS(bo, bo->dev->bo_size);
VALGRIND_FREELIKE_BLOCK(bo->map, 0);
}
}
static inline void VG_BO_OBTAIN(struct fd_bo *bo)
{
if (RUNNING_ON_VALGRIND) {
VALGRIND_MAKE_MEM_DEFINED(bo, bo->dev->bo_size);
VALGRIND_ENABLE_ADDR_ERROR_REPORTING_IN_RANGE(bo, bo->dev->bo_size);
VALGRIND_MALLOCLIKE_BLOCK(bo->map, bo->size, 0, 1);
}
}
#else
static inline void VG_BO_ALLOC(struct fd_bo *bo) {}
static inline void VG_BO_FREE(struct fd_bo *bo) {}
static inline void VG_BO_RELEASE(struct fd_bo *bo) {}
static inline void VG_BO_OBTAIN(struct fd_bo *bo) {}
#endif
#endif /* FREEDRENO_PRIV_H_ */

View file

@ -26,51 +26,81 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include <assert.h>
#include "freedreno_drmif.h"
#include "freedreno_priv.h"
#include "freedreno_ringbuffer.h"
struct fd_ringbuffer *
fd_ringbuffer_new(struct fd_pipe *pipe, uint32_t size)
drm_public struct fd_ringbuffer *
fd_ringbuffer_new_flags(struct fd_pipe *pipe, uint32_t size,
enum fd_ringbuffer_flags flags)
{
struct fd_ringbuffer *ring;
ring = pipe->funcs->ringbuffer_new(pipe, size);
/* we can't really support "growable" rb's in general for
* stateobj's since we need a single gpu addr (ie. can't
* do the trick of a chain of IB packets):
*/
if (flags & FD_RINGBUFFER_OBJECT)
assert(size);
ring = pipe->funcs->ringbuffer_new(pipe, size, flags);
if (!ring)
return NULL;
ring->size = size;
ring->flags = flags;
ring->pipe = pipe;
ring->start = ring->funcs->hostptr(ring);
ring->end = &(ring->start[size/4]);
ring->end = &(ring->start[ring->size/4]);
ring->cur = ring->last_start = ring->start;
return ring;
}
void fd_ringbuffer_del(struct fd_ringbuffer *ring)
drm_public struct fd_ringbuffer *
fd_ringbuffer_new(struct fd_pipe *pipe, uint32_t size)
{
return fd_ringbuffer_new_flags(pipe, size, 0);
}
drm_public struct fd_ringbuffer *
fd_ringbuffer_new_object(struct fd_pipe *pipe, uint32_t size)
{
return fd_ringbuffer_new_flags(pipe, size, FD_RINGBUFFER_OBJECT);
}
drm_public void fd_ringbuffer_del(struct fd_ringbuffer *ring)
{
if (!atomic_dec_and_test(&ring->refcnt))
return;
fd_ringbuffer_reset(ring);
ring->funcs->destroy(ring);
}
drm_public struct fd_ringbuffer *
fd_ringbuffer_ref(struct fd_ringbuffer *ring)
{
STATIC_ASSERT(sizeof(ring->refcnt) <= sizeof(ring->__pad));
atomic_inc(&ring->refcnt);
return ring;
}
/* ringbuffers which are IB targets should set the toplevel rb (ie.
* the IB source) as it's parent before emitting reloc's, to ensure
* the bookkeeping works out properly.
*/
void fd_ringbuffer_set_parent(struct fd_ringbuffer *ring,
drm_public void fd_ringbuffer_set_parent(struct fd_ringbuffer *ring,
struct fd_ringbuffer *parent)
{
/* state objects should not be parented! */
assert(!(ring->flags & FD_RINGBUFFER_OBJECT));
ring->parent = parent;
}
void fd_ringbuffer_reset(struct fd_ringbuffer *ring)
drm_public void fd_ringbuffer_reset(struct fd_ringbuffer *ring)
{
uint32_t *start = ring->start;
if (ring->pipe->id == FD_PIPE_2D)
@ -80,67 +110,73 @@ void fd_ringbuffer_reset(struct fd_ringbuffer *ring)
ring->funcs->reset(ring);
}
/* maybe get rid of this and use fd_ringmarker_flush() from DDX too? */
int fd_ringbuffer_flush(struct fd_ringbuffer *ring)
drm_public int fd_ringbuffer_flush(struct fd_ringbuffer *ring)
{
return ring->funcs->flush(ring, ring->last_start);
return ring->funcs->flush(ring, ring->last_start, -1, NULL);
}
uint32_t fd_ringbuffer_timestamp(struct fd_ringbuffer *ring)
drm_public int fd_ringbuffer_flush2(struct fd_ringbuffer *ring, int in_fence_fd,
int *out_fence_fd)
{
return ring->funcs->flush(ring, ring->last_start, in_fence_fd, out_fence_fd);
}
drm_public void fd_ringbuffer_grow(struct fd_ringbuffer *ring, uint32_t ndwords)
{
assert(ring->funcs->grow); /* unsupported on kgsl */
/* there is an upper bound on IB size, which appears to be 0x100000 */
if (ring->size < 0x100000)
ring->size *= 2;
ring->funcs->grow(ring, ring->size);
ring->start = ring->funcs->hostptr(ring);
ring->end = &(ring->start[ring->size/4]);
ring->cur = ring->last_start = ring->start;
}
drm_public uint32_t fd_ringbuffer_timestamp(struct fd_ringbuffer *ring)
{
return ring->last_timestamp;
}
void fd_ringbuffer_reloc(struct fd_ringbuffer *ring,
drm_public void fd_ringbuffer_reloc(struct fd_ringbuffer *ring,
const struct fd_reloc *reloc)
{
assert(ring->pipe->gpu_id < 500);
ring->funcs->emit_reloc(ring, reloc);
}
drm_public void fd_ringbuffer_reloc2(struct fd_ringbuffer *ring,
const struct fd_reloc *reloc)
{
ring->funcs->emit_reloc(ring, reloc);
}
void
fd_ringbuffer_emit_reloc_ring(struct fd_ringbuffer *ring,
struct fd_ringmarker *target,
struct fd_ringmarker *end)
drm_public uint32_t fd_ringbuffer_cmd_count(struct fd_ringbuffer *ring)
{
assert(target->ring == end->ring);
ring->funcs->emit_reloc_ring(ring, target, end);
if (!ring->funcs->cmd_count)
return 1;
return ring->funcs->cmd_count(ring);
}
struct fd_ringmarker * fd_ringmarker_new(struct fd_ringbuffer *ring)
drm_public uint32_t
fd_ringbuffer_emit_reloc_ring_full(struct fd_ringbuffer *ring,
struct fd_ringbuffer *target, uint32_t cmd_idx)
{
struct fd_ringmarker *marker = NULL;
marker = calloc(1, sizeof(*marker));
if (!marker) {
ERROR_MSG("allocation failed");
return NULL;
}
marker->ring = ring;
fd_ringmarker_mark(marker);
return marker;
return ring->funcs->emit_reloc_ring(ring, target, cmd_idx);
}
void fd_ringmarker_del(struct fd_ringmarker *marker)
drm_public uint32_t
fd_ringbuffer_size(struct fd_ringbuffer *ring)
{
free(marker);
/* only really needed for stateobj ringbuffers, and won't really
* do what you expect for growable rb's.. so lets just restrict
* this to stateobj's for now:
*/
assert(ring->flags & FD_RINGBUFFER_OBJECT);
return offset_bytes(ring->cur, ring->start);
}
void fd_ringmarker_mark(struct fd_ringmarker *marker)
{
marker->cur = marker->ring->cur;
}
uint32_t fd_ringmarker_dwords(struct fd_ringmarker *start,
struct fd_ringmarker *end)
{
return end->cur - start->cur;
}
int fd_ringmarker_flush(struct fd_ringmarker *marker)
{
struct fd_ringbuffer *ring = marker->ring;
return ring->funcs->flush(ring, marker->cur);
}

View file

@ -33,29 +33,84 @@
/* the ringbuffer object is not opaque so that OUT_RING() type stuff
* can be inlined. Note that users should not make assumptions about
* the size of this struct.. more stuff will be added when we eventually
* have a kernel driver that can deal w/ reloc's..
* the size of this struct.
*/
struct fd_ringbuffer_funcs;
struct fd_ringmarker;
enum fd_ringbuffer_flags {
/* Ringbuffer is a "state object", which is potentially reused
* many times, rather than being used in one-shot mode linked
* to a parent ringbuffer.
*/
FD_RINGBUFFER_OBJECT = 0x1,
/* Hint that the stateobj will be used for streaming state
* that is used once or a few times and then discarded.
*
* For sub-allocation, non streaming stateobj's should be
* sub-allocated from a page size buffer, so one long lived
* state obj doesn't prevent other pages from being freed.
* (Ie. it would be no worse than allocating a page sized
* bo for each small non-streaming stateobj).
*
* But streaming stateobj's could be sub-allocated from a
* larger buffer to reduce the alloc/del overhead.
*/
FD_RINGBUFFER_STREAMING = 0x2,
};
struct fd_ringbuffer {
int size;
uint32_t *cur, *end, *start, *last_start;
struct fd_pipe *pipe;
struct fd_ringbuffer_funcs *funcs;
const struct fd_ringbuffer_funcs *funcs;
uint32_t last_timestamp;
struct fd_ringbuffer *parent;
/* for users of fd_ringbuffer to store their own private per-
* ringbuffer data
*/
void *user;
enum fd_ringbuffer_flags flags;
/* This is a bit gross, but we can't use atomic_t in exported
* headers. OTOH, we don't need the refcnt to be publicly
* visible. The only reason that this struct is exported is
* because fd_ringbuffer_emit needs to be something that can
* be inlined for performance reasons.
*/
union {
#ifdef HAS_ATOMIC_OPS
atomic_t refcnt;
#endif
uint64_t __pad;
};
};
struct fd_ringbuffer * fd_ringbuffer_new(struct fd_pipe *pipe,
uint32_t size);
will_be_deprecated
struct fd_ringbuffer * fd_ringbuffer_new_object(struct fd_pipe *pipe,
uint32_t size);
struct fd_ringbuffer * fd_ringbuffer_new_flags(struct fd_pipe *pipe,
uint32_t size, enum fd_ringbuffer_flags flags);
struct fd_ringbuffer *fd_ringbuffer_ref(struct fd_ringbuffer *ring);
void fd_ringbuffer_del(struct fd_ringbuffer *ring);
void fd_ringbuffer_set_parent(struct fd_ringbuffer *ring,
struct fd_ringbuffer *parent);
will_be_deprecated
void fd_ringbuffer_reset(struct fd_ringbuffer *ring);
int fd_ringbuffer_flush(struct fd_ringbuffer *ring);
/* in_fence_fd: -1 for no in-fence, else fence fd
* out_fence_fd: NULL for no output-fence requested, else ptr to return out-fence
*/
int fd_ringbuffer_flush2(struct fd_ringbuffer *ring, int in_fence_fd,
int *out_fence_fd);
void fd_ringbuffer_grow(struct fd_ringbuffer *ring, uint32_t ndwords);
uint32_t fd_ringbuffer_timestamp(struct fd_ringbuffer *ring);
static inline void fd_ringbuffer_emit(struct fd_ringbuffer *ring,
@ -72,17 +127,16 @@ struct fd_reloc {
uint32_t offset;
uint32_t or;
int32_t shift;
uint32_t orhi; /* used for a5xx+ */
};
void fd_ringbuffer_reloc(struct fd_ringbuffer *ring, const struct fd_reloc *reloc);
void fd_ringbuffer_emit_reloc_ring(struct fd_ringbuffer *ring,
struct fd_ringmarker *target, struct fd_ringmarker *end);
/* NOTE: relocs are 2 dwords on a5xx+ */
struct fd_ringmarker * fd_ringmarker_new(struct fd_ringbuffer *ring);
void fd_ringmarker_del(struct fd_ringmarker *marker);
void fd_ringmarker_mark(struct fd_ringmarker *marker);
uint32_t fd_ringmarker_dwords(struct fd_ringmarker *start,
struct fd_ringmarker *end);
int fd_ringmarker_flush(struct fd_ringmarker *marker);
void fd_ringbuffer_reloc2(struct fd_ringbuffer *ring, const struct fd_reloc *reloc);
will_be_deprecated void fd_ringbuffer_reloc(struct fd_ringbuffer *ring, const struct fd_reloc *reloc);
uint32_t fd_ringbuffer_cmd_count(struct fd_ringbuffer *ring);
uint32_t fd_ringbuffer_emit_reloc_ring_full(struct fd_ringbuffer *ring,
struct fd_ringbuffer *target, uint32_t cmd_idx);
uint32_t fd_ringbuffer_size(struct fd_ringbuffer *ring);
#endif /* FREEDRENO_RINGBUFFER_H_ */

View file

@ -1,3 +1,13 @@
This is a historical description of what is now the kgsl backend
in libdrm freedreno (before the upstream drm/msm driver). Note
that the kgsl backend requires the "kgsl-drm" shim driver, which
usually is in disrepair (QCOM does not build it for android), and
due to random differences between different downstream android
kernel branches it may or may not work. So YMMV.
Original README:
----------------
Note that current msm kernel driver is a bit strange. It provides a
DRM interface for GEM, which is basically sufficient to have DRI2
working. But it does not provide KMS. And interface to 2d and 3d

View file

@ -26,14 +26,8 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include "kgsl_priv.h"
#include <linux/fb.h>
static int set_memtype(struct fd_device *dev, uint32_t handle, uint32_t flags)
{
struct drm_kgsl_gem_memtype req = {
@ -116,6 +110,11 @@ static void kgsl_bo_cpu_fini(struct fd_bo *bo)
{
}
static int kgsl_bo_madvise(struct fd_bo *bo, int willneed)
{
return willneed; /* not supported by kgsl */
}
static void kgsl_bo_destroy(struct fd_bo *bo)
{
struct kgsl_bo *kgsl_bo = to_kgsl_bo(bo);
@ -123,10 +122,11 @@ static void kgsl_bo_destroy(struct fd_bo *bo)
}
static struct fd_bo_funcs funcs = {
static const struct fd_bo_funcs funcs = {
.offset = kgsl_bo_offset,
.cpu_prep = kgsl_bo_cpu_prep,
.cpu_fini = kgsl_bo_cpu_fini,
.madvise = kgsl_bo_madvise,
.destroy = kgsl_bo_destroy,
};
@ -175,7 +175,7 @@ drm_private struct fd_bo * kgsl_bo_from_handle(struct fd_device *dev,
return bo;
}
struct fd_bo *
drm_public struct fd_bo *
fd_bo_from_fbdev(struct fd_pipe *pipe, int fbfd, uint32_t size)
{
struct fd_bo *bo;

View file

@ -26,10 +26,6 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include <sys/types.h>
#include <sys/stat.h>
#include <unistd.h>
@ -42,7 +38,7 @@ static void kgsl_device_destroy(struct fd_device *dev)
free(kgsl_dev);
}
static struct fd_device_funcs funcs = {
static const struct fd_device_funcs funcs = {
.bo_new_handle = kgsl_bo_new_handle,
.bo_from_handle = kgsl_bo_from_handle,
.pipe_new = kgsl_pipe_new,
@ -61,5 +57,7 @@ drm_private struct fd_device * kgsl_device_new(int fd)
dev = &kgsl_dev->base;
dev->funcs = &funcs;
dev->bo_size = sizeof(struct kgsl_bo);
return dev;
}

View file

@ -81,7 +81,7 @@ struct drm_kgsl_gem_create_fd)
/* Memory types - these define the source and caching policies
of the GEM memory chunk */
/* Legacy definitions left for compatability */
/* Legacy definitions left for compatibility */
#define DRM_KGSL_GEM_TYPE_EBI 0
#define DRM_KGSL_GEM_TYPE_SMI 1

View file

@ -26,10 +26,6 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include "kgsl_priv.h"
@ -50,13 +46,19 @@ static int kgsl_pipe_get_param(struct fd_pipe *pipe,
case FD_CHIP_ID:
*value = kgsl_pipe->devinfo.chip_id;
return 0;
case FD_MAX_FREQ:
case FD_TIMESTAMP:
case FD_NR_RINGS:
/* unsupported on kgsl */
return -1;
default:
ERROR_MSG("invalid param id: %d", param);
return -1;
}
}
static int kgsl_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp)
static int kgsl_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp,
uint64_t timeout)
{
struct kgsl_pipe *kgsl_pipe = to_kgsl_pipe(pipe);
struct kgsl_device_waittimestamp req = {
@ -101,13 +103,13 @@ static void kgsl_pipe_destroy(struct fd_pipe *pipe)
if (kgsl_pipe->drawctxt_id)
ioctl(kgsl_pipe->fd, IOCTL_KGSL_DRAWCTXT_DESTROY, &req);
if (kgsl_pipe->fd)
if (kgsl_pipe->fd >= 0)
close(kgsl_pipe->fd);
free(kgsl_pipe);
}
static struct fd_pipe_funcs funcs = {
static const struct fd_pipe_funcs funcs = {
.ringbuffer_new = kgsl_ringbuffer_new,
.get_param = kgsl_pipe_get_param,
.wait = kgsl_pipe_wait,
@ -205,7 +207,7 @@ static int getprop(int fd, enum kgsl_property_type type,
drm_private struct fd_pipe * kgsl_pipe_new(struct fd_device *dev,
enum fd_pipe_id id)
enum fd_pipe_id id, uint32_t prio)
{
static const char *paths[] = {
[FD_PIPE_3D] = "/dev/kgsl-3d0",
@ -250,6 +252,11 @@ drm_private struct fd_pipe * kgsl_pipe_new(struct fd_device *dev,
GETPROP(fd, VERSION, kgsl_pipe->version);
GETPROP(fd, DEVICE_INFO, kgsl_pipe->devinfo);
if (kgsl_pipe->devinfo.gpu_id >= 500) {
ERROR_MSG("64b unsupported with kgsl");
goto fail;
}
INFO_MSG("Pipe Info:");
INFO_MSG(" Device: %s", paths[id]);
INFO_MSG(" Chip-id: %d.%d.%d.%d",

View file

@ -103,10 +103,10 @@ drm_private void kgsl_pipe_post_submit(struct kgsl_pipe *pipe,
drm_private void kgsl_pipe_process_pending(struct kgsl_pipe *pipe,
uint32_t timestamp);
drm_private struct fd_pipe * kgsl_pipe_new(struct fd_device *dev,
enum fd_pipe_id id);
enum fd_pipe_id id, uint32_t prio);
drm_private struct fd_ringbuffer * kgsl_ringbuffer_new(struct fd_pipe *pipe,
uint32_t size);
uint32_t size, enum fd_ringbuffer_flags flags);
drm_private int kgsl_bo_new_handle(struct fd_device *dev,
uint32_t size, uint32_t flags, uint32_t *handle);

View file

@ -26,12 +26,9 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include <assert.h>
#include "xf86atomic.h"
#include "freedreno_ringbuffer.h"
#include "kgsl_priv.h"
@ -113,7 +110,8 @@ static void * kgsl_ringbuffer_hostptr(struct fd_ringbuffer *ring)
return kgsl_ring->bo->hostptr;
}
static int kgsl_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start)
static int kgsl_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start,
int in_fence_fd, int *out_fence_fd)
{
struct kgsl_ringbuffer *kgsl_ring = to_kgsl_ringbuffer(ring);
struct kgsl_pipe *kgsl_pipe = to_kgsl_pipe(ring->pipe);
@ -131,6 +129,9 @@ static int kgsl_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_star
};
int ret;
assert(in_fence_fd == -1);
assert(out_fence_fd == NULL);
kgsl_pipe_pre_submit(kgsl_pipe);
/* z180_cmdstream_issueibcmds() is made of fail: */
@ -142,7 +143,7 @@ static int kgsl_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_star
ibdesc.gpuaddr = kgsl_ring->bo->gpuaddr;
ibdesc.hostptr = kgsl_ring->bo->hostptr;
ibdesc.sizedwords = 0x145;
req.timestamp = (uint32_t)kgsl_ring->bo->hostptr;
req.timestamp = (uintptr_t)kgsl_ring->bo->hostptr;
}
do {
@ -173,12 +174,13 @@ static void kgsl_ringbuffer_emit_reloc(struct fd_ringbuffer *ring,
kgsl_pipe_add_submit(to_kgsl_pipe(ring->pipe), kgsl_bo);
}
static void kgsl_ringbuffer_emit_reloc_ring(struct fd_ringbuffer *ring,
struct fd_ringmarker *target, struct fd_ringmarker *end)
static uint32_t kgsl_ringbuffer_emit_reloc_ring(struct fd_ringbuffer *ring,
struct fd_ringbuffer *target, uint32_t cmd_idx)
{
struct kgsl_ringbuffer *target_ring = to_kgsl_ringbuffer(target->ring);
(*ring->cur++) = target_ring->bo->gpuaddr +
(uint8_t *)target->cur - (uint8_t *)target->ring->start;
struct kgsl_ringbuffer *target_ring = to_kgsl_ringbuffer(target);
assert(cmd_idx == 0);
(*ring->cur++) = target_ring->bo->gpuaddr;
return offset_bytes(target->cur, target->start);
}
static void kgsl_ringbuffer_destroy(struct fd_ringbuffer *ring)
@ -191,7 +193,7 @@ static void kgsl_ringbuffer_destroy(struct fd_ringbuffer *ring)
free(kgsl_ring);
}
static struct fd_ringbuffer_funcs funcs = {
static const struct fd_ringbuffer_funcs funcs = {
.hostptr = kgsl_ringbuffer_hostptr,
.flush = kgsl_ringbuffer_flush,
.emit_reloc = kgsl_ringbuffer_emit_reloc,
@ -200,11 +202,13 @@ static struct fd_ringbuffer_funcs funcs = {
};
drm_private struct fd_ringbuffer * kgsl_ringbuffer_new(struct fd_pipe *pipe,
uint32_t size)
uint32_t size, enum fd_ringbuffer_flags flags)
{
struct kgsl_ringbuffer *kgsl_ring;
struct fd_ringbuffer *ring = NULL;
assert(!flags);
kgsl_ring = calloc(1, sizeof(*kgsl_ring));
if (!kgsl_ring) {
ERROR_MSG("allocation failed");
@ -212,7 +216,10 @@ drm_private struct fd_ringbuffer * kgsl_ringbuffer_new(struct fd_pipe *pipe,
}
ring = &kgsl_ring->base;
atomic_set(&ring->refcnt, 1);
ring->funcs = &funcs;
ring->size = size;
kgsl_ring->bo = kgsl_rb_bo_new(to_kgsl_pipe(pipe), size);
if (!kgsl_ring->bo) {

View file

@ -31,7 +31,7 @@
#define KGSL_FLAGS_SOFT_RESET 0x00000100
#define KGSL_FLAGS_PER_CONTEXT_TIMESTAMPS 0x00000200
/* Clock flags to show which clocks should be controled by a given platform */
/* Clock flags to show which clocks should be controlled by a given platform */
#define KGSL_CLK_SRC 0x00000001
#define KGSL_CLK_CORE 0x00000002
#define KGSL_CLK_IFACE 0x00000004
@ -295,7 +295,7 @@ struct kgsl_cmdstream_freememontimestamp {
/* Previous versions of this header had incorrectly defined
IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP as a read-only ioctl instead
of a write only ioctl. To ensure binary compatability, the following
of a write only ioctl. To ensure binary compatibility, the following
#define will be used to intercept the incorrect ioctl
*/

80
freedreno/meson.build Normal file
View file

@ -0,0 +1,80 @@
# Copyright © 2017-2018 Intel Corporation
# Permission is hereby granted, free of charge, to any person obtaining a copy
# of this software and associated documentation files (the "Software"), to deal
# in the Software without restriction, including without limitation the rights
# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of the Software, and to permit persons to whom the Software is
# furnished to do so, subject to the following conditions:
# The above copyright notice and this permission notice shall be included in
# all copies or substantial portions of the Software.
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
files_freedreno = files(
'freedreno_device.c',
'freedreno_pipe.c',
'freedreno_ringbuffer.c',
'freedreno_bo.c',
'freedreno_bo_cache.c',
'msm/msm_bo.c',
'msm/msm_device.c',
'msm/msm_pipe.c',
'msm/msm_ringbuffer.c',
)
if with_freedreno_kgsl
files_freedreno += files(
'kgsl/kgsl_bo.c',
'kgsl/kgsl_device.c',
'kgsl/kgsl_pipe.c',
'kgsl/kgsl_ringbuffer.c',
)
endif
libdrm_freedreno = library(
'drm_freedreno',
[files_freedreno, config_file],
c_args : libdrm_c_args,
include_directories : [inc_root, inc_drm],
dependencies : [dep_valgrind, dep_threads, dep_rt, dep_atomic_ops],
link_with : libdrm,
version : '1.@0@.0'.format(patch_ver),
install : true,
)
ext_libdrm_freedreno = declare_dependency(
link_with : [libdrm, libdrm_freedreno],
include_directories : [inc_drm, include_directories('.')],
)
meson.override_dependency('libdrm_freedreno', ext_libdrm_freedreno)
install_headers(
'freedreno_drmif.h', 'freedreno_ringbuffer.h',
subdir : 'freedreno'
)
pkg.generate(
libdrm_freedreno,
name : 'libdrm_freedreno',
subdirs : ['.', 'libdrm', 'freedreno'],
description : 'Userspace interface to freedreno kernel DRM services',
)
test(
'freedreno-symbols-check',
symbols_check,
args : [
'--lib', libdrm_freedreno,
'--symbols-file', files('freedreno-symbols.txt'),
'--nm', prog_nm.full_path(),
],
)

View file

@ -26,10 +26,6 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include "msm_priv.h"
static int bo_allocate(struct msm_bo *msm_bo)
@ -75,7 +71,7 @@ static int msm_bo_cpu_prep(struct fd_bo *bo, struct fd_pipe *pipe, uint32_t op)
.op = op,
};
get_abs_timeout(&req.timeout, 5000);
get_abs_timeout(&req.timeout, 5000000000);
return drmCommandWrite(bo->dev->fd, DRM_MSM_GEM_CPU_PREP, &req, sizeof(req));
}
@ -89,6 +85,37 @@ static void msm_bo_cpu_fini(struct fd_bo *bo)
drmCommandWrite(bo->dev->fd, DRM_MSM_GEM_CPU_FINI, &req, sizeof(req));
}
static int msm_bo_madvise(struct fd_bo *bo, int willneed)
{
struct drm_msm_gem_madvise req = {
.handle = bo->handle,
.madv = willneed ? MSM_MADV_WILLNEED : MSM_MADV_DONTNEED,
};
int ret;
/* older kernels do not support this: */
if (bo->dev->version < FD_VERSION_MADVISE)
return willneed;
ret = drmCommandWriteRead(bo->dev->fd, DRM_MSM_GEM_MADVISE, &req, sizeof(req));
if (ret)
return ret;
return req.retained;
}
static uint64_t msm_bo_iova(struct fd_bo *bo)
{
struct drm_msm_gem_info req = {
.handle = bo->handle,
.flags = MSM_INFO_IOVA,
};
drmCommandWriteRead(bo->dev->fd, DRM_MSM_GEM_INFO, &req, sizeof(req));
return req.offset;
}
static void msm_bo_destroy(struct fd_bo *bo)
{
struct msm_bo *msm_bo = to_msm_bo(bo);
@ -96,10 +123,12 @@ static void msm_bo_destroy(struct fd_bo *bo)
}
static struct fd_bo_funcs funcs = {
static const struct fd_bo_funcs funcs = {
.offset = msm_bo_offset,
.cpu_prep = msm_bo_cpu_prep,
.cpu_fini = msm_bo_cpu_fini,
.madvise = msm_bo_madvise,
.iova = msm_bo_iova,
.destroy = msm_bo_destroy,
};
@ -129,7 +158,6 @@ drm_private struct fd_bo * msm_bo_from_handle(struct fd_device *dev,
{
struct msm_bo *msm_bo;
struct fd_bo *bo;
unsigned i;
msm_bo = calloc(1, sizeof(*msm_bo));
if (!msm_bo)
@ -138,8 +166,5 @@ drm_private struct fd_bo * msm_bo_from_handle(struct fd_device *dev,
bo = &msm_bo->base;
bo->funcs = &funcs;
for (i = 0; i < ARRAY_SIZE(msm_bo->list); i++)
list_inithead(&msm_bo->list[i]);
return bo;
}

View file

@ -26,10 +26,6 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include <sys/types.h>
#include <sys/stat.h>
#include <unistd.h>
@ -42,7 +38,7 @@ static void msm_device_destroy(struct fd_device *dev)
free(msm_dev);
}
static struct fd_device_funcs funcs = {
static const struct fd_device_funcs funcs = {
.bo_new_handle = msm_bo_new_handle,
.bo_from_handle = msm_bo_from_handle,
.pipe_new = msm_pipe_new,
@ -61,5 +57,7 @@ drm_private struct fd_device * msm_device_new(int fd)
dev = &msm_dev->base;
dev->funcs = &funcs;
dev->bo_size = sizeof(struct msm_bo);
return dev;
}

View file

@ -26,12 +26,27 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include "msm_priv.h"
static int query_param(struct fd_pipe *pipe, uint32_t param,
uint64_t *value)
{
struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
struct drm_msm_param req = {
.pipe = msm_pipe->pipe,
.param = param,
};
int ret;
ret = drmCommandWriteRead(pipe->dev->fd, DRM_MSM_GET_PARAM,
&req, sizeof(req));
if (ret)
return ret;
*value = req.value;
return 0;
}
static int msm_pipe_get_param(struct fd_pipe *pipe,
enum fd_param_id param, uint64_t *value)
@ -48,21 +63,29 @@ static int msm_pipe_get_param(struct fd_pipe *pipe,
case FD_CHIP_ID:
*value = msm_pipe->chip_id;
return 0;
case FD_MAX_FREQ:
return query_param(pipe, MSM_PARAM_MAX_FREQ, value);
case FD_TIMESTAMP:
return query_param(pipe, MSM_PARAM_TIMESTAMP, value);
case FD_NR_RINGS:
return query_param(pipe, MSM_PARAM_NR_RINGS, value);
default:
ERROR_MSG("invalid param id: %d", param);
return -1;
}
}
static int msm_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp)
static int msm_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp,
uint64_t timeout)
{
struct fd_device *dev = pipe->dev;
struct drm_msm_wait_fence req = {
.fence = timestamp,
.queueid = to_msm_pipe(pipe)->queue_id,
};
int ret;
get_abs_timeout(&req.timeout, 5000);
get_abs_timeout(&req.timeout, timeout);
ret = drmCommandWrite(dev->fd, DRM_MSM_WAIT_FENCE, &req, sizeof(req));
if (ret) {
@ -73,38 +96,77 @@ static int msm_pipe_wait(struct fd_pipe *pipe, uint32_t timestamp)
return 0;
}
static int open_submitqueue(struct fd_pipe *pipe, uint32_t prio)
{
struct drm_msm_submitqueue req = {
.flags = 0,
.prio = prio,
};
uint64_t nr_rings = 1;
int ret;
if (fd_device_version(pipe->dev) < FD_VERSION_SUBMIT_QUEUES) {
to_msm_pipe(pipe)->queue_id = 0;
return 0;
}
msm_pipe_get_param(pipe, FD_NR_RINGS, &nr_rings);
req.prio = MIN2(req.prio, MAX2(nr_rings, 1) - 1);
ret = drmCommandWriteRead(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_NEW,
&req, sizeof(req));
if (ret) {
ERROR_MSG("could not create submitqueue! %d (%s)", ret, strerror(errno));
return ret;
}
to_msm_pipe(pipe)->queue_id = req.id;
return 0;
}
static void close_submitqueue(struct fd_pipe *pipe, uint32_t queue_id)
{
if (fd_device_version(pipe->dev) < FD_VERSION_SUBMIT_QUEUES)
return;
drmCommandWrite(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_CLOSE,
&queue_id, sizeof(queue_id));
}
static void msm_pipe_destroy(struct fd_pipe *pipe)
{
struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
close_submitqueue(pipe, msm_pipe->queue_id);
if (msm_pipe->suballoc_ring) {
fd_ringbuffer_del(msm_pipe->suballoc_ring);
msm_pipe->suballoc_ring = NULL;
}
free(msm_pipe);
}
static struct fd_pipe_funcs funcs = {
static const struct fd_pipe_funcs funcs = {
.ringbuffer_new = msm_ringbuffer_new,
.get_param = msm_pipe_get_param,
.wait = msm_pipe_wait,
.destroy = msm_pipe_destroy,
};
static uint64_t get_param(struct fd_device *dev, uint32_t pipe, uint32_t param)
static uint64_t get_param(struct fd_pipe *pipe, uint32_t param)
{
struct drm_msm_param req = {
.pipe = pipe,
.param = param,
};
int ret;
ret = drmCommandWriteRead(dev->fd, DRM_MSM_GET_PARAM, &req, sizeof(req));
uint64_t value;
int ret = query_param(pipe, param, &value);
if (ret) {
ERROR_MSG("get-param failed! %d (%s)", ret, strerror(errno));
return 0;
}
return req.value;
return value;
}
drm_private struct fd_pipe * msm_pipe_new(struct fd_device *dev,
enum fd_pipe_id id)
enum fd_pipe_id id, uint32_t prio)
{
static const uint32_t pipe_id[] = {
[FD_PIPE_3D] = MSM_PIPE_3D0,
@ -122,10 +184,14 @@ drm_private struct fd_pipe * msm_pipe_new(struct fd_device *dev,
pipe = &msm_pipe->base;
pipe->funcs = &funcs;
/* initialize before get_param(): */
pipe->dev = dev;
msm_pipe->pipe = pipe_id[id];
msm_pipe->gpu_id = get_param(dev, pipe_id[id], MSM_PARAM_GPU_ID);
msm_pipe->gmem = get_param(dev, pipe_id[id], MSM_PARAM_GMEM_SIZE);
msm_pipe->chip_id = get_param(dev, pipe_id[id], MSM_PARAM_CHIP_ID);
/* these params should be supported since the first version of drm/msm: */
msm_pipe->gpu_id = get_param(pipe, MSM_PARAM_GPU_ID);
msm_pipe->gmem = get_param(pipe, MSM_PARAM_GMEM_SIZE);
msm_pipe->chip_id = get_param(pipe, MSM_PARAM_CHIP_ID);
if (! msm_pipe->gpu_id)
goto fail;
@ -135,6 +201,9 @@ drm_private struct fd_pipe * msm_pipe_new(struct fd_device *dev,
INFO_MSG(" Chip-id: 0x%08x", msm_pipe->chip_id);
INFO_MSG(" GMEM size: 0x%08x", msm_pipe->gmem);
if (open_submitqueue(pipe, prio))
goto fail;
return pipe;
fail:
if (pipe)

View file

@ -39,6 +39,8 @@
struct msm_device {
struct fd_device base;
struct fd_bo_cache ring_cache;
unsigned ring_cnt;
};
static inline struct msm_device * to_msm_device(struct fd_device *x)
@ -54,6 +56,18 @@ struct msm_pipe {
uint32_t gpu_id;
uint32_t gmem;
uint32_t chip_id;
uint32_t queue_id;
/* Allow for sub-allocation of stateobj ring buffers (ie. sharing
* the same underlying bo)..
*
* This takes advantage of each context having it's own fd_pipe,
* so we don't have to worry about access from multiple threads.
*
* We also rely on previous stateobj having been fully constructed
* so we can reclaim extra space at it's end.
*/
struct fd_ringbuffer *suballoc_ring;
};
static inline struct msm_pipe * to_msm_pipe(struct fd_pipe *x)
@ -62,17 +76,21 @@ static inline struct msm_pipe * to_msm_pipe(struct fd_pipe *x)
}
drm_private struct fd_pipe * msm_pipe_new(struct fd_device *dev,
enum fd_pipe_id id);
enum fd_pipe_id id, uint32_t prio);
drm_private struct fd_ringbuffer * msm_ringbuffer_new(struct fd_pipe *pipe,
uint32_t size);
uint32_t size, enum fd_ringbuffer_flags flags);
struct msm_bo {
struct fd_bo base;
uint64_t offset;
uint64_t presumed;
uint32_t indexp1[FD_PIPE_MAX]; /* index plus 1 */
struct list_head list[FD_PIPE_MAX];
/* to avoid excess hashtable lookups, cache the ring this bo was
* last emitted on (since that will probably also be the next ring
* it is emitted on)
*/
unsigned current_ring_seqno;
uint32_t idx;
};
static inline struct msm_bo * to_msm_bo(struct fd_bo *x)
@ -85,13 +103,39 @@ drm_private int msm_bo_new_handle(struct fd_device *dev,
drm_private struct fd_bo * msm_bo_from_handle(struct fd_device *dev,
uint32_t size, uint32_t handle);
static inline void get_abs_timeout(struct drm_msm_timespec *tv, uint32_t ms)
static inline void get_abs_timeout(struct drm_msm_timespec *tv, uint64_t ns)
{
struct timespec t;
uint32_t s = ms / 1000;
uint32_t s = ns / 1000000000;
clock_gettime(CLOCK_MONOTONIC, &t);
tv->tv_sec = t.tv_sec + s;
tv->tv_nsec = t.tv_nsec + ((ms - (s * 1000)) * 1000000);
tv->tv_nsec = t.tv_nsec + ns - (s * 1000000000);
}
/*
* Stupid/simple growable array implementation:
*/
static inline void *
grow(void *ptr, uint32_t nr, uint32_t *max, uint32_t sz)
{
if ((nr + 1) > *max) {
if ((*max * 2) < (nr + 1))
*max = nr + 5;
else
*max = *max * 2;
ptr = realloc(ptr, *max * sz);
}
return ptr;
}
#define DECLARE_ARRAY(type, name) \
unsigned nr_ ## name, max_ ## name; \
type * name;
#define APPEND(x, name) ({ \
(x)->name = grow((x)->name, (x)->nr_ ## name, &(x)->max_ ## name, sizeof((x)->name[0])); \
(x)->nr_ ## name ++; \
})
#endif /* MSM_PRIV_H_ */

View file

@ -26,152 +26,305 @@
* Rob Clark <robclark@freedesktop.org>
*/
#ifdef HAVE_CONFIG_H
# include <config.h>
#endif
#include <assert.h>
#include <inttypes.h>
#include "xf86atomic.h"
#include "freedreno_ringbuffer.h"
#include "msm_priv.h"
struct msm_ringbuffer {
struct fd_ringbuffer base;
/* represents a single cmd buffer in the submit ioctl. Each cmd buffer has
* a backing bo, and a reloc table.
*/
struct msm_cmd {
struct list_head list;
struct fd_ringbuffer *ring;
struct fd_bo *ring_bo;
struct list_head submit_list;
/* bo's table: */
struct drm_msm_gem_submit_bo *bos;
uint32_t nr_bos, max_bos;
/* cmd's table: */
struct drm_msm_gem_submit_cmd *cmds;
uint32_t nr_cmds, max_cmds;
struct fd_ringbuffer **rings;
uint32_t nr_rings, max_rings;
/* reloc's table: */
struct drm_msm_gem_submit_reloc *relocs;
uint32_t nr_relocs, max_relocs;
DECLARE_ARRAY(struct drm_msm_gem_submit_reloc, relocs);
uint32_t size;
/* has cmd already been added to parent rb's submit.cmds table? */
int is_appended_to_submit;
};
static void *grow(void *ptr, uint32_t nr, uint32_t *max, uint32_t sz)
{
if ((nr + 1) > *max) {
if ((*max * 2) < (nr + 1))
*max = nr + 5;
else
*max = *max * 2;
ptr = realloc(ptr, *max * sz);
}
return ptr;
}
struct msm_ringbuffer {
struct fd_ringbuffer base;
#define APPEND(x, name) ({ \
(x)->name = grow((x)->name, (x)->nr_ ## name, &(x)->max_ ## name, sizeof((x)->name[0])); \
(x)->nr_ ## name ++; \
})
/* submit ioctl related tables:
* Note that bos and cmds are tracked by the parent ringbuffer, since
* that is global to the submit ioctl call. The reloc's table is tracked
* per cmd-buffer.
*/
struct {
/* bo's table: */
DECLARE_ARRAY(struct drm_msm_gem_submit_bo, bos);
/* cmd's table: */
DECLARE_ARRAY(struct drm_msm_gem_submit_cmd, cmds);
} submit;
/* should have matching entries in submit.bos: */
/* Note, only in parent ringbuffer */
DECLARE_ARRAY(struct fd_bo *, bos);
/* should have matching entries in submit.cmds: */
DECLARE_ARRAY(struct msm_cmd *, cmds);
/* List of physical cmdstream buffers (msm_cmd) associated with this
* logical fd_ringbuffer.
*
* Note that this is different from msm_ringbuffer::cmds (which
* shadows msm_ringbuffer::submit::cmds for tracking submit ioctl
* related stuff, and *only* is tracked in the parent ringbuffer.
* And only has "completed" cmd buffers (ie. we already know the
* size) added via get_cmd().
*/
struct list_head cmd_list;
int is_growable;
unsigned cmd_count;
unsigned offset; /* for sub-allocated stateobj rb's */
unsigned seqno;
/* maps fd_bo to idx: */
void *bo_table;
/* maps msm_cmd to drm_msm_gem_submit_cmd in parent rb. Each rb has a
* list of msm_cmd's which correspond to each chunk of cmdstream in
* a 'growable' rb. For each of those we need to create one
* drm_msm_gem_submit_cmd in the parent rb which collects the state
* for the submit ioctl. Because we can have multiple IB's to the same
* target rb (for example, or same stateobj emit multiple times), and
* because in theory we can have multiple different rb's that have a
* reference to a given target, we need a hashtable to track this per
* rb.
*/
void *cmd_table;
};
static inline struct msm_ringbuffer * to_msm_ringbuffer(struct fd_ringbuffer *x)
{
return (struct msm_ringbuffer *)x;
}
#define INIT_SIZE 0x1000
static pthread_mutex_t idx_lock = PTHREAD_MUTEX_INITIALIZER;
static struct msm_cmd *current_cmd(struct fd_ringbuffer *ring)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
assert(!LIST_IS_EMPTY(&msm_ring->cmd_list));
return LIST_LAST_ENTRY(&msm_ring->cmd_list, struct msm_cmd, list);
}
static void ring_cmd_del(struct msm_cmd *cmd)
{
fd_bo_del(cmd->ring_bo);
list_del(&cmd->list);
to_msm_ringbuffer(cmd->ring)->cmd_count--;
free(cmd->relocs);
free(cmd);
}
static struct msm_cmd * ring_cmd_new(struct fd_ringbuffer *ring, uint32_t size,
enum fd_ringbuffer_flags flags)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
struct msm_cmd *cmd = calloc(1, sizeof(*cmd));
if (!cmd)
return NULL;
cmd->ring = ring;
/* TODO separate suballoc buffer for small non-streaming state, using
* smaller page-sized backing bo's.
*/
if (flags & FD_RINGBUFFER_STREAMING) {
struct msm_pipe *msm_pipe = to_msm_pipe(ring->pipe);
unsigned suballoc_offset = 0;
struct fd_bo *suballoc_bo = NULL;
if (msm_pipe->suballoc_ring) {
struct msm_ringbuffer *suballoc_ring = to_msm_ringbuffer(msm_pipe->suballoc_ring);
assert(msm_pipe->suballoc_ring->flags & FD_RINGBUFFER_OBJECT);
assert(suballoc_ring->cmd_count == 1);
suballoc_bo = current_cmd(msm_pipe->suballoc_ring)->ring_bo;
suballoc_offset = fd_ringbuffer_size(msm_pipe->suballoc_ring) +
suballoc_ring->offset;
suballoc_offset = ALIGN(suballoc_offset, 0x10);
if ((size + suballoc_offset) > suballoc_bo->size) {
suballoc_bo = NULL;
}
}
if (!suballoc_bo) {
cmd->ring_bo = fd_bo_new_ring(ring->pipe->dev, 0x8000, 0);
msm_ring->offset = 0;
} else {
cmd->ring_bo = fd_bo_ref(suballoc_bo);
msm_ring->offset = suballoc_offset;
}
if (msm_pipe->suballoc_ring)
fd_ringbuffer_del(msm_pipe->suballoc_ring);
msm_pipe->suballoc_ring = fd_ringbuffer_ref(ring);
} else {
cmd->ring_bo = fd_bo_new_ring(ring->pipe->dev, size, 0);
}
if (!cmd->ring_bo)
goto fail;
list_addtail(&cmd->list, &msm_ring->cmd_list);
msm_ring->cmd_count++;
return cmd;
fail:
ring_cmd_del(cmd);
return NULL;
}
static uint32_t append_bo(struct fd_ringbuffer *ring, struct fd_bo *bo)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
uint32_t idx;
idx = APPEND(&msm_ring->submit, bos);
idx = APPEND(msm_ring, bos);
msm_ring->submit.bos[idx].flags = 0;
msm_ring->submit.bos[idx].handle = bo->handle;
msm_ring->submit.bos[idx].presumed = to_msm_bo(bo)->presumed;
msm_ring->bos[idx] = fd_bo_ref(bo);
return idx;
}
/* add (if needed) bo, return idx: */
static uint32_t bo2idx(struct fd_ringbuffer *ring, struct fd_bo *bo, uint32_t flags)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
struct msm_bo *msm_bo = to_msm_bo(bo);
int id = ring->pipe->id;
uint32_t idx;
if (!msm_bo->indexp1[id]) {
struct list_head *list = &msm_bo->list[id];
idx = APPEND(msm_ring, bos);
msm_ring->bos[idx].flags = 0;
msm_ring->bos[idx].handle = bo->handle;
msm_ring->bos[idx].presumed = msm_bo->presumed;
msm_bo->indexp1[id] = idx + 1;
assert(LIST_IS_EMPTY(list));
fd_bo_ref(bo);
list_addtail(list, &msm_ring->submit_list);
pthread_mutex_lock(&idx_lock);
if (msm_bo->current_ring_seqno == msm_ring->seqno) {
idx = msm_bo->idx;
} else {
idx = msm_bo->indexp1[id] - 1;
void *val;
if (!msm_ring->bo_table)
msm_ring->bo_table = drmHashCreate();
if (!drmHashLookup(msm_ring->bo_table, bo->handle, &val)) {
/* found */
idx = (uint32_t)(uintptr_t)val;
} else {
idx = append_bo(ring, bo);
val = (void *)(uintptr_t)idx;
drmHashInsert(msm_ring->bo_table, bo->handle, val);
}
msm_bo->current_ring_seqno = msm_ring->seqno;
msm_bo->idx = idx;
}
pthread_mutex_unlock(&idx_lock);
if (flags & FD_RELOC_READ)
msm_ring->bos[idx].flags |= MSM_SUBMIT_BO_READ;
msm_ring->submit.bos[idx].flags |= MSM_SUBMIT_BO_READ;
if (flags & FD_RELOC_WRITE)
msm_ring->bos[idx].flags |= MSM_SUBMIT_BO_WRITE;
msm_ring->submit.bos[idx].flags |= MSM_SUBMIT_BO_WRITE;
return idx;
}
static int check_cmd_bo(struct fd_ringbuffer *ring,
struct drm_msm_gem_submit_cmd *cmd, struct fd_bo *bo)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
return msm_ring->bos[cmd->submit_idx].handle == bo->handle;
}
static uint32_t offset_bytes(void *end, void *start)
{
return ((char *)end) - ((char *)start);
}
static struct drm_msm_gem_submit_cmd * get_cmd(struct fd_ringbuffer *ring,
struct fd_ringbuffer *target_ring, struct fd_bo *target_bo,
/* Ensure that submit has corresponding entry in cmds table for the
* target cmdstream buffer:
*
* Returns TRUE if new cmd added (else FALSE if it was already in
* the cmds table)
*/
static int get_cmd(struct fd_ringbuffer *ring, struct msm_cmd *target_cmd,
uint32_t submit_offset, uint32_t size, uint32_t type)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
struct drm_msm_gem_submit_cmd *cmd = NULL;
struct drm_msm_gem_submit_cmd *cmd;
uint32_t i;
void *val;
/* figure out if we already have a cmd buf: */
for (i = 0; i < msm_ring->nr_cmds; i++) {
cmd = &msm_ring->cmds[i];
if ((cmd->submit_offset == submit_offset) &&
(cmd->size == size) &&
(cmd->type == type) &&
check_cmd_bo(ring, cmd, target_bo))
break;
cmd = NULL;
if (!msm_ring->cmd_table)
msm_ring->cmd_table = drmHashCreate();
/* figure out if we already have a cmd buf.. short-circuit hash
* lookup if:
* - target cmd has never been added to submit.cmds
* - target cmd is not a streaming stateobj (which unlike longer
* lived CSO stateobj, is not expected to be reused with multiple
* submits)
*/
if (target_cmd->is_appended_to_submit &&
!(target_cmd->ring->flags & FD_RINGBUFFER_STREAMING) &&
!drmHashLookup(msm_ring->cmd_table, (unsigned long)target_cmd, &val)) {
i = VOID2U64(val);
cmd = &msm_ring->submit.cmds[i];
assert(cmd->submit_offset == submit_offset);
assert(cmd->size == size);
assert(cmd->type == type);
assert(msm_ring->submit.bos[cmd->submit_idx].handle ==
target_cmd->ring_bo->handle);
return FALSE;
}
/* create cmd buf if not: */
if (!cmd) {
uint32_t idx = APPEND(msm_ring, cmds);
APPEND(msm_ring, rings);
msm_ring->rings[idx] = target_ring;
cmd = &msm_ring->cmds[idx];
cmd->type = type;
cmd->submit_idx = bo2idx(ring, target_bo, FD_RELOC_READ);
cmd->submit_offset = submit_offset;
cmd->size = size;
cmd->pad = 0;
i = APPEND(&msm_ring->submit, cmds);
APPEND(msm_ring, cmds);
msm_ring->cmds[i] = target_cmd;
cmd = &msm_ring->submit.cmds[i];
cmd->type = type;
cmd->submit_idx = bo2idx(ring, target_cmd->ring_bo, FD_RELOC_READ);
cmd->submit_offset = submit_offset;
cmd->size = size;
cmd->pad = 0;
target_cmd->is_appended_to_submit = TRUE;
if (!(target_cmd->ring->flags & FD_RINGBUFFER_STREAMING)) {
drmHashInsert(msm_ring->cmd_table, (unsigned long)target_cmd,
U642VOID(i));
}
return cmd;
target_cmd->size = size;
return TRUE;
}
static void * msm_ringbuffer_hostptr(struct fd_ringbuffer *ring)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
return fd_bo_map(msm_ring->ring_bo);
struct msm_cmd *cmd = current_cmd(ring);
uint8_t *base = fd_bo_map(cmd->ring_bo);
return base + to_msm_ringbuffer(ring)->offset;
}
static uint32_t find_next_reloc_idx(struct msm_ringbuffer *msm_ring,
uint32_t start, uint32_t offset)
static void delete_cmds(struct msm_ringbuffer *msm_ring)
{
uint32_t i;
struct msm_cmd *cmd, *tmp;
/* a binary search would be more clever.. */
for (i = start; i < msm_ring->nr_relocs; i++) {
struct drm_msm_gem_submit_reloc *reloc = &msm_ring->relocs[i];
if (reloc->submit_offset >= offset)
return i;
LIST_FOR_EACH_ENTRY_SAFE(cmd, tmp, &msm_ring->cmd_list, list) {
ring_cmd_del(cmd);
}
return i;
}
static void flush_reset(struct fd_ringbuffer *ring)
@ -179,69 +332,211 @@ static void flush_reset(struct fd_ringbuffer *ring)
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
unsigned i;
/* for each of the cmd buffers, clear their reloc's: */
for (i = 0; i < msm_ring->nr_cmds; i++) {
struct msm_ringbuffer *target_ring = to_msm_ringbuffer(msm_ring->rings[i]);
target_ring->nr_relocs = 0;
for (i = 0; i < msm_ring->nr_bos; i++) {
struct msm_bo *msm_bo = to_msm_bo(msm_ring->bos[i]);
if (!msm_bo)
continue;
msm_bo->current_ring_seqno = 0;
fd_bo_del(&msm_bo->base);
}
msm_ring->nr_relocs = 0;
for (i = 0; i < msm_ring->nr_cmds; i++) {
struct msm_cmd *msm_cmd = msm_ring->cmds[i];
if (msm_cmd->ring == ring)
continue;
if (msm_cmd->ring->flags & FD_RINGBUFFER_OBJECT)
fd_ringbuffer_del(msm_cmd->ring);
}
msm_ring->submit.nr_cmds = 0;
msm_ring->submit.nr_bos = 0;
msm_ring->nr_cmds = 0;
msm_ring->nr_bos = 0;
if (msm_ring->bo_table) {
drmHashDestroy(msm_ring->bo_table);
msm_ring->bo_table = NULL;
}
if (msm_ring->cmd_table) {
drmHashDestroy(msm_ring->cmd_table);
msm_ring->cmd_table = NULL;
}
if (msm_ring->is_growable) {
delete_cmds(msm_ring);
} else {
/* in old mode, just reset the # of relocs: */
current_cmd(ring)->nr_relocs = 0;
}
}
static int msm_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start)
static void finalize_current_cmd(struct fd_ringbuffer *ring, uint32_t *last_start)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
struct fd_bo *ring_bo = msm_ring->ring_bo;
struct drm_msm_gem_submit req = {
.pipe = to_msm_pipe(ring->pipe)->pipe,
};
struct msm_bo *msm_bo = NULL, *tmp;
uint32_t i, submit_offset, size;
int ret, id = ring->pipe->id;
uint32_t submit_offset, size, type;
struct fd_ringbuffer *parent;
if (ring->parent) {
parent = ring->parent;
type = MSM_SUBMIT_CMD_IB_TARGET_BUF;
} else {
parent = ring;
type = MSM_SUBMIT_CMD_BUF;
}
submit_offset = offset_bytes(last_start, ring->start);
size = offset_bytes(ring->cur, last_start);
get_cmd(ring, ring, ring_bo, submit_offset, size, MSM_SUBMIT_CMD_BUF);
get_cmd(parent, current_cmd(ring), submit_offset, size, type);
}
/* needs to be after get_cmd() as that could create bos/cmds table: */
req.bos = VOID2U64(msm_ring->bos),
req.nr_bos = msm_ring->nr_bos;
req.cmds = VOID2U64(msm_ring->cmds),
req.nr_cmds = msm_ring->nr_cmds;
static void dump_submit(struct msm_ringbuffer *msm_ring)
{
uint32_t i, j;
/* for each of the cmd's fix up their reloc's: */
for (i = 0; i < msm_ring->nr_cmds; i++) {
struct drm_msm_gem_submit_cmd *cmd = &msm_ring->cmds[i];
struct msm_ringbuffer *target_ring = to_msm_ringbuffer(msm_ring->rings[i]);
uint32_t a = find_next_reloc_idx(target_ring, 0, cmd->submit_offset);
uint32_t b = find_next_reloc_idx(target_ring, a, cmd->submit_offset + cmd->size);
cmd->relocs = VOID2U64(&target_ring->relocs[a]);
cmd->nr_relocs = (b > a) ? b - a : 0;
for (i = 0; i < msm_ring->submit.nr_bos; i++) {
struct drm_msm_gem_submit_bo *bo = &msm_ring->submit.bos[i];
ERROR_MSG(" bos[%d]: handle=%u, flags=%x", i, bo->handle, bo->flags);
}
for (i = 0; i < msm_ring->submit.nr_cmds; i++) {
struct drm_msm_gem_submit_cmd *cmd = &msm_ring->submit.cmds[i];
struct drm_msm_gem_submit_reloc *relocs = U642VOID(cmd->relocs);
ERROR_MSG(" cmd[%d]: type=%u, submit_idx=%u, submit_offset=%u, size=%u",
i, cmd->type, cmd->submit_idx, cmd->submit_offset, cmd->size);
for (j = 0; j < cmd->nr_relocs; j++) {
struct drm_msm_gem_submit_reloc *r = &relocs[j];
ERROR_MSG(" reloc[%d]: submit_offset=%u, or=%08x, shift=%d, reloc_idx=%u"
", reloc_offset=%"PRIu64, j, r->submit_offset, r->or, r->shift,
r->reloc_idx, r->reloc_offset);
}
}
}
static struct drm_msm_gem_submit_reloc *
handle_stateobj_relocs(struct fd_ringbuffer *parent, struct fd_ringbuffer *stateobj,
struct drm_msm_gem_submit_reloc *orig_relocs, unsigned nr_relocs)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(stateobj);
struct drm_msm_gem_submit_reloc *relocs = malloc(nr_relocs * sizeof(*relocs));
unsigned i;
for (i = 0; i < nr_relocs; i++) {
unsigned idx = orig_relocs[i].reloc_idx;
struct fd_bo *bo = msm_ring->bos[idx];
unsigned flags = 0;
if (msm_ring->submit.bos[idx].flags & MSM_SUBMIT_BO_READ)
flags |= FD_RELOC_READ;
if (msm_ring->submit.bos[idx].flags & MSM_SUBMIT_BO_WRITE)
flags |= FD_RELOC_WRITE;
relocs[i] = orig_relocs[i];
relocs[i].reloc_idx = bo2idx(parent, bo, flags);
}
DEBUG_MSG("nr_cmds=%u, nr_bos=%u\n", req.nr_cmds, req.nr_bos);
/* stateobj rb's could have reloc's to other stateobj rb's which didn't
* get propagated to the parent rb at _emit_reloc_ring() time (because
* the parent wasn't known then), so fix that up now:
*/
for (i = 0; i < msm_ring->nr_cmds; i++) {
struct msm_cmd *msm_cmd = msm_ring->cmds[i];
struct drm_msm_gem_submit_cmd *cmd = &msm_ring->submit.cmds[i];
if (msm_ring->cmds[i]->ring == stateobj)
continue;
assert(msm_cmd->ring->flags & FD_RINGBUFFER_OBJECT);
if (get_cmd(parent, msm_cmd, cmd->submit_offset, cmd->size, cmd->type)) {
fd_ringbuffer_ref(msm_cmd->ring);
}
}
return relocs;
}
static int msm_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start,
int in_fence_fd, int *out_fence_fd)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
struct msm_pipe *msm_pipe = to_msm_pipe(ring->pipe);
struct drm_msm_gem_submit req = {
.flags = msm_pipe->pipe,
.queueid = msm_pipe->queue_id,
};
uint32_t i;
int ret;
assert(!ring->parent);
if (in_fence_fd != -1) {
req.flags |= MSM_SUBMIT_FENCE_FD_IN | MSM_SUBMIT_NO_IMPLICIT;
req.fence_fd = in_fence_fd;
}
if (out_fence_fd) {
req.flags |= MSM_SUBMIT_FENCE_FD_OUT;
}
finalize_current_cmd(ring, last_start);
/* for each of the cmd's fix up their reloc's: */
for (i = 0; i < msm_ring->submit.nr_cmds; i++) {
struct msm_cmd *msm_cmd = msm_ring->cmds[i];
struct drm_msm_gem_submit_reloc *relocs = msm_cmd->relocs;
struct drm_msm_gem_submit_cmd *cmd;
unsigned nr_relocs = msm_cmd->nr_relocs;
/* for reusable stateobjs, the reloc table has reloc_idx that
* points into it's own private bos table, rather than the global
* bos table used for the submit, so we need to add the stateobj's
* bos to the global table and construct new relocs table with
* corresponding reloc_idx
*/
if (msm_cmd->ring->flags & FD_RINGBUFFER_OBJECT) {
relocs = handle_stateobj_relocs(ring, msm_cmd->ring,
relocs, nr_relocs);
}
cmd = &msm_ring->submit.cmds[i];
cmd->relocs = VOID2U64(relocs);
cmd->nr_relocs = nr_relocs;
}
/* needs to be after get_cmd() as that could create bos/cmds table: */
req.bos = VOID2U64(msm_ring->submit.bos),
req.nr_bos = msm_ring->submit.nr_bos;
req.cmds = VOID2U64(msm_ring->submit.cmds),
req.nr_cmds = msm_ring->submit.nr_cmds;
DEBUG_MSG("nr_cmds=%u, nr_bos=%u", req.nr_cmds, req.nr_bos);
ret = drmCommandWriteRead(ring->pipe->dev->fd, DRM_MSM_GEM_SUBMIT,
&req, sizeof(req));
if (ret) {
ERROR_MSG("submit failed: %d (%s)", ret, strerror(errno));
} else {
dump_submit(msm_ring);
} else if (!ret) {
/* update timestamp on all rings associated with submit: */
for (i = 0; i < msm_ring->nr_cmds; i++) {
struct fd_ringbuffer *target_ring = msm_ring->rings[i];
if (!ret)
target_ring->last_timestamp = req.fence;
for (i = 0; i < msm_ring->submit.nr_cmds; i++) {
struct msm_cmd *msm_cmd = msm_ring->cmds[i];
msm_cmd->ring->last_timestamp = req.fence;
}
if (out_fence_fd) {
*out_fence_fd = req.fence_fd;
}
}
LIST_FOR_EACH_ENTRY_SAFE(msm_bo, tmp, &msm_ring->submit_list, list[id]) {
struct list_head *list = &msm_bo->list[id];
list_delinit(list);
msm_bo->indexp1[id] = 0;
fd_bo_del(&msm_bo->base);
/* free dynamically constructed stateobj relocs tables: */
for (i = 0; i < msm_ring->submit.nr_cmds; i++) {
struct drm_msm_gem_submit_cmd *cmd = &msm_ring->submit.cmds[i];
struct msm_cmd *msm_cmd = msm_ring->cmds[i];
if (msm_cmd->ring->flags & FD_RINGBUFFER_OBJECT) {
free(U642VOID(cmd->relocs));
}
}
flush_reset(ring);
@ -249,6 +544,13 @@ static int msm_ringbuffer_flush(struct fd_ringbuffer *ring, uint32_t *last_start
return ret;
}
static void msm_ringbuffer_grow(struct fd_ringbuffer *ring, uint32_t size)
{
assert(to_msm_ringbuffer(ring)->is_growable);
finalize_current_cmd(ring, ring->last_start);
ring_cmd_new(ring, size, 0);
}
static void msm_ringbuffer_reset(struct fd_ringbuffer *ring)
{
flush_reset(ring);
@ -257,93 +559,165 @@ static void msm_ringbuffer_reset(struct fd_ringbuffer *ring)
static void msm_ringbuffer_emit_reloc(struct fd_ringbuffer *ring,
const struct fd_reloc *r)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
struct fd_ringbuffer *parent = ring->parent ? ring->parent : ring;
struct msm_bo *msm_bo = to_msm_bo(r->bo);
struct drm_msm_gem_submit_reloc *reloc;
uint32_t idx = APPEND(msm_ring, relocs);
struct msm_cmd *cmd = current_cmd(ring);
uint32_t idx = APPEND(cmd, relocs);
uint32_t addr;
reloc = &msm_ring->relocs[idx];
reloc = &cmd->relocs[idx];
reloc->reloc_idx = bo2idx(parent, r->bo, r->flags);
reloc->reloc_offset = r->offset;
reloc->or = r->or;
reloc->shift = r->shift;
reloc->submit_offset = offset_bytes(ring->cur, ring->start);
reloc->submit_offset = offset_bytes(ring->cur, ring->start) +
to_msm_ringbuffer(ring)->offset;
addr = msm_bo->presumed;
if (r->shift < 0)
addr >>= -r->shift;
if (reloc->shift < 0)
addr >>= -reloc->shift;
else
addr <<= r->shift;
addr <<= reloc->shift;
(*ring->cur++) = addr | r->or;
if (ring->pipe->gpu_id >= 500) {
struct drm_msm_gem_submit_reloc *reloc_hi;
/* NOTE: grab reloc_idx *before* APPEND() since that could
* realloc() meaning that 'reloc' ptr is no longer valid:
*/
uint32_t reloc_idx = reloc->reloc_idx;
idx = APPEND(cmd, relocs);
reloc_hi = &cmd->relocs[idx];
reloc_hi->reloc_idx = reloc_idx;
reloc_hi->reloc_offset = r->offset;
reloc_hi->or = r->orhi;
reloc_hi->shift = r->shift - 32;
reloc_hi->submit_offset = offset_bytes(ring->cur, ring->start) +
to_msm_ringbuffer(ring)->offset;
addr = msm_bo->presumed >> 32;
if (reloc_hi->shift < 0)
addr >>= -reloc_hi->shift;
else
addr <<= reloc_hi->shift;
(*ring->cur++) = addr | r->orhi;
}
}
static void msm_ringbuffer_emit_reloc_ring(struct fd_ringbuffer *ring,
struct fd_ringmarker *target, struct fd_ringmarker *end)
static uint32_t msm_ringbuffer_emit_reloc_ring(struct fd_ringbuffer *ring,
struct fd_ringbuffer *target, uint32_t cmd_idx)
{
struct fd_bo *target_bo = to_msm_ringbuffer(target->ring)->ring_bo;
struct drm_msm_gem_submit_cmd *cmd;
uint32_t submit_offset, size;
struct msm_cmd *cmd = NULL;
struct msm_ringbuffer *msm_target = to_msm_ringbuffer(target);
uint32_t idx = 0;
int added_cmd = FALSE;
uint32_t size;
uint32_t submit_offset = msm_target->offset;
submit_offset = offset_bytes(target->cur, target->ring->start);
size = offset_bytes(end->cur, target->cur);
LIST_FOR_EACH_ENTRY(cmd, &msm_target->cmd_list, list) {
if (idx == cmd_idx)
break;
idx++;
}
cmd = get_cmd(ring, target->ring, target_bo, submit_offset, size,
MSM_SUBMIT_CMD_IB_TARGET_BUF);
assert(cmd);
assert(cmd && (idx == cmd_idx));
if (idx < (msm_target->cmd_count - 1)) {
/* All but the last cmd buffer is fully "baked" (ie. already has
* done get_cmd() to add it to the cmds table). But in this case,
* the size we get is invalid (since it is calculated from the
* last cmd buffer):
*/
size = cmd->size;
} else {
struct fd_ringbuffer *parent = ring->parent ? ring->parent : ring;
size = offset_bytes(target->cur, target->start);
added_cmd = get_cmd(parent, cmd, submit_offset, size,
MSM_SUBMIT_CMD_IB_TARGET_BUF);
}
msm_ringbuffer_emit_reloc(ring, &(struct fd_reloc){
.bo = target_bo,
.bo = cmd->ring_bo,
.flags = FD_RELOC_READ,
.offset = submit_offset,
});
/* Unlike traditional ringbuffers which are deleted as a set (after
* being flushed), mesa can't really guarantee that a stateobj isn't
* destroyed after emitted but before flush, so we must hold a ref:
*/
if (added_cmd && (target->flags & FD_RINGBUFFER_OBJECT)) {
fd_ringbuffer_ref(target);
}
return size;
}
static uint32_t msm_ringbuffer_cmd_count(struct fd_ringbuffer *ring)
{
return to_msm_ringbuffer(ring)->cmd_count;
}
static void msm_ringbuffer_destroy(struct fd_ringbuffer *ring)
{
struct msm_ringbuffer *msm_ring = to_msm_ringbuffer(ring);
if (msm_ring->ring_bo)
fd_bo_del(msm_ring->ring_bo);
flush_reset(ring);
delete_cmds(msm_ring);
free(msm_ring->submit.cmds);
free(msm_ring->submit.bos);
free(msm_ring->bos);
free(msm_ring->cmds);
free(msm_ring);
}
static struct fd_ringbuffer_funcs funcs = {
static const struct fd_ringbuffer_funcs funcs = {
.hostptr = msm_ringbuffer_hostptr,
.flush = msm_ringbuffer_flush,
.grow = msm_ringbuffer_grow,
.reset = msm_ringbuffer_reset,
.emit_reloc = msm_ringbuffer_emit_reloc,
.emit_reloc_ring = msm_ringbuffer_emit_reloc_ring,
.cmd_count = msm_ringbuffer_cmd_count,
.destroy = msm_ringbuffer_destroy,
};
drm_private struct fd_ringbuffer * msm_ringbuffer_new(struct fd_pipe *pipe,
uint32_t size)
uint32_t size, enum fd_ringbuffer_flags flags)
{
struct msm_ringbuffer *msm_ring;
struct fd_ringbuffer *ring = NULL;
struct fd_ringbuffer *ring;
msm_ring = calloc(1, sizeof(*msm_ring));
if (!msm_ring) {
ERROR_MSG("allocation failed");
goto fail;
return NULL;
}
if (size == 0) {
assert(pipe->dev->version >= FD_VERSION_UNLIMITED_CMDS);
size = INIT_SIZE;
msm_ring->is_growable = TRUE;
}
list_inithead(&msm_ring->cmd_list);
msm_ring->seqno = ++to_msm_device(pipe->dev)->ring_cnt;
ring = &msm_ring->base;
atomic_set(&ring->refcnt, 1);
ring->funcs = &funcs;
ring->size = size;
ring->pipe = pipe; /* needed in ring_cmd_new() */
list_inithead(&msm_ring->submit_list);
msm_ring->ring_bo = fd_bo_new(pipe->dev, size, 0);
if (!msm_ring->ring_bo) {
ERROR_MSG("ringbuffer allocation failed");
goto fail;
}
ring_cmd_new(ring, size, flags);
return ring;
fail:
if (ring)
fd_ringbuffer_del(ring);
return NULL;
}

84
gen_table_fourcc.py Normal file
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@ -0,0 +1,84 @@
#!/usr/bin/env python3
# Copyright 2021 Collabora, Ltd.
#
# Permission is hereby granted, free of charge, to any person obtaining
# a copy of this software and associated documentation files (the
# "Software"), to deal in the Software without restriction, including
# without limitation the rights to use, copy, modify, merge, publish,
# distribute, sublicense, and/or sell copies of the Software, and to
# permit persons to whom the Software is furnished to do so, subject to
# the following conditions:
#
# The above copyright notice and this permission notice (including the
# next paragraph) shall be included in all copies or substantial
# portions of the Software.
#
# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
# ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
# SOFTWARE.
# Helper script that reads drm_fourcc.h and writes a static table with the
# simpler format token modifiers
import sys
import re
filename = sys.argv[1]
towrite = sys.argv[2]
fm_re = {
'intel': r'^#define I915_FORMAT_MOD_(\w+)',
'others': r'^#define DRM_FORMAT_MOD_((?:ARM|APPLE|SAMSUNG|QCOM|VIVANTE|NVIDIA|BROADCOM|ALLWINNER)\w+)\s',
'vendors': r'^#define DRM_FORMAT_MOD_VENDOR_(\w+)'
}
def print_fm_intel(f, f_mod):
f.write(' {{ DRM_MODIFIER_INTEL({}, {}) }},\n'.format(f_mod, f_mod))
# generic write func
def print_fm(f, vendor, mod, f_name):
f.write(' {{ DRM_MODIFIER({}, {}, {}) }},\n'.format(vendor, mod, f_name))
with open(filename, "r") as f:
data = f.read()
for k, v in fm_re.items():
fm_re[k] = re.findall(v, data, flags=re.M)
with open(towrite, "w") as f:
f.write('''\
/* AUTOMATICALLY GENERATED by gen_table_fourcc.py. You should modify
that script instead of adding here entries manually! */
static const struct drmFormatModifierInfo drm_format_modifier_table[] = {
''')
f.write(' { DRM_MODIFIER_INVALID(NONE, INVALID) },\n')
f.write(' { DRM_MODIFIER_LINEAR(NONE, LINEAR) },\n')
for entry in fm_re['intel']:
print_fm_intel(f, entry)
for entry in fm_re['others']:
(vendor, mod) = entry.split('_', 1)
if vendor == 'ARM' and (mod == 'TYPE_AFBC' or mod == 'TYPE_MISC' or mod == 'TYPE_AFRC'):
continue
print_fm(f, vendor, mod, mod)
f.write('''\
};
''')
f.write('''\
static const struct drmFormatModifierVendorInfo drm_format_modifier_vendor_table[] = {
''')
for entry in fm_re['vendors']:
f.write(" {{ DRM_FORMAT_MOD_VENDOR_{}, \"{}\" }},\n".format(entry, entry))
f.write('''\
};
''')

128
include/drm/README Normal file
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@ -0,0 +1,128 @@
What are these headers ?
------------------------
This is the canonical source of drm headers that user space should use for
communicating with the kernel DRM subsystem.
They flow from the kernel, thus any changes must be merged there first.
Do _not_ attempt to "fix" these by deviating from the kernel ones !
Non-linux platforms - changes/patches
-------------------------------------
If your platform has local changes, please send them upstream for inclusion.
Even if your patches don't get accepted in their current form, devs will
give you feedback on how to address things properly.
git send-email --subject-prefix="PATCH libdrm" your patches to dri-devel
mailing list.
Before doing so, please consider the following:
- Have the [libdrm vs kernel] headers on your platform deviated ?
Consider unifying them first.
- Have you introduced additional ABI that's not available in Linux ?
Propose it for [Linux kernel] upstream inclusion.
If that doesn't work out (hopefully it never does), move it to another header
and/or keep the change(s) local ?
- Are your changes DRI1/UMS specific ?
There is virtually no interest/power in keeping those legacy interfaces. They
are around due to the kernel "thou shalt not break existing user space" rule.
Consider porting the driver to DRI2/KMS - all (almost?) sensible hardware is
capable of supporting those.
Which headers go where ?
------------------------
A snipped from the, now removed, Makefile.am used to state:
XXX airlied says, nothing besides *_drm.h and drm*.h should be necessary.
however, r300 and via need their reg headers installed in order to build.
better solutions are welcome.
Obviously the r300 and via headers are no longer around ;-)
Reason behind is that the drm headers can be used as a basic communications
channel with the respective kernel modules. If more advanced functionality is
required one can pull the specific libdrm_$driver which is free to pull
additional files from the kernel.
For example: nouveau has nouveau/nvif/*.h while vc4 has vc4/*.h
If your driver is still in prototyping/staging state, consider moving the
$driver_drm.h into $driver and _not_ installing it. An header providing opaque
definitions and access [via $driver_drmif.h or similar] would be better fit.
When and which headers to update
--------------------------------
Ideally all files will be synced (updated) with the latest released kernel on
each libdrm release. Sadly that's not yet possible since quite a few headers
differ significantly - see Outdated or Broken Headers section below.
That said, it's up-to the individual developers to sync with newer version
(from drm-next) as they see fit.
When and how to update these files
----------------------------------
Note: One should not do _any_ changes to the files apart from the steps below.
In order to update the files do the following:
- Switch to a Linux kernel tree/branch which is not rebased.
For example: drm-next (https://gitlab.freedesktop.org/drm/kernel/)
- Install the headers via `make headers_install' to a separate location.
- Copy the drm header[s] + git add + git commit.
- Note: Your commit message must include:
a) Brief summary on the delta. If there's any change that looks like an
API/ABI break one _must_ explicitly state why it's safe to do so.
b) "Generated using make headers_install."
c) "Generated from $tree/branch commit $sha"
Outdated or Broken Headers
--------------------------
This section contains a list of headers and the respective "issues" they might
have relative to their kernel equivalent.
Most UMS headers:
- Not using fixed size integers - compat ioctls are broken.
Status: ?
Promote to fixed size ints, which match the current (32bit) ones.
nouveau_drm.h
- Missing macros NOUVEAU_GETPARAM*, NOUVEAU_DRM_HEADER_PATCHLEVEL, structs,
enums
Status: Deliberate UABI choice; nouveau hides the exact kernel ABI behind libdrm
r128_drm.h
- Broken compat ioctls.
radeon_drm.h
- Missing RADEON_TILING_R600_NO_SCANOUT, CIK_TILE_MODE_*, broken UMS ioctls
- Both kernel and libdrm: missing padding -
drm_radeon_gem_{create,{g,s}et_tiling,set_domain} others ?
Status: ?
savage_drm.h
- Renamed ioctls - DRM_IOCTL_SAVAGE_{,BCI}_EVENT_EMIT, compat ioctls are broken.
Status: ?
sis_drm.h
- Borken ioctls + libdrm uses int vs kernel long
Status: ?
via_drm.h
- Borken ioctls - libdrm int vs kernel long
Status: ?
omap_drm.h (living in $TOP/omap)
- License mismatch, missing DRM_IOCTL_OMAP_GEM_NEW and related struct
Status: ?
exynos_drm.h (living in $TOP/exynos)
- License mismatch, now using fixed size ints (but not everywhere). Lots of
new stuff.
Status: ?

1598
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@ -34,9 +34,15 @@
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
/* SAREA area needs to be at least a page */
#if defined(__alpha__)
#define SAREA_MAX 0x2000U
#elif defined(__mips__)
#define SAREA_MAX 0x4000U
#elif defined(__ia64__)
#define SAREA_MAX 0x10000U /* 64kB */
#else
@ -79,4 +85,8 @@ typedef struct drm_sarea_drawable drm_sarea_drawable_t;
typedef struct drm_sarea_frame drm_sarea_frame_t;
typedef struct drm_sarea drm_sarea_t;
#if defined(__cplusplus)
}
#endif
#endif /* _DRM_SAREA_H_ */

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