tests/amdgpu: disable unsupported test cases for Arcturus

Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Le Ma 2019-07-24 16:47:08 +08:00 committed by Alex Deucher
parent bbaec1283f
commit 6e10ac07c8
4 changed files with 29 additions and 5 deletions

View file

@ -64,17 +64,21 @@ CU_TestInfo cs_tests[] = {
CU_BOOL suite_cs_tests_enable(void)
{
uint32_t asic_id;
if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
&minor_version, &device_handle))
return CU_FALSE;
family_id = device_handle->info.family_id;
asic_id = device_handle->info.asic_id;
if (amdgpu_device_deinitialize(device_handle))
return CU_FALSE;
if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) {
if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI ||
asic_is_arcturus(asic_id)) {
printf("\n\nThe ASIC NOT support UVD, suite disabled\n");
return CU_FALSE;
}

View file

@ -124,6 +124,7 @@ static void amdgpu_draw_hang_slow_gfx(void);
CU_BOOL suite_deadlock_tests_enable(void)
{
CU_BOOL enable = CU_TRUE;
uint32_t asic_id;
if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
&minor_version, &device_handle))
@ -140,6 +141,15 @@ CU_BOOL suite_deadlock_tests_enable(void)
enable = CU_FALSE;
}
asic_id = device_handle->info.asic_id;
if (asic_is_arcturus(asic_id)) {
if (amdgpu_set_test_active("Deadlock Tests",
"gfx ring block test (set amdgpu.lockup_timeout=50)",
CU_FALSE))
fprintf(stderr, "test deactivation failed - %s\n",
CU_get_error_msg());
}
if (device_handle->info.family_id >= AMDGPU_FAMILY_AI)
use_uc_mtype = 1;

View file

@ -96,7 +96,7 @@ CU_TestInfo vce_tests[] = {
CU_BOOL suite_vce_tests_enable(void)
{
uint32_t version, feature;
uint32_t version, feature, asic_id;
CU_BOOL ret_mv = CU_FALSE;
if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
@ -107,6 +107,7 @@ CU_BOOL suite_vce_tests_enable(void)
chip_rev = device_handle->info.chip_rev;
chip_id = device_handle->info.chip_external_rev;
ids_flags = device_handle->info.ids_flags;
asic_id = device_handle->info.asic_id;
amdgpu_query_firmware_version(device_handle, AMDGPU_INFO_FW_VCE, 0,
0, &version, &feature);
@ -114,7 +115,8 @@ CU_BOOL suite_vce_tests_enable(void)
if (amdgpu_device_deinitialize(device_handle))
return CU_FALSE;
if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) {
if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI ||
asic_is_arcturus(asic_id)) {
printf("\n\nThe ASIC NOT support VCE, suite disabled\n");
return CU_FALSE;
}

View file

@ -104,6 +104,14 @@ static void amdgpu_vmid_reserve_test(void)
amdgpu_bo_list_handle bo_list;
amdgpu_va_handle va_handle;
static uint32_t *ptr;
struct amdgpu_gpu_info gpu_info = {0};
unsigned gc_ip_type;
r = amdgpu_query_gpu_info(device_handle, &gpu_info);
CU_ASSERT_EQUAL(r, 0);
gc_ip_type = (asic_is_arcturus(gpu_info.asic_id)) ?
AMDGPU_HW_IP_COMPUTE : AMDGPU_HW_IP_GFX;
r = amdgpu_cs_ctx_create(device_handle, &context_handle);
CU_ASSERT_EQUAL(r, 0);
@ -133,7 +141,7 @@ static void amdgpu_vmid_reserve_test(void)
ib_info.size = 16;
memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request));
ibs_request.ip_type = AMDGPU_HW_IP_GFX;
ibs_request.ip_type = gc_ip_type;
ibs_request.ring = 0;
ibs_request.number_of_ibs = 1;
ibs_request.ibs = &ib_info;
@ -146,7 +154,7 @@ static void amdgpu_vmid_reserve_test(void)
memset(&fence_status, 0, sizeof(struct amdgpu_cs_fence));
fence_status.context = context_handle;
fence_status.ip_type = AMDGPU_HW_IP_GFX;
fence_status.ip_type = gc_ip_type;
fence_status.ip_instance = 0;
fence_status.ring = 0;
fence_status.fence = ibs_request.seq_no;