Sagar Ghuge 7b634ebb63 vulkan/runtime: Add VK_SHADER_CREATE_UNALIGNED_DISPATCH_BIT_MESA flag ... Drivers that doesn't support direct unaligned dispatches, they can use the shader creation flag to lower unaligned dispatches. Suggested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36245>		2025-08-12 23:17:02 +00:00
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addrlib	addrlib: __debugbreak only present on Windows and from intrin.h	2025-08-07 07:47:42 +00:00
ci	ac,radv,radeonsi: fix programming PA_SU_PRIM_FILTER_CNTL on GFX12	2025-08-12 07:06:36 +00:00
common	ac/descriptors: add a function to create a descriptor for HiZ surfaces	2025-08-12 13:48:09 +00:00
compiler	aco/ra: set late-kill for operands of temporary p_create_vector	2025-08-06 09:44:01 +00:00
drm-shim	amd: Add user queue HQD count to hw_ip info	2025-07-08 10:17:51 +00:00
gmlib	amd/gmlib: remove the executable bit	2025-06-12 07:44:27 +00:00
lanczoslib	radeonsi/vpe: enhance scaling quality	2025-06-12 07:44:26 +00:00
llvm	ac: merge AC_ARG_INT & AC_ARG_FLOAT into single AC_ARG_VALUE	2025-08-11 15:32:30 -04:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: Fix cost profiling support	2025-07-29 09:17:25 +00:00
vulkan	vulkan/runtime: Add VK_SHADER_CREATE_UNALIGNED_DISPATCH_BIT_MESA flag	2025-08-12 23:17:02 +00:00
meson.build	radeonsi/vpe: enhance scaling quality	2025-06-12 07:44:26 +00:00