Commit graph

193548 commits

Author SHA1 Message Date
Lionel Landwerlin
fbafa9cabd intel/nir: remove load_global_const_block_intel intrinsic
load_global_constant_uniform_block_intel is equivalent in terms of
loading, then for the predicate we just do a bcsel afterward in places
where that is required.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30659>
2024-08-16 11:12:39 +00:00
Danylo Piliaiev
a15466187c tu/a7xx: Use BLIT_EVENT_STORE_AND_CLEAR when appropriate
BLIT_EVENT_STORE_AND_CLEAR presumably swallows the BLIT_EVENT_CLEAR
at the start of the next bin. Should be faster than separate events.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30270>
2024-08-16 10:38:38 +00:00
Danylo Piliaiev
80a50269a2 tu/a7xx: Use generic clear for image clears
CP_BLIT is used only for VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 until we mark
it as renderable (on A7XX E5B9G9R9 is renderable format).

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30270>
2024-08-16 10:38:38 +00:00
Danylo Piliaiev
21511c02a3 tu/a7xx: Use generic clear for CmdClearAttachments
We don't handle conditional rendering or secondary cmdbuf,
it would require cs patching and seem to be rather rare case.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30270>
2024-08-16 10:38:38 +00:00
Danylo Piliaiev
b88b076870 tu/a7xx: Use generic clear for LOAD_OP_CLEAR
Aside from being just nicer it does UBWC fast-clear.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30270>
2024-08-16 10:38:37 +00:00
Danylo Piliaiev
49193771f6 freedreno: Clarify RB_BLIT_INFO::TYPE field
It's an enum, not two unconnected bits, with A7XX it's even more clear..

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30270>
2024-08-16 10:38:37 +00:00
Mary Guillemard
c95ef9e323 panvk: Fix NULL deref on model name when device isn't supported
Instead of reproting an VK_ERROR_INCOMPATIBLE_DRIVER we were crashing as
device->model was init after this error check.

Tested on G57 but should work the same on all unsupported arch.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: f7f9b3d170 ("panvk: Move to vk_properties")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30686>
2024-08-16 10:28:04 +00:00
David Rosca
6150967888 frontends/va: Parse packed header slice for HEVC TemporalId
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30151>
2024-08-16 08:31:38 +00:00
David Rosca
987e3e0dd5 frontends/va: Get per temporal layer params for HEVC
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30151>
2024-08-16 08:31:38 +00:00
David Rosca
1283f43527 frontends/va: Assert maximum number of temporal layers
There is a hardcoded limit of 4 layers in all structs, so make sure
drivers will not return more.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30151>
2024-08-16 08:31:37 +00:00
David Rosca
384057076a gallium: Change pipe_h265_enc_rate_control to array
Same as other codecs, use 4 as max number of temporal layers.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30151>
2024-08-16 08:31:37 +00:00
Valentine Burley
77f783462a freedreno/ci: Re-enable Adreno 660 for Vulkan pre-merge jobs
This reverts commit 59ee87b606.

Adreno 660 is stable enough now to be re-enabled for pre-merge jobs.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30682>
2024-08-16 07:40:50 +00:00
Valentine Burley
fd631340e3 freedreno/ci: Update expectations for Adreno 660
A lof of these tests were previously fixed, but that was missed due to fractional runs.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30682>
2024-08-16 07:40:50 +00:00
Dave Airlie
b30462535b radv/video: add KHR_video_maintenance1 support
This just adds support for allowing worst case image sizing with no
specified profiles and for using inline queries.

Reviewed-by: Lynne <dev@lynne.ee>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30671>
2024-08-16 13:38:03 +10:00
Dave Airlie
fc137ecaca radv/video: handle inline queries for vulkan video encode.
This handles the new inlines queries for VK_KHR_video_maintenance1

(Decode doesn't do queries on AMD at the moment).

Reviewed-by: Lynne <dev@lynne.ee>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30671>
2024-08-16 13:35:22 +10:00
Dave Airlie
1b4ae3d7af vulkan/video: handle KHR_video_maintenance1 lack of profile list.
VK_KHR_video_maintenance1 allows no profile in which cases drivers
should just be pessimisitic.

Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30671>
2024-08-16 13:31:41 +10:00
David Rosca
b48bc87783 radv/video: Add support for 12-bit AV1 decode
Reviewed-by: Lynne <dev@lynne.ee>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30551>
2024-08-16 02:41:30 +00:00
David Rosca
4dbb9f5355 vulkan/format: Add VK_FORMAT_G12X4_B12X4R12X4_2PLANE_420_UNORM_3PACK16
Used for 12-bit AV1.

Reviewed-by: Lynne <dev@lynne.ee>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30551>
2024-08-16 02:41:30 +00:00
Timothy Arceri
08b93c841a nir: make static assert more flexible
The static assert used in encode deref modes used the fact there was
less than 16 modes that we wanted to compress as an opportunity to reuse
MODE_ENC_GENERIC_BIT as it just happened to represent 16. However if we
add more than 16 modes i.e need to compress to 6 bits not 5 bits then
MODE_ENC_GENERIC_BIT becomes 32 and the logic in the assert breaks.

Instead we more precisely make sure MODE_ENC_GENERIC_BIT is large
enough to fit all but the last 4 generic modes and that the last 4 modes
defined in the enum are in fact the 4 generic modes.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30654>
2024-08-15 23:02:20 +00:00
Faith Ekstrand
85a70bbc05 nvk: Enable shader bounds checking when nullDescriptor is enabled
Fixes: c9eac89da8 ("nvk: Advertise VK_EXT_robustness2")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30663>
2024-08-15 22:25:13 +00:00
Faith Ekstrand
8445190663 nvk: Plumb the whole vk_pipeline_robustness_state through to nvk_ubo/ssbo_addr_format
Fixes: c9eac89da8 ("nvk: Advertise VK_EXT_robustness2")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30663>
2024-08-15 22:25:13 +00:00
Faith Ekstrand
6ae401aa86 vulkan: Add null descriptor bits to vk_pipeline_robustness_state
Fixes: c9eac89da8 ("nvk: Advertise VK_EXT_robustness2")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30663>
2024-08-15 22:25:13 +00:00
Matt Turner
c437f2e79c nir/tests: Add tests for opt_if_merge
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30629>
2024-08-15 20:34:54 +00:00
Matt Turner
d2e6be94ae nir: Skip opt_if_merge when next_if has block ending in a jump
Similar to commit 6cef804067 ("nir/opt_if: fix opt_if_merge when
destination branch has a jump"), we shouldn't combine if statements when
the second if-then-else has a block that ends in a jump.

This fixes a case where opt_if_merge combines

    if (cond) {
        [then-block-1]
    } else {
        [else-block-1]
    }

    if (cond) {
        [then-block-2]
    } else {
        [else-block-2]
    }

where `then-block-2` or `else-block-2` ends in a jump. The phi nodes
following the control flow will be incorrectly updated to have an input
from a block that is not a predecessor.

Fixes: 4d3f6cb973 ("nir: merge some basic consecutive ifs")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30629>
2024-08-15 20:34:54 +00:00
Ruijing Dong
b9c1fcc59b radeonsi/vcn: qp map IB package sent by default
This is to support QP map enabled and disabled mixed case.
When qp map disabled, it still needs the IB package to tell
VCN engine qp map is not needed.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30665>
2024-08-15 18:16:06 +00:00
Ruijing Dong
ac45948136 frontends/va: reset roi number
reason:
   roi number is an indication to do qp_map in vcn encoder.
   if not resetting this number, the previous roi style
   will be used if not changed, or not used. In the case
   non roi case mixed with roi, the behavior will not be
   expected.

reset roi_num at the beginning of each frame, if application
doesn't send roi map, then roi will be stopped.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30665>
2024-08-15 18:16:06 +00:00
Gurchetan Singh
8485067541 tu: use os_get_total_physical_memory(..)
This is more OS-agnostic.  On Linux, os_get_total_physical_memory(..)
is based on __SC_PHYS_PAGES, which under the hood seems to call
sysinfo:

https://github.com/bminor/glibc/blob/master/sysdeps/unix/sysv/linux/getsysstats.c#L273

As an optimization, perhaps os_get_total_physical_memory(..)
should use sysinfo directly too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30678>
2024-08-15 17:46:37 +00:00
Pavel Ondračka
a1eced7819 mesa: implement GL_FRAMEBUFFER_BLEND query
Right now mesa always returns GL_FULL_SUPPORT, so use the
is_format_supported hook to get the actual info from drivers instead.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30612>
2024-08-15 16:36:17 +00:00
Rhys Perry
aafb49f56b aco: set prefer_remove for gfx9- too
This is a hint that the branch is worth removing. Assume that's the case,
regardless of the gfx level.

fossil-db (vega10):
Totals from 22 (0.03% of 63053) affected shaders:
Instrs: 23927 -> 23856 (-0.30%)
CodeSize: 125096 -> 124812 (-0.23%)
Latency: 138258 -> 137765 (-0.36%)
InvThroughput: 55900 -> 55884 (-0.03%)
Branches: 391 -> 320 (-18.16%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30321>
2024-08-15 16:00:19 +00:00
Rhys Perry
9f1a5645cf aco: completely skip branches if they're never taken
fossil-db (navi21):
Totals from 196 (0.25% of 79395) affected shaders:
Instrs: 101902 -> 101706 (-0.19%)
CodeSize: 576988 -> 576232 (-0.13%)
Latency: 750344 -> 750280 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 119170 -> 119161 (-0.01%)
Branches: 3933 -> 3737 (-4.98%)

fossil-db (vega10):
Totals from 585 (0.93% of 63053) affected shaders:
Instrs: 346877 -> 346292 (-0.17%)
CodeSize: 1810600 -> 1808260 (-0.13%)
Latency: 1817743 -> 1814233 (-0.19%)
InvThroughput: 652142 -> 651944 (-0.03%)
Branches: 5087 -> 4502 (-11.50%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30321>
2024-08-15 16:00:19 +00:00
Rhys Perry
c29d9f1184 aco: only remove branch jumping over SMEM/barrier if it's never taken
SMEM might be an invalid access, and barriers are probably expensive.

fossil-db (navi21):
Totals from 126 (0.16% of 79395) affected shaders:
Instrs: 2764965 -> 2765377 (+0.01%)
CodeSize: 15155348 -> 15156788 (+0.01%)
Latency: 17604293 -> 17604296 (+0.00%)
Branches: 105211 -> 105623 (+0.39%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Backport-to: 24.1
Backport-to: 24.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30321>
2024-08-15 16:00:19 +00:00
Rhys Perry
b934255510 aco: split selection_control_remove into rarely_taken and never_taken
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Backport-to: 24.1
Backport-to: 24.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30321>
2024-08-15 16:00:18 +00:00
Connor Abbott
c59be8516b Revert "tu/a750: Disable HW binning when there is GS"
This reverts commit 7eb6123e98. The root
cause was actually the bug fixed by the previous commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30675>
2024-08-15 15:27:08 +00:00
Connor Abbott
850f2aab03 ir3, tu: Use a UBO for VS primitive params on a750+
Before we were using direct CP_LOAD_STATE, which is broken with multiple
back-to-back draws. This caused regressions in some DX11 traces when
enabling early preamble. We still need to use indirect CP_LOAD_STATE for
VS params, which are sometimes written by the CP, however for everything
else we should use the new UBO path instead.

Fixes: 76e417ca59 ("turnip,ir3/a750: Implement consts loading via preamble")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30675>
2024-08-15 15:27:08 +00:00
Connor Abbott
4f2b5442a6 tu: Fix off-by-one in UBO CP_LOAD_STATE size
It's one header dword and 5 payload dwords. This was papered over by us
not actually using the UBO path for one of the loads, but that's changed
in the next commit.

Fixes: 76e417ca59 ("turnip,ir3/a750: Implement consts loading via preamble")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30675>
2024-08-15 15:27:08 +00:00
Eric Engestrom
4811632bfe nvk/ci: add vkd3d job on the ga106
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30430>
2024-08-15 15:07:54 +00:00
Eric Engestrom
55dcf66f25 ci/build: drop softpipe from s390x job
Suggested-by: @ajax
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30674>
2024-08-15 14:21:48 +00:00
Eric Engestrom
ef36da7726 ci/build: document @ajax as a stakeholder for s390x
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30674>
2024-08-15 14:21:48 +00:00
Eric Engestrom
a51ae80c19 ci/build: add comment to explain why s390x is useful
And disambiguate with s390 which is dead but is a different thing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30674>
2024-08-15 14:21:48 +00:00
Job Noorman
f448cf90c8 zink/ci: add a618 flake
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Job Noorman
72bb4d79dc ir3/legalize: handle scalar ALU WAR hazards for a0.x
It turns out that mova executes on the normal pipeline, which means that
users of a0.x on the scalar pipeline might cause a WAR hazard with mova.

Fixes: 876c5396a7 ("ir3: Add support for "scalar ALU"")
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Job Noorman
dead168200 ir3: make fullsync sync after shared writes
fullsync would only sync after cat4/5/6 instructions. However, since the
introduction of scalar ALU, we also need to sync after writes to shared
registers. This commit fixes this by using the is_ss/sy_producer
helpers. This should also catch all cases where (ss) is need for WAR
hazards.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Job Noorman
2e40dda3cd ir3/ci: remove fixed tests from a307-fails
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Job Noorman
83b55a7d7c ir3: use correct bit size for bools in emit_alu
The special case for 32b bools on pre-a5xx gens was not taken into
account everywhere.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Job Noorman
cf395d1437 ir3: use rpt instructions for frag coord
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Job Noorman
6e6b338f33 ir3: add support for rpt bary.f/flat.b
These can be repeated like other instructions with one interesting
wrinkle: their immediate input location can also be repeated and its
value gets incremented by one for every repeat. They seem to be the only
instructions to support this.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Job Noorman
4a6d48cf4c ir3: enable load/store_const_ir3 vectorization
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Job Noorman
9998b65695 nir/load_store_vectorize: add load/store_const_ir3
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Job Noorman
db2859cb7f nir/load_store_vectorize: support stores without wrmask
Some store intrinsics (e.g., store_const_ir3) don't have a wrmask so
don't assume it always exists.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00
Job Noorman
97aefc4405 nir/load_store_vectorize: support non-byte offset
Some load/store intrinsics (e.g., load/store_const_ir3) use offsets in
units other than bytes. Currently, byte offsets were assumed in multiple
places.

This patch adds a new offset_scale field to intrinsic_info and uses it
were needed.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
2024-08-15 12:07:27 +00:00