ir3: make fullsync sync after shared writes

fullsync would only sync after cat4/5/6 instructions. However, since the
introduction of scalar ALU, we also need to sync after writes to shared
registers. This commit fixes this by using the is_ss/sy_producer
helpers. This should also catch all cases where (ss) is need for WAR
hazards.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
This commit is contained in:
Job Noorman 2024-08-15 08:46:36 +02:00 committed by Marge Bot
parent 2e40dda3cd
commit dead168200

View file

@ -1350,8 +1350,7 @@ dbg_sync_sched(struct ir3 *ir, struct ir3_shader_variant *so)
{
foreach_block (block, &ir->block_list) {
foreach_instr_safe (instr, &block->instr_list) {
if (opc_cat(instr->opc) == 4 || opc_cat(instr->opc) == 5 ||
opc_cat(instr->opc) == 6) {
if (is_ss_producer(instr) || is_sy_producer(instr)) {
struct ir3_instruction *nop = ir3_NOP(block);
nop->flags |= IR3_INSTR_SS | IR3_INSTR_SY;
ir3_instr_move_after(nop, instr);