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ir3: make fullsync sync after shared writes
fullsync would only sync after cat4/5/6 instructions. However, since the introduction of scalar ALU, we also need to sync after writes to shared registers. This commit fixes this by using the is_ss/sy_producer helpers. This should also catch all cases where (ss) is need for WAR hazards. Signed-off-by: Job Noorman <jnoorman@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28341>
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1 changed files with 1 additions and 2 deletions
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@ -1350,8 +1350,7 @@ dbg_sync_sched(struct ir3 *ir, struct ir3_shader_variant *so)
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{
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foreach_block (block, &ir->block_list) {
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foreach_instr_safe (instr, &block->instr_list) {
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if (opc_cat(instr->opc) == 4 || opc_cat(instr->opc) == 5 ||
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opc_cat(instr->opc) == 6) {
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if (is_ss_producer(instr) || is_sy_producer(instr)) {
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struct ir3_instruction *nop = ir3_NOP(block);
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nop->flags |= IR3_INSTR_SS | IR3_INSTR_SY;
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ir3_instr_move_after(nop, instr);
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