Commit graph

212460 commits

Author SHA1 Message Date
Qiang Yu
faebbf9640 mesa: fix draw mesh shader indirect buffer size check
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We should not count the last draw command stride padding in
the indirect buffer.

Fixes: 176740c26f4 ("mesa: implement mesh shader draw calls")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37392>
2025-09-18 01:38:08 +00:00
Chia-I Wu
85ec0fffa2 panvk: use common calibrated timestamp support
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It does not look like our custom version has anything special to offer.

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37421>
2025-09-17 22:55:23 +00:00
Chia-I Wu
e9444b28fd panvk: require gpu_can_query_timestamp for calibrated timestamps
Advertise the extensions without VK_TIME_DOMAIN_DEVICE_KHR support is
not very useful.

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37421>
2025-09-17 22:55:23 +00:00
Paulo Zanoni
25d26a89e3 isl: allow sparse with STC_CCS on DG2
Thanks to Nanley Chery for pointing out this possibility.

v2: Make it simpler (Nanley).

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37419>
2025-09-17 21:42:58 +00:00
Paulo Zanoni
7dd66d6bb1 isl: allow sparse with CCS on Xe2 and newer
When the auxiliary surface is handled by the hardware directly,
there's nothing to bind besides the main pixels, so we can allow
sparse without doing anything else. We can't do this in the exact same
way with DG2 (which has_flat_ccs) because it uses the
aux_state_tracking_buffer.

v2: Fix spelling (Nanley).

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37419>
2025-09-17 21:42:58 +00:00
Paulo Zanoni
e7fd99c205 intel: rework the way sparse forces CCS/MCS/HIZ to be disabled
We want to be a little more granular than just "aux surfaces are
completely incompatible with sparse!", so have each of
isl_surf_get_*_surf disable itself when sparse is used.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37419>
2025-09-17 21:42:58 +00:00
Gert Wollny
3b3c3ccf56 nir+r600: add option to avoid contracting fabs into ffma
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On r600 ternary operations can't use the fabs source modifier, so
converting "fadd(fabs(fmul(a, b), c)" to  "ffma(fabs(a), fabs(b), c)"
adds one more instruction in the backend, hence avoid this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37440>
2025-09-17 21:03:58 +00:00
Christian Gmeiner
a7d2570296 nir/opt_algebraic: optimize f2i32(fround_even(x)) to f2i32_rtne(x)
Add late optimization to fuse f2i32 and fround_even operations into a
single f2i32_rtne instruction when the intermediate fround_even result
is only used once. This eliminates redundant rounding since f2i32_rtne
performs round-to-nearest-even conversion directly.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Tested-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37426>
2025-09-17 20:31:59 +00:00
Emma Anholt
0f320b7a1d d3d10umd: Add missing dependency on u_formats codegen.
Fixes this error during Shader.cpp build:

..\src\util/format/u_formats.h(33): fatal error C1083: Cannot open include file: 'util/format/u_format_gen.h': No such file or directory

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37316>
2025-09-17 12:04:37 -07:00
Emma Anholt
114e6a3104 ir3: Use a linear allocation context for ir3_instructions.
Again, instrs don't get freed as we go, so the linear gc context saves us
5 pointers per instr.

Fossil replay time for deadspace3 on a debugoptimized build -4.85258% +/-
3.04009% (n=10)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37316>
2025-09-17 12:02:47 -07:00
Emma Anholt
12fae29ec2 ir3: Use a linear allocation context for ir3_registers.
Since we don't free registers as we go, we can just allocate them in a
linear gc context that gets freed at ralloc destroy.  Saves 5 pointers of
memory per register for the ralloc overhead.

Fossil replay time for deadspace3 on a debugoptimized build -4.30353% +/-
1.80078% (n=10).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37316>
2025-09-17 12:02:47 -07:00
Emma Anholt
1b4c2c1566 ir3: Use a bitset for the defs-seen table.
Fossil reply time for deadspace3 on a debugoptimized build -3.20856% +/-
1.48994% (n=15).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37316>
2025-09-17 12:02:47 -07:00
Eric Engestrom
144879ca40 doc/features.txt: add missing supported dzn extensions
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37404>
2025-09-17 16:09:29 +00:00
Eric Engestrom
102017f2ca docs: add sha sum for 25.2.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37446>
2025-09-17 16:04:42 +00:00
Eric Engestrom
d816a0eb2a docs: add release notes for 25.2.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37446>
2025-09-17 16:04:42 +00:00
Eric Engestrom
b0171edda7 docs: update calendar for 25.2.3
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37446>
2025-09-17 16:04:42 +00:00
Icenowy Zheng
44aa7cfb4f pvr: implement samplerAnisotropy
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36242>
2025-09-17 15:44:32 +00:00
Dylan Baker
209deff350 calendar: Update release dates and change 25.3 to Dylan
We'll pull the calendar in to regularly scheduled time, and then cut a
couple of 25.2 releases we shouldn't need.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37443>
2025-09-17 15:39:14 +00:00
Karmjit Mahil
9c6183604f nir, ir3: Add lower_fmulz_with_abs_min backend option
This commits adds the `lower_fmulz_with_abs_min` which lowers
`fmulz` -> `min(abs(a), abs(b)) == 0.0 ? 0.0 : a * b`
`ffmaz` -> `min(abs(a), abs(b)) == 0.0 ? c : ffma(a, b, c)

This is useful for ISAs which have `abs` for free on `min` such as
ir3.

Adreno A750 Benchmark of 10 runs of 5 DX9 single frame trimmed
captures looped 2048 times using u_trace measuring
`start_render_pass` to `end_render_pass` results:

sysmem:
-1.91156%, -2.21791%, -2.02533%, -2.21666%, -2.33272%,
-2.67349%, -1.75278%, -2.05923%, -2.26892%, -2.10506%
Avg:  ~ -2.16%
ST.S: ~  0.25%

gmem:
-3.61496%, -3.66682%, -3.80901%, -3.51198%, -3.72950%,
-3.71413%, -3.64467%, -3.67092%, -3.90640%, -3.83888%
Avg:  ~ -3.71%
ST.S: ~  0.12%

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31479>
2025-09-17 15:02:50 +00:00
Karmjit Mahil
8d19ffef0a nir: Add more matches for fmulz
In some cases after other passes, `(a == 0.0 ? 0 : b)` can be
turned into `(a != 0.0 ? b : 0)`, so let's match those cases too.

Also matching `min(abs(a), abs(b)) == 0.0 ? 0.0 : a * b`.

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31479>
2025-09-17 15:02:50 +00:00
Mike Blumenkrantz
c85168160e zink: reset batch states on destroy
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these may otherwise have been in the reset queue and thus contain
resource refs

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37379>
2025-09-17 10:00:26 -04:00
Mike Blumenkrantz
2330839641 zink: null out zink_batch_state::ctx when adding to the screen list
this otherwise leaves a dangling pointer

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37379>
2025-09-17 10:00:25 -04:00
Mike Blumenkrantz
e64f0414b3 zink: check for zink_batch_state::ctx before using during descriptor state reset
this is a screen function, so ctx may be null

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37379>
2025-09-17 10:00:23 -04:00
Mike Blumenkrantz
0df1fcd0b3 zink: call post_submit directly from submit_queue
this should all happen as a unit to ensure the batch state is not
modified before post_submit mechanics trigger

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37379>
2025-09-17 10:00:21 -04:00
Mike Blumenkrantz
7e101873ea zink: prune active queries in reset_batch_state_ctx()
these need the context

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37379>
2025-09-17 10:00:19 -04:00
Mike Blumenkrantz
6369dbd6be zink: account for kopper dt not having a swapchain when pruning batch usage
this could be pending deletion

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37379>
2025-09-17 10:00:18 -04:00
Mike Blumenkrantz
61633e0a2e zink: wait on queues during screen destroy
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there might somehow be operations active

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36289>
2025-09-17 11:59:19 +00:00
Rhys Perry
8931672eef aco: workaround load tearing for load_shared2_amd
This probably has the same issue as load_shared.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 04956d54ce ("aco: force uniform result for LDS load with uniform address if it can be non uniform")
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37417>
2025-09-17 11:29:21 +00:00
Rhys Perry
810d4ff299 nir/lower_atomics: set ACCESS_COHERENT
The lack of ACCESS_COHERENT was probably fine, the worst it would do would
add a pointless iteration after loading an out-of-date value.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37417>
2025-09-17 11:29:21 +00:00
Rhys Perry
e819160705 nir/lower_atomics_to_ssbo: set ACCESS_COHERENT for loads
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37417>
2025-09-17 11:29:21 +00:00
Rhys Perry
a0a458c445 zink/ntv: use MakePointerAvailable/Visible for shared load/store
These are always workgroup coherent in NIR.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37417>
2025-09-17 11:29:21 +00:00
Rhys Perry
5d2c17a5fd vtn: skip make-available/visible for shared
These barriers could prevent optimizations.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37417>
2025-09-17 11:29:21 +00:00
Rhys Perry
d1e230454d zink/ntv: fix coherent image load/store
The SPIR-V didn't seem to use coherent load/store.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37417>
2025-09-17 11:29:21 +00:00
Eric Engestrom
f99230cc67 docs/release-calendar: add 25.2.x dates, and 25.3 branchpoint and release candidates
I'm having hip surgery (same surgery as last year, other hip) on Oct 22,
which I'm hoping goes well and hoping (and expecting) that I'll have
recovered enough after a week to be able to sit with my laptop for long
enough chunks to do release management.

Worst case, if I can't do it I'll push back the 25.2.6 release by
a week, but I think I'll keep the branchpoint as that one doesn't take
much work as there's nothing to backport, just creating a couple of
branches and tags, and setting up a worktree locally which I can do in
advance (and have just done so).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37435>
2025-09-17 11:11:34 +00:00
Christoph Pillmayer
cc5c1c65ef pan/va: Remove redundant MOVs from va_lower_split_64bit
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To lower 64bit sources we emit a COLLECT -> SPLIT pair to force
allocation into consecutive registers. When the sources for COLLECT
are outputs of the same SPLIT already, we can omit the COLLECT + SPLIT
pair.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Aksel Hjerpbakk <aksel.hjerpbakk@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37398>
2025-09-17 10:44:14 +00:00
Jose Maria Casanova Crespo
c83fddb9ed v3d: use helpers util_writes_depth/stencil
The helpers already take into account when depth/stencil ops
don't imply writes.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37397>
2025-09-17 10:27:31 +00:00
Christian Gmeiner
3f060b1467 clang-format: Add src/imagination to .clang-format-include
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37222>
2025-09-17 10:05:18 +00:00
Christian Gmeiner
48be3799b3 imagination: Re-format using clang-format
No manual changes here, this is simply running
$ ninja -C build/ clang-format

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37222>
2025-09-17 10:05:18 +00:00
Rhys Perry
81df517553 aco: avoid unaligned offsets when selecting load_global_amd
SMEM instructions mask off the low bits for the base and offset sources
both before and after they're added. However, NIR expects ACO to only
care about the alignment of the final address.

fossil-db (gfx1201):
Totals from 21 (0.03% of 79839) affected shaders:
Instrs: 229780 -> 229876 (+0.04%)
CodeSize: 1267724 -> 1268080 (+0.03%)
Latency: 2800924 -> 2800978 (+0.00%)
InvThroughput: 520250 -> 520256 (+0.00%)
Copies: 27878 -> 27876 (-0.01%); split: -0.01%, +0.00%
SALU: 29591 -> 29643 (+0.18%)

fossil-db (polaris10):
Totals from 3 (0.00% of 62201) affected shaders:
Latency: 2651 -> 2652 (+0.04%)
InvThroughput: 662 -> 663 (+0.15%)
PreSGPRs: 51 -> 54 (+5.88%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37301>
2025-09-17 09:15:46 +00:00
Rhys Perry
6d71521ecd aco: avoid wraparound for smem global loads with both offsets
fossil-db (gfx1201):
Totals from 296 (0.37% of 79839) affected shaders:
Instrs: 382593 -> 380149 (-0.64%)
CodeSize: 1981452 -> 1970988 (-0.53%); split: -0.53%, +0.00%
Latency: 1575286 -> 1574252 (-0.07%)
InvThroughput: 215839 -> 215818 (-0.01%)
SClause: 8679 -> 8677 (-0.02%); split: -0.03%, +0.01%
Copies: 19642 -> 19641 (-0.01%); split: -0.03%, +0.02%
PreSGPRs: 14521 -> 14515 (-0.04%)
SALU: 57097 -> 55718 (-2.42%)

fossil-db (polaris10):
Totals from 30 (0.05% of 62201) affected shaders:
Instrs: 23341 -> 23379 (+0.16%); split: -0.01%, +0.18%
CodeSize: 121316 -> 121516 (+0.16%); split: -0.01%, +0.17%
SGPRs: 2368 -> 2384 (+0.68%)
Latency: 235153 -> 235374 (+0.09%); split: -0.01%, +0.11%
InvThroughput: 92582 -> 92566 (-0.02%)
SClause: 616 -> 619 (+0.49%)
Copies: 2717 -> 2720 (+0.11%)
PreSGPRs: 1204 -> 1213 (+0.75%)
SALU: 3654 -> 3692 (+1.04%); split: -0.08%, +1.12%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Backport-to: 25.2
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37301>
2025-09-17 09:15:46 +00:00
Tapani Pälli
7f63279307 anv: remove assert, group can have 0 shaders in it
This seems to be equal assert with febe90e109 as we hit this when
launching Quake II RTX.

Fixes: 69b6b4cb28 ("anv: add shader instruction emission")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37429>
2025-09-17 08:54:00 +00:00
Juston Li
867846d2bc android/gralloc0: add CROS_GRALLOC_DRM_GET_BUFFER_COLOR_INFO
Some checks are pending
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Implement retrieving color buffer info via gralloc0. This is a simpler
alternative to imapper4/5 which requires a dependency on libui that
would require a heavy effort to import headers and stub to be able to
build out of tree.

Since VNDK no longer releases headers since API Level 35 and they are
now only auto-generated, copy over the neccessary defines.

Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37185>
2025-09-17 08:01:41 +00:00
Valentine Burley
360593c2a0 zink/ci: Document flakes on Cezanne
c39123c74d ("zink: implement mesh shaders") added these flakes for the
other RADV jobs, add them for Cezanne too.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37430>
2025-09-17 07:45:10 +00:00
Yonggang Luo
3271b28864 ci/windows: Update documents to use winget
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37210>
2025-09-17 06:53:33 +00:00
Yonggang Luo
f0a811bb44 ci/windows: Bump image tag for enable d3d10umd building
This is achieved by install Windows DDK

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37210>
2025-09-17 06:53:33 +00:00
Yonggang Luo
d0e2e7640d ci/windows: Bump llvm and SPIRV-LLVM-Translator version tag
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37210>
2025-09-17 06:53:33 +00:00
Yonggang Luo
9592686ca0 ci/windows: Use winget to install packages and install Microsoft.WindowsWDK.10.0.26100
And switch all packages use winget to install.

bloodrock.pkg-config-lite according https://github.com/microsoft/winget-pkgs/pull/284186
WinFlexBison.win_flex_bison according https://github.com/microsoft/winget-pkgs/pull/284202
Git.Git already contains 'GitHub.GitLFS' according https://github.com/microsoft/winget-pkgs/issues/276985

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37210>
2025-09-17 06:53:33 +00:00
Yonggang Luo
efb31e2e6a ci/windows: Now building the deps with MSVC 2019
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37210>
2025-09-17 06:53:33 +00:00
Yonggang Luo
917938ddd8 ci/windows: Rename to mesa_deps_packages.ps1
As we will use winget instead of chocolatey in latter commit

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37210>
2025-09-17 06:53:32 +00:00
Yonggang Luo
cdaa68cf81 ci/windows: Improve ci scripts
Remove more generated files
deps are removed
args need to be quoted.

Add example to run mesa_vs docker image

pass args to choose MSVC version properly

Add EXTRA_MESON_ARGS for meson configure

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37210>
2025-09-17 06:53:32 +00:00