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isl: allow sparse with STC_CCS on DG2

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Thanks to Nanley Chery for pointing out this possibility.

v2: Make it simpler (Nanley).

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37419>
This commit is contained in:
Paulo Zanoni 2025-09-17 09:47:59 -07:00 • committed by Marge Bot
parent 7dd66d6bb1
commit 25d26a89e3
1 changed files with 9 additions and 2 deletions
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11
src/intel/isl/isl.c
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@ -3880,8 +3880,15 @@ _isl_surf_info_supports_ccs(const struct isl_device *dev,
/* Xe2 and newer don't require additional space to be allocated by the
* driver for plain CCS, so we can trivially allow sparse.
*/
if (ISL_GFX_VER(dev) < 20 && (usage & ISL_SURF_USAGE_SPARSE_BIT))
return false;
if (ISL_GFX_VER(dev) < 20 && (usage & ISL_SURF_USAGE_SPARSE_BIT)) {
if (dev->info->has_flat_ccs) {
/* Here we can allow STC_CCS for the same reason. */
if (!isl_surf_usage_is_stencil(usage))
return false;
} else {
return false;
}
}
if (usage & ISL_SURF_USAGE_DISABLE_AUX_BIT)
return false;