Commit graph

1312 commits

Author SHA1 Message Date
Marek Olšák
688a639117 nir: add nir_tex_instr::can_speculate
Set to true everywhere except:
- spirv_to_nir used by Vulkan
- bindless handles in GLSL
- some internal shaders and driver-specific code

Acked-by: Job Noorman <job@noorman.info>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36099>
2025-07-24 18:41:38 +00:00
Faith Ekstrand
9fbb57e0a4 nir,nak: Add a nir_texop_sample_pos_nv and plumb it through
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36207>
2025-07-18 22:21:46 +00:00
Karol Herbst
3a2f38cd44 vtn/opencl: set exact on all ffmas and mads
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Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36175>
2025-07-17 16:47:23 +00:00
Caio Oliveira
ea9deafff4 spirv: Add more restrictions around Blocks
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And take advantage of the new restriction to skip the ptr_as_array case
for Blocks.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36049>
2025-07-12 14:46:23 +00:00
Daniel Schürmann
2c51a8870d nir: add nir_vectorize_cb callback parameter to nir_lower_phis_to_scalar()
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Similar to nir_lower_alu_width(), the callback can return the
desired number of components for a phi, or 0 for no lowering.

The previous behavior of nir_lower_phis_to_scalar() with lower_all=true
can be elicited via nir_lower_all_phis_to_scalar() while the previous
behavior with lower_all=false now corresponds to nir_lower_phis_to_scalar()
with NULL callback.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35783>
2025-07-08 15:33:59 +00:00
David Neto
673f684ddd nir: Support printing cmat constants
A cooperative matrix can only be constructed from a single
scalar value. Print that value, wrapped by a function call that
looks like a type-constructor.

This adds a test case that will otherwise assert out in spirv2nir.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35757>
2025-07-02 16:48:51 +00:00
Konstantin Seurer
42c2ccbfb2 spirv: Move the shader_call_data workaround above nir_validate_shader
Prevents validation failures.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35532>
2025-06-26 06:30:44 +00:00
Georg Lehmann
bdd2c7b9f2 spirv: implement CooperativeMatrixConversionsNV
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34793>
2025-06-24 07:14:34 +00:00
David Neto
e9b9f1f764 spirv: spirv-to-c-array: use '-' to specify stdin
The spirv-to-c-array.py script assembles a SPIR-V module,
then disassembles it, capturing that text, then re-assembles
that text, providing it on stdin. But this last invocation of
spirv-as must use '-' to specify that the text input appears
on stdin.

Currently it always errors out, complaining that there must
be exactly one input file.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35691>
2025-06-23 21:24:56 +00:00
Georg Lehmann
a1b88fcd8c spirv: support float8 capabilities
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
2025-06-23 07:59:25 +00:00
Georg Lehmann
51d3c4c889 spirv: support float8 spec constant op
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
2025-06-23 07:59:25 +00:00
Georg Lehmann
55b2f4958f spirv: create float8 types
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
2025-06-23 07:59:25 +00:00
Georg Lehmann
e19ccb00f2 spirv: support float8 conversions
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
2025-06-23 07:59:24 +00:00
Georg Lehmann
30ec9ed1cf spirv,nir: emit saturating float8 cmat convert
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
2025-06-23 07:59:24 +00:00
Georg Lehmann
d0ac1cfb0d spirv: vtn_has_decoration helper
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
2025-06-23 07:59:24 +00:00
Georg Lehmann
9da23499ff compiler: add float8 glsl types
e4m3fn: 8bit floating point format with 4bit exponent, 3bit mantissa
        and no infinities (finite only)
e5m2:   8bit floating point format with 5bit exponent, 2bit mantissa
        and with infinities.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
2025-06-23 07:59:24 +00:00
Karol Herbst
1a5b5a883d vtn: mark BitInstructions cap as supported
It simply enables certain Shader only instructions for Kernels.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35448>
2025-06-18 10:13:44 +00:00
Georg Lehmann
ad80b554f4 spirv: use feq for OpIsInf
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This effectively reverts fcca6a83cd because feq was clarified to be ordered
when used with exact and without fast math flags.

It's common for HW to only have free abs for floating point instructions.

Foz-DB Navi21:
Totals from 63 (0.08% of 80065) affected shaders:
Instrs: 337027 -> 336667 (-0.11%); split: -0.12%, +0.02%
CodeSize: 1846752 -> 1845000 (-0.09%); split: -0.13%, +0.03%
Latency: 3401087 -> 3400633 (-0.01%); split: -0.04%, +0.03%
InvThroughput: 847299 -> 845939 (-0.16%); split: -0.19%, +0.03%
VClause: 7693 -> 7694 (+0.01%)
Copies: 45175 -> 45240 (+0.14%); split: -0.12%, +0.27%
PreSGPRs: 3555 -> 3553 (-0.06%)
PreVGPRs: 4565 -> 4564 (-0.02%)
VALU: 225473 -> 225245 (-0.10%); split: -0.13%, +0.03%
SALU: 44735 -> 44625 (-0.25%)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35437>
2025-06-11 18:34:21 +00:00
Rob Clark
cd4f6caa0d vtn: Handle non-32b tex dests
With cl_khr_fp16 we can get texture instructions w/ f16 dest.  Not all
drivers handle this, so convert to 32b dest and insert alu conversion to
the requested type.  Drivers that can handle f16 texture loads would
fold away the extra conversion with nir_opt_16bit_tex_image.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35470>
2025-06-11 17:48:10 +00:00
Lionel Landwerlin
49def5ca9d spirv: bump headers
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35382>
2025-06-06 14:38:17 +00:00
Karol Herbst
aa5a981b83 vtn/opencl: support fp16 builtins
If we can't find an appropiate builtin in the libclc library, we add our
own wrapper at runtime executing the op in fp32 space.

Libclc has variying support for fp16 opcodes and with a libclc prior
llvm-19 it does not work as good as with the newer one.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34053>
2025-06-05 13:17:27 +00:00
Samuel Pitoiset
2474118a06 spirv: disable mediump for bitfield insert/extract
This prevents a regression with the next change that generalizes
bitfield insert/extract sizes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35209>
2025-06-04 09:37:53 +00:00
Adam Jackson
4b1c824b67 vtn/opencl: Handle OpenCLstd_F{Min,Max}_common
Normal fmin doesn't make any promises about NaN, common additionally
doesn't make any promises about infinities. Would be nice to hook that
up to codegen but lowering them to normal works for now.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34941>
2025-05-28 01:08:20 +00:00
Adam Jackson
92f07860a4 vtn: (Silently) handle FunctionParameterAttributeNo{Capture,Write}
Silences a few thousand warnings in sycl/test-e2e

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34941>
2025-05-28 01:08:20 +00:00
Adam Jackson
fd7589d775 vtn: Handle SPV_KHR_uniform_group_instructions
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34941>
2025-05-28 01:08:20 +00:00
Karol Herbst
abbb0c0125 vtn: fix use-after-free on function parameter names
Fixes: 5d7a230324 ("vtn: gather function parameter names")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35098>
2025-05-22 22:59:08 +00:00
Karol Herbst
bc444f6d26 nir: fix use-after-free on function parameter names
Fixes: 3da8444be5 ("nir: add names to function parameters")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35098>
2025-05-22 22:59:08 +00:00
Alyssa Rosenzweig
063d35b829 vtn: ignore SpvDecorationFPFastMathMode
This is just a hint as far as I can tell. We're allowed to ignore it (as we do),
we just shouldn't be warning about it.

This quiets piles of annoying SPIR-V warnings when running CTS.

    SPIR-V WARNING:
        In file ../src/compiler/spirv/vtn_cfg.c:144
        Function parameter Decoration not handled: SpvDecorationFPFastMathMode
        1340 bytes into the SPIR-V binary

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34909>
2025-05-14 11:29:09 -04:00
Alyssa Rosenzweig
92f553bcff vtn: remove spurious texel buffer warning
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The spec text here is:

   Image Type must be an OpTypeImage. It is the type of the image in the
   combined sampler and image type. It must not have a Dim of SubpassData.
   Additionally, starting with version 1.6, it must not have a Dim of Buffer.

For older SPIR-V versions, there is no analogous requirement. It is implicitly
valid to use a Dim of Buffer (even though it doesn't make much sense). Should
apps do it anyway? Probably not, but it doesn't matter and they do.
glslang considers this requirement relevant only for 1.6+:

   if (glslangIntermediate->getSpv().spv >= glslang::EShTargetSpv_1_6 &&
       texType.getSampler().isBuffer()) {
       // SamplerBuffer is not supported in spirv1.6 so
       // `samplerBuffer(textureBuffer, sampler)` is a no-op
       // and textureBuffer is the result going forward
       constructed = arguments[0];
   } else
       constructed = builder.createOp(spv::OpSampledImage, resultType(), arguments);

That means SPIR-V with an older declared version will warn even with a glslang
new enough to know about the 1.6 requirement. That includes a *lot* of SPIR-V's
built with the CTS.

I see no compelling reason to keep the warning for older than 1.6. Removing the
spurious warning silences a *huge* amount of noise from dEQP-VK (plus a bit from
KHR-GL46). In exchange I see very little tradeoff, it's not really our job to
lint for best practices not in the spec.

I see two viable options:

1. Try to convince the whole ecosystem outside of Mesa to pivot to our pedantic
   reading of the spec and get them to update all the old SPIR-V binaries in the
   wild, in the case of CTS being changed at the glslang level and then
   trickling down into CTS.
2. Merge this patch, simplifying Mesa and immediately forget about this forever.

I'm spending all my FOSS political capital on kernel upstreaming so I have a
strong preference for #2, aka hitting Marge on this MR and then moving on with
all of our lives.

("Ignore the problem and make deqp-runner annoying to use" is the secret 3rd
option I'd rather not do.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34847>
2025-05-07 22:26:02 +00:00
Samuel Pitoiset
02d7c8f9d3 spirv: Update the JSON and headers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34810>
2025-05-05 15:02:19 +00:00
Rhys Perry
1d7a988ec2 vtn: use nir_const_value_for_raw_uint for bfloat SpecConstantOp/FConvert
I'm not sure how this was supposed to ensure padding was zero, and it
doesn't seem to work for me (GCC 15.0.1).

Fixes a NIR validation failure with dEQP-VK.glsl.bfloat16.constant.compute
and RADV.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 90e1b12890 ("spirv: Add bfloat16 support to SpecConstantOp")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34769>
2025-05-01 10:52:30 +00:00
Rohan Garg
2bbe042e87 spirv: Enable bfloat16 capabilities
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
e0b195cadb spirv: Use bfdot for SpvOpDot with BFloat16
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
2807097690 spirv: Implement Conversions to/from bfloat16
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
90e1b12890 spirv: Add bfloat16 support to SpecConstantOp
Handle bfloat16 by converting sources to float, performing the
operation, and converting result back to bfloat16 if needed.  This is
done because not all ALU ops have a `bf` version in NIR.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Rohan Garg
dc8074683d spirv: construct a bfloat16 from the given SPIR-V bitsize and encoding
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
fb6ae2eac1 spirv: Refactor to use glsl_type to pick ALU ops
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Caio Oliveira
bba607ac2b spirv: Move Convert opcodes handling to its own function
Take the opportunity to add a comment about why the bit_size
comes from the NIR def and not the original type.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:37 +00:00
Rohan Garg
9e5d7eb88d compiler/types: add a bfloat16 type
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34105>
2025-04-29 16:29:36 +00:00
Caio Oliveira
33295b2249 spirv, nir: Allow non-Aliased workgroup memory blocks
Allocate space for the aliased region first, then allocate the
non-Aliased blocks in sequence after that.

SPV_KHR_workgroup_memory_explicit_layout extension added support for
having Blocks of workgroup (shared) memory, which include layout
decoration.  For that extension all such blocks must be decorated with
Aliased.

SPV_KHR_untyped_pointers extension lifts that requirement, allowing
blocks that don't alias in workgroup memory.  They are still explicitly
laid out.

The motivation is that untyped pointers provide a different
mechanism to obtain the same effect as the Aliased blocks.  Instead of
having two Aliased variables with different types, have a single
variable and use an untyped pointer with a different type to access it.

This patch is a preparation for supporting untyped pointers.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34139>
2025-04-17 19:13:18 +00:00
Caio Oliveira
fd0a7efb5a spirv, nir: Delay calculation of shared_size when using explicit layout
Move the calculation to nir_lower_vars_to_explicit_types().  This
consolidates the check of shader_info::shared_memory_explicit_layout
in a single place instead of in all drivers.

This is motivated by SPV_KHR_untyped_pointers.  Before that extension
we had essentially two modes for shared memory variables

- No layout decorations in the SPIR-V, and both internal layout and
  driver location was _given by the driver_.

- Explicitly laid out, i.e. they are blocks, and decorated with Aliased.
  Because they all alias, we could assign them driver location directly
  to the start of the shared memory.

With the untyped pointers extension, there's a third option, to be added
by a later commit

- Explicitly laid out, i.e. they are blocks, and NOT decorated
  with Aliased.  Driver location is _given by the driver_.  Blocks
  with and without Aliased can be mixed.

The driver location of multiple blocks that don't alias depend on
alignment that is driver-specific, which we can more easily do from
the nir_lower_vars_to_explicit_types() that already has access to
a function to obtain such value.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> (hk)
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v3dv)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (anv/hasvk)
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> (panvk)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (radv)
Reviewed-by: Rob Clark <robdclark@gmail.com> (tu)
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34139>
2025-04-17 19:13:17 +00:00
Caio Oliveira
d5ad798140 spirv, radv, intel: Add NIR intrinsic for cmat conversion
A cooperative matrix conversion operation was represented in NIR by the
cmat_unary_op intrinsic with an nir_alu_op as extra parameter,
that was already lowered to a specific conversion operation
based on the matrix types.

Instead of that, add a new intrinsic `cmat_convert` that is specific
for that conversion.  In addition to the src/dst matrix descriptions
already available, also include the signedness information in the
intrinsic (reuse nir_cmat_signed for that).  This is needed because
different Convert operations define different interpretations for
integers, regardless their original type.

In this patch, both radv and intel were changed to use the same logic
that was previously used to pick the lowered ALU op.

This change will help represent cmat conversions involving BFloat16,
because it avoids having to create new NIR ALU ops for all the
combinations involving BFloat16.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34511>
2025-04-16 23:13:36 +00:00
Alyssa Rosenzweig
2e15b42eec nir: unvendor lod_bias(_agx)
this will be useful for other backends.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34507>
2025-04-15 14:10:49 +00:00
Konstantin Seurer
ba001626ac nir: Turn the format string index into a const index
It is already expected to be constant.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34208>
2025-04-10 19:31:37 +00:00
Konstantin Seurer
d21926bc04 spirv: Emit code for NonSemantic.DebugPrintf if supported
This can be useful for debugging code in situations where VVL cannot be
used. (DGC, meta shaders)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34208>
2025-04-10 19:31:37 +00:00
Caio Oliveira
b148f57dad spirv: Take a separate data_type when creating a new vtn_variable
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This will be useful for untyped pointers.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34436>
2025-04-09 16:33:03 +00:00
Georg Lehmann
0cad7b0968 spirv: fix cooperative matrix by value function params
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The vtn_ssa_value for a cmat is not backed by a nir_def, but by a nir_variable, so
can't be used directly when calling a function.  In most cases the cmat is used by
reference so code will take the value of deref for it (which is a `nir_def`).

When passing a cooperative matrix to a function by value, let the caller pass the deref
value, and the callee copy to a new local variable from that deref.

Fixes: b98f87612b ("spirv: Implement SPV_KHR_cooperative_matrix")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34364>
2025-04-07 07:53:44 +00:00
Georg Lehmann
c21a53440f spirv: clamp/sign-extend non 32bit ldexp exponents
GLSL.std.450 allows any integer size here.
OpenCL only allows i32.

Cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34071>
2025-04-03 12:35:59 +00:00
Caio Oliveira
f78a27eb18 spirv: In SpecConstantOp handling don't adjust convert ops bit_size twice
After 8fa70cfcfd ("spirv: Use the right bit-size for spec constant
ops") the bit-size will already be adjusted based on the sources, and
this will take care of Convert operations too.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34119>
2025-03-25 04:50:09 +00:00
Caio Oliveira
ca72255114 spirv: Update headers and metadata from latest Khronos commit
This corresponds to 0e710677989b4326ac974fd80c5308191ed80965
("Fix json capabilities for RayTracingOpacityMicromapEXT (#498)")
in https://github.com/KhronosGroup/SPIRV-Headers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34092>
2025-03-25 02:29:26 +00:00