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spirv: Update the JSON and headers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34810>
This commit is contained in:
Samuel Pitoiset
Marge Bot
parent
7e0f157b8a
commit
02d7c8f9d3
2 changed files with 134 additions and 5 deletions
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@ -6300,8 +6300,8 @@
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"operands" : [
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{ "kind" : "IdResult" }
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],
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"capabilities" : [ "RayTracingNV" , "RayTracingKHR", "RayQueryKHR" ],
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"extensions" : [ "SPV_NV_ray_tracing" , "SPV_KHR_ray_tracing", "SPV_KHR_ray_query" ],
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"capabilities" : [ "RayTracingNV" , "RayTracingKHR", "RayQueryKHR", "DisplacementMicromapNV" ],
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"extensions" : [ "SPV_NV_ray_tracing" , "SPV_KHR_ray_tracing", "SPV_KHR_ray_query", "SPV_NV_displacement_micromap" ],
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"version" : "None"
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},
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{
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@ -9999,7 +9999,6 @@
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"operands" : [
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{ "kind" : "IdResultType" },
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{ "kind" : "IdResult" },
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{ "kind" : "IdRef", "name" : "'Result'" },
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{ "kind" : "IdRef", "name" : "'Input'" }
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],
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"capabilities" : [ "FPGARegINTEL" ],
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@ -10639,6 +10638,21 @@
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"capabilities" : [ "SubgroupMatrixMultiplyAccumulateINTEL" ],
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"version" : "None"
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},
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{
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"opname" : "OpBitwiseFunctionINTEL",
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"class" : "Bit",
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"opcode" : 6242,
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"operands" : [
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{ "kind" : "IdResultType" },
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{ "kind" : "IdResult" },
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{ "kind" : "IdRef", "name" : "'A'" },
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{ "kind" : "IdRef", "name" : "'B'" },
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{ "kind" : "IdRef", "name" : "'C'" },
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{ "kind" : "IdRef", "name" : "'LUTIndex'" }
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],
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"capabilities" : [ "TernaryBitwiseFunctionINTEL" ],
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"version" : "None"
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},
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{
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"opname" : "OpGroupIMulKHR",
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"class" : "Group",
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@ -12134,6 +12148,23 @@
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],
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"version" : "1.4"
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},
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{
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"enumerant" : "NonCoherentTileAttachmentReadQCOM",
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"value" : 4489,
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"capabilities" : [ "TileShadingQCOM" ],
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"version" : "None"
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},
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{
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"enumerant" : "TileShadingRateQCOM",
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"value" : 4490,
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"parameters" : [
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{ "kind" : "LiteralInteger", "name" : "'x rate'" },
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{ "kind" : "LiteralInteger", "name" : "'y rate'" },
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{ "kind" : "LiteralInteger", "name" : "'z rate'" }
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],
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"capabilities" : [ "TileShadingQCOM" ],
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"version": "None"
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},
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{
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"enumerant": "EarlyAndLateFragmentTestsAMD",
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"value": 5017,
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@ -12611,6 +12642,12 @@
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"capabilities" : [ "TileImageColorReadAccessEXT" ],
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"version" : "None"
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},
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{
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"enumerant" : "TileAttachmentQCOM",
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"value" : 4491,
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"capabilities" : [ "TileShadingQCOM" ],
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"version" : "None"
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},
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{
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"enumerant" : "NodePayloadAMDX",
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"value" : 5068,
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@ -13265,6 +13302,11 @@
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"value" : 16,
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"version": "1.0"
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},
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{
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"enumerant" : "UnormInt10X6EXT",
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"value" : 17,
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"version": "1.0"
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},
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{
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"enumerant" : "UnsignedIntRaw10EXT",
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"value" : 19,
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@ -13279,6 +13321,31 @@
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"enumerant" : "UnormInt2_101010EXT",
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"value" : 21,
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"version": "1.0"
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},
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{
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"enumerant" : "UnsignedInt10X6EXT",
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"value" : 22,
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"version": "1.0"
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},
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{
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"enumerant" : "UnsignedInt12X4EXT",
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"value" : 23,
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"version": "1.0"
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},
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{
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"enumerant" : "UnsignedInt14X2EXT",
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"value" : 24,
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"version": "1.0"
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},
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{
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"enumerant" : "UnormInt12X4EXT",
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"value" : 25,
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"version": "1.0"
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},
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{
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"enumerant" : "UnormInt14X2EXT",
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"value" : 26,
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"version": "1.0"
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}
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]
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},
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@ -14071,8 +14138,8 @@
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{
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"enumerant" : "PerTaskNV",
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"value" : 5273,
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"capabilities" : [ "MeshShadingNV", "MeshShadingEXT" ],
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"extensions" : [ "SPV_NV_mesh_shader", "SPV_EXT_mesh_shader" ],
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"capabilities" : [ "MeshShadingNV" ],
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"extensions" : [ "SPV_NV_mesh_shader" ],
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"version" : "None"
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},
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{
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@ -15049,6 +15116,24 @@
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"extensions" : [ "SPV_KHR_fragment_shading_rate" ],
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"version" : "None"
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},
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{
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"enumerant" : "TileOffsetQCOM",
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"value" : 4492,
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"capabilities" : [ "TileShadingQCOM" ],
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"version" : "None"
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},
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{
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"enumerant" : "TileDimensionQCOM",
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"value" : 4493,
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"capabilities" : [ "TileShadingQCOM" ],
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"version" : "None"
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},
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{
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"enumerant" : "TileApronSizeQCOM",
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"value" : 4494,
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"capabilities" : [ "TileShadingQCOM" ],
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"version" : "None"
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},
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{
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"enumerant" : "BaryCoordNoPerspAMD",
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"value" : 4992,
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@ -16285,6 +16370,13 @@
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"extensions" : [ "SPV_QCOM_image_processing" ],
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"version" : "None"
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},
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{
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"enumerant" : "TileShadingQCOM",
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"value" : 4495,
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"capabilities" : [ "Shader" ],
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"extensions" : [ "SPV_QCOM_tile_shading" ],
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"version" : "None"
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},
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{
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"enumerant" : "TextureBlockMatch2QCOM",
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"value" : 4498,
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@ -17246,6 +17338,12 @@
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"extensions": [ "SPV_INTEL_subgroup_matrix_multiply_accumulate" ],
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"version" : "None"
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},
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{
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"enumerant" : "TernaryBitwiseFunctionINTEL",
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"value" : 6241,
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"extensions" : [ "SPV_INTEL_ternary_bitwise_function"],
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"version" : "None"
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},
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{
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"enumerant" : "GroupUniformArithmeticKHR",
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"value" : 6400,
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@ -176,6 +176,8 @@ typedef enum SpvExecutionMode_ {
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SpvExecutionModeSignedZeroInfNanPreserve = 4461,
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SpvExecutionModeRoundingModeRTE = 4462,
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SpvExecutionModeRoundingModeRTZ = 4463,
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SpvExecutionModeNonCoherentTileAttachmentReadQCOM = 4489,
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SpvExecutionModeTileShadingRateQCOM = 4490,
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SpvExecutionModeEarlyAndLateFragmentTestsAMD = 5017,
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SpvExecutionModeStencilRefReplacingEXT = 5027,
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SpvExecutionModeCoalescingAMDX = 5069,
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@ -245,6 +247,7 @@ typedef enum SpvStorageClass_ {
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SpvStorageClassImage = 11,
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SpvStorageClassStorageBuffer = 12,
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SpvStorageClassTileImageEXT = 4172,
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SpvStorageClassTileAttachmentQCOM = 4491,
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SpvStorageClassNodePayloadAMDX = 5068,
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SpvStorageClassCallableDataKHR = 5328,
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SpvStorageClassCallableDataNV = 5328,
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@ -383,9 +386,15 @@ typedef enum SpvImageChannelDataType_ {
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SpvImageChannelDataTypeFloat = 14,
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SpvImageChannelDataTypeUnormInt24 = 15,
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SpvImageChannelDataTypeUnormInt101010_2 = 16,
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SpvImageChannelDataTypeUnormInt10X6EXT = 17,
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SpvImageChannelDataTypeUnsignedIntRaw10EXT = 19,
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SpvImageChannelDataTypeUnsignedIntRaw12EXT = 20,
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SpvImageChannelDataTypeUnormInt2_101010EXT = 21,
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SpvImageChannelDataTypeUnsignedInt10X6EXT = 22,
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SpvImageChannelDataTypeUnsignedInt12X4EXT = 23,
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SpvImageChannelDataTypeUnsignedInt14X2EXT = 24,
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SpvImageChannelDataTypeUnormInt12X4EXT = 25,
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SpvImageChannelDataTypeUnormInt14X2EXT = 26,
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SpvImageChannelDataTypeMax = 0x7fffffff,
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} SpvImageChannelDataType;
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@ -717,6 +726,9 @@ typedef enum SpvBuiltIn_ {
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SpvBuiltInDeviceIndex = 4438,
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SpvBuiltInViewIndex = 4440,
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SpvBuiltInShadingRateKHR = 4444,
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SpvBuiltInTileOffsetQCOM = 4492,
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SpvBuiltInTileDimensionQCOM = 4493,
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SpvBuiltInTileApronSizeQCOM = 4494,
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SpvBuiltInBaryCoordNoPerspAMD = 4992,
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SpvBuiltInBaryCoordNoPerspCentroidAMD = 4993,
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SpvBuiltInBaryCoordNoPerspSampleAMD = 4994,
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@ -1103,6 +1115,7 @@ typedef enum SpvCapability_ {
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SpvCapabilityTextureSampleWeightedQCOM = 4484,
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SpvCapabilityTextureBoxFilterQCOM = 4485,
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SpvCapabilityTextureBlockMatchQCOM = 4486,
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SpvCapabilityTileShadingQCOM = 4495,
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SpvCapabilityTextureBlockMatch2QCOM = 4498,
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SpvCapabilityFloat16ImageAMD = 5008,
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SpvCapabilityImageGatherBiasLodAMD = 5009,
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@ -1275,6 +1288,7 @@ typedef enum SpvCapability_ {
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SpvCapabilitySubgroup2DBlockTransformINTEL = 6229,
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SpvCapabilitySubgroup2DBlockTransposeINTEL = 6230,
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SpvCapabilitySubgroupMatrixMultiplyAccumulateINTEL = 6236,
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SpvCapabilityTernaryBitwiseFunctionINTEL = 6241,
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SpvCapabilityGroupUniformArithmeticKHR = 6400,
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SpvCapabilityTensorFloat32RoundingINTEL = 6425,
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SpvCapabilityMaskedGatherScatterINTEL = 6427,
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@ -2366,6 +2380,7 @@ typedef enum SpvOp_ {
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SpvOpSubgroup2DBlockPrefetchINTEL = 6234,
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SpvOpSubgroup2DBlockStoreINTEL = 6235,
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SpvOpSubgroupMatrixMultiplyAccumulateINTEL = 6237,
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SpvOpBitwiseFunctionINTEL = 6242,
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SpvOpGroupIMulKHR = 6401,
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SpvOpGroupFMulKHR = 6402,
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SpvOpGroupBitwiseAndKHR = 6403,
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@ -3170,6 +3185,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
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case SpvOpSubgroup2DBlockPrefetchINTEL: *hasResult = false; *hasResultType = false; break;
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case SpvOpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break;
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case SpvOpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break;
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case SpvOpBitwiseFunctionINTEL: *hasResult = true; *hasResultType = true; break;
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case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
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case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
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case SpvOpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
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@ -3296,6 +3312,8 @@ inline const char* SpvExecutionModeToString(SpvExecutionMode value) {
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case SpvExecutionModeSignedZeroInfNanPreserve: return "SignedZeroInfNanPreserve";
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case SpvExecutionModeRoundingModeRTE: return "RoundingModeRTE";
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case SpvExecutionModeRoundingModeRTZ: return "RoundingModeRTZ";
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case SpvExecutionModeNonCoherentTileAttachmentReadQCOM: return "NonCoherentTileAttachmentReadQCOM";
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case SpvExecutionModeTileShadingRateQCOM: return "TileShadingRateQCOM";
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case SpvExecutionModeEarlyAndLateFragmentTestsAMD: return "EarlyAndLateFragmentTestsAMD";
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case SpvExecutionModeStencilRefReplacingEXT: return "StencilRefReplacingEXT";
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case SpvExecutionModeCoalescingAMDX: return "CoalescingAMDX";
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@ -3362,6 +3380,7 @@ inline const char* SpvStorageClassToString(SpvStorageClass value) {
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case SpvStorageClassImage: return "Image";
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case SpvStorageClassStorageBuffer: return "StorageBuffer";
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case SpvStorageClassTileImageEXT: return "TileImageEXT";
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case SpvStorageClassTileAttachmentQCOM: return "TileAttachmentQCOM";
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case SpvStorageClassNodePayloadAMDX: return "NodePayloadAMDX";
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case SpvStorageClassCallableDataKHR: return "CallableDataKHR";
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case SpvStorageClassIncomingCallableDataKHR: return "IncomingCallableDataKHR";
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@ -3505,9 +3524,15 @@ inline const char* SpvImageChannelDataTypeToString(SpvImageChannelDataType value
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case SpvImageChannelDataTypeFloat: return "Float";
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case SpvImageChannelDataTypeUnormInt24: return "UnormInt24";
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case SpvImageChannelDataTypeUnormInt101010_2: return "UnormInt101010_2";
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case SpvImageChannelDataTypeUnormInt10X6EXT: return "UnormInt10X6EXT";
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case SpvImageChannelDataTypeUnsignedIntRaw10EXT: return "UnsignedIntRaw10EXT";
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case SpvImageChannelDataTypeUnsignedIntRaw12EXT: return "UnsignedIntRaw12EXT";
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case SpvImageChannelDataTypeUnormInt2_101010EXT: return "UnormInt2_101010EXT";
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case SpvImageChannelDataTypeUnsignedInt10X6EXT: return "UnsignedInt10X6EXT";
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case SpvImageChannelDataTypeUnsignedInt12X4EXT: return "UnsignedInt12X4EXT";
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case SpvImageChannelDataTypeUnsignedInt14X2EXT: return "UnsignedInt14X2EXT";
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case SpvImageChannelDataTypeUnormInt12X4EXT: return "UnormInt12X4EXT";
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case SpvImageChannelDataTypeUnormInt14X2EXT: return "UnormInt14X2EXT";
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default: return "Unknown";
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}
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}
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@ -3763,6 +3788,9 @@ inline const char* SpvBuiltInToString(SpvBuiltIn value) {
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case SpvBuiltInDeviceIndex: return "DeviceIndex";
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case SpvBuiltInViewIndex: return "ViewIndex";
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case SpvBuiltInShadingRateKHR: return "ShadingRateKHR";
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case SpvBuiltInTileOffsetQCOM: return "TileOffsetQCOM";
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case SpvBuiltInTileDimensionQCOM: return "TileDimensionQCOM";
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case SpvBuiltInTileApronSizeQCOM: return "TileApronSizeQCOM";
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case SpvBuiltInBaryCoordNoPerspAMD: return "BaryCoordNoPerspAMD";
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case SpvBuiltInBaryCoordNoPerspCentroidAMD: return "BaryCoordNoPerspCentroidAMD";
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case SpvBuiltInBaryCoordNoPerspSampleAMD: return "BaryCoordNoPerspSampleAMD";
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@ -3977,6 +4005,7 @@ inline const char* SpvCapabilityToString(SpvCapability value) {
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case SpvCapabilityTextureSampleWeightedQCOM: return "TextureSampleWeightedQCOM";
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case SpvCapabilityTextureBoxFilterQCOM: return "TextureBoxFilterQCOM";
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case SpvCapabilityTextureBlockMatchQCOM: return "TextureBlockMatchQCOM";
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case SpvCapabilityTileShadingQCOM: return "TileShadingQCOM";
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case SpvCapabilityTextureBlockMatch2QCOM: return "TextureBlockMatch2QCOM";
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case SpvCapabilityFloat16ImageAMD: return "Float16ImageAMD";
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case SpvCapabilityImageGatherBiasLodAMD: return "ImageGatherBiasLodAMD";
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@ -4123,6 +4152,7 @@ inline const char* SpvCapabilityToString(SpvCapability value) {
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case SpvCapabilitySubgroup2DBlockTransformINTEL: return "Subgroup2DBlockTransformINTEL";
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case SpvCapabilitySubgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL";
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case SpvCapabilitySubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL";
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case SpvCapabilityTernaryBitwiseFunctionINTEL: return "TernaryBitwiseFunctionINTEL";
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case SpvCapabilityGroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR";
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case SpvCapabilityTensorFloat32RoundingINTEL: return "TensorFloat32RoundingINTEL";
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case SpvCapabilityMaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL";
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@ -5102,6 +5132,7 @@ inline const char* SpvOpToString(SpvOp value) {
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case SpvOpSubgroup2DBlockPrefetchINTEL: return "OpSubgroup2DBlockPrefetchINTEL";
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case SpvOpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL";
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case SpvOpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL";
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case SpvOpBitwiseFunctionINTEL: return "OpBitwiseFunctionINTEL";
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case SpvOpGroupIMulKHR: return "OpGroupIMulKHR";
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case SpvOpGroupFMulKHR: return "OpGroupFMulKHR";
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case SpvOpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR";
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