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vtn: use nir_const_value_for_raw_uint for bfloat SpecConstantOp/FConvert

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I'm not sure how this was supposed to ensure padding was zero, and it
doesn't seem to work for me (GCC 15.0.1).

Fixes a NIR validation failure with dEQP-VK.glsl.bfloat16.constant.compute
and RADV.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 90e1b12890 ("spirv: Add bfloat16 support to SpecConstantOp")
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34769>
This commit is contained in:
Rhys Perry 2025-04-30 17:38:21 +01:00 • committed by Marge Bot
parent 752f5f317e
commit 1d7a988ec2
1 changed files with 1 additions and 2 deletions
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3
src/compiler/spirv/spirv_to_nir.c
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@ -2789,10 +2789,9 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
if (bfloat_dst) {
for (int i = 0; i < num_components; i++) {
/* Ensure the pad bits are zeroed by fully assigning the value. */
const uint16_t b =
_mesa_float_to_bfloat16_bits_rte(val->constant->values[i].f32);
val->constant->values[i] = (nir_const_value){ .u16 = b };
val->constant->values[i] = nir_const_value_for_raw_uint(b, 16);
}
}