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vtn: Handle SPV_KHR_uniform_group_instructions

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Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34941>
This commit is contained in:
Adam Jackson 2025-05-12 11:49:45 -04:00 • committed by Marge Bot
parent 52db0e1480
commit fd7589d775
2 changed files with 25 additions and 0 deletions
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9
src/compiler/spirv/spirv_to_nir.c
View file

@ -103,6 +103,7 @@ static const struct spirv_capabilities implemented_capabilities = {
.GroupNonUniformShuffleRelative = true,
.GroupNonUniformVote = true,
.Groups = true,
.GroupUniformArithmeticKHR = true,
.Image1D = true,
.ImageBasic = true,
.ImageBuffer = true,
@ -6629,6 +6630,14 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp opcode,
case SpvOpGroupFMax:
case SpvOpGroupUMax:
case SpvOpGroupSMax:
case SpvOpGroupIMulKHR:
case SpvOpGroupFMulKHR:
case SpvOpGroupBitwiseAndKHR:
case SpvOpGroupBitwiseOrKHR:
case SpvOpGroupBitwiseXorKHR:
case SpvOpGroupLogicalAndKHR:
case SpvOpGroupLogicalOrKHR:
case SpvOpGroupLogicalXorKHR:
case SpvOpSubgroupBallotKHR:
case SpvOpSubgroupFirstInvocationKHR:
case SpvOpSubgroupReadInvocationKHR:

16
src/compiler/spirv/vtn_subgroup.c
View file

@ -414,6 +414,14 @@ vtn_handle_subgroup(struct vtn_builder *b, SpvOp opcode,
case SpvOpGroupFMax:
case SpvOpGroupUMax:
case SpvOpGroupSMax:
case SpvOpGroupIMulKHR:
case SpvOpGroupFMulKHR:
case SpvOpGroupBitwiseAndKHR:
case SpvOpGroupBitwiseOrKHR:
case SpvOpGroupBitwiseXorKHR:
case SpvOpGroupLogicalAndKHR:
case SpvOpGroupLogicalOrKHR:
case SpvOpGroupLogicalXorKHR:
case SpvOpGroupIAddNonUniformAMD:
case SpvOpGroupFAddNonUniformAMD:
case SpvOpGroupFMinNonUniformAMD:
@ -434,9 +442,11 @@ vtn_handle_subgroup(struct vtn_builder *b, SpvOp opcode,
case SpvOpGroupFAddNonUniformAMD:
reduction_op = nir_op_fadd;
break;
case SpvOpGroupIMulKHR:
case SpvOpGroupNonUniformIMul:
reduction_op = nir_op_imul;
break;
case SpvOpGroupFMulKHR:
case SpvOpGroupNonUniformFMul:
reduction_op = nir_op_fmul;
break;
@ -470,14 +480,20 @@ vtn_handle_subgroup(struct vtn_builder *b, SpvOp opcode,
case SpvOpGroupFMaxNonUniformAMD:
reduction_op = nir_op_fmax;
break;
case SpvOpGroupBitwiseAndKHR:
case SpvOpGroupLogicalAndKHR:
case SpvOpGroupNonUniformBitwiseAnd:
case SpvOpGroupNonUniformLogicalAnd:
reduction_op = nir_op_iand;
break;
case SpvOpGroupBitwiseOrKHR:
case SpvOpGroupLogicalOrKHR:
case SpvOpGroupNonUniformBitwiseOr:
case SpvOpGroupNonUniformLogicalOr:
reduction_op = nir_op_ior;
break;
case SpvOpGroupBitwiseXorKHR:
case SpvOpGroupLogicalXorKHR:
case SpvOpGroupNonUniformBitwiseXor:
case SpvOpGroupNonUniformLogicalXor:
reduction_op = nir_op_ixor;