Commit graph

24649 commits

Author SHA1 Message Date
Ilia Mirkin
ee6b95c82c freedreno/a3xx: add support for dual-source blending
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-09-16 15:42:54 -04:00
Eric Anholt
cfa980f493 vc4: convert from tgsi semantic/index to varying-slot
(originally part of previous patch, split out to separate patch by Rob)

v2: squash in some fixes from Eric
v3: Another fix from Eric for point coords.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-16 15:07:08 -04:00
Eric Anholt
8fd3e53f3d gallium/ttn: Convert to using VARYING_SLOT_* / FRAG_RESULT_*.
This avoids exceeding the size of the .index bitfield since it got
truncated, and should make our NIR look more like the NIR that the rest of
the NIR developers are working on.

v2: split out vc4 updates, first patch uses varying_slot_to_tgsi_semantic()
    helper, and second patch does the actual conversion.
v3: add frag_result_to_tgsi_semantic() helper and don't try to map
    frag_results to semantic name/index as if they were varying_slot's
v4: use VERT_ATTRIB_ for VS inputs
v5: Fix vc4 build.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-16 15:03:53 -04:00
Ilia Mirkin
7a275fcda8 nv50, nvc0: fix max texture buffer size to 128M elements
This is what the hardware supports, there never was any sort of 64K
limit.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
2015-09-16 12:51:58 -04:00
Rob Clark
5bb41d9094 freedreno: one screen to rule them all
Similar to fee0686c21, but in this case to
ensure that drm_gralloc and libGLES_mesa are sharing a single screen.

Bumps libdrm_freedreno version dependency, as it requires the new
fd_device_fd() API.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-16 09:14:39 -04:00
Rob Clark
b3958f9f83 freedreno/ir3: use NIR to lower ffract instead of tgsi_lowering
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-16 08:28:18 -04:00
Rob Clark
18385bc3ac freedreno/a4xx: more texture formats
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-15 17:29:01 -04:00
Rob Clark
d85267c4bb freedreno/a4xx: border-color support
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-15 17:29:01 -04:00
Rob Clark
f8222724f5 freedreno/a4xx: wire up texture clamp lowering
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-15 17:29:01 -04:00
Rob Clark
9124a49d54 freedreno: helper for a3xx/a4xx border-colors
Both use the same layout for the buffer containing border-color values,
so rather than duplicating the logic in a4xx, split it out into a
helper.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-15 17:29:01 -04:00
Rob Clark
76977222af freedreno: update generated headers
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-15 17:29:00 -04:00
Thomas Hellstrom
edfb7ed109 gallium/svga: Enable PIPE_FORMAT_L8_UNORM for vgpu10
It's extensively used by XA for a8- and planar yuv component surfaces.
This fixes broken XA yuv blits using vgpu10 contexts.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-15 09:25:02 -07:00
Ilia Mirkin
5877a594d5 nvc0/ir: start offset at texBindBase for txq, like regular texturing
Curiously this has no actual effect. I think it's because the first 8
textures are bound in multiple slots for some reason. However seems
prudent to use these the same way as regular texturing, esp in the case
where there are more than 8 textures bound.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-09-14 17:26:25 -04:00
Eric Anholt
64aee8fe9f vc4: Fix build from recent NIR cleanups. 2015-09-14 11:21:07 -04:00
Ilia Mirkin
ec3fe42b3a r600g: add support for TXQS tgsi opcode
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-09-13 18:24:44 -04:00
Ilia Mirkin
4294db90b1 nv50/ir: add support for TXQS tgsi opcode
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-09-13 18:24:44 -04:00
Ilia Mirkin
f46a53ffa5 gallium: add PIPE_CAP_TGSI_TXQS to let st know if TXQS is supported
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-09-13 18:24:37 -04:00
Ilia Mirkin
d173c5e77d tgsi: add a TXQS opcode to retrieve the number of texture samples
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-09-13 18:24:01 -04:00
Krzesimir Nowak
08ceb5e076 softpipe: Change faces type to uint
This is to avoid needless float<->int conversions, since all
face-related computations are made on integers. Spotted by Emil
Velikov.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-13 09:50:21 -06:00
Rob Clark
59519c2283 freedreno/ir3: fix compile warn after 1807a08e
New enum to add to switch so compiler doesn't complain.

   commit 1807a08e4f
   Author:     Ilia Mirkin <imirkin@alum.mit.edu>
   AuthorDate: Thu Aug 27 23:05:03 2015 -0400
   Commit:     Ilia Mirkin <imirkin@alum.mit.edu>
   CommitDate: Thu Sep 10 17:38:33 2015 -0400

       nir: add nir_texop_texture_samples and convert from glsl

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-13 11:31:45 -04:00
Rob Clark
bf45a7d28e freedreno/ir3: fix compile break after a4aa25be
Following commit dropped the unused memctx arg:

   commit a4aa25be1e
   Author:     Jason Ekstrand <jason.ekstrand@intel.com>
   AuthorDate: Wed Sep 9 13:24:35 2015 -0700
   Commit:     Jason Ekstrand <jason.ekstrand@intel.com>
   CommitDate: Fri Sep 11 09:21:20 2015 -0700

       nir: Remove the mem_ctx parameter from ssa_def_rewrite_uses

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2015-09-13 11:31:30 -04:00
Rob Clark
86358e949e tgsi/scan: add support to figure out max nesting depth
Sometimes a useful thing for compilers (or, for example, tgsi_to_nir) to
know.  And pretty trivial for scan to figure this out for us.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-13 11:08:27 -04:00
Kai Wasserbäch
d6fbcf6ee2 r600: Fix llvm build since const buffer changes
In commit f9caabe8f1:

One place in r600_llvm.c was forgotten when replacing
R600_UCP_CONST_BUFFER with R600_BUFFER_INFO_CONST_BUFFER.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91985
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Signed-off-by: Dave Airlie <airlied@gmail.com>
2015-09-13 07:09:08 +10:00
Glenn Kennard
ce34048b57 r600: Enable fp64 on chips with native support
Cypress/Cayman/Aruba, earlier r6xx/r7xx chips only support a subset
of the needed fp64 ops, and don't do GL4 anyway.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-09-12 07:32:08 +01:00
Glenn Kennard
d2ca9afd5d r600g: Support I2D/U2D/D2I/D2U
Only for Cypress/Cayman/Aruba, older chips have only partial fp64 support.
Uses float intermediate values so only accurate for int24 range, which
matches what the blob does.

Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-09-12 07:30:10 +01:00
Dave Airlie
f9caabe8f1 r600g: lower number of driver const buffers
I'm going to want a driver constant buffer for tess to coordinate
LDS storage, so before I go tackling that I decided to merge the
clip/samplepos and texture info buffers into one. So I can steal
the spare one.

This creates a single constant buffer between the two, with
clip/samplepos taking up a reserved 128 bytes at the start.

Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-09-12 06:56:58 +01:00
Dave Airlie
0337a9b2af r600: define some values for the fetch constant offsets.
This just puts these in one place and #defines them.

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-09-12 06:56:51 +01:00
Krzesimir Nowak
2135aba8d9 softpipe: Constify variables
This commit makes a lot of variables constant - this is basically done
by moving the computation to variable definition. Some of them are
moved into lower scopes (like in img_filter_2d_ewa).

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-09-11 15:37:00 -06:00
Krzesimir Nowak
231687c19b softpipe: Constify sp_tgsi_sampler
Add a small inline function doing the casting - this is to make sure
we don't do a cast from some completely unrelated type. This commit
does not make tgsi_sampler parameters const in vfuncs themselves for
now - probably llvmpipe would need looking at before making such a
change.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-09-11 15:36:54 -06:00
Krzesimir Nowak
ac23116de5 softpipe: Constify sampler and view parameters in mip filters
Those functions actually could always take them as constants.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-09-11 15:36:47 -06:00
Krzesimir Nowak
ea764baa61 softpipe: Constify sampler and view parameters in img filters
Those functions actually could always take them as constants.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-09-11 15:36:43 -06:00
Krzesimir Nowak
ba72e6cfb8 tgsi, softpipe: Constify tgsi_sampler in query_lod vfunc
A followup from previous commit - since all functions called by
query_lod take pointers to const sp_sampler_view and const sp_sampler,
which are taken from tgsi_sampler subclass, we can the tgsi_sampler as
const itself now.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-09-11 15:36:38 -06:00
Krzesimir Nowak
ea0fecd1a3 softpipe: Constify some sampler and view parameters
This is to prepare for making tgsi_sampler parameter in query_lod a
const too. These functions do not modify anything in either sampler or
view anymore.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-09-11 15:36:32 -06:00
Krzesimir Nowak
4ca2896e8e softpipe: Move the faces array from view to filter_args
With that, sp_sampler_view instances are not abused anymore as a local
storage, so we can later make them constant.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-09-11 15:36:23 -06:00
Brian Paul
2c52c794d7 tgsi,softpipe: capitalize the tgsi_sampler_control enum values
We use capitalized enum values everywhere else.
This improves understanding a bit too.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-09-11 08:50:10 -06:00
Brian Paul
a9b143a648 svga: clean up the compile_vs/gs/fs() functions
Sipmlify structure and remove gotos.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-09-10 12:23:46 -06:00
Brian Paul
289804515f svga: fix shader variant memory leak
Fixes a small leak in a seldom-hit corner case for VS/FS compilation.
Found with coverity.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-09-10 12:23:46 -06:00
Brian Paul
ece33f9687 svga: remove useless MAX2() call
The sum of two unsigned ints is always >= 0.  Found with Coverity.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-09-10 12:23:46 -06:00
Brian Paul
bc75fe214d winsys/svga: remove useless assertion
An unsigned int is always >= 0.  Found with Coverity.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2015-09-10 12:23:46 -06:00
Krzesimir Nowak
60905f2b19 softpipe: Implement and enable textureQueryLod
Passes the shader piglit tests and introduces no regressions.

This commit finally makes use of the refactoring in previous
commits.

v2:
  - adapted the code to changes in previous commits (renames,
    need_cube_convert stuff)
  - splitted too long lines

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-10 09:45:14 -06:00
Krzesimir Nowak
263d4a7406 tgsi: Add code for handling lodq opcode
This introduces new vfunc in tgsi_sampler just for this opcode. I
decided against extending get_samples vfunc to return the mipmap level
and LOD - the function's prototype is already too scary and doing the
sampling for textureQueryLod would be a waste of time.

v2:
  - splitted too long lines

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-10 09:45:14 -06:00
Krzesimir Nowak
d71a3be860 softpipe: Add functions for computing relative mipmap level
These functions will be used by textureQueryLod.

v2:

  - renamed mip_level_* funcs to mip_rel_level_* to indicate that
    these functions return mip level relative to base level and
    documented them
  - renamed a level member in sp_filter_funcs struct to relative_level
  - changed mip_rel_level_none and mip_rel_level_nearest to return mip
    level relative to base level, mip_rel_level_linear already did
    that
  - documented clamp_lod function

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-10 09:45:14 -06:00
Krzesimir Nowak
ac3637dda0 softpipe: Split 3D to 2D coords conversion into separate function
This is to avoid tying the conversion to the sampling -
textureQueryLod will need to do the conversion too, but it does not do
any sampling.

So instead of a "get_samples" vfunc, there is just a bool saying
whether the conversion is needed or not. This solution keeps a nice
property of not adding any overhead for the common case (2D textures).

v2:
  - replaced the "convert_coords" vfunc with a "need_cube_convert"
    boolean to avoid overhead of copying arrays in common case
  - removed an unused typedef
  - splitted too long lines in convert_cube
  - const fixes in convert_cube

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-10 09:45:14 -06:00
Krzesimir Nowak
380a3c0804 softpipe: Split code getting a filter into separate function
This function will be later used by textureQueryLod. The
img_filter_func are optional, because textureQueryLod will not need
them.

v2:
  - adapted to changes in previous commit (renames)
  - simplified conditions a bit
  - updated docs
  - splitted too long lines

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-10 09:45:14 -06:00
Krzesimir Nowak
b9bc6c42c9 softpipe: Put mip_filter_func inside a struct
Putting this function pointer into a struct enables grouping of
several related functions in a single place. For now it is just a
single function, but the struct will be later extended with a
mip_level_func for returning relative mip level.

v2:
  - renamed sp_mip struct to sp_filter_funcs
  - renamed sp_filter_funcs instances from mip_foo to funcs_foo
  - splitted too long lines
  - sp_sampler now holds a pointer to sp_filter_funcs instead of an
    instance of it
  - some const fixes

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-10 09:45:14 -06:00
Krzesimir Nowak
16084cd2cf softpipe: Split compute_lambda_lod into two functions
textureQueryLod returns a vec2 with a mipmap information and a
LOD. The latter needs to be not clamped.

v2:
  - changed the "not_clamped" part to "unclamped"
  - corrected "clamp into" to "clamp to"
  - splitted too long lines

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-10 09:45:14 -06:00
Krzesimir Nowak
bdc69552ca softpipe: Fix textureLod with nonzero GL_TEXTURE_LOD_BIAS value
The level-of-detail bias wasn't simply added in the explicit LOD case.
This case seems to be tested only in piglit's
fs-texturequerylod-nearest-biased test, which is currently skipped, as
softpipe does not support textureQueryLod at the moment.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-10 09:45:13 -06:00
Krzesimir Nowak
85500fe2e1 tgsi: Remove trailing backslash in comment
It clearly is here by accident.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-09-10 09:45:13 -06:00
Marek Olšák
b409524fef gallium/radeon: handle PIPE_TRANSFER_FLUSH_EXPLICIT
Basically, do the same thing as for buffer_unmap, but use the explicit range
instead. It's for apps which want to map a whole buffer and mark touched
ranges explicitly.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-09-10 17:14:15 +02:00
Marek Olšák
60ec8fb448 radeonsi: don't update polygon offset state if it has no effect
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-09-10 17:14:15 +02:00