Commit graph

74848 commits

Author SHA1 Message Date
Oded Gabbay
ebf97bc637 llvmpipe: use vpkswss when dst is signed
This patch fixes a bug when building a pack instruction.

For POWER (altivec), in case the destination is signed and the
src width is 32, we need to use vpkswss. The original code used vpkuwus,
which emits an unsigned result.

This fixes the following piglit tests on ppc64le:
- spec@arb_color_buffer_float@gl_rgba8-drawpixels
- shaders@glsl-fs-fogscale

I've also corrected some coding style issues in the function.

v2: Returned else statements to vmware style

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
(cherry picked from commit 679a654a77)
2016-04-11 21:02:15 +01:00
Oded Gabbay
df5ed52641 gallium/radeon: Correctly translate colorswaps for big endian
The current code in r600_translate_colorswap uses the swizzle information
to determine which colorswap to use.

This works for BE & LE when the nr_channels is <4, but when nr_channels==4
(e.g. PIPE_FORMAT_A8R8G8B8_UNORM), this method can not be used for both BE
and LE, because the swizzle info is the same for both of them.

As a result, r600g doesn't support 24bit color formats, only 16bit, which
forces the user to choose 16bit color in X server.

This patch fixes this bug by separating the checks for LE and BE and
adapting the swizzle conditions in the BE part of the checks.

Tested on an Evergreen GPU (Cedar GL FirePro 2270) running inside POWER7
Big-Endian Machine.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
CC: "11.2" "11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 4b7e219e61)
2016-04-11 21:02:15 +01:00
Emil Velikov
cefb7c44ca cherry-ignore: do not pick nv50/ir commit
As requested by Ilia on the mesa-stable ML.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-04-11 21:02:14 +01:00
Emil Velikov
6847733bb4 get-pick-list.sh: Require explicit "11.1" for nominating stable patches
A nomination unadorned with a specific version is now interpreted as
being aimed at the 11.1 branch, which was recently opened.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-04-11 21:01:44 +01:00
Ilia Mirkin
a85e5044c5 st/mesa: force depth mode to GL_RED for sized depth/stencil formats
See commit 9db2098d for the i965 version of this.

This fixes depth in a bunch of dEQP EXT_texture_border_clamp tests. And
probably other ones as well.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 0b10ec1086)
2016-04-11 19:51:20 +01:00
Daniel Czarnowski
5c9e9e1f00 egl_dri2: set correct error code if swapbuffers fails
A return value of '-1' means that there was error during swap with a
window drawable, in this case we set error as EGL_BAD_NATIVE_WINDOW.

v2: coding style cleanup, better commit message

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit e6f1a44d14)
2016-04-11 19:51:20 +01:00
Dongwon Kim
4687027197 egl: move Null check to eglGetSyncAttribKHR to prevent Segfault
Null-check on "*value" is currently done in _eglGetSyncAttrib, which is
after eglGetSyncAttribKHR dereferences it.

Move the check a layer up (in the beginning of eglGetSyncAttribKHR) to
avoid segfaults.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Signed-off-by: Dongwon Kim <dongwon.kim@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
[Emil Velikov: tweak commit message, add stable tag]
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

(cherry picked from commit d1e1563bb6)
2016-04-11 19:51:20 +01:00
Ilia Mirkin
161a0a9784 meta/copy_image: use precomputed dst_internal_format to avoid segfault
If the destination is a renderbuffer, dst_tex_image will be NULL. This
fixes the *to_renderbuffer dEQP copy image tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit b697400a97)
2016-04-11 19:51:20 +01:00
Ben Widawsky
0a7097a17e i965/skl: Add two missing device IDs
The Iris part is left unbranded because we did not have these with original SKL.

v2: 0x192d is gt3, not gt4

v3: Forgot to update the temporary brand string when I did v2.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Acked-by: Michał Winiarski <michal.winiarski@intel.com>
(cherry picked from commit 644c8a5151)
2016-04-11 19:51:20 +01:00
Ilia Mirkin
6d54a6582e st/mesa: fix up result_src.type when doing i2u/u2i conversions
Even though it's a no-op, it's important to keep track of the type so
that we can pick the properly-signed op later on.

This fixes dEQP-GLES3.functional.shaders.precision.uint.highp_div_fragment,
which ended up using IDIV instead of UDIV.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 49c67926c7)
2016-04-11 19:51:20 +01:00
Ilia Mirkin
df41d912fb nv50/ir: fix quadop emission in the presence of predication
When there's a predicate, it just goes onto the sources list. If the
quadop only has a single regular source, we will end up thinking that
the predicate is the second source. Check explicitly for the predSrc so
that we don't accidentally emit the wrong thing.

This fixes a bunch of dEQP-GLES3.functional.shaders.derivate.* tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit ca23c8081f)
2016-04-11 19:51:20 +01:00
Daniel Czarnowski
ac887fee2a egl_dri2: NULL check for xcb_dri2_get_buffers_reply()
Without the check, unsuccessful xcb_dri2_get_buffers_reply(...) causes
segmentation fault in dri2_get_buffers.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
(cherry picked from commit 5d87a7c894)
2016-04-11 19:51:20 +01:00
Vinson Lee
374ba5d855 llvmpipe: Do not use barriers if not using threads.
Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94088
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
(cherry picked from commit 4ed4c1d921)
2016-04-11 19:51:20 +01:00
Francisco Jerez
c1dac9218e i965: Reupload push and pull constants when we get new shader image unit state.
Fixes several of the
"dEQP-GLES31.functional.image_load_store*load_store*single_layer" dEQP
tests that use image formats we implement using untyped surface
messages.

Cc: mesa-stable@lists.freedesktop.org
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 9e30d66b7c)
2016-04-11 19:51:19 +01:00
Jason Ekstrand
c58258558f nir/lower_vec_to_movs: Better report channels handled by insert_mov
This fixes two issues.  First, we had a use-after-free in the case where
the instruction got deleted and we tried to return mov->dest.write_mask.
Second, in the case where we are doing a self-mov of a register, we delete
those channels that are moved to themselves from the write-mask.  This
means that those channels aren't reported as being handled even though they
are.  We now stash off the write-mask before remove unneeded channels so
that they still get reported as handled.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94073
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 70dff4a55e)
2016-04-11 19:51:19 +01:00
Ben Widawsky
3b9437c701 i965: Make sure we blit a full compressed block
This fixes an assertion failure in [at least] one of the Unreal Engine Linux
demo/games that uses DXT1 compression. Specifically, the "Vehicle Game".

At some point, the game ends up trying to blit mip level whose size is 2x2,
which is smaller than a DXT1 block. As a result, the assertion in the blit path
is triggered. It should be safe to simply make sure we align the width and
height, which is sadly an example of compression being less efficient.

NOTE: The demo seems to work fine without the assert, and therefore release
builds of mesa wouldn't stumble over this. Perhaps there is some unnoticeable
corruption, but I had trouble spotting it.

Thanks to Jason for looking at my backtrace and figuring out what was going on.

v2: Use NPOT alignment to make sure ASTC is handled properly (Ilia)
Remove comment about how this doesn't fix other bugs, because it does.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93358
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
(cherry picked from commit 088280e022)
2016-04-11 19:51:19 +01:00
Nanley Chery
16958f7171 mesa/readpix: Clip ReadPixels() area to the ReadBuffer's
The fast path for Intel's ReadPixels() unintentionally omits clipping
the specified area to a valid one. Rather than clip in various
corner-cases, perform this operation in the API validation stage.

The bug in intel_readpixels_tiled_memcpy() showed itself when the winsys
ReadBuffer's height was smaller than the one specified by ReadPixels().
yoffset became negative, which was an invalid input for tiled_to_linear().

v2: Move clipping to validation stage (Jason)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92193
Reported-by: Marta Löfstedt <marta.lofstedt@intel.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 605832736a)
2016-04-11 19:51:19 +01:00
Nanley Chery
729a8c528d mesa/image: Make _mesa_clip_readpixels() work with renderbuffers
v2: Use gl_renderbuffer::{Width,Height} (Jason)

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
(cherry picked from commit 55d56d34e0)
2016-04-11 19:51:19 +01:00
Brian Paul
b09d082e81 mesa: fix incorrect viewport position when GL_CLIP_ORIGIN = GL_LOWER_LEFT
Ilia Mirkin found/fixed the mistake.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93813
Cc: "11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
(cherry picked from commit fe14110f35)
2016-04-11 19:51:19 +01:00
Ilia Mirkin
cd886e8ac3 glsl: return cloned signature, not the builtin one
The builtin data can get released with a glReleaseShaderCompiler call.
We're careful everywhere to clone everything that comes out of builtins
except here, where we accidentally return the signature belonging to the
builtin version, rather than the locally-cloned one.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Tested-by: Rob Herring <robh@kernel.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 88519c6087)
2016-04-11 19:51:19 +01:00
Ilia Mirkin
777ba349cd glsl: make sure builtins are initialized before getting the shader
The builtin function shader is part of the builtin state, released
when glReleaseShaderCompiler is called. We must ensure that the
builtins have been (re)initialized before attempting to link with the
builtin shader.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Tested-by: Rob Herring <robh@kernel.org>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit ac57577e29)
2016-04-11 19:51:19 +01:00
Matt Turner
7e103fe53f i965/vec4: don't copy ATTR into 3src instructions with complex swizzles
The vec4 backend, at the end, does this:

    if (inst->is_3src()) {
       for (int i = 0; i < 3; i++) {
          if (inst->src[i].vstride == BRW_VERTICAL_STRIDE_0)
             assert(brw_is_single_value_swizzle(inst->src[i].swizzle));

So make sure that we use the same conditions when trying to
copy-propagate. UNIFORMs will be converted to vstride 0 in
convert_to_hw_regs, but so will ATTRs when interleaved (as will happen
in a GS with multiple attributes). Since the vstride is not set at
copy-prop time, infer it by inspecting dispatch_mode and reject ATTRs if
they have non-scalar swizzles and are interleaved.

Fixes assertion errors in dolphin-generated geometry shaders (or
misrendering on opt builds) on Sandybridge or on IVB/HSW with
INTEL_DEBUG=nodualobj.

Co-authored-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93418
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit 9f2e22bf34)
2016-04-11 19:51:19 +01:00
Steinar H. Gunderson
44e5f03edb mesa: Fix locking of GLsync objects.
GLsync objects had a race condition when used from multiple threads
(which is the main point of the extension, really); it could be
validated as a sync object at the beginning of the function, and then
deleted by another thread before use, causing crashes. Fix this by
changing all casts from GLsync to struct gl_sync_object to a new
function _mesa_get_and_ref_sync() that validates and increases
the refcount.

In a similar vein, validation itself uses _mesa_set_search(), which
requires synchronization -- it was called without a mutex held, causing
spurious error returns and other issues. Since _mesa_get_and_ref_sync()
now takes the shared context mutex, this problem is also resolved.

Fixes bug #92757, found while developing Nageru, my live video mixer
(due for release at FOSDEM 2016).

v2: Marek: silence warnings, fix declaration after code

Signed-off-by: Steinar H. Gunderson <sesse@google.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit feb53912f8)
2016-04-11 19:51:19 +01:00
Ilia Mirkin
ed14107645 nvc0: avoid negatives in PUSH_SPACE argument
Fixup to commit 03b3eb90d - the number of buffers could be larger than
the number of elements, in which case we'd pass a negative argument to
PUSH_SPACE, which would be bad. While we're at it, merge it with the
other PUSH_SPACE at the top of the function.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 2065e380b2)
2016-04-11 19:51:19 +01:00
Ilia Mirkin
9427c7e897 nvc0: add some missing PUSH_SPACE's
nvc0_vbo has explicit push space checking enabled, so we must run
PUSH_SPACE by hand. A few spots missed that.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 03b3eb90d7)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

Conflicts:
    src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c
2016-04-11 19:50:44 +01:00
Ilia Mirkin
88615b66ed nvc0/ir: fix converting between predicate and gpr
The spill logic will insert convert ops when moving between files. It
seems like the emission logic wasn't quite ready for these converts.

Tested on fermi, and visually looked at nvdisasm output for maxwell.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 1a0fde1f52)
2016-02-24 17:34:42 +00:00
Marek Olšák
a2dd9b49f0 radeonsi: fix Hyper-Z on Stoney
Cc: 11.0 11.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
(cherry picked from commit 8ec24678ac)
2016-02-24 17:33:43 +00:00
Patrick Baggett
27fa53c6d0 mesa: Use SSE prefetch instructions rather than 3DNow instructions
64-bit Pentium 4 CPUs don't have the 3DNow prefetch instructions
which results in an Illegal instruction crash.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Timothy Arceri <t_arceri@yahoo.com.au>
https://bugs.freedesktop.org/show_bug.cgi?id=27512
(cherry picked from commit 9c78cfd547)
2016-02-24 17:17:06 +00:00
Emil Velikov
e49dd21bcb docs: add sha256 checksums for 11.1.2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-11 01:21:31 +00:00
Emil Velikov
7bcd827806 docs: add release notes for 11.1.2
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-02-11 00:03:22 +00:00
Emil Velikov
ac65994a8e Update version to 11.1.2
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-10 23:59:40 +00:00
Nicolai Hähnle
185ee6b612 radeonsi: fix discard-only fragment shaders (11.1 version)
When a fragment shader is used that has no outputs but does conditional
discard (KILL_IF), all fragments are killed without this patch.

By comparing various register settings, my conclusion is that the exec mask
is either not properly forwarded to the DB by NULL exports or ends up being
unused, at least when there is _only_ a NULL export (the ISA documentation
claims that NULL exports can be used to override a previously exported exec
mask).

Of the various approaches I have tried to work around the problem, this one
seems to be the least invasive one.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93761
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-04 12:35:13 +00:00
Nicolai Hähnle
25fc54992e st/mesa: use the correct address generation functions in st_TexSubImage blit
We need to tell the address generation functions about the dimensionality of
the texture to correctly implement the part of Section 3.8.1 (Texture Image
Specification) of the OpenGL 2.1 specification which says:

    "For the purposes of decoding the texture image, TexImage2D is
    equivalent to calling TexImage3D with corresponding arguments
    and depth of 1, except that
      ...
      * UNPACK SKIP IMAGES is ignored."

Fixes a low impact bug that was found by chance while browsing the spec and
extending piglit tests.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
(cherry picked from commit 4a448a63ad)
2016-02-04 10:06:27 +00:00
Leo Liu
37aed85969 st/omx/dec/h264: fix corruption when scaling matrix present flag set
The scaling list should be filled out with zig zag scan

v2: integrate zig zag scan for list 4x4 to vl(Christian)
v3: move list determination out from the loop(Ilia)

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 6ad2e55a14)
2016-02-04 10:06:27 +00:00
Leo Liu
3adf111821 vl: add zig zag scan for list 4x4
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
(cherry picked from commit 4f598f2173)
2016-02-04 10:06:27 +00:00
Ilia Mirkin
f5f021ecc5 st/mesa: treat a write as a read for range purposes
We use this logic to detect live ranges and then do plain renaming
across the whole codebase. As such, to prevent WaW hazards, we have to
treat a write as if it were also a read.

For example, the following sequence was observed before this patch:

 13: UIF TEMP[6].xxxx :0
 14:   ADD TEMP[6].x, CONST[6].xxxx, -IN[3].yyyy
 15:   RCP TEMP[7].x, TEMP[3].xxxx
 16:   MUL TEMP[3].x, TEMP[6].xxxx, TEMP[7].xxxx
 17:   ADD TEMP[6].x, CONST[7].xxxx, -IN[3].yyyy
 18:   RCP TEMP[7].x, TEMP[3].xxxx
 19:   MUL TEMP[4].x, TEMP[6].xxxx, TEMP[7].xxxx

While after this patch it becomes:

 13: UIF TEMP[7].xxxx :0
 14:   ADD TEMP[7].x, CONST[6].xxxx, -IN[3].yyyy
 15:   RCP TEMP[8].x, TEMP[3].xxxx
 16:   MUL TEMP[4].x, TEMP[7].xxxx, TEMP[8].xxxx
 17:   ADD TEMP[7].x, CONST[7].xxxx, -IN[3].yyyy
 18:   RCP TEMP[8].x, TEMP[3].xxxx
 19:   MUL TEMP[5].x, TEMP[7].xxxx, TEMP[8].xxxx

Most importantly note that in the first example, the second RCP is done
on the result of the MUL while in the second, the second RCP should have
the same value as the first. Looking at the GLSL source, it is apparent
that both of the RCP's should have had the same source.

Looking at what's going on, the GLSL looks something like

  float tmin_8;
  float tmin_10;
  tmin_10 = tmin_8;
... lots of code ...
  tmin_8 = tmpvar_17;
... more code that never looks at tmin_8 ...

And so we end up with a last_read somewhere at the beginning, and a
first_write somewhere at the bottom. For some reason DCE doesn't remove
it, but even if that were fixed, DCE doesn't handle 100% of cases, esp
including loops.

With the last_read somewhere high up, we overwrite the previously
correct (and large) last_read with a low one, and then proceed to decide
to merge all kinds of junk onto this temp. Even if that weren't the
case, and there were just some writes after the last read, then we might
still overwrite a merged value with one of those.

As a result, we should treat a write as a last_read for the purpose of
determining the live range.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 047b917718)
2016-02-04 10:06:27 +00:00
François Tigeot
3ef2a4bb2e gallium: Add DragonFly support
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit a48afb92ff)
2016-02-04 10:06:27 +00:00
Ilia Mirkin
12888ad942 nv50/ir: fix false global CSE on instructions with multiple defs
If an instruction has multiple defs, we have to do a lot more checks to
make sure that we can move it forward. Among other things, various code
likes to do

    a, b = tex()
    if () c = a
    else c = b

which means that a single phi node will have results pointing at the
same instruction. We obviously can't propagate the tex in this case, but
properly accounting for this situation is tricky. Just don't try for
instructions with multiple defs.

This fixes about 20 shaders in shader-db, including the dolphin efb2ram
shader.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 3ca941d60e)
2016-02-04 10:06:27 +00:00
Ilia Mirkin
0f7d3d661d nv50,nvc0: fix buffer clearing to respect engine alignment requirements
It appears that the nvidia render engine is quite picky when it comes to
linear surfaces. It doesn't like non-256-byte aligned offsets, and
apparently doesn't even do non-256-byte strides.

This makes arb_clear_buffer_object-unaligned pass on both nv50 and nvc0.

As a side-effect this also allows RGB32 clears to work via GPU data
upload instead of synchronizing the buffer to the CPU (nvc0 only).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> # tested on GF108, GT215
Tested-by: Nick Sarnie <commendsarnex@gmail.com> # GK208
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 3ca2001b53)
2016-02-04 10:06:27 +00:00
Ilia Mirkin
7cb93f77f2 nvc0: avoid crashing when there are holes in vertex array bindings
When using the "shared" vertex array configuration strategy, we bind
each of the buffers as a separate array. However there can be holes in
such vertex buffer lists, so just emit a disable for those.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 438d421f8b)
2016-02-04 10:06:27 +00:00
Eric Anholt
03eb1716dd vc4: Throttle outstanding rendering after submission.
Just make sure that after we've submitted, we get to at least 5
(global) submits ago before we go on to do more.  Prevents up to
seconds of lag with window movement in X with xcompmgr -c.  There may
be useful tuning to do in the future, but for now this gets us
usability.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 3fba517bdd)
2016-02-04 10:06:27 +00:00
Eric Anholt
4865ab2b43 vc4: Don't record the seqno of a failed job submit.
On an error return, the returned seqno will probably be unset, so we'd
lose track of what we've submitted so far for waiting on in the
future.

Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
(cherry picked from commit 2a449ce7c9)
2016-02-04 10:06:27 +00:00
Karol Herbst
045e269a92 nv50/ir: fix memory corruption when spilling and redoing RA
When RA fails, and we spill, we have to clean everything up before doing
RA again. We were forgetting to reset the hi/lo linked lists - at
least the hi list is guaranteed to still have pointers to now-deleted
RIG nodes.

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 19ae5de981)
2016-02-04 10:06:26 +00:00
Ben Widawsky
761e3fda6e i965/bxt: Fix conservative wm thread counts.
When setting the conservative thread counts, I halved everything. That isn't
correct for the wm, which has nothing to do with actual thread counts. I suck.

BXT only has 1 slice, and there is some ambiguity about subslices, so just
reserve the max possible for now. It looks like this might fix:
piglit.spec.glsl-1_50.execution.variable-indexing.gs-output-array-vec4-index-wr.bxtm64.
I kind of question why that is, but it is what Jenkins says.

Mark is current running some of the other blacklisted tests on this patch. (it
effects anything requiring scratch space).

Cc: mesa-stable <mesa-stable@lists.freedesktop.org>
Cc: Neil Roberts <neil@linux.intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>
(cherry picked from commit a443b5b732)
2016-02-04 10:06:26 +00:00
Ian Romanick
7e1bd26d54 meta: Use internal functions to set texture parameters
_mesa_texture_parameteriv is used because (the more obvious)
_mesa_texture_parameteri just stuffs the parameter in an array and calls
_mesa_texture_parameteriv.  This just cuts out the middleman.

As a side bonus we no longer need check that ARB_stencil_texturing is
supported.  The test doesn't allow non-supporting implementations to
avoid any work, and it's redundant with the value-changed test.

Fix bug #93717 because the state restore commands at the bottom of
_mesa_meta_GenerateMipmap no longer depend on the bound state.

Fixes  piglit   arb_direct_state_access-generatetexturemipmap  with  the
changes  recently sent  to the  piglit mailing  list.  See  the bugzilla
entry for more info.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93717
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
(cherry picked from commit 2542871387)
2016-02-04 10:06:26 +00:00
Ian Romanick
e5d37f16e0 meta/blit: Restore GL_DEPTH_STENCIL_TEXTURE_MODE state for GL_TEXTURE_RECTANGLE
Commit c246828c added the code to save and restore the stencil
texturing mode.  The restore, however, was erroneously inside the
'target != GL_TEXTURE_RECTANGLE' block.

Fixes piglit test 'arb_stencil_texturing-blit_corrupts_state
GL_TEXTURE_RECTANGLE'.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
(cherry picked from commit 18b0ba340b)
2016-02-04 10:06:26 +00:00
Nicolai Hähnle
e22133f1bf radeonsi: add DCC buffer for sampler views on new CS
This fixes a VM fault and possible lockup in high memory pressure situations.

Cc: "11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
(cherry picked from commit 1067e6eb55)
2016-02-04 10:06:26 +00:00
Nicolai Hähnle
6dbb144b3d radeonsi: ensure that VGT_GS_MODE is sent when necessary
Specifically, when the API switches from using a GS to not using a GS and then
back to using the same GS again, we do not have to re-send all the GS state,
but we do have to send VGT_GS_MODE. So make VGT_GS_MODE consistently be a part
of the VS state.

This fixes a rendering bug in Dolphin, but surely other applications are
affected as well.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93648
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 004fcd4230)
2016-02-04 10:06:26 +00:00
Nicolai Hähnle
4ba352dc80 radeonsi: extract the VGT_GS_MODE calculation into its own function
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 9f89bd69df)
2016-02-04 10:06:26 +00:00
Ilia Mirkin
e101a005b1 glsl: always compute proper varying type, irrespective of varying packing
Normally there's a producer and consumer, and the producer var gets
picked. In both the vertex->gs and tes->gs cases, that's the un-arrayed
version.

In the SSO case, however, there is no producer. So we picked the arrayed
GS variable, and as a result, used more slots than we should. More
critically, these slots would also no longer line up with the producer's
calculation. To fix this, we need to fix up the type of the variable
based on stage no matter what.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93650
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
(cherry picked from commit dac2964f3e)
2016-02-04 10:06:26 +00:00