Commit graph

217787 commits

Author SHA1 Message Date
Mike Blumenkrantz
e7b12e5009 zink: work around drivers with broken mesh shader properties
some properties require setting MAX+1, but there are drivers which mistakenly
set 0

cc: mesa-stable

(cherry picked from commit c09d0018a3)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 18:58:57 +01:00
Mary Guillemard
4a90af4a3b nvk/mme: Add missing nullcheck in nvk_mme_test_state_state
Needed for some FSR macro changes I want to test.

Signed-off-by: Mary Guillemard <mary@mary.zone>
Fixes: 7d6cc15ab8 ("nvk/mme: Add a unit test framework for driver macros")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
(cherry picked from commit 32895657b4)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 18:58:56 +01:00
Rob Clark
3acc53d7a4 freedreno/drm: Fix bo_flush race
Once we've dropped the lock, we need to be referring to our own
temporary reference.

Fixes: 7b02bc6139 ("freedreno/drm: Drop fd_bo_fence")
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
(cherry picked from commit f5d40636cd)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 18:58:41 +01:00
Ryan Zhang
ae58d184b0 panvk/csf: use DEFERRED_FLUSH for fragment job cache flush
The correct dependence is cs_flush_caches.cs_defer.signal to
signal cs_sync32_set.cs_defer.wait in occulusion query path.

Fixes: 443ddac ("panvk/csf: merge v10 and v11 paths in
issue_fragment_jobs")

Fixed: many random fail cases in VK-GL-CTS 1.4.4.2, eg.
dEQP-VK.query_pool.occlusion_query.get_results_conservative
_size_64_wait_query_without_availability_draw_points_clear_color

Signed-off-by: Ryan Zhang <ryan.zhang@nxp.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
(cherry picked from commit 93b58064f7)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 18:58:40 +01:00
Eric Engestrom
5bbdfb0da5 .pick_status.json: Mark f2f792996d as denominated
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 18:58:38 +01:00
Faith Ekstrand
4b9aa545ea pan/compiler: Handle store_per_view_output in collect_varyings()
No idea how this wasn't blowing anything up before.

Fixes: 448b5e0225 ("panvk: implement multiview support")
Reviewed-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Acked-by: Eric R. Smith <eric.smith@collabora.com>
(cherry picked from commit 425458c598)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 13:11:20 +01:00
Mike Blumenkrantz
c0a931e338 mesa/st: fix unlower_io_to_vars to work with mesh shaders
cc: mesa-stable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/15034
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/15040

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 3dbb7e896d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 13:11:18 +01:00
Mike Blumenkrantz
3dea1bd33d nir: fix nir_is_io_compact for mesh shaders
cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit e604a8f617)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 13:11:15 +01:00
Yiwei Zhang
ac750a1e3c venus: force prime blit on Nvidia GPU
Normally Venus on Nvidia GPUs takes the prime blit path. The exception
is when KWin or any wlroots based compositors are used:
1. KWin and wlroots based compositors always add LINEAR to dmabuf
   feedback tranches assuming LINEAR can be handled by GPU drivers.
2. Venus + Virgl only sees the compositor injected LINEAR mod since
   Virgl doesn't support explicit modifiers on the driver side.
3. Nvidia GPUs doesn't support LINEAR color attachment, and it's too
   late to reject LINEAR mod when the native image path has already
   been taken instead of the prime image path.

Gamescope requires VK_EXT_physical_device_drm and its runtime doesn't
use standard WSI extensions, so venus can spoof without impacting it.

Cc: mesa-stable
(cherry picked from commit 1a302155ee)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 12:39:24 +01:00
Ian Douglas Scott
216cb0fca5 wsi/wayland: Use wl_fixes to destroy wl_registry
cc: mesa-stable

(cherry picked from commit 6641c891fd)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 12:38:44 +01:00
Rob Clark
04d09c9524 freedreno/fdl: Use 4k alignment for tiled
Tiled-but-not-UBWC images should also have 4k alignment.

Cc: mesa-stable
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
(cherry picked from commit 3d4792d577)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 12:38:41 +01:00
Mike Blumenkrantz
2401bd8e0a zink: run opt_combine_stores when optimizing
this ensures stores to mesh builtins are vectorized, as required by
spec

cc: mesa-stable

(cherry picked from commit 20c65db45d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 12:38:39 +01:00
Mike Blumenkrantz
d4465aad0b zink: allow renderpass termination for clears with ZINK_DEBUG=rp and GENERAL layouts
this doesn't require a layout change

cc: mesa-stable

(cherry picked from commit eed3007588)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 12:38:38 +01:00
Mike Blumenkrantz
58950e2d06 zink: reapply zsbuf state after unordered blits
this otherwise creates desync if a renderpass continues after blit reordering

cc: mesa-stable

(cherry picked from commit 43a6928d62)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 12:38:36 +01:00
Eric Engestrom
641b7710e9 .pick_status.json: Update to 70a487adfb
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40488>
2026-03-17 11:26:05 +01:00
Eric Engestrom
804e4154a3 docs: add sha sum for 26.0.2
Some checks failed
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2026-03-12 13:12:05 +01:00
Eric Engestrom
efd5b779da VERSION: bump for 26.0.2 2026-03-12 12:56:33 +01:00
Eric Engestrom
3646899ffd docs: add release notes for 26.0.2 2026-03-12 12:56:33 +01:00
Mike Blumenkrantz
5cf88188bd egl/device: fix the fix for explicit sw rejection in non-sw EGL_PLATFORM=device
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
"explicit sw" means llvmpipe, which cannot be a real drm device. this requires also
returning only a single device so as to avoid leaking non-sw drivers

should fix LIBGL_ALWAYS_SOFTWARE=1 eglinfo

Fixes: 8a339cdebc ("egl: fix sw fallback rejection in non-sw EGL_PLATFORM=device")
(cherry picked from commit c9b2986607)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Job Noorman
1f89a0fb96 ir3: don't predicate vote_all/vote_any
These get lowered to control flow which isn't allowed inside predicated
blocks.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: 39088571f0 ("ir3: add support for predication")
(cherry picked from commit 5e4a7d01fe)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Job Noorman
d78e309e4d ir3: update context builder after ir3_get_predicate
If we are currently inserting instructions after the src of the
predicate conversion, uses of the predicate will be inserted before its
def (the conversion). Fix this by updating the context builder to point
to after the conversion.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: fda91b49d7 ("ir3: refactor builders to use ir3_builder API")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/15043
(cherry picked from commit f88e8b778d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Samuel Pitoiset
0e31cb83ce radv: fix missing L2 cache invalidation with streamout on GFX12
COPY_DATA emitted from the CP isn't coherent with L2, in case the
buffer filled size needs to be copied.

This fixes rare and random flickering with Mafia 3 Definitive Edition
on RDNA4.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14697
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit d9420eed9e)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Sagar Ghuge
ada713b32f anv: Fix Wa_14021821874, Wa_14018813551, Wa_14026600921
WA states that we need to allocate maximum number of stackIDs per DSS
from RT_DISPATCH_GLOBALS to 2048.

We can still throttle/control the CFE_STATE::StackID to be in range
specified by the field.

This does impact performance having CFE_STATE::stackIDs capped to 2K
by default. More the outstanding ray queries, larger the working set and
have more impact on cache hit rate.

This affect performance on Xe2+ onwards:
* Boundary Benchmark:            36.2%
* Solar Bay extreme:             9.8%
* Hitman world of assassination: 3.9%

Fixes: c1a44e8d43 ("anv: force StackIDControl value for Wa_14021821874")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
(cherry picked from commit cb423ee636)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Tapani Pälli
446fab4a4a anv: add handling for Wa_14026600921
This is the Xe3 version of the earlier workaround.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 840e6e855b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Tapani Pälli
77add2d8f2 intel/dev: update mesa_defs.json from workaround database
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit c75309c8f1)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Faith Ekstrand
7054ea6d45 pan/bi: Be more careful about bit sizes in b2f lowering
Fixes: 21bdee7bcc ("pan/bi: Switch to lower_bool_to_bitsize")
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
(cherry picked from commit 08c437f644)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Faith Ekstrand
9c2b19219a nir/lower_bool_to_bitsize: Make all bN_csel sources match
Previously, we assumed that the selector for bcsel could be whatever,
regardless of the bit sizes of the data and we'd just fix it in the
back-end.  This works okay for scalars but falls over the moment we
vectorize because all our vector handling assumes bit sizes match.
Since matching bit sizes is what the hardware wants anyway, it's better
to do the right thing in NIR and hope copy-propagation can fold in
conversions if needed.

Unfortunately, copy prop isn't that smart yet so this does hurt a bit:

    Instrs: 1193679 -> 1198086 (+0.37%); split: -0.06%, +0.43%
    CodeSize: 11915136 -> 11950592 (+0.30%); split: -0.05%, +0.34%
    Full: 160985 -> 160941 (-0.03%); split: -0.04%, +0.01%
    Estimated normalized CVT cycles: 4456.938557000181 -> 4480.876069000186 (+0.54%); split: -0.13%, +0.67%
    Estimated normalized SFU cycles: 6350.9375 -> 6392.21875 (+0.65%)
    Estimated normalized Load/Store cycles: 205773.0 -> 205795.0 (+0.01%)
    Maximum number of threads: 12864 -> 12863 (-0.01%)
    Number of spill instructions: 22487 -> 22489 (+0.01%)
    Number of fill instructions: 52179 -> 52219 (+0.08%)

Hurt shaders:

    google-meet-clvk/BgBlur
    google-meet-clvk/Relight
    parallel-rdp/small_subgroup
    parallel-rdp/small_uber_subgroup

The proper solution here is to teach copy-prop about this stuff so that
it can propagate swizzles into ALU ops when they're supported:
https://gitlab.freedesktop.org/panfrost/mesa/-/issues/265

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14945
Cc: mesa-stable
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
(cherry picked from commit 3fd471dca5)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Faith Ekstrand
740734ac72 etnaviv: Call lower_bool_to_int32 not to_bitsize
It calls both for some reason but never handles any other booleans than
32-bit.  This was probably a mistake.

Fixes: e63a7882a0 ("etnaviv: call nir_lower_bool_to_bitsize")
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
(cherry picked from commit 6fb3995659)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:12 +01:00
Mary Guillemard
f550eb1903 vulkan: Do not override the shader_flags in case of no task shader
This should be doing a or and not an assign.
This fixes issues on NVK with mesh stages on DGC.

Signed-off-by: Mary Guillemard <mary@mary.zone>
Fixes: 9308e8d90d ("vulkan: Add generic graphics and compute VkPipeline implementations")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
(cherry picked from commit 8f2eeee7ba)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Antonino Maniscalco
7b2af9e15a zink: don't care about generated gs output primitive
Zink uses the output primitive of the last vertex stage when deciding
the raster primitive. When we generate the gs the output primitive
depends on the raster primitive.

Not only does the generated gs output primitive have no value in chosing
the raster primitive, it can also get us stuck with the last raster
primitve which is of course incorrect.

Ignore it for generated shaders.

Cc: mesa-stable
(cherry picked from commit d526bbc29b)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Timothy Arceri
b5304ffef7 glx: guard glx_screen frontend_screen member
Guards workaround code with the same conditions as glx_screen`s
frontend_screen member.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

Fixes: 67eeee43e0 ("driconf: add a way to override GLX_CONTEXT_RESET_ISOLATION_BIT_ARB")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/15021
(cherry picked from commit bd42f62b0f)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Iván Briano
836a22d1a2 anv: don't try to fast clear D/S with multiview
If multiview is enabled on the render pass, baseLayer and layerCount
will be 0 and 1 respectively and throw us off.
We can still fast clear if view_mask == 1, but anything else hits the
BLORP_BATCH_NO_EMIT_DEPTH_STENCIL restriction.

Fixes: e488773b29 ("anv: Fast clear depth/stencil surface in vkCmdClearAttachments")

Signed-off-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
(cherry picked from commit 5d22f307d5)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Ian Romanick
2a2dba1bc7 elk/algebraic: Don't optimize SEL.L.SAT or SEL.G.SAT
shader-db:

Broadwell
total instructions in shared programs: 18607516 -> 18607530 (<.01%)
instructions in affected programs: 2095 -> 2109 (0.67%)
helped: 0 / HURT: 8

total cycles in shared programs: 955704436 -> 955702925 (<.01%)
cycles in affected programs: 34299 -> 32788 (-4.41%)
helped: 2 / HURT: 6

All Haswell and older platforms had similar results. (Haswell shown)
total instructions in shared programs: 16989200 -> 16989201 (<.01%)
instructions in affected programs: 461 -> 462 (0.22%)
helped: 0 / HURT: 1

total cycles in shared programs: 946537070 -> 946537035 (<.01%)
cycles in affected programs: 16378 -> 16343 (-0.21%)
helped: 1 / HURT: 0

Test: piglit!1100
Reported-by: Georg Lehmann
Fixes: ca675b73d3 ("i965/fs: Optimize saturating SEL.L(E) with imm val >= 1.0.")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit 64c60582b5)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Ian Romanick
829e5ccc84 brw/algebraic: Don't optimize SEL.L.SAT or SEL.G.SAT
This optimization was added in October 2013, and the error was only just
now discovered. Removing the SEL.G.SAT optimization affected zero
shader-db shaders, and it affected 9 fossil-db shaders for instruction
size only.

I haven't checked to see if any of the hurt shaders are helped by
!39987.

shader-db:

All Intel platforms had similar results. (Lunar Lake shown)
total instructions in shared programs: 17093041 -> 17093055 (<.01%)
instructions in affected programs: 2072 -> 2086 (0.68%)
helped: 0 / HURT: 8

total cycles in shared programs: 876739578 -> 876739154 (<.01%)
cycles in affected programs: 18946 -> 18522 (-2.24%)
helped: 2 / HURT: 6

fossil-db:

Lunar Lake
Totals:
Instrs: 906230557 -> 906240487 (+0.00%); split: -0.00%, +0.00%
CodeSize: 14498856128 -> 14499003168 (+0.00%); split: -0.00%, +0.00%
Send messages: 40667184 -> 40667205 (+0.00%); split: -0.00%, +0.00%
Cycle count: 104068494103 -> 104068561943 (+0.00%); split: -0.00%, +0.00%
Max live registers: 189570192 -> 189570204 (+0.00%); split: -0.00%, +0.00%
Max dispatch width: 48157648 -> 48157552 (-0.00%)
Non SSA regs after NIR: 139823587 -> 139823016 (-0.00%); split: -0.00%, +0.00%

Totals from 9172 (0.46% of 1985212) affected shaders:
Instrs: 10774709 -> 10784639 (+0.09%); split: -0.00%, +0.09%
CodeSize: 177868384 -> 178015424 (+0.08%); split: -0.08%, +0.17%
Send messages: 311154 -> 311175 (+0.01%); split: -0.00%, +0.01%
Cycle count: 232471392 -> 232539232 (+0.03%); split: -0.15%, +0.18%
Max live registers: 1243549 -> 1243561 (+0.00%); split: -0.00%, +0.01%
Max dispatch width: 196672 -> 196576 (-0.05%)
Non SSA regs after NIR: 509663 -> 509092 (-0.11%); split: -0.19%, +0.08%

Test: piglit!1100
Reported-by: Georg Lehmann
Fixes: ca675b73d3 ("i965/fs: Optimize saturating SEL.L(E) with imm val >= 1.0.")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
(cherry picked from commit 6c6c6ce054)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Eric R. Smith
63a6e0ffc9 pco: fix a typo in the check for optimization looping
The count isn't incremented anywhere else.

Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Fixes: f1b24267d2 ("pco: rework nir processing and passes")
(cherry picked from commit 8521051cfa)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Pavel Ondračka
eea697b179 r300: disable clip-discard watermark for triangles
Commit 0d4aa5f55f introduced the watermark to optimize the guardband
state changes and always computed new_distance as MAX2(distance,
watermark).

That is correct for point/line paths where distance > 0, but it keeps a
non-zero discard distance alive when the next draw sets distance = 0
(triangles). This leaks wide point/line clip-discard state into later
triangle draws and can clip away large parts of geometry (as observed in
Sauerbraten). Only apply the watermark when distance > 0 and reset it to
zero otherwise so triangle draws disable clip-discard as intended.

Fixes: 0d4aa5f55f ("r300: pop-free clipping")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14959
(cherry picked from commit ce33f82f83)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Samuel Pitoiset
ecb7bf7b68 radv: fix local invocation index for mesh/task and quad derivatives on GFX12
It must be lowered.

This fixes
dEQP-VK.spirv_assembly.instruction.compute.compute_shader_derivatives.{mesh,task}.*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 3c4cb16159)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Samuel Pitoiset
f858d2238e radv: fix a GPU hang with PS epilogs and secondary command buffers
If the secondary changes the fragment output state and if the same
PS epilog used before ExecuteCommands() is re-bind immediately after
that call, the PS epilog state wouldn't be re-emitted.

Apply the same change for VS prologs, although the logic is slightly
different and the bug shouldn't occur. The whole logic of secondaries
should be completely rewritten because it's definitely not robust.

This fixes a GPU hang in Where Winds Meet, see
https://github.com/doitsujin/dxvk/issues/5436.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 1a00587c44)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Yiwei Zhang
2b6e7f0be2 lvp: avoid advertising dmabuf support for kms_swrast
Lavapipe relies on true udmabuf support for dmabuf export allocation.
This changes aligns the behavior with both llvmpipe_allocate_memory_fd
and llvmpipe_import_memory_fd.

Fixes: 7d0a631f20 ("llvmpipe: export dmabuf caps for kms_swrast")
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
(cherry picked from commit 5ab8c8a439)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Mel Henning
60e29a07c0 driconf: force_vk_vendor on No Man's Sky + NVK
Cc: mesa-stable
Reviewed-by: Mary Guillemard <mary@mary.zone>
(cherry picked from commit bfde63e4d8)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Georg Lehmann
8f6c3dcc90 nir/opt_algebraic: fix frsq clamp pattern
This is not NaN correct.
And also make the pattern 32bit only because the constant is hard coded
FLT_MAX.

Fixes: 780b5c1037 ("nir/algebraic: Simplify some Inf and NaN avoidance code")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
(cherry picked from commit ab773fc5d4)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Danylo Piliaiev
4a4a86390b tu: Don't read .patch_input_gmem of unused attachment
There was duplicated code to set unscaled_input_fragcoord and a read
from VK_ATTACHMENT_UNUSED attachment, which incorrectly updated
builder->unscaled_input_fragcoord.

ubsan:
 tu_pipeline.cc:4734:44: runtime error: load of value 127, which is not a valid value for type 'bool'

Seen in:
 dEQP-VK.renderpasses.renderpass1.custom_resolve.monolithic.stencil_only_s8

Fixes: 97da0a7734 ("tu: Rewrite to use common Vulkan dynamic state")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
(cherry picked from commit 81a76be861)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Danylo Piliaiev
ace5f6c88d tu: Store gmem attachments after custom resolve in dyn RP
For dynamic renderpass we created a fake second subpass,
which would is used by CmdBeginCustomResolveEXT, however
CmdBeginCustomResolveEXT doesn't trigger tile stores, but
attachments didn't know they should be stored after fake
custom resolve subpass.

Fixes: 520e3f3a47 ("tu: Implement VK_EXT_custom_resolve")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
(cherry picked from commit 67c54c4465)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Caio Oliveira
8355670805 nir: Fix constant folding for iadd_sat
Use INT_MIN instead of INT_MAX for underflow.

Fixes: cc4b50b023 ("nir/opcodes: use u_overflow to fix incorrect checks")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pelloux@gmail.com>
(cherry picked from commit da57fbfb07)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:11 +01:00
Connor Abbott
725626858d tu: Fix setting will_be_resolved with MSRTSS
We were setting it on the user's attachments, which become
resolve/unresolve attachments, but it should be set on the color
and depth/stencil attachments.

Cc: mesa-stable
(cherry picked from commit d0be4ab2ab)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:10 +01:00
Connor Abbott
9a361c3801 tu: Set polygon mode when blitting
Noticed by inspection.

Cc: mesa-stable
(cherry picked from commit 1d167ffe77)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:10 +01:00
Yiwei Zhang
b88c8f37e4 pan: fix to not clear out of bitset range
Fixes: 617f0562bb ("pan: Use bitset instead of bool array in bi_find_loop_blocks")
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
(cherry picked from commit ec24d1afb6)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:10 +01:00
Lucas Fryzek
d7ee1e68df vulkan/wsi: Check that xshm can be attached
Cc: mesa-stable
Co-authored-by: Carlos Lopez <clopez@igalia.com>
(cherry picked from commit 4933e60bc2)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:10 +01:00
Lucas Fryzek
5f4eccf1fb glx: Check that xshm can be attached
Cc: mesa-stable
Co-authored-by: Carlos Lopez <clopez@igalia.com>
(cherry picked from commit a67af81944)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:10 +01:00
Lucas Fryzek
2c4c7fbfa9 egl/dri: Check that xshm can be attached
Cc: mesa-stable
Co-authored-by: Carlos Lopez <clopez@igalia.com>
(cherry picked from commit 5f481dd89d)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40359>
2026-03-11 23:21:10 +01:00