Commit graph

281 commits

Author SHA1 Message Date
Marek Olšák
05eb9530ca ac/gpu_info: always retile DCC on gfx10 and newer chips
Unaligned DCC doesn't work there.

Fixes: f8cf5ea982 - amd: add support for gfx1036 and gfx1037 chips

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16726>
2022-05-31 05:34:25 +00:00
Marek Olšák
2443054932 amd: rename fishes to Navi21, Navi22, Navi23, Navi24, and Rembrandt
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16604>
2022-05-19 11:55:50 +00:00
Marek Olšák
39800f0fa3 amd: change chip_class naming to "enum amd_gfx_level gfx_level"
This aligns the naming with PAL.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pellou-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16469>
2022-05-13 14:56:22 -04:00
Marek Olšák
3e85a0c90b ac/surface: define gfx11 modifiers
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Marek Olšák
85c76518c9 ac/surface: gfx11 changes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Marek Olšák
c4ca059dee ac/surface: fix an addrlib race condition on gfx9
Addrlib calls GetMetaEquation, which generates and saves address equations
in a global table that is not thread safe.

Fixes: df2cbdd2e3 - amd/addrlib: expose DCC address equations to drivers
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6361

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16091>
2022-04-22 19:12:03 +00:00
Pierre-Eric Pelloux-Prayer
fcc499d5e1 ac/surface: adjust gfx9.pitch[*] based on surf->blk_w
This is the same as 8275dc1ed5, but since gfx9.pitch[...] is
used for linear surfaces since 86262b6eac we need to update
it as well.

Fixes: 86262b6eac ("radeonsi,radv: fix usages of surf_pitch")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16053>
2022-04-22 17:21:47 +00:00
Marek Olšák
cfaaa0892f ac/surface: don't set the display flag for 1D textures
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
2022-02-22 11:41:04 +00:00
Marek Olšák
3cafa3e852 ac/surface: allow displayable DCC with any resolution (e.g. 8K)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14529>
2022-01-18 01:44:17 -05:00
Pierre-Eric Pelloux-Prayer
86262b6eac radeonsi,radv: fix usages of surf_pitch
For linear textures, pitch[level] should be used instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14454>
2022-01-12 11:39:53 +00:00
Qiang Yu
1876285c27 ac/surface: add prt_tile_depth
For supporting 3D sparse texture.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14223>
2021-12-30 16:11:19 +08:00
Qiang Yu
92d810fa74 ac/surface: fix prt_first_mip_tail calculation for gfx9+
Use firstMipIdInTail directly from addrlib which calculated this
in a different way:

Original way: either dimension size of mipmap should be less than
the tile size.

Addrlib way: all dimesion size of the mipmap should be less than
the tile size and at lest one dimension size should be less than
half of the tile size, so that all following mip levels can fit
in one tile and any commit for level in the mip tail also commit
for all levels in mip tail.

Theoretically either way is OK but addrlib way needs less care
about the mip tail commit and better align with the true memory
layout given by itself.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14223>
2021-12-30 16:11:19 +08:00
Marek Olšák
694731ac13 ac/surface: allow gfx6-8 to enter the gfx9 DCC codepath for SI_FORCE_FAMILY
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13871>
2021-11-24 13:55:23 +00:00
Pierre-Eric Pelloux-Prayer
dbf602a6b3 ac/surface: don't validate DCC settings if DCC isn't possible
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13550>
2021-11-04 09:38:46 +01:00
Pierre-Eric Pelloux-Prayer
84d4bda8e5 ac/surface: use a less strict condition in is_dcc_supported_by_L2
While Mesa chooses to always use independent_128B_blocks, other drivers
can make different choices.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13550>
2021-11-04 09:38:27 +01:00
Marek Olšák
84d0f54e75 ac/surface: enable better display DCC for chips newer than Yellow Carp
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13214>
2021-10-13 06:20:13 +00:00
Marek Olšák
a18a7626a2 ac/surface: disallow display DCC for big resolutions
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13214>
2021-10-13 06:20:13 +00:00
Marek Olšák
1a8df6f1be ac/surface: always use suboptimal display DCC with DRM <= 3.43.0
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13214>
2021-10-13 06:20:13 +00:00
Joshua Ashton
77e5f149eb ac/surface: Expose modifiers capable of DCC image stores first
These also have a higher compressed block size.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13056>
2021-10-11 11:43:39 +00:00
Joshua Ashton
9cffe1b9ea ac/surface: Add ac_modifier_max_extent
Currently, we aren't checking if the modifier supports the extent of the image.

DCN only works with !64B && 128B on extents < 4K.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13056>
2021-10-11 11:43:39 +00:00
Joshua Ashton
72c0e57e7e ac/surface: Use 64 && 128 for GFX10_3 on non-modifier path
DCC_IND_BLK is not hooked up for this to work in the kernel in any released version, and it's unsafe to do so even if it was because it doesn't check the modifiers.

There's no reason to change the legacy non-modifier path to be more performant at the expense of breaking backwards compatibility with older versions of Mesa.

Fixes: 0f6251b3 ("ac/surface: use DCC compatible with image stores for < 4K resolutions")
Closes: #5422

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13122>
2021-10-06 00:13:46 +00:00
Marek Olšák
edc8a4a037 ac/surface: enable DCC image stores for all displayable DCC on gfx10.3
Co-authored-by: Joshua Ashton <joshua@froggi.es>
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13153>
2021-10-02 22:56:48 +00:00
Joshua Ashton
e6fcf65578 ac/surface: Add helper for checking if a surface supports DCC Image stores
We need to keep RADV and RadeonSI on the same page about this due to modifiers.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13153>
2021-10-02 22:56:48 +00:00
Marek Olšák
923c535ee8 ac/surface: don't overwrite DCC settings for imported buffers
Fixes: 0f6251b31f - ac/surface: use DCC compatible with image stores for < 4K resolutions

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13120>
2021-10-01 16:15:40 -04:00
Marek Olšák
a198c6b7dd ac/surface: correct a comment about DCC image stores
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13013>
2021-09-25 08:49:05 +00:00
Marek Olšák
0f6251b31f ac/surface: use DCC compatible with image stores for < 4K resolutions
We don't have to use the special DCC settings for lower resolutions.

This will cause corruption if X and an windowed app use different Mesa
versions. The fix is to restart the X server. I expect to get false bug
reports due to this.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13013>
2021-09-25 08:49:05 +00:00
Joshua Ashton
92ade3df05 ac/surface: Add ac_modifier_supports_dcc_image_stores helper
Helper function to check if a modifier supports DCC image stores.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12862>
2021-09-18 00:01:01 +00:00
Joshua Ashton
fd08758bb1 ac/surface: Add modifiers capable of DCC image stores
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12862>
2021-09-18 00:01:01 +00:00
Marek Olšák
556c10c02c ac/surface: allow arbitrary swizzle modes for displayable DCC
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12430>
2021-08-20 14:28:36 +00:00
Samuel Pitoiset
16793c8efa ac/surface: implement CmaskAddrFromCoord in NIR on GFX10+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12182>
2021-08-05 06:37:09 +00:00
Samuel Pitoiset
a49b397041 ac/surface: implement CmaskAddrFromCoord in NIR
It's similar to DCC, only GFX9 is currently supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
2021-08-03 07:02:48 +00:00
Samuel Pitoiset
eedc0b59b7 ac/surface: copy the CMASK equation to radeon_surf
Only GFX9 is currently supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
2021-08-03 07:02:48 +00:00
Samuel Pitoiset
1f12c3ccc1 ac/surface: store CMASK pitch and height to radeon_surf
Only GFX9+ is currently supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
2021-08-03 07:02:48 +00:00
Bas Nieuwenhuizen
e2e9dd44f4 ac/surface: Handle non-retiled displayable DCC correctly for modifiers.
There is some hardware with num_render_backends == 1, but the number
of render backends in GB_ADDR_CFG > 1. Turns out this can be turned
off by making them rb unaligned which is valid with only 1 render
backend.

Fixes: 0833dd7d12 ("amd/common: Add support for modifiers.")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10575>
2021-07-05 22:34:13 +00:00
Pierre-Eric Pelloux-Prayer
c564841fae ac/surface: don't print stencil info if tex has no stencil
color/zs are stored in a union so testing for zs.stencil_offset
isn't the correct way to test for stencil.

Fixes: 988f148db3 ("ac/surface: overlap color and Z/S fields using a union in gfx9_surf_layout")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11625>
2021-06-29 23:38:21 +02:00
Marek Olšák
61a845ca19 ac/surface: don't set DCC_PIPE_ALIGN modifier bit for gfx10 with 1 RB
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11486>
2021-06-20 01:22:01 -04:00
James Park
a64b36ecaf ac/surface: Move drm_fourcc.h to common header
Useful for including from RADV without copy/paste.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9709>
2021-04-22 08:16:11 +00:00
Simon Ser
35e25ea1d0 ac/surface: allow non-DCC modifiers for YUV on GFX9+
Accept non-linear tiling for multi-planar formats on GFX9+, as long
as DCC is disabled. DCC support is possible in theory, but untested
for now.

GFX8 is still restricted to linear tiling because it's not yet clear
how modifiers should be handled on these chips for multi-planar
formats. Each plane may need a different modifier.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10134>
2021-04-15 09:43:17 +00:00
Simon Ser
19378dfe3c ac/surface: use blocksizebits instead of blocksize
util_format_get_blocksize asserts that the blocksize isn't zero.
However the blocksize will be zero if the format's channel encoding
is unspecified. The channel encoding is only meaningful for the
plain u_format layout, so util_format_get_blocksize can't be used
for formats with another layout. For example, YUV formats don't have
the channel encoding specified.

Use util_format_get_blocksizebits, which just returns zero without
an assertion for formats which don't have a channel encoding.

Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10134>
2021-04-15 09:43:17 +00:00
Samuel Pitoiset
f232c404d3 ac/surface: store the HTILE pitch to the surface
This will be used to copy VRS rates to the HTILE buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
2021-04-14 09:31:13 +00:00
Samuel Pitoiset
b9c7c5098e ac/surface: implement HtileAddrFromCoord in NIR
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
2021-04-14 09:31:13 +00:00
Samuel Pitoiset
9fabbf2150 ac/surface: copy the HTILE equations to the surface
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
2021-04-14 09:31:13 +00:00
Samuel Pitoiset
9eee737364 ac/surface: rename gfx9_dcc_equation to gfx9_meta_equation
gfx9_meta_equation will be used to store the HTILE equation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
2021-04-14 09:31:13 +00:00
Marek Olšák
7e68fae25f ac,radeonsi: rewrite DCC retiling without the DCC retile map
The retile map is removed and replaced by direct DCC address computations
in the retile shader using the new function ac_nir_dcc_addr_from_coord.

The RADV code is disabled.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák
35adf91de7 ac/surface: limit the number of swizzle modes that can have displayable DCC
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
Marek Olšák
1b3dbde3b9 ac/surface: only apply the 3D swizzle mode tuning to gfx10+
This fixes an addrlib failure on gfx9.

Fixes: b43f40166c "ac/surface: select best swizzle mode for 3D sampler performance"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
2021-04-13 03:17:42 +00:00
James Park
f3bd5f9590 amd: Hide drm_fourcc.h on Windows
Declare missing definitions instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9708>
2021-04-13 00:24:02 +00:00
James Park
7dfc9e4431 amd: Hide amdgpu_drm.h on Windows
Declare missing definitions instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9708>
2021-04-13 00:24:02 +00:00
Marek Olšák
faf10bd49d ac/surface: use named "color and "zs" structures in unions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
2021-04-12 20:53:45 +00:00
Marek Olšák
468836317b ac/surface: unify htile_* and dcc_* fields as meta_* fields
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
2021-04-12 20:53:45 +00:00