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ac/surface: enable better display DCC for chips newer than Yellow Carp

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Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13214>
This commit is contained in:
Marek Olšák 2021-10-06 02:23:43 -04:00 • committed by Marge Bot
parent a18a7626a2
commit 84d0f54e75
1 changed files with 7 additions and 2 deletions
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9
src/amd/common/ac_surface.c
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@ -2169,8 +2169,13 @@ static int gfx9_compute_surface(struct ac_addrlib *addrlib, const struct radeon_
surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
}
/* Use 64 && 128 for the non-modifier path for compatibility. */
if (info->chip_class >= GFX10_3) {
if ((info->chip_class >= GFX10_3 && info->family <= CHIP_YELLOW_CARP) ||
/* Newer chips will skip this when possible to get better performance.
* This is also possible for other gfx10.3 chips, but is disabled for
* interoperability between different Mesa versions.
*/
(info->family > CHIP_YELLOW_CARP &&
gfx10_DCN_requires_independent_64B_blocks(info, config))) {
surf->u.gfx9.color.dcc.independent_64B_blocks = 1;
surf->u.gfx9.color.dcc.independent_128B_blocks = 1;
surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;