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ac/surface: store the HTILE pitch to the surface

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This will be used to copy VRS rates to the HTILE buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
This commit is contained in:
Samuel Pitoiset 2021-04-07 15:41:05 +02:00 • committed by Marge Bot
parent b9c7c5098e
commit f232c404d3
2 changed files with 3 additions and 0 deletions
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2
src/amd/common/ac_surface.c
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@ -742,6 +742,7 @@ static int gfx6_compute_level(ADDR_HANDLE addrlib, const struct ac_surf_config *
surf->meta_size = AddrHtileOut->htileBytes;
surf->meta_slice_size = AddrHtileOut->sliceSize;
surf->meta_alignment_log2 = util_logbase2(AddrHtileOut->baseAlign);
surf->meta_pitch = AddrHtileOut->pitch;
surf->num_meta_levels = level + 1;
}
}
@ -1668,6 +1669,7 @@ static int gfx9_compute_miptree(struct ac_addrlib *addrlib, const struct radeon_
surf->meta_size = hout.htileBytes;
surf->meta_slice_size = hout.sliceSize;
surf->meta_alignment_log2 = util_logbase2(hout.baseAlign);
surf->meta_pitch = hout.pitch;
surf->num_meta_levels = in->numMipLevels;
for (unsigned i = 0; i < in->numMipLevels; i++) {

1
src/amd/common/ac_surface.h
View file

@ -360,6 +360,7 @@ struct radeon_surf {
/* DCC and HTILE (they are very small) */
uint32_t meta_size;
uint32_t meta_slice_size;
uint32_t meta_pitch;
uint32_t cmask_size;
uint32_t cmask_slice_size;