Commit graph

222456 commits

Author SHA1 Message Date
Erik Faye-Lund
dfc06fd114 pan/ci: add missing gitlab rule
Fixes: f091bdf392 ("pan: Lift pan_get_model into its own lib")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41528>
2026-05-13 13:13:24 +00:00
Erik Faye-Lund
ffadd54940 pan/ci: remove outdated gitlab rule
This directory doesn't exist any more.

Fixes: e55de285cc ("panfrost: Kill panfrost-job.h")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41528>
2026-05-13 13:13:23 +00:00
Erik Faye-Lund
88bd52cfe3 pan/ci: add missing gitlab rules
Fixes: 20970bcd96 ("panfrost: Add base of OpenCL C infrastructure")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41528>
2026-05-13 13:13:23 +00:00
Icenowy Zheng
98d07d5319 pvr: preserve and pass more data for suspending render passes
Suspending render pass jobs have more things than render targets to
preserve, e.g. occlusion query related information, atomic / compute
overlap enablement information etc.

Preserve them too when suspending. When resuming, for boolean
properties, or'ing them; for other preserved things assign them. This is
for ensuring the last resuming fragment job is compatible with all
suspending geometry jobs, as for suspending render passes the fragment
job is omitted.

The situation of the suspending render pass and the resuming render pass
have different query pools is still not supported, and quite difficult
to support.

Backport-to: 26.0
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Nick Hamilton <nick.hamilton@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41002>
2026-05-13 12:57:23 +00:00
Icenowy Zheng
175784d1a8 pvr: add a structure containing data kept for suspended renderpasses
As more things than render targets data need to be kept for suspending
renderpasses, add a structure to sort out them.

Backport-to: 26.0
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Nick Hamilton <nick.hamilton@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41002>
2026-05-13 12:57:23 +00:00
Icenowy Zheng
7e56e4a030 pvr: stop to derive rt datasets based on geometry_terminate
As we're going to kick frag for suspending rendering passes to mitigate
frag job inconsistency between suspending rendering passes and resuming
render passes, deriving render target datasets based on
geometry_terminate property will be incorrect.

Stop to use geometry_terminate to decide whether to remember render
target datasets, instead use is_suspend directly.

In addition, is_resume is now also used instead of checking whether
suspended render taget datasets is available. This will help when either
the suspending render pass or the resuming render pass have multiple
graphics sub_cmds.

Backport-to: 26.0
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Nick Hamilton <nick.hamilton@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41002>
2026-05-13 12:57:23 +00:00
Icenowy Zheng
d7f79b34c7 pvr: copy sub_cmd flags except owned when executing subcmds out of pass
When executing a secondary command buffer outside a renderpass, the
sub_cmds of that secondary command buffer is simply copied into the
primary command buffer. However, the 4 flags outside the type-specific
structures are not copied. Although owned flag is intentionally set to
false, the other 3 flags should be preserved.

Copy these 3 flags when executing sub_cmds of a secondary command buffer
outside renderpasses.

Backport-to: 26.0
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Reviewed-by: Nick Hamilton <nick.hamilton@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41002>
2026-05-13 12:57:23 +00:00
Icenowy Zheng
351eaffdc5 pvr: fix handling of invalid attachment info in pvr_init_fs_outputs_mrt
The attachments field of the render pass state could be
MESA_VK_RP_ATTACHMENT_INFO_INVALID, which indicates no attachment
information is valid. If such situation really happens when initializing
the fragment state of a pipeline, this means neither a render pass nor a
VkPipelineRenderingCreateInfo structure is available -- in this case,
the specificiation for that structure says colorAttachmentCount is
considered as 0, so the loop iterating color attachments should just not
happen.

Skip iterating color attachments if the render pass has a attachments
field with value MESA_VK_RP_ATTACHMENT_INFO.

This fixes some regression on the Vulkan CTS testcase
dEQP-VK.pipeline.monolithic.misc.no_rendering introduced by !40870, in
which MESA_VK_RP_ATTACHMENT_INFO instead of 0 is set as the value of the
attachments field of the render pass state, if neither a render pass nor
the VkPipelineRenderingCreateInfo structure is available.

Fixes: 1950b6c1a7 ("vulkan: mark RP attachments as invalid when no rendering create info")
Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41032>
2026-05-13 12:40:33 +00:00
Dmitry Osipenko
85cb633871 intel/virtio: Preserve errno properly when handling ioctl
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Avoid changing errno when ioctl succeeds.

Fixes: b06d759a93 ("intel: Add virtio-gpu native context")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15446
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41512>
2026-05-13 11:34:11 +00:00
Timothy Arceri
0429a73f47 mesa: fix typo in validation string
We are processing the ff fragment shader not the vertex shader.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41524>
2026-05-13 11:01:07 +00:00
hwandy
c96e73aa93 Revert "intel/decoder: make libvulkan_intel to depend on stub decoder when buildtyle=release."
This reverts commit 2ee6b4d96e.

The previous change avoids 0.25MB (1%) size change on the driver binary file,
but blocks the runtime enablement for some intel tools which is critical
to our optimization tasks.

It's not a good tradeoff based on the new need of the tool in runtime,
so revert this change.

Test: meson setup builddir -Dallow-fallback-for=libdrm -D build-tests=true -Dbuildtype=release --reconfigure && ninja -C builddir && cd builddir && meson test

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: hwandy <hwandy@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41525>
2026-05-13 10:21:08 +00:00
Lorenzo Rossi
32ca5f7515 panfrost: Plumb VS varying_layout in FS
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This allows us to use LD_VAR_BUF instead of LD_VAR when the shaders are
linked together.

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40761>
2026-05-13 09:15:58 +00:00
Lorenzo Rossi
12b9a23cb5 panfrost: Split default key creation in helper function
This will make it easier to create new default keys in other places

Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40761>
2026-05-13 09:15:58 +00:00
Lorenzo Rossi
1f80394c67 pan/compiler/lower_fs_inputs: Do not trust slot->alu_type
pan_varying_layout contains both layout and format, in lower_fs_inputs
though the layout is referring to the VS layout and the format might
differ from what the FS layout expects.  We cannot use the VS format as
FS format otherwise we risk interpolating an integer.

Fixes: 66bee415ad ("pan/compiler: Split lower_varyings_io into fs_inputs and vs_outputs")
Signed-off-by: Lorenzo Rossi <lorenzo.rossi@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40761>
2026-05-13 09:15:58 +00:00
Faith Ekstrand
e3d5d13d6d pan/bi: Use LOD_MODE_EXPLICIT for the 2nd half of textureGrad() on Bifrost
textureGrad() has to be split into two halves on Mali: Computing the
gradient/LOD and doing the actual texture operation.  On Valhal, we do
this with LOD_MODE_GRDESC but on Bifrost, we use LOD_MOD_EXPLICIT.  When
converting to NIR, I missed this.

Fixes: 05a066c921 ("pan/nir: Add bifrost support to pan_nir_lower_tex()")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41513>
2026-05-13 08:10:23 +00:00
David Rosca
804ff19a5a radeonsi/uvd_enc: Skip extra padding bytes in output bitstream
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Trailing zeroes should be harmless, but it seems to cause issues with
latest ffmpeg (which looks like an ffmpeg bug).
The extra bytes are useless, so we can just skip them like we already
do on VCN to workaround it.

Cc: mesa-stable
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41485>
2026-05-13 07:12:53 +00:00
Samuel Pitoiset
aee1043227 radv/meta: adjust an assertion for HTILE expand on SDMA with compute fallback
Because SDMA doesn't support MSAA, it's possible to get there because
RADV fallback to compute queue in this case.

Some tests only pass because RDNA2 and older don't support image
stores with depth/stencil and MSAA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41492>
2026-05-13 06:10:02 +00:00
Alyssa Rosenzweig
db95df3da4 jay/opt_propagate: propagate undefs
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
allows deleting piles of moves & pressure.

simd16 results:

   Totals:
   Instrs: 2759547 -> 2753358 (-0.22%); split: -0.29%, +0.06%
   CodeSize: 41141280 -> 41071072 (-0.17%); split: -0.23%, +0.06%

   Totals from 332 (12.54% of 2647) affected shaders:
   Instrs: 648080 -> 641891 (-0.95%); split: -1.23%, +0.28%
   CodeSize: 9782272 -> 9712064 (-0.72%); split: -0.97%, +0.25%

simd32 is a loss because of RA being stupid. again, this is obviously the right
thing to do so we're doing it. stats are just a hint.

   Totals:
   Instrs: 4683556 -> 4689193 (+0.12%); split: -0.25%, +0.37%
   CodeSize: 70072256 -> 70171920 (+0.14%); split: -0.23%, +0.38%
   Number of spill instructions: 50320 -> 50316 (-0.01%)
   Number of fill instructions: 51530 -> 51526 (-0.01%)

   Totals from 351 (13.26% of 2647) affected shaders:
   Instrs: 1349954 -> 1355591 (+0.42%); split: -0.86%, +1.28%
   CodeSize: 20484224 -> 20583888 (+0.49%); split: -0.80%, +1.29%
   Number of spill instructions: 21762 -> 21758 (-0.02%)
   Number of fill instructions: 26328 -> 26324 (-0.02%)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:36 +00:00
Alyssa Rosenzweig
21e527ceec jay/opt_propagate: fix NOT propagation
and add a test for it. oops.

Totals:
Instrs: 4700885 -> 4683707 (-0.37%); split: -1.36%, +1.00%
CodeSize: 70551872 -> 70285088 (-0.38%); split: -1.35%, +0.97%
Number of spill instructions: 50325 -> 50320 (-0.01%)
Number of fill instructions: 51541 -> 51530 (-0.02%)

Totals from 1261 (47.64% of 2647) affected shaders:
Instrs: 3932922 -> 3915744 (-0.44%); split: -1.63%, +1.19%
CodeSize: 59196320 -> 58929536 (-0.45%); split: -1.60%, +1.15%
Number of spill instructions: 47901 -> 47896 (-0.01%)
Number of fill instructions: 48420 -> 48409 (-0.02%)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:36 +00:00
Alyssa Rosenzweig
5cbf0002c4 jay/register_allocate: tweak roundrobin heuristic
Totals:
Instrs: 4706214 -> 4700132 (-0.13%); split: -1.03%, +0.90%
CodeSize: 70628880 -> 70540336 (-0.13%); split: -1.02%, +0.89%

Totals from 2084 (78.73% of 2647) affected shaders:
Instrs: 4515981 -> 4509899 (-0.13%); split: -1.08%, +0.94%
CodeSize: 67822800 -> 67734256 (-0.13%); split: -1.06%, +0.93%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:35 +00:00
Alyssa Rosenzweig
37e4144693 jay/register_allocate: set num_regs[MEM] properly
this is both a correctness fix (insufficient MEM registers reserved in some
cases) and a performance fix (unnecessary allocations & zeroing in the RA when
we don't spill).

fixes dEQP-VK.dgc.ext.compute.misc.scratch_space

stats are noise but positive i guess.

Totals from 35 (1.32% of 2647) affected shaders:
Instrs: 396770 -> 396690 (-0.02%)
CodeSize: 6040832 -> 6039600 (-0.02%)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:35 +00:00
Alyssa Rosenzweig
d67e37a24c jay/lower_scoreboard: use sbid syncs to elide regdist deps
Totals from 1522 (57.50% of 2647) affected shaders:
CodeSize: 65268400 -> 65056176 (-0.33%); split: -0.33%, +0.00%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:35 +00:00
Alyssa Rosenzweig
89e33407e4 jay/lower_scoreboard: use CFG for RegDist scoreboarding
this is now properly global.

Totals from 558 (21.08% of 2647) affected shaders:
CodeSize: 42098496 -> 42078256 (-0.05%); split: -0.05%, +0.00%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:35 +00:00
Alyssa Rosenzweig
c2a423b5b5 jay/lower_scoreboard: rename gpr_range -> key
for clarity since UGPRs are here too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:34 +00:00
Alyssa Rosenzweig
d549fb9c04 jay/lower_scoreboard: compact inst_exec_pipe
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:34 +00:00
Alyssa Rosenzweig
adaae3baf1 jay/lower_scoreboard: control flow is int pipe
according to IGC output.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:34 +00:00
Alyssa Rosenzweig
039b76d07c jay/lower_scoreboard: factor regdist logic out
no change, just hoisting the loop & reindenting.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:33 +00:00
Alyssa Rosenzweig
a7b8395c15 jay/lower_scoreboard: run RegDist globally
poking around, it seems branches stall the pipelines so we don't need to do any
dataflow analysis, but we do need to fall through for correctness. just keep
going across block boundaries. this isn't optimal yet but it reduces a
pile of A@1's already.

Totals from 1389 (52.47% of 2647) affected shaders:
CodeSize: 56385376 -> 56325776 (-0.11%); split: -0.13%, +0.03%

--

this also fixes issues where the first instruction of a block is a SEND that has
an unmet register dependency, since the old code was fundamentally broken. oops.
lol. fixes
dEQP-VK.compute.pipeline.workgroup_memory_explicit_layout.zero.uint8_t_array_to_uint_array_1
among many others.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:33 +00:00
Alyssa Rosenzweig
52224bb597 jay/lower_scoreboard: refactor
no functional change, just reshuffling code for next commit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:33 +00:00
Alyssa Rosenzweig
3a7baf2cde jay/lower_scoreboard: fix trivial scheduling
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:32 +00:00
Alyssa Rosenzweig
7ba6e9810a jay: clarify development model
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:32 +00:00
Alyssa Rosenzweig
45d63539a6 jay: have proper UNDEF
matches NIR's broken semantics but allows more opts later. just a rename here.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:32 +00:00
Alyssa Rosenzweig
c2911dd688 jay: fix comment
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:32 +00:00
Alyssa Rosenzweig
3d94ba1d20 jay: make indirect push data blow up more obviously
fail to crash:

dEQP-VK.spirv_assembly.instruction.compute.untyped_pointers.glsl_memory_model.basic_usecase.load.push_constant.int32

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:31 +00:00
Alyssa Rosenzweig
b10c0d95a8 jay: optimize pack_32_2x16_split(#0, x)
Kinda pointless but whatever.

Totals from 10 (0.38% of 2647) affected shaders:
Instrs: 6846 -> 6830 (-0.23%)
CodeSize: 95728 -> 95520 (-0.22%)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:31 +00:00
Alyssa Rosenzweig
5ebf0c9161 jay: elide atomic dests
simd16 results. kinda noisy but obviously the right thing to do.

Totals from 45 (1.70% of 2647) affected shaders:
Instrs: 59182 -> 59194 (+0.02%); split: -0.11%, +0.14%
CodeSize: 905200 -> 904752 (-0.05%); split: -0.17%, +0.12%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:31 +00:00
Alyssa Rosenzweig
b3fe01e2c1 jay: fix bfn with 0xffff constant
awkward.

Totals from 128 (4.84% of 2647) affected shaders:
Instrs: 258121 -> 257970 (-0.06%); split: -0.07%, +0.01%
CodeSize: 3662400 -> 3661792 (-0.02%); split: -0.14%, +0.12%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:30 +00:00
Alyssa Rosenzweig
c5cee5d973 jay: add JAY_DEBUG=noacc option
can help when debugging RA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:30 +00:00
Alyssa Rosenzweig
9dbaaecb74 jay: swap predication/acc pass order
Lets us use more accumulators, I think this is well motivated. Saw this in a
test shader.

Totals from 242 (9.14% of 2647) affected shaders:
Instrs: 1365060 -> 1365035 (-0.00%); split: -0.00%, +0.00%
CodeSize: 20678592 -> 20680096 (+0.01%); split: -0.01%, +0.02%

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41510>
2026-05-12 22:46:30 +00:00
Mike Blumenkrantz
afa9ab41b9 meson: fix renderdoc integration define
this should be an integer

Fixes: 93390d4b73 ("vk/runtime,zink: only integrate renderdoc on supported platforms")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41519>
2026-05-12 22:11:27 +00:00
Pavel Ondračka
6cb04bb791 r300/ci: run EGL deqp tests
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41517>
2026-05-12 21:52:34 +00:00
squidbus
2f63d09270 kk: Support shaderCullDistance
Some checks are pending
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Uses an approach based on HoneyKrisp. In the vertex shader, an
extra output writes 1 if the cull distance is >= 0, otherwise it
writes 0. In the fragment shader, if the extra outputs from the
vertex shader interpolate zero, all cull distances are < 0, so
the primitive is culled by discarding fragments.

Reviewed-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41463>
2026-05-12 20:38:24 +00:00
Mel Henning
e81a292165 nvk: Disable compression on Turing
We've had multiple reports that this is broken on Turing right now.
Disable it until someone figures out what's wrong.

See also: https://gitlab.freedesktop.org/mesa/mesa/-/work_items/15358

Fixes: b524bf368e ("nvk: Reenable compression support with nouveau 1.4.2")
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41332>
2026-05-12 19:19:54 +00:00
Eric Engestrom
1f5a54a289 zink+nvk/ci: update expected fails
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41515>
2026-05-12 19:01:58 +00:00
Mel Henning
1e114e2dce nvk: Add a wfi for blackwell in CmdDispatchIndirect
Some checks are pending
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This fixes CTS flakes in several tests, for example:
dEQP-VK.synchronization.signal_order.shared_binary_semaphore.write_copy_buffer_read_ssbo_compute_indirect.buffer_262144_opaque_fd

Fixes: 1c77a6f049 ("nvk: Don't emit MME FIFO config on Blackwell+")
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41010>
2026-05-12 18:43:17 +00:00
Georg Lehmann
ee64cb2763 aco: add tests for cube txd to tex opt
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41489>
2026-05-12 18:17:22 +00:00
Georg Lehmann
d256c1f49e ac/nir/lower_tex_coords: fix optimizing cube txd to tex
We need to remove ddx/ddy before doing the cube lowering,
otherwise we insert instructions that break dominance.

Affects Sable.

Fixes: 7d552d71e9 ("ac/nir: optimize txd(coord, ddx/ddy(coord))")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41489>
2026-05-12 18:17:22 +00:00
Samuel Pitoiset
6b3223895f radv: invalidate command buffer state after executing secondaries
This is more robust than trying to keep track of the states between
command buffers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41260>
2026-05-12 17:17:55 +00:00
Samuel Pitoiset
70a3d2c082 radv: remove a TODO about layeredShadingRateAttachments
This will never be supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41427>
2026-05-12 16:55:23 +00:00
Samuel Pitoiset
da0ee50c3b radv: fix another case of VRS with mipmaps on GFX10.3
When a VRS view is used with a depth/stencil view, the driver is
expected to copy the VRS rates to the HTILE buffer of the depth/stencil
view. Though if the image uses mipmaps and the base level can't support
HTILE there is no way to copy the rates. The workaround is to force VRS
to be 1x1 which is valid in Vulkan.

This fixes old VKCTS failures on RAPHAEL just because it supports
fragmentShadingRateWithShaderDepthStencilWrites compared to other GPUs
in CI (NAVI21/VANGOGH).

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41427>
2026-05-12 16:55:23 +00:00