Commit graph

7394 commits

Author SHA1 Message Date
Samuel Pitoiset
df0c742543 radv/amdgpu: rework growing a CS with the chained IB path slightly
This should allow us to use cs_finalize().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23727>
2023-06-26 09:10:09 +00:00
Samuel Pitoiset
c11a62a7b0 radv/amdgpu: use the correct IB size when growing a CS with RADV_DEBUG=noibs
The current IB size is copied when radv_amdgpu_cs_add_old_ib_buffer()
is called, which might not be the real IB size because we might still
pad the CS with NOP packets after.

Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23727>
2023-06-26 09:10:09 +00:00
Samuel Pitoiset
0f8864e047 radv: adjust alignment of the preprocess buffer with DGC
The preprocess buffer is the buffer used to generate the cmdbuf. It
was aligned to 256 bytes but the correct alignment is actually
ac_gpu_info::ib_alignment.

Otherwise, if a DGC IB is executed like a IB1, this hits an assertion
in radv_amdgpu_cs_submit() because the alignment is incorrect.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23764>
2023-06-23 17:17:08 +00:00
Samuel Pitoiset
06cdf222a6 radv: only dirty the active push constant stages with DGC
It's unnecessary to dirty all stages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23761>
2023-06-23 16:56:44 +00:00
Samuel Pitoiset
3b329e195e radv: only dirty the index type when necessary with DGC
This should only be needed for non-indexed draws and it's already
dirty if the DGC binds an index buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23761>
2023-06-23 16:56:44 +00:00
Samuel Pitoiset
2d97cc89fb radv/amdgpu: dump all cs with RADV_DEBUG=noibs
It was only dumping the oldest.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23646>
2023-06-23 16:35:22 +00:00
Samuel Pitoiset
8af705a856 radv/amdgpu: fix dumping cs with RADV_DEBUG=noibs
The ib_buffer is NULL now.

Fixes: 50e6b16855 ("radv/amdgpu: Use fallback submit for queues that can't use IBs.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23646>
2023-06-23 16:35:21 +00:00
Samuel Pitoiset
ae7721d163 radv: reserve more space in CS for SQTT
Otherwise, it can hit an assertion.

Fixes: 7893040f80 ("radv: Add stricter space checks.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23826>
2023-06-23 13:51:13 +00:00
Timur Kristóf
3b21c59fc3 aco: Remove unneeded stage related info fields.
Cleanup of various fields with redundant information.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23597>
2023-06-23 12:49:05 +00:00
Timur Kristóf
6028c146d5 radv: Set aco_shader_info::hw_stage
ACO will rely on this field instead of guessing
the stage internally.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23597>
2023-06-23 12:49:05 +00:00
Tatsuyuki Ishi
b69a1b4153 vulkan: Migrate shader module hash to BLAKE3.
Shaders are the largest thing we hash now, so they benefit from a faster
hash.

Change the field name from `sha1` to `hash` to avoid tying the definition
to a particular algorithm. This doubles down as a precaution against
callers still assuming a 20-byte hash (in which case the compilation will
error out).

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22571>
2023-06-23 09:28:04 +00:00
Mike Blumenkrantz
e15a4e6e1a radv: pre-init surface info
this is costly to do at render time, so avoid it when possible

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23770>
2023-06-22 13:36:13 +00:00
Mike Blumenkrantz
df6749ed56 radv: inline radv_can_enable_dual_src()
this is unexpectedly heavy

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23601>
2023-06-21 18:59:07 +00:00
Mike Blumenkrantz
8b73109a93 radv: remove redundant intermediate variable in radv_is_mrt0_dual_src()
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23601>
2023-06-21 18:59:07 +00:00
Vitaliy Triang3l Kuzmin
9d75795087 radv: Move most of DB_SHADER_CONTROL to PS, more precise GFX11 blend WA
Move most of the DB_SHADER_CONTROL fields from the pipeline to the pixel
shader for preparation for shader objects.

Also, the GFX11 export conflict bug workaround doesn't need to be enabled
for non-1x sample counts or if blending is not enabled, so make the
application of DB_SHADER_CONTROL consider the current sample count and
blending state even if they're dynamic.

Having access to the exact sample count in DB_SHADER_CONTROL setup is also
necessary for good performance in SampleInterlock execution modes of
fragment shader interlock, for configuration of POPS_OVERLAP_NUM_SAMPLES
(GFX9-10.3) or OVERRIDE_INTRINSIC_RATE (GFX11), as PixelInterlock is
massively slower with multisampling due to overlap between adjacent
polygons sharing covered pixels among the common edge.

The name of the dynamic state controlling DB_SHADER_CONTROL is now
unambiguous - previously line rasterization mode had effect on attachment
feedback loop state emission.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23474>
2023-06-21 14:16:24 +00:00
Konstantin Seurer
48b32124c6 radv/rt: Store the prolog outside the shaders array
Avoids including it in executable statistics queries.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Konstantin Seurer
ebe4e337fd radv: Use _mesa_shader_stage_to_string for executable name
We can not use it for all stages because RADV has some special stages
and shader-db doesn't handle all stages.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Konstantin Seurer
334a20ae28 radv: Implement executable properties for ray tracing stages
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Konstantin Seurer
bf5b74c3ba radv: Use get_shader_from_executable_index for executable properties
This will make handling ray tracing pipelines easier.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Konstantin Seurer
8a5c4b3ebf radv: Adjust the traversal shader description
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Konstantin Seurer
eeae2fb5c4 radv: Move the shader type to radv_shader_info
Since the default value is 0, this removes some boilerplate.
Moving it to the shader info also makes it accessible using
radv_shader.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23524>
2023-06-21 09:13:04 +00:00
Samuel Pitoiset
836990b651 radv: enable NV_device_generated_commands on GFX6
Now that GFX6 supports IBs, DGC can also be enabled.
Pass all vkd3d-proton tests on Pitcairn.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23689>
2023-06-21 06:54:03 +00:00
Samuel Pitoiset
a9c8366261 radv: implement padding cmdbuffer for DGC on GFX6
GFX6 only supports PKT2_NOP_PAD.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23689>
2023-06-21 06:54:03 +00:00
Dave Airlie
146adbd2f4 radv/video: drop incorrect defines for uapi ones.
I missed there's an off by one, and found the kernel defined
the correct bits, so just use that.

Fixes: 9477f117f4 ("radv/video: add initial frameworking.")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23757>
2023-06-21 05:28:01 +00:00
Rhys Perry
532407094a radv: use wave32 for small workgroups
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23555>
2023-06-20 14:03:52 +00:00
Rhys Perry
b765a27d73 radv: refactor CS subgroup size determination
This is less convoluted.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23555>
2023-06-20 14:03:52 +00:00
Samuel Pitoiset
1359e806f2 radv: advertise VK_EXT_depth_bias_control
Pass new CTS on RDNA2.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23696>
2023-06-20 12:46:28 +00:00
Samuel Pitoiset
266b2cfe5b radv: implement VK_EXT_depth_bias_control
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23696>
2023-06-20 12:46:28 +00:00
Caio Oliveira
59cc77f0fa compiler: Move from nir_scope to mesa_scope
Just moving the enum and performing renames, no behavior change.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
2023-06-19 23:29:26 +00:00
Eric Engestrom
ec8932fd63 radv: fix formatting
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23719>
2023-06-19 11:19:42 +01:00
Samuel Pitoiset
3208844539 radv: use cs_execute_ib() for GFX, MBCP and DGC IBs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23671>
2023-06-19 07:53:35 +00:00
Samuel Pitoiset
afbe187715 radv/amdgpu: add cs_execute_ib() for executing IBs
This will be used to implement support for DGC with RADV_DEBUG=noibs,
DGC for secondaries and for future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23671>
2023-06-19 07:53:35 +00:00
Samuel Pitoiset
0551954e80 radv/amdgpu: remove useless assert in radv_amdgpu_winsys_cs_submit_internal()
The zero CS submission path is used instead, and this assertion isn't
really useful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23669>
2023-06-19 07:33:35 +00:00
Samuel Pitoiset
8e1579a214 radv/amdgpu: fix a buffer overflow for submissions with RADV_DEBUG=noibs
With RADV_DEBUG=noibs (aka no chaining) the number of IBs to submit
depends on the number of old IB buffers of every CS.

This fixes a stack smashing error.

Fixes: 53b439d24f ("radv/amdgpu: Use STACK_ARRAY for IB array to reduce stack usage."
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23669>
2023-06-19 07:33:35 +00:00
Samuel Pitoiset
795bf984c6 radv: reserve space for shadowed regs
Tested on RDNA2, hopefully the space reservation is large enough for
other chips as well.

Fixes: 7893040f80 ("radv: Add stricter space checks.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23672>
2023-06-19 07:07:37 +00:00
Samuel Pitoiset
a5cdc4840d radv: use IB for the GFX preamble on GFX6
GFX6 supports IBs without any issues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23670>
2023-06-19 06:48:21 +00:00
Samuel Pitoiset
e20a0f32f2 radv: do not use IB for the GFX preamble with RADV_DEBUG=noibs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23670>
2023-06-19 06:48:21 +00:00
Marek Olšák
f0eb548e7b amd: skip redundant INDEX_TYPE even with register shadowing
same as PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
2ce24402d6 amd: skip redundant PKT3_NUM_INSTANCES even with register shadowing
same as PAL

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
c33622d931 amd: don't set PA_RATE_CNTL because it has no effect
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Marek Olšák
9316258449 amd: rename mid_command_buffer_preemption_enabled -> register_shadowing_required
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Marek Olšák
789a3b24c1 amd: improve the IB parser, parse more packets
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:20 +00:00
Eric Engestrom
8b319c6db8 radv: reformat according to its .clang-format
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23253>
2023-06-16 19:59:52 +00:00
Eric Engestrom
1725d9aa67 radv,aco: tweaks to get clang-format to print nicer code
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23253>
2023-06-16 19:59:52 +00:00
Konstantin Seurer
7f3874981d radv/rt: Enable RT pipelines on GFX10_3+ excluding vangogh
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23677>
2023-06-16 16:13:34 +00:00
Konstantin Seurer
49b400423c Revert "radv: Enable ray tracing pipelines by default"
This partially reverts commit 374bd4e1be.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23677>
2023-06-16 16:13:34 +00:00
Friedrich Vock
b49afd6ce2 radv: Add the BOs of all shaders in a RT pipeline
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23681>
2023-06-16 14:47:03 +00:00
Samuel Pitoiset
0e726c63ff radv: add dgc_emit_index_buffer()
For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_INDEX_BUFFER_NV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>
2023-06-16 06:19:13 +00:00
Samuel Pitoiset
a842f37dff radv: add dgc_emit_draw_indexed() helper
For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_DRAW_INDEXED_NV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>
2023-06-16 06:19:13 +00:00
Samuel Pitoiset
0551c54dff radv: add dgc_emit_draw() helper
For emitting VK_INDIRECT_COMMANDS_TOKEN_TYPE_DRAW_NV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23584>
2023-06-16 06:19:13 +00:00