Commit graph

73 commits

Author SHA1 Message Date
Marek Olšák
dbbbe73d05 radeonsi: fix NGG streamout hang by allocating GDS in the right place
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
4f3c74ddfb radeonsi: determine DB_SHADER_CONTROL in si_shader_ps
This is cleaner and more flexible.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
8e879dcedd radeonsi: restructure PS no-export fixups
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
7cbea71aab radeonsi: fix polygon stippling without color and Z outputs (v2)
We need to handle the fact that it kills pixels.

v2: also update si_update_ps_inputs_read_or_disabled

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
705e9af29a radeonsi: don't use info.gs.invocations if it's not GS
It's a union, which makes gs.invocations undefined for VS and TES.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Pierre-Eric Pelloux-Prayer
813e60f1ea tradeonsi: fix preamble state producing incorrect packets
If the first time the preamble is written, one of the rings
isn't allocated, we wouldn't write the RING_SIZE to the preamble.

Later, when the preamble gets updated after the ring allocation,
the new RING_SIZE packet would overwrite other packets.

To prevent this, always write the RING_SIZE (the alternative would
be to write NOP packets).

This fix "*ERROR* Illegal register access in command stream" hangs
I observed on GFX8.

Fixes: 32c7805ccc ("radeonsi: merge all preamble states into one")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16962>
2022-06-10 17:40:18 +00:00
Marek Olšák
2443054932 amd: rename fishes to Navi21, Navi22, Navi23, Navi24, and Rembrandt
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16604>
2022-05-19 11:55:50 +00:00
Marek Olšák
1fdc3b0fde radeonsi: move CS preamble emission into the winsys
The preamble will be skipped by the kernel if there is no context switch.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16509>
2022-05-17 10:27:04 +00:00
Marek Olšák
32c7805ccc radeonsi: merge all preamble states into one
Tess registers are appended. GS registers are appended or overwritten
if they are already set. There are separate TMZ and non-TMZ preambles.

The preamble will be passed to the kernel as an IB to execute on a context
switch only.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16509>
2022-05-17 10:27:04 +00:00
Marek Olšák
fcaa9f5096 radeonsi/gfx11: fix alpha-to-coverage with stencil or samplemask export
We can't use UINT16_ABGR for the alpha channel. Always use 32_ABGR.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16509>
2022-05-17 10:27:04 +00:00
Marek Olšák
e9e9086b66 radeonsi: use the new flag AMDGPU_GEM_CREATE_DISCARDABLE
It forces the best placement (usually VRAM) and evictions discard the contents
instead of copying.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16466>
2022-05-16 07:03:39 -04:00
Marek Olšák
ac0becc648 radeonsi: use PIPE_RESOURCE_FLAG_UNMAPPABLE and DRIVER_INTERNAL more
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16466>
2022-05-16 07:03:38 -04:00
Marek Olšák
39800f0fa3 amd: change chip_class naming to "enum amd_gfx_level gfx_level"
This aligns the naming with PAL.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pellou-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16469>
2022-05-13 14:56:22 -04:00
Pierre-Eric Pelloux-Prayer
d4e4aa997a radeonsi: store shader variants in an array
Instead of storing them in a linked list, put them in an array
in si_shader_selector. The keys are also stored separatly, to
avoid pointer chasing when searching a variant in si_shader_select_with_key.

This main point here is to simplify the code by storing everything
in the selector instead of splitting the list storage between the selector
and the shaders; this shouldn't affect performance in a meaningful way.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16273>
2022-05-13 14:40:56 +00:00
Pierre-Eric Pelloux-Prayer
b75b9d5cb4 radeonsi: remove unused params from si_shader_select_with_key
thread_index is always -1, optimized_or_none is always false.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16273>
2022-05-13 14:40:56 +00:00
Pierre-Eric Pelloux-Prayer
1f31564607 radeonsi: don't use wave32 for GE on gfx10 if culling is used
This is a workaround for issue #6457: it fixes the rendering and
prevent the hang but I can't explain why.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6457
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16427>
2022-05-12 07:46:04 +00:00
Dave Airlie
14b1ed1ce1 radeonsi: port tess ring calcs to the common helper.
This uses the common helper code to implement the tess ring sizing.

One question is if radeonsi should be using tess_offchip_ring_offset
in some places it's using tess_factor_ring_size?

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16415>
2022-05-11 02:08:08 +00:00
Jason Ekstrand
3c07c3e16d shader_info: Make images_used a bitset
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15988>
2022-05-10 11:23:11 -05:00
Marek Olšák
3bc754a9a6 radeonsi/gfx11: mark streamout as unimplemented for now
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:55 +00:00
Yogesh mohan marimuthu
6531ec8922 ac,radeonsi/gfx11: swizzle MRT0/1 for dual source blending
If dual source blending is enabled, use export targets 21 and 22.
Also we have to swap odd/even lanes between export target 21 and 22.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:55 +00:00
Yogesh Mohan Marimuthu
12a606c1bd radeonsi/gfx11: export alpha through mrtz for alpha-to-coverage if mrtz is there
If both mrtz and alpha-to-coverage are enabled, the alpha channel must
be exported through mrtz.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:55 +00:00
Marek Olšák
6d0e50f226 radeonsi/gfx11: TF_RING_SIZE changed to a per-SE size
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:55 +00:00
Marek Olšák
9fecac091f radeonsi/gfx11: scattered register deltas
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:55 +00:00
Marek Olšák
a90ff631a5 ac,radeonsi/gfx11: remove FMASK loads
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Pierre-Eric Pelloux-Prayer
25a66477d0 radeonsi/gfx11: register changes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Pierre-Eric Pelloux-Prayer
3bdb3db5fa radeonsi/gfx11: add assert in legacy vs path
Only ngg should be used.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Marek Olšák
980620ae07 radeonsi/gfx11: program inst_pref_size for graphics
For gfx11, program INST_PREF_SIZE value in SPI registers.

v4: fix mask value, code indendation (Marek Olšák)
v3: improve code for readability (Indrajit Das, Marek Olšák)
v2: ngg is always enabled in gfx11 (Marek Olšák)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu
02367b29c7 radeonsi/gfx11: make flat_scratch changes for graphics
gfx11 passes scratch base address using
SPI_GFX_SCRATCH_BASE_LO and _HI registers. Make the
code changes to support the same.

v5: remove type cast from 64bit to 32bit (Marek Olšák)
v4: combine scratch_memory and scratch_state atom (Marek Olšák)
v3: skip shader relocs for gfx11
v2: make atom for scratch_memory (Indrajit)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Marek Olšák
27104ff647 radeonsi/gfx11: use the new TCS WaveID SGPR to compute vs_rel_patch_id
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Marek Olšák
7c423a7ad0 radeonsi/gfx11: enable NGG-only draw paths
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Marek Olšák
980b7f75e8 amd: enable gfx11 in header generator, fix drivers with renamed gfx6-10 defs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
2022-05-10 04:29:54 +00:00
Marek Olšák
77e1fc67bc radeonsi: align the tessellation ring address to 2MB
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16215>
2022-05-03 11:11:08 -04:00
Pierre-Eric Pelloux-Prayer
f1f2d407e7 radeonsi: don't always strip NIR debug infos
When using NIR_DEBUG=print, always having shader names help debugging.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16247>
2022-05-03 10:39:51 +00:00
Marek Olšák
12ab3e6853 radeonsi: remove an obsolete comment about LLVM 14
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16112>
2022-04-25 13:43:16 +00:00
Marek Olšák
1bf39b1f9d ac,radeonsi: rework how scratch_waves is used and move it to ac_gpu_info.c
The addition of the "compute" parameter is for a future change.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15966>
2022-04-23 01:45:17 +00:00
Marek Olšák
4e8b8555c6 radeonsi: move si_shader_info::stage into si_shader_selector
This will help me see all places where we use "info", which will
be moved from si_shader_selector to shader variants.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
2022-04-22 22:21:11 +00:00
Marek Olšák
8de5b11b29 radeonsi: move most "info" fields from si_shader_selector into si_shader_info
It's where they should be, and future commits might require this.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
2022-04-22 22:21:11 +00:00
Marek Olšák
b57a163b7d radeonsi: gather pipe_stream_output_info from NIR intrinsics
This stops pipe_stream_output_info from create_*s_state context functions
because NIR contains everything and can do more advanced shader linking
this way.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
2022-04-22 22:21:11 +00:00
Marek Olšák
981bd8cbe2 radeonsi: apply key.ge.opt.kill_{outputs,pointsize,clipdistance} in NIR
This may be needed by ACO, but it doesn't do anything for LLVM yet other
than making the initial LLVM IR smaller.

It will be needed by a future commit, which rewrites ac_optimize_vs_outputs
in NIR, which relies on NIR matching the shader key.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14414>
2022-04-22 22:21:11 +00:00
Marek Olšák
2234362f54 radeonsi: don't compile monolithic PS for dual source blending
The code was compiling monolithic PS if a shader output didn't
have a color buffer, but dual src blending never has a color buffer
for mrt1.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15965>
2022-04-22 20:52:26 +00:00
Yonggang Luo
2ca6ef22f7 util: Rename pipe_debug_callback to util_debug_callback
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15657>
2022-04-01 01:52:43 +00:00
Pierre-Eric Pelloux-Prayer
7d7c56e61a radeonsi: drop LLVM global instruction selector
I'm not sure if this is really used by anyone?

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15559>
2022-03-31 10:15:19 +00:00
Marek Olšák
c8e2c6faf6 radeonsi: use SET_SH_REG_INDEX with index=3 for registers containing CU_EN
This matches PAL and RADV behavior. It's for preemption.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
2022-02-22 11:41:04 +00:00
Marek Olšák
12e00be09b radeonsi: apply the LLVM discard bug workaround to LLVM 13 only
It was fixed in LLVM 14.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
2022-02-22 11:41:04 +00:00
Marek Olšák
21f169b2fb ac,radeonsi: rework and optimize how TMPRING_SIZE is set
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
2022-02-22 11:41:04 +00:00
Marek Olšák
f865631b1b radeonsi: replace SI_RESOURCE_FLAG_UNMAPPABLE with PIPE_RESOURCE_FLAG_UNMAPPABLE
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
2022-02-22 11:41:04 +00:00
Marek Olšák
95af3cc2f8 amd: remove the _UMD suffix from register definitions
It was mistakenly added to indicate it's for a User-Mode Driver,
but all defined registers in Mesa are.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
2022-02-22 11:41:04 +00:00
Dave Airlie
d54c07b4c4 mesa/*: use an internal enum for tessellation primitive types.
To avoid dragging gl.h into places it has no business being,
defined tessellation primitive mode to an enum.

This has a lot of fallout all over the place.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14605>
2022-01-19 21:54:58 +00:00
Marek Olšák
afdfcdd542 radeonsi: determine MEM_ORDERED after generating a shader variant
because si_get_nir_shader runs NIR passes and some of them can introduce
new loads.

Fixes: 3fb77ef2e0 - radeonsi: do opt_large_constants & lower_indirect_derefs after uniform inlining

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14528>
2022-01-18 11:11:08 +00:00
Marek Olšák
e5dd32a48c radeonsi: apply fbfetch/indirect_descriptor to uses_vmem_load_other earlier
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14528>
2022-01-18 11:11:08 +00:00