Commit graph

95711 commits

Author SHA1 Message Date
Eric Engestrom
d861eb5fc2 util/disk_cache: turn MESA_GLSL_CACHE_DISABLE into a boolean
Instead of setting based on set/unset, allow users to use boolean values.
In the docs and tests, use `DISABLE=true` instead of `DISABLE=1` as it's
clearer IMO.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-09-12 13:53:12 +01:00
Eric Engestrom
717fb6e4be glx: turn LIBGL_NO_DRAWARRAYS into a boolean
Instead of setting based on set/unset, allow users to use boolean values.
In the docs, use `NO_DRAWARRAYS=true` instead of `NO_DRAWARRAYS=1` as it's
clearer IMO.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-09-12 13:53:12 +01:00
Eric Engestrom
d2768a397d glx: turn LIBGL_PROFILE_CORE into a boolean
Instead of setting based on set/unset, allow users to use boolean values.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-09-12 13:53:12 +01:00
Eric Engestrom
3fdbc46b42 glx: turn LIBGL_DUMP_VISUALID into a boolean
Instead of setting based on set/unset, allow users to use boolean values.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-09-12 13:53:12 +01:00
Eric Engestrom
14e431b270 egl+glx: turn LIBGL_DRI3_DISABLE into a boolean
Instead of setting based on set/unset, allow users to use boolean values.
In the docs, use `DISABLE=true` instead of `DISABLE=1` as it's clearer IMO.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-09-12 13:53:12 +01:00
Eric Engestrom
177fd320d6 glx: turn LIBGL_ALWAYS_INDIRECT into a boolean
Instead of setting based on set/unset, allow users to use boolean values.
In the docs, use `ALWAYS=true` instead of `ALWAYS=1` as it's clearer IMO.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-09-12 13:53:12 +01:00
Eric Engestrom
43e2d58698 glx: turn LIBGL_ALLOW_SOFTWARE into a boolean
Instead of setting based on set/unset, allow users to use boolean values.
In the help string, use `ALLOW=true` instead of `ALLOW=1` as it's clearer IMO.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-09-12 13:53:11 +01:00
Eric Engestrom
5c68ea29f3 egl+glx: turn LIBGL_ALWAYS_SOFTWARE into a boolean
Instead of setting based on set/unset, allow users to use boolean values.
In the docs, use `ALWAYS=true` instead of `ALWAYS=1` as it's clearer IMO.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-09-12 13:53:11 +01:00
Eric Engestrom
f4a9d205d8 glx: turn LIBGL_DIAGNOSTIC into a boolean
Instead of setting based on set/unset, allow users to use boolean values.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-09-12 13:53:11 +01:00
Eric Engestrom
6ea8db5b4c gbm: turn GBM_ALWAYS_SOFTWARE into a boolean
Instead of setting based on set/unset, allow users to use boolean values.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2017-09-12 13:53:11 +01:00
Tapani Pälli
f940b1665a anv: fix build issues on release build
Fixes: d083bc1c4b ("anv: wire up vk_errorf macro to do debug reporting")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
2017-09-12 13:29:11 +03:00
Iago Toral Quiroga
51bf007d2c glsl: Disallow unsized array of atomic_uint
This was a bugfix to the spec addressed in OpenGL 4.5 (revision
7 of the spec) and there is a CTS test to check this.

Fixes:
KHR-GL45.shader_atomic_counters.negative-unsized-array

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-09-12 09:16:05 +02:00
Tapani Pälli
ea314bf812 anv: remove extra 'debug:' from anv_debug_ignored_stype
anv_debug adds 'debug:' already, this is to clean following:
   debug: debug: anv_CreateDebugReportCallbackEXT: ignored VkStructureType 1000011000

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-09-12 09:42:19 +03:00
Tapani Pälli
a7ebb21744 anv: move brw_process_intel_debug_variable to happen early
Currently anv_perf_warn call in anv_compute_heap_size does not ever
report a perf warning. Move debug variable read as the first thing
in case there will be other perf_warn calls added.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-09-12 09:42:11 +03:00
Tapani Pälli
d083bc1c4b anv: wire up vk_errorf macro to do debug reporting
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-09-12 09:42:00 +03:00
Tapani Pälli
73638be11f anv: wire up anv_perf_warn macro to do debug reporting
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-09-12 09:41:10 +03:00
Tapani Pälli
086cfa5652 anv: implementation of VK_EXT_debug_report extension
Patch adds required functionality for extension to manage a list of
application provided callbacks and handle debug reporting from driver
and application side.

v2: remove useless helper anv_debug_report_call
    add locking around callbacks list
    use vk_alloc2, vk_free2
    refactor CreateDebugReportCallbackEXT
    fix bugs found with crucible testing

v3: provide ANV_FROM_HANDLE and use it
    misc fixes for issues Jason found
    use vk_find_struct_const for finding ctor_cb

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-09-12 09:39:29 +03:00
Iago Toral Quiroga
ab6f874439 i965: do not fallback to linear tiling for stencil surfaces
We were skipping this fallback for depth, but not for stencil
which the hardware always requires to be W-tiled.

Also, make the checks for whether we need to apply retiling
strategies based on usage instead of tiling flags, which is
safer and more explicit.

This fixes a regression in a CTS test introduced with commit
4ea63fab77 that started applying re-tiling stencil surfaces
in certain scenarios.

v2: discard retiling based on usage fields instead of tiling
    flags. This is safer and more explicit.

v3: Add a comment indicating that texturing of stencil in gen7
    requires an Y-tiled copy (Topi).

Fixes:
KHR-GL45.direct_state_access.renderbuffers_storage

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2017-09-12 08:09:45 +02:00
Juan A. Suarez Romero
806ae6a648 nir/spirv: handle if's with same label in both branches
When a conditional branch has the same labels in the "if" part and in the
"else" part, then we have the same cfg block, and it must be handled
once.

v2: handle it the same way as OpBranch (Jason).

Fixes:
dEQP-VK.spirv_assembly.instruction.compute.conditional_branch.same_labels*
dEQP-VK.spirv_assembly.instruction.graphics.conditional_branch.same_labels*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-09-12 07:01:40 +02:00
Aaron Watry
5666d3e3e5 mesa/st: Include builddir/src/compiler/glsl to fix make check
Otherwise, when doing an out-of-tree build you can expect the following:

make[6]: Entering directory \
         '${MESA_SRC}/build/src/mesa/state_tracker/tests'
  CXX      test_glsl_to_tgsi_lifetime.o
In file included from \
    ${MESA_SRC}/src/mesa/src/mesa/state_tracker/st_glsl_to_tgsi_private.h:31:0,
  from \
    ${MESA_SRC}/src/mesa/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.h:27,
  from \
    ${MESA_SRC}/src/mesa/src/mesa/state_tracker/tests/test_glsl_to_tgsi_lifetime.cpp:24:
  ${MESA_SRC}/src/compiler/glsl/ir.h:1502:37: \
    fatal error: ir_expression_operation.h: No such file or directory
 #include "ir_expression_operation.h"

Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Gert Wollny <gw.fossdev@gmail.com>
2017-09-11 20:18:18 -05:00
Dave Airlie
f2d0f587ca radv: work out a base ia_multi_vgt_param.
This just reduces the calculations a bit further.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-11 23:55:15 +01:00
Dave Airlie
ded1dbfd96 radv: calculate non-draw related ia_multi_vgt_param bits in pipeline
This moves a bunch of non-draw dependent calcs into the pipeline code,
to reduce CPU overheads in the draw path.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-11 23:55:15 +01:00
Dave Airlie
d2490eb2d1 radv: move calculating primgroup_size to pipeline.
This moves this out of the draw paths.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-11 23:55:15 +01:00
Dave Airlie
16eac0a756 radv: only calculate num_prims when required.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-11 23:55:15 +01:00
Dave Airlie
6cc545b212 radv: use upload_data to upload push descriptors.
This is just a reusing code.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-11 23:55:15 +01:00
Dave Airlie
1dbcfd2941 radv: realign vgt flush on hawaii workaround with radeonsi.
This realigns this code with the radeonsi version and fixes
the indirect case to work properly.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-11 23:55:14 +01:00
Samuel Pitoiset
4f395e28a7 radv: return an error code when resetting a command buffer
If the upload BO allocation failed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-09-11 21:57:02 +02:00
Samuel Pitoiset
03542d1663 radv: remove unnecessary goto in radv_create_cmd_buffer()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-09-11 21:57:01 +02:00
Samuel Pitoiset
fcab014f7d radv: do not pass a pipeline object to radv_emit_graphics_pipeline()
To be consistent with radv_emit_compute_pipeline().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-09-11 21:56:58 +02:00
Dave Airlie
310fca375c radv: add debug flags to zero vram allocations.
We are seeing apps that sometimes rely on Windows behaviour, add
a flag to rule out vram zeroing.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-12 05:37:15 +10:00
Marek Olšák
6eade342eb radeonsi: optimize TCS epilog when invocation 0 writes tess factors
This removes the barrier and LDS stores and loads for tess factors
when it's possible. The removal of the barrier seems more important
to me though.

In one shader, it removes 17 * 4 bytes from the shader binary.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 19:02:02 +02:00
Marek Olšák
386d165d8d tgsi/scan: add a new pass that analyzes tess factor writes (v2)
The pass tries to deduce whether tess factors are always written by
all shader invocations.

The implication for radeonsi is that it doesn't have to use a barrier
near the end of TCS, and doesn't have to use LDS for passing the tess
factors to the epilog.

v2: Handle barriers and do the analysis pass for each code segment
    surrounded by barriers separately, and AND results from all
    such segments writing tess factors. The change is trivial in the main
    switch statement.

    Also, the result is renamed to "tessfactors_are_def_in_all_invocs"
    to make the name accurate.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 19:02:02 +02:00
Anuj Phogat
b2dae9f8fd intel: Remove unused Kabylake pci id
I missed this one in Mesa commit ebc5ccf.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-09-11 08:45:43 -07:00
Rob Herring
0ba2d26525 Android: Add LLVM support for Android P
The Android version in AOSP master has changed now to P, so we need to add
LLVM flags for it. Duplicating the lines because I expect the version will
get bumped at some point and diverge from O.

Cc: Chih-Wei Huang <cwhuang@android-x86.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2017-09-11 09:35:23 -05:00
Chih-Wei Huang
af726a1e2c Android: fix undeclared identifier 'gfx9d_reg_table'
Since commit 552aaa11 the compiler complains:

external/mesa/src/amd/common/ac_debug.c:124:51: error: use of undeclared identifier 'gfx9d_reg_table'; did you mean 'sid_reg_table'?
                reg = find_register(gfx9d_reg_table, ARRAY_SIZE(gfx9d_reg_table), offset);
                                                                ^~~~~~~~~~~~~~~
                                                                sid_reg_table

It's because the commit ef97cc0c ("radeonsi/gfx9: add IB parser support")
add gfx9d.h as a recipe of sid_tables.h. But the corresponding Android.mk
was not updated. However, it's not spotted since gfx9d_reg_table is not
really used until commit 552aaa11 was landed.

Fixes: 552aaa11 (ac/debug: take ASIC generation into account when printing registers)

Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2017-09-11 09:35:23 -05:00
Marek Olšák
a2a326e8f8 winsys/amdgpu: use the new raw CS API
This also cleans things up.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák
3824ca7610 radeonsi: implement pipe_context::fence_server_sync
This will be more useful once we have sync_file support.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák
8843bf6dfd winsys/amdgpu: factor out some fence dependency code into separate functions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák
a6eb164eb2 winsys/amdgpu: rename fence_dependency functions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák
fc45495474 gallium/radeon: add a proper fail path for calloc in r600_flush_from_st
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák
7213293fe2 winsys/amdgpu: don't allow interprocess resource sharing for IBs
Now we should get IB submissions with bo_list == NULL when DRI buffers
aren't referenced.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Marek Olšák
46e7478986 radeonsi/gfx9: fix interprocess resource sharing on Raven
This kinda fragiile, but it at least unbreaks the driver.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-09-11 16:29:52 +02:00
Nicolai Hähnle
03203b7448 st/glsl_to_tgsi: only the first (inner-most) array reference can be a 2D index
Don't get distracted by record dereferences between array references.

Fixes dEQP-GLES31.functional.tessellation.user_defined_io.per_vertex_block.*

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-09-11 15:03:57 +02:00
Samuel Iglesias Gonsálvez
5b1b088f2a nir/spirv: fix chain access with different index bit sizes
Currently we support 32-bit indexes/offsets all over the driver, so we
convert them to that bit size.

Fixes dEQP-VK.spirv_assembly.instruction.*.indexing.*

v2: Use u2u32 instead (Jason).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-09-11 10:03:39 +02:00
Dave Airlie
8d6b97a815 r600: handle the non-TXF_LZ support path.
it appears that texcoord.z/w will be 0 in all cases already,
so just put them into the vbo always.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-11 02:10:24 +02:00
Marek Olšák
c1d92f8222 gallium/u_blitter: use UTIL_BLITTER_ATTRIB_NONE (0) instead of 0 directly
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
2017-09-11 02:10:24 +02:00
Marek Olšák
005fa89bfa gallium/u_blitter: don't pass GENERIC in VS if it's not needed
Now, depth-only clears and custom passes don't read memory in VS.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
2017-09-11 02:10:24 +02:00
Marek Olšák
22ed1ba01a gallium/u_blitter: use draw_rectangle for all blits except cubemaps
Add ZW coordinates to the draw_rectangle callback and use it.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
2017-09-11 02:10:24 +02:00
Marek Olšák
43247c440e gallium/u_blitter: use draw_rectangle callback for layered clears
They are done with instancing.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
2017-09-11 02:10:23 +02:00
Marek Olšák
7aaf4c73de gallium/u_blitter: add new union blitter_attrib to replace pipe_color_union
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Brian Paul <brianp@vmware.com>
2017-09-11 02:10:23 +02:00