Commit graph

76597 commits

Author SHA1 Message Date
Kenneth Graunke
d33c478bed i965: Remove catch-all nir_lower_io call with specific cases.
Most cases already call nir_lower_io explicitly for input and output
lowering.  This catch all isn't very useful anymore - we can just add it
to the remaining cases.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-02-26 15:55:59 -08:00
Kenneth Graunke
51f8797993 i965: Move optimizations from brw_nir_lower_io to brw_postprocess_nir.
This simplifies things.  Every caller of brw_nir_lower_io() immediately
calls brw_postprocess_nir().  The only real change this will have is
that we get an extra brw_nir_optimize() call when compiling compute
shaders, but that seems fine.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-02-26 15:55:59 -08:00
Kenneth Graunke
dcd4a841e9 i965: Always do NIR IO lowering at specialization time.
We've now hit literally every case other than geometry shaders (and
compute shaders, but those are a no-op).  So, let's just move geometry
shaders over too and be done with it.

The only advantage to doing this at link time was to save the expense
of running the pass on recompiles.  But we're already running a lot of
passes, and the extra code complexity isn't worth it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-02-26 15:55:59 -08:00
Kenneth Graunke
fa7135107f i965: Make an is_scalar boolean in brw_compile_gs().
Shorter than compiler->scalar_stage[MESA_SHADER_GEOMETRY], which can
help with line-wrapping.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-02-26 15:55:59 -08:00
Jason Ekstrand
b3cb6e78aa i965/nir: Do lower_io late for fragment shaders
The Vulkan driver wants to be able to delete fragment outputs that are
beyond key.nr_color_regions; this is a lot easier if we lower outputs at
specialization time rather than link time.

(Rationale added to commit message by Ken)

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-02-26 15:55:59 -08:00
Jordan Justen
7428e6f86a i965: Set dest type to UW for several send messages
Without this, on SIMD 16 the send instruction destination will appear
to write more than one destination register, causing the simulator to
report an error.

Of course, the send instruction can actually write more than one
destination register regardless of the type set for the destination,
so this is a bit strange.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-02-26 12:03:56 -08:00
Samuel Pitoiset
aad48f8691 nvc0: rework nvc0_compute_validate_program()
Reduce the amount of duplicated code by re-using
nvc0_program_validate(). While we are at it, change the prototype
to return void and remove nvc0_compute.h which is now useless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre Moreau <pierre.morrow@free.fr>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-26 14:00:27 +01:00
Samuel Pitoiset
e1f5c76047 nvc0: make sure to validate compute global buffers on Fermi
No reason to not validate those global buffers and this might avoid
fails if someone try to use the global memory from compute programs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre Moreau <pierre.morrow@free.fr>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-26 14:00:23 +01:00
Samuel Pitoiset
dcf7938833 nvc0: move nvc0_validate_global_residents() to nvc0_compute.c
While we are at it, rename it to nvc0_compute_validate_globals() and
update its prototype.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre Moreau <pierre.morrow@free.fr>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-26 14:00:18 +01:00
Derek Foreman
d085a5dff5 egl/wayland: Try to use wl_surface.damage_buffer for SwapBuffersWithDamage
Since commit d1314de293 we ignore
damage passed to SwapBuffersWithDamage.

Wayland 1.10 now has functionality that allows us to properly
process those damage rectangles, and a way to query if it's
available.

Now we can use wl_surface.damage_buffer and interpret the incoming
damage as being in buffer co-ordinates.

Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Pekka Paalanen <pekka.paalanen@collabora.co.uk>
Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
2016-02-26 11:49:09 +00:00
Dave Airlie
840aa52f50 virgl: add missing CAP turned off. 2016-02-26 04:03:09 +00:00
Miklós Máté
847f1cc698 program: Remove extra reference_program()
It was already done in get_mesa_program()

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2016-02-25 22:02:50 +01:00
Emil Velikov
51c65a4c48 automake: add nine to make distcheck
Will allow us to catch/prevent issues, like the one in mesa 11.2.0-rc1.

Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-25 19:56:07 +00:00
Emil Velikov
b08dbc84fe st/nine: don't forget to bundle the nine_limits.h file
Without this mesa 11.2.0-rc1 ended up busted :-(

Cc: "11.2" <mesa-stable@lists.freedesktop.org>
Repored-by: Ondřej Súkup <mimi.vx@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-02-25 19:56:07 +00:00
Matt Turner
4009a9ead4 i965/fs: Allow saturate propagation to propagate negations into MADs.
Allows us to transform

   mad      res  src0   src1   src2
   mov.sat  dst  -res

into

   mad.sat  dst  -src0 -src1   src2

instructions in affected programs: 3712 -> 3688 (-0.65%)
helped: 24

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-02-25 10:51:15 -08:00
Matt Turner
65d3217cb0 i965/fs: Allow saturate propagation to propagate negations into ADDs.
Allows us to transform

   add      res  src0   src1
   mov.sat  dst  -res

into

   add.sat  dst  -src0 -src1

No shader-db changes.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-02-25 10:51:13 -08:00
Matt Turner
7b6113bc2d i965/fs: Allow saturate propagation to propagate negations into MULs.
Allows us to transform

   mul      res  src0   src1
   mov.sat  dst  -res

into

   mul.sat  dst  src0  -src1

instructions in affected programs: 45246 -> 45054 (-0.42%)
helped: 162

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-02-25 10:51:10 -08:00
Matt Turner
1567da1e28 i965/fs: Don't CSE negated multiplies with saturation.
It's not correct to CSE these multiplies

   mul.sat dst1, -a, b
   mul.sat dst2,  a, b

by emitting a negated MOV from dst1 to dst2:

   mul.sat dst1, -a, b
   mov     dst2, -dst1

Take 2.0*2.0 for example. The first multiply would produce 0.0 and the
second would produce 1.0.

Fixes bad generated code in 18 to 22 shaders:

instructions in affected programs: 432 -> 464 (7.41%)
helped: 4
HURT: 18

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-02-25 10:51:04 -08:00
Matt Turner
3da789f1e9 glsl: Consider ubo_load to be a horizontal operation.
Unclear to me whether it actually is a horizontal operation that cannot
be vectorized, but the fact that i965 generates the same code in either
case makes me less interested in finding out.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94199
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-25 10:50:34 -08:00
Andres Gomez
d1509a5848 glsl/ast: Implicit conversion from double to float is not allowed
Also, renamed get_conversion_operation to avoid
future misunderstandings.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-02-25 13:10:50 +01:00
Oded Gabbay
439b5b008f gallium/radeon: return correct values for BE in r600_translate_colorswap
Because I changed the swizzle check, I also need to adapt the return
values for each check.

It's basically almost the same as before, we just cross between STD and
STD_REV, and cross between ALT and ALT_REV

This fixes the rgba test in gl-1.0-readpixsanity (piglit) and also
fixes tri-flat (mesa demos).

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-25 09:21:08 +02:00
Oded Gabbay
ff8b41b702 gallium: remove duplicate define from enum pipe_format
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-25 09:21:08 +02:00
Ian Romanick
9d9aeb91b1 glsl: Detect do-while-false loops and unroll them
Previously loops like

   do {
      // ...
   } while (false);

that did not have any other loop-branch instructions would not be
unrolled.  This is commonly used to wrap multiline preprocessor macros.

This produces IR like

    (loop (
       ...
       break
    ))

Since limiting_terminator was NULL, the loop unroller would
throw up its hands and say, "I don't know how many iterations.  How
can I unroll this?"

We can detect this another way.  If there is no limiting_terminator
and the only loop-branch is a break as the last IR, there's only one
iteration.

On my very old checkout of shader-db, this removes a loop from Orbital
Explorer, but it does not otherwise affect the shader.  The loop removed
is the one the compiler inserts surrounding the switch statement.

This change does prevent some seriously bad code generation in some
patches to meta shaders that I recently sent out for review.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-02-24 18:43:40 -08:00
Nanley Chery
3eb476fa14 i965: Enable tiled mem_copy with sRGB-formatted resources
RGBA8 and BGRA8 unorm formats are compatible with the various
mem_copy functions. Their sRGB counterparts are also compatible
because they're also color-renderable (of importance when the
specified resource is a readbuffer) and they share the same
physical layout.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-02-24 14:40:34 -08:00
Brian Paul
c95d5c5f6f mesa: replace for loop with bitshifting in supported_buffer_bitmask()
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:32:01 -07:00
Brian Paul
ac37d0475c mesa: updates some comments in buffers.c
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:53 -07:00
Brian Paul
d8412029bb mesa: make _mesa_draw_buffers() static
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:44 -07:00
Brian Paul
24d8080507 mesa: make _mesa_draw_buffer() static
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:41 -07:00
Brian Paul
ebfcf9de43 mesa: make _mesa_read_buffer() static
Not called from any other file.  Remove _mesa_ prefix and update comments.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:37 -07:00
Brian Paul
1e41c2e135 mesa: move declaration of buffer var in handle_first_current()
Declare the var in the scopes where it's used.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:31 -07:00
Brian Paul
c8fdb42c91 mesa: use gl_buffer_index in a few places
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:28 -07:00
Brian Paul
363019e17a st/mesa: remove useless break statement
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:23 -07:00
Brian Paul
953cb24e65 st/mesa: rename st_readpixels to st_ReadPixels
To match the convention of other device driver functions.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:31:17 -07:00
Brian Paul
83b589301f st/mesa: fix frontbuffer glReadPixels regressions
The change "mesa/readpix: Don't clip in _mesa_readpixels()" caused a
few piglit regressions.  The failing tests use glReadPixels to read
from the front color buffer.  The problem is we were trying to read
from a non-existant front color buffer.  The front color buffer is
created on demand in st/mesa.  Since the missing buffer bounds were
effectively 0 x 0 the glReadPixels was totally clipped and returned
early.

The fix involves creating the real front color buffer when we're about
to try reading from it.

Tested with llvmpipe and VMware driver on Linux, Windows.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94253
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94254
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94257
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-02-24 08:30:07 -07:00
Oded Gabbay
4b7e219e61 gallium/radeon: Correctly translate colorswaps for big endian
The current code in r600_translate_colorswap uses the swizzle information
to determine which colorswap to use.

This works for BE & LE when the nr_channels is <4, but when nr_channels==4
(e.g. PIPE_FORMAT_A8R8G8B8_UNORM), this method can not be used for both BE
and LE, because the swizzle info is the same for both of them.

As a result, r600g doesn't support 24bit color formats, only 16bit, which
forces the user to choose 16bit color in X server.

This patch fixes this bug by separating the checks for LE and BE and
adapting the swizzle conditions in the BE part of the checks.

Tested on an Evergreen GPU (Cedar GL FirePro 2270) running inside POWER7
Big-Endian Machine.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
CC: "11.2" "11.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-23 20:55:40 +02:00
Thomas Hindoe Paaboel Andersen
1807806add mesa: use sizeof on the correct type
Before the luminance stride was based on the size of GL_FLOAT
which is just the type constant (0x1406). Change it to use the
size of GLfloat.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-23 08:55:35 -07:00
Marek Olšák
190a291b03 tgsi/scan: handle holes between VS inputs, assert-fail in other cases
"st/mesa: overhaul vertex setup for clearing, glDrawPixels, glBitmap"
added a vertex shader declaring IN[0] and IN[2], but not IN[1].

Drivers relying on tgsi_shader_info can't handle holes in declarations,
because tgsi_shader_info doesn't track that.

This is just a quick workaround meant for stable that will work for vertex
shaders.

This fixes radeonsi DrawPixels and CopyPixels crashes.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-02-23 16:42:16 +01:00
Francisco Jerez
31a0affa28 docs: Mark off GL_OES_shader_image_atomic as done.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 19:59:56 -08:00
Francisco Jerez
058ed980c6 i965/fs: Return result of image atomic in a register of the expected type.
So the result is of float type if we're implementing the float
overload of imageAtomicExchange.  This is the only back-end change
required to support OES_shader_image_atomic AFAICT.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 19:57:09 -08:00
Francisco Jerez
81c16a2dab glsl: Implement the required built-in functions when OES_shader_image_atomic is enabled.
This is basically just the same atomic functions exposed by
ARB_shader_image_load_store, with one exception:

    "highp float imageAtomicExchange(
         coherent IMAGE_PARAMS,
         float data);"

There's no float atomic exchange overload in the original
ARB_shader_image_load_store or GL 4.2, so this seems like new
functionality that requires specific back-end support and a separate
availability condition in the built-in function generator.

v2: Move image availability predicate logic into a separate static
    function for clarity.  Had to pull out the image_function_flags
    enum from the builtin_builder class for that to be possible.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 19:56:54 -08:00
Francisco Jerez
be125af95e glsl: Add usual extension boilerplate for OES_shader_image_atomic.
v2: No need for extension enable bits (Ilia).

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 19:56:35 -08:00
Francisco Jerez
009bbecf6d mesa: Add extension table entry for OES_shader_image_atomic.
v2: No need for extension enable bits (Ilia).

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 19:55:35 -08:00
Samuel Pitoiset
2999257e0f nvc0: rename 3d binding points to NVC0_BIND_3D_XXX
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset
9c6a7bfb40 nvc0: rename 3d dirty flags to NVC0_NEW_3D_XXX
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset
2c48369f54 nvc0: prefix compute macros with _CP_ instead of _COMPUTE_
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset
bbff97ae39 nvc0: rename NVXX_COMPUTE to NVXX_CP
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset
5330ed959e nvc0: rename nvc0_context::dirty to nvc0_context::dirty_3d
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset
84b9b8f0a3 nvc0/ir: add missing emission of locked load predicate
Like unlocked store on shared memory, locked store can fail and the
second dest which is a predicate must be emitted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
2016-02-22 21:28:51 +01:00
Samuel Pitoiset
9f0d059d4b nvc0/ir: add ld lock/st unlock emission on GK104
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00
Samuel Pitoiset
6526225f88 nv50/ir: restore OP_SELP to be a regular instruction
Actually OP_SELP doesn't need to be a compare instruction. Instead we
just need to set the NOT modifier when building the instruction.
While we are at it, fix the dst register type and use a GPR.

Suggested by Ilia Mirkin.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-02-22 21:28:51 +01:00