Commit graph

28200 commits

Author SHA1 Message Date
Matt Turner
d2838f77ec r300g: Avoid aliasing violation.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-08-01 12:09:17 -07:00
Matt Turner
16ff8f9ae8 gallium/auxiliary: Add u_bitcast.h header.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-08-01 12:09:17 -07:00
Brian Paul
13fa051356 auxiliary/os: add new os_get_command_line() function
This can be used by the driver to get the command line which started
the process.  Will be used by the VMware driver for extra logging.

For now, this is only implemented for Linux via /proc/self/cmdline
and Windows via GetCommandLine().

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-08-01 12:20:19 -06:00
Charmaine Lee
c2b4942afc svga: avoid redundant SetVertexBuffer/SetIndexBuffer commands at rebind
This patch eliminates the redundant SetVertexBuffers and
SetIndexBuffer commands that are emitted for rebind purpose.
With this patch, the set commands will be skipped, but we will still
reference the associated resources to allow the kernel to
bring in the resources.

Tested with Lightsmark2008, Valley, MTT glretrace, piglit, conform.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-08-01 12:20:19 -06:00
Rob Clark
53b2b8bf6f u_vbuf: fix potentially bogus assert
There are cases where we hit u_vbuf path due to alignment or pitch-
alignment restrictions, but for an output-format that u_vbuf does not
support translating (yet the driver does support natively).  In which
case we hit the memcpy() path and don't care that u_vbuf doesn't
understand it.

Fixes crash with debug build of mesa in:
dEQP-GLES3.functional.vertex_arrays.single_attribute.strides.fixed.user_ptr_stride17_components2_quads1

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95000
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-08-01 13:42:11 -04:00
Eric Anholt
26ff7e373f vc4: Zero-initialize the hardware sampler view structure.
Fixes failure to initialize the force_first_level flag, causing
failures in piglit levelclamp.
2016-07-31 19:23:03 -07:00
Roland Scheidegger
99a47391e4 Revert "gallium/util: fix resource leak"
This reverts commit d1fe26a628.

Replacing a resource leak with a segfault isn't the solution.
2016-07-30 18:18:09 +02:00
Eric Engestrom
d1fe26a628 gallium/util: fix resource leak
CovID: 401540
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2016-07-30 17:27:42 +02:00
francians@gmail.com
e713a9e613 freedreno/a4xx: fix comparison out of range warnings
Signed-off-by: Francesco Ansanelli <francians@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:25:42 -04:00
francians@gmail.com
43492c7f2c freedreno/a3xx: fix comparison out of range warnings
Signed-off-by: Francesco Ansanelli <francians@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:25:31 -04:00
francians@gmail.com
089cc74b6a freedreno/a2xx: fix comparison out of range warnings
Signed-off-by: Francesco Ansanelli <francians@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:25:16 -04:00
francians@gmail.com
3fa68fdc90 freedreno/ir3: init ir3_shader_key with memset()
To silence missing initializers warning

Signed-off-by: Francesco Ansanelli <francians@gmail.com>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:24:59 -04:00
Eric Engestrom
a63bac9271 gallium/freedreno: move cast to avoid integer overflow
Previously, the bitshift would be performed on a simple int (32 bits on
most systems), overflow, and then be cast to 64 bits.

CovID: 1362461
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Eric Engestrom
3563c4d161 freedreno/a2xx: remove duplicate assignment
CovID: 1362445, 1362446
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
2d64a003c5 freedreno: defer flush_queue allocation
Some apps, like warsow, create a bazillion contexts but don't render on
most of them.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
4175606474 freedreno: add some hw query traces
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
e684c32d2f freedreno: some locking
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
010e4b2d52 os: add pipe_mutex_assert_locked()
Would be nice if we could also have lockdep, like in the linux kernel.
But this is better than nothing.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
9f0eb69527 freedreno: drop needs_rb_fbd
We need to emit RB_FRAME_BUFFER_DIMENSION once per batch.. tracking this
in fd_context is wrong when the gmem code executes asynchronously from
the flush_queue worker.  But in fact we don't really need to track it at
all.  We cannot assume previous value at the beginning of the batch
(because of other processes potentially using the GPU), so just drop the
tracking and emit it in _tile_init().

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
e6bfe1c773 freedreno: move needs_wfi into batch
This is also used in gmem code, which executes from the "bottom half"
(ie. from the flush_queue worker thread), so it cannot be in fd_context.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
0739bbceec freedreno: a bit of micro-optimization
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
e1b1052700 freedreno: drop mem2gmem/gmem2mem query stages
They weren't really used, and it gets somewhat more complicated to deal
with if batches are flushed asynchronously (on another thread).  So just
drop them, and move _query_set_state(NULL) call into batch (so it is not
happening on background thread).

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
00bed8a794 freedreno: threaded batch flush
With the state accessed from GMEM+submit factored out of fd_context and
into fd_batch, now it is possible to punt this off to a helper thread.
And more importantly, since there are cases where one context might
force the batch-cache to flush another context's batches (ie. when there
are too many in-flight batches), using a per-context helper thread keeps
various different flushes for a given context serialized.

TODO as with batch-cache, there are a few places where we'll need a
mutex to protect critical sections, which is completely missing at the
moment.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
c44163876a freedreno: track batch/blit types
Add a bit of extra book-keeping about blits and back-blits (from
resource shadowing).  If the app uploads all mipmap levels, as opposed
to uploading the first level and then glGenerateMipmap(), we can discard
the back-blit (as opposed to being naive and shadowing the resource for
each mipmap level).  Also, after a normal blit, we might as well flush
the batch immediately, since there is not likely to be further rendering
to the surface.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
7f8fd02dc7 freedreno: re-order support for hw queries
Push query state down to batch, and use the resource tracking to figure
out which batch(es) need to be flushed to get the query result.

This means we actually need to allocate the prsc up front, before we
know the size.  So we have to add a special way to allocate an un-
backed resource, and then later allocate the backing storage.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
10baf05b2c freedreno: use prsc for hw queries
Switch to using a pipe_resource (rather than an fd_bo directly) for hw
query result buffers.  This is first step towards making queries work
properly with reordered batches, since we'll need the additional
dependency tracking to know which batches to flush.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
ba30096888 freedreno: support discarding previous rendering in special cases
Basically, to "DCE" blits triggered by resource shadowing, in cases
where the levels are immediately completely overwritten.  For example,
mid-frame texture upload to level zero triggers shadowing and back-blits
to the remaining levels, which are immediately overwritten by
glGenerateMipmap().

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
7105774bab freedreno: shadow textures if possible to avoid stall/flush
To make batch re-ordering useful, we need to be able to create shadow
resources to avoid a flush/stall in transfer_map().  For example,
uploading new texture contents or updating a UBO mid-batch.  In these
cases, we want to clone the buffer, and update the new buffer, leaving
the old buffer (whose reference is held by cmdstream) as a shadow.

This is done by blitting the remaining other levels (and whatever part
of current level that is not discarded) from the old/shadow buffer to
the new one.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
dcde4cd114 freedreno: spiff up some debug traces
Make it easier to track batches, to ensure things happen properly when
they are reordered.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
9f219c7047 freedreno: add batch-cache and batch reordering
Note that I originally also had a entry-point that would construct a key
and do lookup from a pipe_surface.  I ended up not needing that (yet?)
but it is easy-enough to re-introduce later if we need it for the blit
path.

For now, not enabled by default, but can be enabled (on a3xx/a4xx) with
FD_MESA_DEBUG=reorder.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
f02a64dbdd freedreno: move more batch related tracking to fd_batch
To flush batches out of order, the gmem code needs to not depend on
state from fd_context (since that may apply to a more recent batch).
So this all moves into batch.

The one exception is the gmem/pipe/tile state itself.  But this is
only used from gmem code (and batches are flushed serially).  The
alternative would be having to re-calculate GMEM layout on every
batch, even if the dimensions of the render targets are the same.

Note: This opens up the possibility of pushing gmem/submit into a
helper thread.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
eeafaf2d37 freedreno: dynamically sized/growable cmd buffers
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
9e4561d3c4 freedreno: push resource tracking down into batch
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
9bbd239a40 freedreno: introduce fd_batch
Introduce the batch object, to track a batch/submit's worth of
ringbuffers and other bookkeeping.  In this first step, just move
the ringbuffers into batch, since that is mostly uninteresting
churn.

For now there is just a single batch at a time.  Note that one
outcome of this change is that rb's are allocated/freed on each
use.  But the expectation is that the bo pool in libdrm_freedreno
will save us the GEM bo alloc/free which was the initial reason
to implement a rb pool in gallium.

The purpose of the batch is to eventually facilitate out-of-order
rendering, with batches associated to framebuffer state, and
tracking the dependencies on other batches.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-30 09:23:42 -04:00
Rob Clark
591eeb7d1c freedreno: limit non-user constant buffers to a4xx
Seems to mostly work on a3xx.  Except when it doesn't and kills gpu
quite badly.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-07-29 14:58:39 -04:00
Rob Herring
a235765d27 virgl: add exported dmabuf to BO hash table
Exported dmabufs can get imported by the same process, but the handle was
not getting added to the hash table on export. Add the handle to the hash
table on export.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-07-29 09:09:56 +10:00
Emil Velikov
8431c0e9d4 vc4: automake: remove vc4_drm.h from the sources lists
The file was removed with earlier commit breaking 'make dist'.
Drop it from Makefile.sources since it's no longer around.

Fixes: 16985eb308 ("vc4: Switch to using the libdrm-provided
vc4_drm.h.")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2016-07-28 14:08:24 +01:00
Nicolai Hähnle
bade0cd0fb ddebug: use pclose to close a popen()'d FILE
Found by Coverity.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-07-28 10:47:51 +01:00
Dieter Nützel
041b330a32 clover: make GCC 4.8 happy
Without this GCC 4.8.x throws below error:

error: invalid initialization of non-const reference of type
'clover::llvm::compat::raw_ostream_to_emit_file {aka llvm::raw_svector_ostream&}'
from an rvalue of type '<brace-enclosed initializer list>'

v2: change commit title and add error message like Eric Engestrom requested

Signed-off-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97019
[ Francisco Jerez: Trivial formatting fix. ]
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2016-07-27 20:41:05 -07:00
Samuel Pitoiset
af08cfc626 nvc0: enable ARB_tessellation_shader on GM107+
This exposes OpenGL 4.1 on Maxwell (tested on GM107 and GM206).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-27 23:19:07 +02:00
Samuel Pitoiset
3ac373df6e gm107/ir: add a legalize SSA pass for PFETCH
PFETCH, actually ISBERD on GM107+ ISA only accepts a GPR for src0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-27 23:18:58 +02:00
Samuel Pitoiset
653af07119 nvc0: fix up TCP header on GM107+
The number of outputs patch (limited to 255) has moved in the TCP
header, but blob seems to also set the old position. Also, the high
8-bits are now located inbetween the min/max parallel output read
address at position 20.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-27 23:18:41 +02:00
Marek Olšák
c98c732158 radeon/llvm: Use alloca instructions for larger arrays [revert a revert]
This reverts commit f84e9d749f.

Bioshock Infinite no longer hangs.
2016-07-26 23:31:56 +02:00
Marek Olšák
8636a718b5 r600g: add support for B5G6R5 PBO uploads via texture buffers (v2)
v2: set endian swap to 16

untested
2016-07-26 23:21:45 +02:00
Marek Olšák
1e5f00f9d5 radeonsi: pre-generate shader logs for ddebug
This cuts down the overhead of si_dump_shader when ddebug is capturing
shader logs, which is done for every draw call unconditionally (that's
quite a lot of work for a draw call).

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-07-26 23:06:46 +02:00
Marek Olšák
18475aab6d radeonsi: add empty lines after shader stats
to separate individual shaders dumped consecutively.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-07-26 23:06:46 +02:00
Marek Olšák
dd66f9d3e7 radeonsi: move the shader key dumping to si_shader_dump
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-07-26 23:06:46 +02:00
Marek Olšák
b47727a83a ddebug: implement pipelined hang detection mode
For good performance while being able to generate decent hang reports.
The report doesn't contain the parsed IB and the buffer list, but it
isolates the draw call and dumps shaders while not having to flush
the context.

This is for GPU hangs that are harder to reproduce and require interactive
playing for minutes or even hours.

dd_pipe.h explains some implementation details. Initializing, copying
(recording) and clearing states is most of the code.

The performance should be at least 50% of the normal performance depending
on the circumstances. (i.e. 50% is expected to be the worst case scenario,
not the best case) The majority of time is spent in
dump_debug_state(PIPE_DUMP_CURRENT_SHADERS) and that's after all
the optimizations in later patches. There is no obvious way to optimize
that further.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-07-26 23:06:46 +02:00
Marek Olšák
0795a3d54f ddebug: don't save pointers to call parameters
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-07-26 23:06:46 +02:00
Marek Olšák
e4079677a7 ddebug: move dd_call into dd_pipe.h
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-07-26 23:06:46 +02:00